tda10086.c 19 KB

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  1. /*
  2. Driver for Philips tda10086 DVBS Demodulator
  3. (c) 2006 Andrew de Quincey
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include <linux/init.h>
  17. #include <linux/module.h>
  18. #include <linux/device.h>
  19. #include <linux/jiffies.h>
  20. #include <linux/string.h>
  21. #include <linux/slab.h>
  22. #include "dvb_frontend.h"
  23. #include "tda10086.h"
  24. #define SACLK 96000000
  25. struct tda10086_state {
  26. struct i2c_adapter* i2c;
  27. const struct tda10086_config* config;
  28. struct dvb_frontend frontend;
  29. /* private demod data */
  30. u32 frequency;
  31. u32 symbol_rate;
  32. bool has_lock;
  33. };
  34. static int debug;
  35. #define dprintk(args...) \
  36. do { \
  37. if (debug) printk(KERN_DEBUG "tda10086: " args); \
  38. } while (0)
  39. static int tda10086_write_byte(struct tda10086_state *state, int reg, int data)
  40. {
  41. int ret;
  42. u8 b0[] = { reg, data };
  43. struct i2c_msg msg = { .flags = 0, .buf = b0, .len = 2 };
  44. msg.addr = state->config->demod_address;
  45. ret = i2c_transfer(state->i2c, &msg, 1);
  46. if (ret != 1)
  47. dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
  48. __func__, reg, data, ret);
  49. return (ret != 1) ? ret : 0;
  50. }
  51. static int tda10086_read_byte(struct tda10086_state *state, int reg)
  52. {
  53. int ret;
  54. u8 b0[] = { reg };
  55. u8 b1[] = { 0 };
  56. struct i2c_msg msg[] = {{ .flags = 0, .buf = b0, .len = 1 },
  57. { .flags = I2C_M_RD, .buf = b1, .len = 1 }};
  58. msg[0].addr = state->config->demod_address;
  59. msg[1].addr = state->config->demod_address;
  60. ret = i2c_transfer(state->i2c, msg, 2);
  61. if (ret != 2) {
  62. dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg,
  63. ret);
  64. return ret;
  65. }
  66. return b1[0];
  67. }
  68. static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask, int data)
  69. {
  70. int val;
  71. /* read a byte and check */
  72. val = tda10086_read_byte(state, reg);
  73. if (val < 0)
  74. return val;
  75. /* mask if off */
  76. val = val & ~mask;
  77. val |= data & 0xff;
  78. /* write it out again */
  79. return tda10086_write_byte(state, reg, val);
  80. }
  81. static int tda10086_init(struct dvb_frontend* fe)
  82. {
  83. struct tda10086_state* state = fe->demodulator_priv;
  84. u8 t22k_off = 0x80;
  85. dprintk ("%s\n", __func__);
  86. if (state->config->diseqc_tone)
  87. t22k_off = 0;
  88. /* reset */
  89. tda10086_write_byte(state, 0x00, 0x00);
  90. msleep(10);
  91. /* misc setup */
  92. tda10086_write_byte(state, 0x01, 0x94);
  93. tda10086_write_byte(state, 0x02, 0x35); /* NOTE: TT drivers appear to disable CSWP */
  94. tda10086_write_byte(state, 0x03, 0xe4);
  95. tda10086_write_byte(state, 0x04, 0x43);
  96. tda10086_write_byte(state, 0x0c, 0x0c);
  97. tda10086_write_byte(state, 0x1b, 0xb0); /* noise threshold */
  98. tda10086_write_byte(state, 0x20, 0x89); /* misc */
  99. tda10086_write_byte(state, 0x30, 0x04); /* acquisition period length */
  100. tda10086_write_byte(state, 0x32, 0x00); /* irq off */
  101. tda10086_write_byte(state, 0x31, 0x56); /* setup AFC */
  102. /* setup PLL (this assumes SACLK = 96MHz) */
  103. tda10086_write_byte(state, 0x55, 0x2c); /* misc PLL setup */
  104. if (state->config->xtal_freq == TDA10086_XTAL_16M) {
  105. tda10086_write_byte(state, 0x3a, 0x0b); /* M=12 */
  106. tda10086_write_byte(state, 0x3b, 0x01); /* P=2 */
  107. } else {
  108. tda10086_write_byte(state, 0x3a, 0x17); /* M=24 */
  109. tda10086_write_byte(state, 0x3b, 0x00); /* P=1 */
  110. }
  111. tda10086_write_mask(state, 0x55, 0x20, 0x00); /* powerup PLL */
  112. /* setup TS interface */
  113. tda10086_write_byte(state, 0x11, 0x81);
  114. tda10086_write_byte(state, 0x12, 0x81);
  115. tda10086_write_byte(state, 0x19, 0x40); /* parallel mode A + MSBFIRST */
  116. tda10086_write_byte(state, 0x56, 0x80); /* powerdown WPLL - unused in the mode we use */
  117. tda10086_write_byte(state, 0x57, 0x08); /* bypass WPLL - unused in the mode we use */
  118. tda10086_write_byte(state, 0x10, 0x2a);
  119. /* setup ADC */
  120. tda10086_write_byte(state, 0x58, 0x61); /* ADC setup */
  121. tda10086_write_mask(state, 0x58, 0x01, 0x00); /* powerup ADC */
  122. /* setup AGC */
  123. tda10086_write_byte(state, 0x05, 0x0B);
  124. tda10086_write_byte(state, 0x37, 0x63);
  125. tda10086_write_byte(state, 0x3f, 0x0a); /* NOTE: flydvb varies it */
  126. tda10086_write_byte(state, 0x40, 0x64);
  127. tda10086_write_byte(state, 0x41, 0x4f);
  128. tda10086_write_byte(state, 0x42, 0x43);
  129. /* setup viterbi */
  130. tda10086_write_byte(state, 0x1a, 0x11); /* VBER 10^6, DVB, QPSK */
  131. /* setup carrier recovery */
  132. tda10086_write_byte(state, 0x3d, 0x80);
  133. /* setup SEC */
  134. tda10086_write_byte(state, 0x36, t22k_off); /* all SEC off, 22k tone */
  135. tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000)));
  136. tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8);
  137. return 0;
  138. }
  139. static void tda10086_diseqc_wait(struct tda10086_state *state)
  140. {
  141. unsigned long timeout = jiffies + msecs_to_jiffies(200);
  142. while (!(tda10086_read_byte(state, 0x50) & 0x01)) {
  143. if(time_after(jiffies, timeout)) {
  144. printk("%s: diseqc queue not ready, command may be lost.\n", __func__);
  145. break;
  146. }
  147. msleep(10);
  148. }
  149. }
  150. static int tda10086_set_tone(struct dvb_frontend *fe,
  151. enum fe_sec_tone_mode tone)
  152. {
  153. struct tda10086_state* state = fe->demodulator_priv;
  154. u8 t22k_off = 0x80;
  155. dprintk ("%s\n", __func__);
  156. if (state->config->diseqc_tone)
  157. t22k_off = 0;
  158. switch (tone) {
  159. case SEC_TONE_OFF:
  160. tda10086_write_byte(state, 0x36, t22k_off);
  161. break;
  162. case SEC_TONE_ON:
  163. tda10086_write_byte(state, 0x36, 0x01 + t22k_off);
  164. break;
  165. }
  166. return 0;
  167. }
  168. static int tda10086_send_master_cmd (struct dvb_frontend* fe,
  169. struct dvb_diseqc_master_cmd* cmd)
  170. {
  171. struct tda10086_state* state = fe->demodulator_priv;
  172. int i;
  173. u8 oldval;
  174. u8 t22k_off = 0x80;
  175. dprintk ("%s\n", __func__);
  176. if (state->config->diseqc_tone)
  177. t22k_off = 0;
  178. if (cmd->msg_len > 6)
  179. return -EINVAL;
  180. oldval = tda10086_read_byte(state, 0x36);
  181. for(i=0; i< cmd->msg_len; i++) {
  182. tda10086_write_byte(state, 0x48+i, cmd->msg[i]);
  183. }
  184. tda10086_write_byte(state, 0x36, (0x08 + t22k_off)
  185. | ((cmd->msg_len - 1) << 4));
  186. tda10086_diseqc_wait(state);
  187. tda10086_write_byte(state, 0x36, oldval);
  188. return 0;
  189. }
  190. static int tda10086_send_burst(struct dvb_frontend *fe,
  191. enum fe_sec_mini_cmd minicmd)
  192. {
  193. struct tda10086_state* state = fe->demodulator_priv;
  194. u8 oldval = tda10086_read_byte(state, 0x36);
  195. u8 t22k_off = 0x80;
  196. dprintk ("%s\n", __func__);
  197. if (state->config->diseqc_tone)
  198. t22k_off = 0;
  199. switch(minicmd) {
  200. case SEC_MINI_A:
  201. tda10086_write_byte(state, 0x36, 0x04 + t22k_off);
  202. break;
  203. case SEC_MINI_B:
  204. tda10086_write_byte(state, 0x36, 0x06 + t22k_off);
  205. break;
  206. }
  207. tda10086_diseqc_wait(state);
  208. tda10086_write_byte(state, 0x36, oldval);
  209. return 0;
  210. }
  211. static int tda10086_set_inversion(struct tda10086_state *state,
  212. struct dtv_frontend_properties *fe_params)
  213. {
  214. u8 invval = 0x80;
  215. dprintk ("%s %i %i\n", __func__, fe_params->inversion, state->config->invert);
  216. switch(fe_params->inversion) {
  217. case INVERSION_OFF:
  218. if (state->config->invert)
  219. invval = 0x40;
  220. break;
  221. case INVERSION_ON:
  222. if (!state->config->invert)
  223. invval = 0x40;
  224. break;
  225. case INVERSION_AUTO:
  226. invval = 0x00;
  227. break;
  228. }
  229. tda10086_write_mask(state, 0x0c, 0xc0, invval);
  230. return 0;
  231. }
  232. static int tda10086_set_symbol_rate(struct tda10086_state *state,
  233. struct dtv_frontend_properties *fe_params)
  234. {
  235. u8 dfn = 0;
  236. u8 afs = 0;
  237. u8 byp = 0;
  238. u8 reg37 = 0x43;
  239. u8 reg42 = 0x43;
  240. u64 big;
  241. u32 tmp;
  242. u32 bdr;
  243. u32 bdri;
  244. u32 symbol_rate = fe_params->symbol_rate;
  245. dprintk ("%s %i\n", __func__, symbol_rate);
  246. /* setup the decimation and anti-aliasing filters.. */
  247. if (symbol_rate < (u32) (SACLK * 0.0137)) {
  248. dfn=4;
  249. afs=1;
  250. } else if (symbol_rate < (u32) (SACLK * 0.0208)) {
  251. dfn=4;
  252. afs=0;
  253. } else if (symbol_rate < (u32) (SACLK * 0.0270)) {
  254. dfn=3;
  255. afs=1;
  256. } else if (symbol_rate < (u32) (SACLK * 0.0416)) {
  257. dfn=3;
  258. afs=0;
  259. } else if (symbol_rate < (u32) (SACLK * 0.0550)) {
  260. dfn=2;
  261. afs=1;
  262. } else if (symbol_rate < (u32) (SACLK * 0.0833)) {
  263. dfn=2;
  264. afs=0;
  265. } else if (symbol_rate < (u32) (SACLK * 0.1100)) {
  266. dfn=1;
  267. afs=1;
  268. } else if (symbol_rate < (u32) (SACLK * 0.1666)) {
  269. dfn=1;
  270. afs=0;
  271. } else if (symbol_rate < (u32) (SACLK * 0.2200)) {
  272. dfn=0;
  273. afs=1;
  274. } else if (symbol_rate < (u32) (SACLK * 0.3333)) {
  275. dfn=0;
  276. afs=0;
  277. } else {
  278. reg37 = 0x63;
  279. reg42 = 0x4f;
  280. byp=1;
  281. }
  282. /* calculate BDR */
  283. big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn);
  284. big += ((SACLK/1000ULL)-1ULL);
  285. do_div(big, (SACLK/1000ULL));
  286. bdr = big & 0xfffff;
  287. /* calculate BDRI */
  288. tmp = (1<<dfn)*(symbol_rate/1000);
  289. bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp;
  290. tda10086_write_byte(state, 0x21, (afs << 7) | dfn);
  291. tda10086_write_mask(state, 0x20, 0x08, byp << 3);
  292. tda10086_write_byte(state, 0x06, bdr);
  293. tda10086_write_byte(state, 0x07, bdr >> 8);
  294. tda10086_write_byte(state, 0x08, bdr >> 16);
  295. tda10086_write_byte(state, 0x09, bdri);
  296. tda10086_write_byte(state, 0x37, reg37);
  297. tda10086_write_byte(state, 0x42, reg42);
  298. return 0;
  299. }
  300. static int tda10086_set_fec(struct tda10086_state *state,
  301. struct dtv_frontend_properties *fe_params)
  302. {
  303. u8 fecval;
  304. dprintk("%s %i\n", __func__, fe_params->fec_inner);
  305. switch (fe_params->fec_inner) {
  306. case FEC_1_2:
  307. fecval = 0x00;
  308. break;
  309. case FEC_2_3:
  310. fecval = 0x01;
  311. break;
  312. case FEC_3_4:
  313. fecval = 0x02;
  314. break;
  315. case FEC_4_5:
  316. fecval = 0x03;
  317. break;
  318. case FEC_5_6:
  319. fecval = 0x04;
  320. break;
  321. case FEC_6_7:
  322. fecval = 0x05;
  323. break;
  324. case FEC_7_8:
  325. fecval = 0x06;
  326. break;
  327. case FEC_8_9:
  328. fecval = 0x07;
  329. break;
  330. case FEC_AUTO:
  331. fecval = 0x08;
  332. break;
  333. default:
  334. return -1;
  335. }
  336. tda10086_write_byte(state, 0x0d, fecval);
  337. return 0;
  338. }
  339. static int tda10086_set_frontend(struct dvb_frontend *fe)
  340. {
  341. struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache;
  342. struct tda10086_state *state = fe->demodulator_priv;
  343. int ret;
  344. u32 freq = 0;
  345. int freqoff;
  346. dprintk ("%s\n", __func__);
  347. /* modify parameters for tuning */
  348. tda10086_write_byte(state, 0x02, 0x35);
  349. state->has_lock = false;
  350. /* set params */
  351. if (fe->ops.tuner_ops.set_params) {
  352. fe->ops.tuner_ops.set_params(fe);
  353. if (fe->ops.i2c_gate_ctrl)
  354. fe->ops.i2c_gate_ctrl(fe, 0);
  355. if (fe->ops.tuner_ops.get_frequency)
  356. fe->ops.tuner_ops.get_frequency(fe, &freq);
  357. if (fe->ops.i2c_gate_ctrl)
  358. fe->ops.i2c_gate_ctrl(fe, 0);
  359. }
  360. /* calcluate the frequency offset (in *Hz* not kHz) */
  361. freqoff = fe_params->frequency - freq;
  362. freqoff = ((1<<16) * freqoff) / (SACLK/1000);
  363. tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f));
  364. tda10086_write_byte(state, 0x3e, freqoff);
  365. if ((ret = tda10086_set_inversion(state, fe_params)) < 0)
  366. return ret;
  367. if ((ret = tda10086_set_symbol_rate(state, fe_params)) < 0)
  368. return ret;
  369. if ((ret = tda10086_set_fec(state, fe_params)) < 0)
  370. return ret;
  371. /* soft reset + disable TS output until lock */
  372. tda10086_write_mask(state, 0x10, 0x40, 0x40);
  373. tda10086_write_mask(state, 0x00, 0x01, 0x00);
  374. state->symbol_rate = fe_params->symbol_rate;
  375. state->frequency = fe_params->frequency;
  376. return 0;
  377. }
  378. static int tda10086_get_frontend(struct dvb_frontend *fe)
  379. {
  380. struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache;
  381. struct tda10086_state* state = fe->demodulator_priv;
  382. u8 val;
  383. int tmp;
  384. u64 tmp64;
  385. dprintk ("%s\n", __func__);
  386. /* check for invalid symbol rate */
  387. if (fe_params->symbol_rate < 500000)
  388. return -EINVAL;
  389. /* calculate the updated frequency (note: we convert from Hz->kHz) */
  390. tmp64 = ((u64)tda10086_read_byte(state, 0x52)
  391. | (tda10086_read_byte(state, 0x51) << 8));
  392. if (tmp64 & 0x8000)
  393. tmp64 |= 0xffffffffffff0000ULL;
  394. tmp64 = (tmp64 * (SACLK/1000ULL));
  395. do_div(tmp64, (1ULL<<15) * (1ULL<<1));
  396. fe_params->frequency = (int) state->frequency + (int) tmp64;
  397. /* the inversion */
  398. val = tda10086_read_byte(state, 0x0c);
  399. if (val & 0x80) {
  400. switch(val & 0x40) {
  401. case 0x00:
  402. fe_params->inversion = INVERSION_OFF;
  403. if (state->config->invert)
  404. fe_params->inversion = INVERSION_ON;
  405. break;
  406. default:
  407. fe_params->inversion = INVERSION_ON;
  408. if (state->config->invert)
  409. fe_params->inversion = INVERSION_OFF;
  410. break;
  411. }
  412. } else {
  413. tda10086_read_byte(state, 0x0f);
  414. switch(val & 0x02) {
  415. case 0x00:
  416. fe_params->inversion = INVERSION_OFF;
  417. if (state->config->invert)
  418. fe_params->inversion = INVERSION_ON;
  419. break;
  420. default:
  421. fe_params->inversion = INVERSION_ON;
  422. if (state->config->invert)
  423. fe_params->inversion = INVERSION_OFF;
  424. break;
  425. }
  426. }
  427. /* calculate the updated symbol rate */
  428. tmp = tda10086_read_byte(state, 0x1d);
  429. if (tmp & 0x80)
  430. tmp |= 0xffffff00;
  431. tmp = (tmp * 480 * (1<<1)) / 128;
  432. tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000);
  433. fe_params->symbol_rate = state->symbol_rate + tmp;
  434. /* the FEC */
  435. val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4;
  436. switch(val) {
  437. case 0x00:
  438. fe_params->fec_inner = FEC_1_2;
  439. break;
  440. case 0x01:
  441. fe_params->fec_inner = FEC_2_3;
  442. break;
  443. case 0x02:
  444. fe_params->fec_inner = FEC_3_4;
  445. break;
  446. case 0x03:
  447. fe_params->fec_inner = FEC_4_5;
  448. break;
  449. case 0x04:
  450. fe_params->fec_inner = FEC_5_6;
  451. break;
  452. case 0x05:
  453. fe_params->fec_inner = FEC_6_7;
  454. break;
  455. case 0x06:
  456. fe_params->fec_inner = FEC_7_8;
  457. break;
  458. case 0x07:
  459. fe_params->fec_inner = FEC_8_9;
  460. break;
  461. }
  462. return 0;
  463. }
  464. static int tda10086_read_status(struct dvb_frontend *fe,
  465. enum fe_status *fe_status)
  466. {
  467. struct tda10086_state* state = fe->demodulator_priv;
  468. u8 val;
  469. dprintk ("%s\n", __func__);
  470. val = tda10086_read_byte(state, 0x0e);
  471. *fe_status = 0;
  472. if (val & 0x01)
  473. *fe_status |= FE_HAS_SIGNAL;
  474. if (val & 0x02)
  475. *fe_status |= FE_HAS_CARRIER;
  476. if (val & 0x04)
  477. *fe_status |= FE_HAS_VITERBI;
  478. if (val & 0x08)
  479. *fe_status |= FE_HAS_SYNC;
  480. if (val & 0x10) {
  481. *fe_status |= FE_HAS_LOCK;
  482. if (!state->has_lock) {
  483. state->has_lock = true;
  484. /* modify parameters for stable reception */
  485. tda10086_write_byte(state, 0x02, 0x00);
  486. }
  487. }
  488. return 0;
  489. }
  490. static int tda10086_read_signal_strength(struct dvb_frontend* fe, u16 * signal)
  491. {
  492. struct tda10086_state* state = fe->demodulator_priv;
  493. u8 _str;
  494. dprintk ("%s\n", __func__);
  495. _str = 0xff - tda10086_read_byte(state, 0x43);
  496. *signal = (_str << 8) | _str;
  497. return 0;
  498. }
  499. static int tda10086_read_snr(struct dvb_frontend* fe, u16 * snr)
  500. {
  501. struct tda10086_state* state = fe->demodulator_priv;
  502. u8 _snr;
  503. dprintk ("%s\n", __func__);
  504. _snr = 0xff - tda10086_read_byte(state, 0x1c);
  505. *snr = (_snr << 8) | _snr;
  506. return 0;
  507. }
  508. static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
  509. {
  510. struct tda10086_state* state = fe->demodulator_priv;
  511. dprintk ("%s\n", __func__);
  512. /* read it */
  513. *ucblocks = tda10086_read_byte(state, 0x18) & 0x7f;
  514. /* reset counter */
  515. tda10086_write_byte(state, 0x18, 0x00);
  516. tda10086_write_byte(state, 0x18, 0x80);
  517. return 0;
  518. }
  519. static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber)
  520. {
  521. struct tda10086_state* state = fe->demodulator_priv;
  522. dprintk ("%s\n", __func__);
  523. /* read it */
  524. *ber = 0;
  525. *ber |= tda10086_read_byte(state, 0x15);
  526. *ber |= tda10086_read_byte(state, 0x16) << 8;
  527. *ber |= (tda10086_read_byte(state, 0x17) & 0xf) << 16;
  528. return 0;
  529. }
  530. static int tda10086_sleep(struct dvb_frontend* fe)
  531. {
  532. struct tda10086_state* state = fe->demodulator_priv;
  533. dprintk ("%s\n", __func__);
  534. tda10086_write_mask(state, 0x00, 0x08, 0x08);
  535. return 0;
  536. }
  537. static int tda10086_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
  538. {
  539. struct tda10086_state* state = fe->demodulator_priv;
  540. dprintk ("%s\n", __func__);
  541. if (enable) {
  542. tda10086_write_mask(state, 0x00, 0x10, 0x10);
  543. } else {
  544. tda10086_write_mask(state, 0x00, 0x10, 0x00);
  545. }
  546. return 0;
  547. }
  548. static int tda10086_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
  549. {
  550. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  551. if (p->symbol_rate > 20000000) {
  552. fesettings->min_delay_ms = 50;
  553. fesettings->step_size = 2000;
  554. fesettings->max_drift = 8000;
  555. } else if (p->symbol_rate > 12000000) {
  556. fesettings->min_delay_ms = 100;
  557. fesettings->step_size = 1500;
  558. fesettings->max_drift = 9000;
  559. } else if (p->symbol_rate > 8000000) {
  560. fesettings->min_delay_ms = 100;
  561. fesettings->step_size = 1000;
  562. fesettings->max_drift = 8000;
  563. } else if (p->symbol_rate > 4000000) {
  564. fesettings->min_delay_ms = 100;
  565. fesettings->step_size = 500;
  566. fesettings->max_drift = 7000;
  567. } else if (p->symbol_rate > 2000000) {
  568. fesettings->min_delay_ms = 200;
  569. fesettings->step_size = p->symbol_rate / 8000;
  570. fesettings->max_drift = 14 * fesettings->step_size;
  571. } else {
  572. fesettings->min_delay_ms = 200;
  573. fesettings->step_size = p->symbol_rate / 8000;
  574. fesettings->max_drift = 18 * fesettings->step_size;
  575. }
  576. return 0;
  577. }
  578. static void tda10086_release(struct dvb_frontend* fe)
  579. {
  580. struct tda10086_state *state = fe->demodulator_priv;
  581. tda10086_sleep(fe);
  582. kfree(state);
  583. }
  584. static struct dvb_frontend_ops tda10086_ops = {
  585. .delsys = { SYS_DVBS },
  586. .info = {
  587. .name = "Philips TDA10086 DVB-S",
  588. .frequency_min = 950000,
  589. .frequency_max = 2150000,
  590. .frequency_stepsize = 125, /* kHz for QPSK frontends */
  591. .symbol_rate_min = 1000000,
  592. .symbol_rate_max = 45000000,
  593. .caps = FE_CAN_INVERSION_AUTO |
  594. FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  595. FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  596. FE_CAN_QPSK
  597. },
  598. .release = tda10086_release,
  599. .init = tda10086_init,
  600. .sleep = tda10086_sleep,
  601. .i2c_gate_ctrl = tda10086_i2c_gate_ctrl,
  602. .set_frontend = tda10086_set_frontend,
  603. .get_frontend = tda10086_get_frontend,
  604. .get_tune_settings = tda10086_get_tune_settings,
  605. .read_status = tda10086_read_status,
  606. .read_ber = tda10086_read_ber,
  607. .read_signal_strength = tda10086_read_signal_strength,
  608. .read_snr = tda10086_read_snr,
  609. .read_ucblocks = tda10086_read_ucblocks,
  610. .diseqc_send_master_cmd = tda10086_send_master_cmd,
  611. .diseqc_send_burst = tda10086_send_burst,
  612. .set_tone = tda10086_set_tone,
  613. };
  614. struct dvb_frontend* tda10086_attach(const struct tda10086_config* config,
  615. struct i2c_adapter* i2c)
  616. {
  617. struct tda10086_state *state;
  618. dprintk ("%s\n", __func__);
  619. /* allocate memory for the internal state */
  620. state = kzalloc(sizeof(struct tda10086_state), GFP_KERNEL);
  621. if (!state)
  622. return NULL;
  623. /* setup the state */
  624. state->config = config;
  625. state->i2c = i2c;
  626. /* check if the demod is there */
  627. if (tda10086_read_byte(state, 0x1e) != 0xe1) {
  628. kfree(state);
  629. return NULL;
  630. }
  631. /* create dvb_frontend */
  632. memcpy(&state->frontend.ops, &tda10086_ops, sizeof(struct dvb_frontend_ops));
  633. state->frontend.demodulator_priv = state;
  634. return &state->frontend;
  635. }
  636. module_param(debug, int, 0644);
  637. MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
  638. MODULE_DESCRIPTION("Philips TDA10086 DVB-S Demodulator");
  639. MODULE_AUTHOR("Andrew de Quincey");
  640. MODULE_LICENSE("GPL");
  641. EXPORT_SYMBOL(tda10086_attach);