saa7127.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832
  1. /*
  2. * saa7127 - Philips SAA7127/SAA7129 video encoder driver
  3. *
  4. * Copyright (C) 2003 Roy Bulter <rbulter@hetnet.nl>
  5. *
  6. * Based on SAA7126 video encoder driver by Gillem & Andreas Oberritter
  7. *
  8. * Copyright (C) 2000-2001 Gillem <htoa@gmx.net>
  9. * Copyright (C) 2002 Andreas Oberritter <obi@saftware.de>
  10. *
  11. * Based on Stadis 4:2:2 MPEG-2 Decoder Driver by Nathan Laredo
  12. *
  13. * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
  14. *
  15. * This driver is designed for the Hauppauge 250/350 Linux driver
  16. * from the ivtv Project
  17. *
  18. * Copyright (C) 2003 Kevin Thayer <nufan_wfk@yahoo.com>
  19. *
  20. * Dual output support:
  21. * Copyright (C) 2004 Eric Varsanyi
  22. *
  23. * NTSC Tuning and 7.5 IRE Setup
  24. * Copyright (C) 2004 Chris Kennedy <c@groovy.org>
  25. *
  26. * VBI additions & cleanup:
  27. * Copyright (C) 2004, 2005 Hans Verkuil <hverkuil@xs4all.nl>
  28. *
  29. * Note: the saa7126 is identical to the saa7127, and the saa7128 is
  30. * identical to the saa7129, except that the saa7126 and saa7128 have
  31. * macrovision anti-taping support. This driver will almost certainly
  32. * work fine for those chips, except of course for the missing anti-taping
  33. * support.
  34. *
  35. * This program is free software; you can redistribute it and/or modify
  36. * it under the terms of the GNU General Public License as published by
  37. * the Free Software Foundation; either version 2 of the License, or
  38. * (at your option) any later version.
  39. *
  40. * This program is distributed in the hope that it will be useful,
  41. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  42. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  43. * GNU General Public License for more details.
  44. *
  45. * You should have received a copy of the GNU General Public License
  46. * along with this program; if not, write to the Free Software
  47. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  48. */
  49. #include <linux/kernel.h>
  50. #include <linux/module.h>
  51. #include <linux/slab.h>
  52. #include <linux/i2c.h>
  53. #include <linux/videodev2.h>
  54. #include <media/v4l2-device.h>
  55. #include <media/saa7127.h>
  56. static int debug;
  57. static int test_image;
  58. MODULE_DESCRIPTION("Philips SAA7127/9 video encoder driver");
  59. MODULE_AUTHOR("Kevin Thayer, Chris Kennedy, Hans Verkuil");
  60. MODULE_LICENSE("GPL");
  61. module_param(debug, int, 0644);
  62. module_param(test_image, int, 0644);
  63. MODULE_PARM_DESC(debug, "debug level (0-2)");
  64. MODULE_PARM_DESC(test_image, "test_image (0-1)");
  65. /*
  66. * SAA7127 registers
  67. */
  68. #define SAA7127_REG_STATUS 0x00
  69. #define SAA7127_REG_WIDESCREEN_CONFIG 0x26
  70. #define SAA7127_REG_WIDESCREEN_ENABLE 0x27
  71. #define SAA7127_REG_BURST_START 0x28
  72. #define SAA7127_REG_BURST_END 0x29
  73. #define SAA7127_REG_COPYGEN_0 0x2a
  74. #define SAA7127_REG_COPYGEN_1 0x2b
  75. #define SAA7127_REG_COPYGEN_2 0x2c
  76. #define SAA7127_REG_OUTPUT_PORT_CONTROL 0x2d
  77. #define SAA7127_REG_GAIN_LUMINANCE_RGB 0x38
  78. #define SAA7127_REG_GAIN_COLORDIFF_RGB 0x39
  79. #define SAA7127_REG_INPUT_PORT_CONTROL_1 0x3a
  80. #define SAA7129_REG_FADE_KEY_COL2 0x4f
  81. #define SAA7127_REG_CHROMA_PHASE 0x5a
  82. #define SAA7127_REG_GAINU 0x5b
  83. #define SAA7127_REG_GAINV 0x5c
  84. #define SAA7127_REG_BLACK_LEVEL 0x5d
  85. #define SAA7127_REG_BLANKING_LEVEL 0x5e
  86. #define SAA7127_REG_VBI_BLANKING 0x5f
  87. #define SAA7127_REG_DAC_CONTROL 0x61
  88. #define SAA7127_REG_BURST_AMP 0x62
  89. #define SAA7127_REG_SUBC3 0x63
  90. #define SAA7127_REG_SUBC2 0x64
  91. #define SAA7127_REG_SUBC1 0x65
  92. #define SAA7127_REG_SUBC0 0x66
  93. #define SAA7127_REG_LINE_21_ODD_0 0x67
  94. #define SAA7127_REG_LINE_21_ODD_1 0x68
  95. #define SAA7127_REG_LINE_21_EVEN_0 0x69
  96. #define SAA7127_REG_LINE_21_EVEN_1 0x6a
  97. #define SAA7127_REG_RCV_PORT_CONTROL 0x6b
  98. #define SAA7127_REG_VTRIG 0x6c
  99. #define SAA7127_REG_HTRIG_HI 0x6d
  100. #define SAA7127_REG_MULTI 0x6e
  101. #define SAA7127_REG_CLOSED_CAPTION 0x6f
  102. #define SAA7127_REG_RCV2_OUTPUT_START 0x70
  103. #define SAA7127_REG_RCV2_OUTPUT_END 0x71
  104. #define SAA7127_REG_RCV2_OUTPUT_MSBS 0x72
  105. #define SAA7127_REG_TTX_REQUEST_H_START 0x73
  106. #define SAA7127_REG_TTX_REQUEST_H_DELAY_LENGTH 0x74
  107. #define SAA7127_REG_CSYNC_ADVANCE_VSYNC_SHIFT 0x75
  108. #define SAA7127_REG_TTX_ODD_REQ_VERT_START 0x76
  109. #define SAA7127_REG_TTX_ODD_REQ_VERT_END 0x77
  110. #define SAA7127_REG_TTX_EVEN_REQ_VERT_START 0x78
  111. #define SAA7127_REG_TTX_EVEN_REQ_VERT_END 0x79
  112. #define SAA7127_REG_FIRST_ACTIVE 0x7a
  113. #define SAA7127_REG_LAST_ACTIVE 0x7b
  114. #define SAA7127_REG_MSB_VERTICAL 0x7c
  115. #define SAA7127_REG_DISABLE_TTX_LINE_LO_0 0x7e
  116. #define SAA7127_REG_DISABLE_TTX_LINE_LO_1 0x7f
  117. /*
  118. **********************************************************************
  119. *
  120. * Arrays with configuration parameters for the SAA7127
  121. *
  122. **********************************************************************
  123. */
  124. struct i2c_reg_value {
  125. unsigned char reg;
  126. unsigned char value;
  127. };
  128. static const struct i2c_reg_value saa7129_init_config_extra[] = {
  129. { SAA7127_REG_OUTPUT_PORT_CONTROL, 0x38 },
  130. { SAA7127_REG_VTRIG, 0xfa },
  131. { 0, 0 }
  132. };
  133. static const struct i2c_reg_value saa7127_init_config_common[] = {
  134. { SAA7127_REG_WIDESCREEN_CONFIG, 0x0d },
  135. { SAA7127_REG_WIDESCREEN_ENABLE, 0x00 },
  136. { SAA7127_REG_COPYGEN_0, 0x77 },
  137. { SAA7127_REG_COPYGEN_1, 0x41 },
  138. { SAA7127_REG_COPYGEN_2, 0x00 }, /* Macrovision enable/disable */
  139. { SAA7127_REG_OUTPUT_PORT_CONTROL, 0xbf },
  140. { SAA7127_REG_GAIN_LUMINANCE_RGB, 0x00 },
  141. { SAA7127_REG_GAIN_COLORDIFF_RGB, 0x00 },
  142. { SAA7127_REG_INPUT_PORT_CONTROL_1, 0x80 }, /* for color bars */
  143. { SAA7127_REG_LINE_21_ODD_0, 0x77 },
  144. { SAA7127_REG_LINE_21_ODD_1, 0x41 },
  145. { SAA7127_REG_LINE_21_EVEN_0, 0x88 },
  146. { SAA7127_REG_LINE_21_EVEN_1, 0x41 },
  147. { SAA7127_REG_RCV_PORT_CONTROL, 0x12 },
  148. { SAA7127_REG_VTRIG, 0xf9 },
  149. { SAA7127_REG_HTRIG_HI, 0x00 },
  150. { SAA7127_REG_RCV2_OUTPUT_START, 0x41 },
  151. { SAA7127_REG_RCV2_OUTPUT_END, 0xc3 },
  152. { SAA7127_REG_RCV2_OUTPUT_MSBS, 0x00 },
  153. { SAA7127_REG_TTX_REQUEST_H_START, 0x3e },
  154. { SAA7127_REG_TTX_REQUEST_H_DELAY_LENGTH, 0xb8 },
  155. { SAA7127_REG_CSYNC_ADVANCE_VSYNC_SHIFT, 0x03 },
  156. { SAA7127_REG_TTX_ODD_REQ_VERT_START, 0x15 },
  157. { SAA7127_REG_TTX_ODD_REQ_VERT_END, 0x16 },
  158. { SAA7127_REG_TTX_EVEN_REQ_VERT_START, 0x15 },
  159. { SAA7127_REG_TTX_EVEN_REQ_VERT_END, 0x16 },
  160. { SAA7127_REG_FIRST_ACTIVE, 0x1a },
  161. { SAA7127_REG_LAST_ACTIVE, 0x01 },
  162. { SAA7127_REG_MSB_VERTICAL, 0xc0 },
  163. { SAA7127_REG_DISABLE_TTX_LINE_LO_0, 0x00 },
  164. { SAA7127_REG_DISABLE_TTX_LINE_LO_1, 0x00 },
  165. { 0, 0 }
  166. };
  167. #define SAA7127_60HZ_DAC_CONTROL 0x15
  168. static const struct i2c_reg_value saa7127_init_config_60hz[] = {
  169. { SAA7127_REG_BURST_START, 0x19 },
  170. /* BURST_END is also used as a chip ID in saa7127_probe */
  171. { SAA7127_REG_BURST_END, 0x1d },
  172. { SAA7127_REG_CHROMA_PHASE, 0xa3 },
  173. { SAA7127_REG_GAINU, 0x98 },
  174. { SAA7127_REG_GAINV, 0xd3 },
  175. { SAA7127_REG_BLACK_LEVEL, 0x39 },
  176. { SAA7127_REG_BLANKING_LEVEL, 0x2e },
  177. { SAA7127_REG_VBI_BLANKING, 0x2e },
  178. { SAA7127_REG_DAC_CONTROL, 0x15 },
  179. { SAA7127_REG_BURST_AMP, 0x4d },
  180. { SAA7127_REG_SUBC3, 0x1f },
  181. { SAA7127_REG_SUBC2, 0x7c },
  182. { SAA7127_REG_SUBC1, 0xf0 },
  183. { SAA7127_REG_SUBC0, 0x21 },
  184. { SAA7127_REG_MULTI, 0x90 },
  185. { SAA7127_REG_CLOSED_CAPTION, 0x11 },
  186. { 0, 0 }
  187. };
  188. #define SAA7127_50HZ_PAL_DAC_CONTROL 0x02
  189. static struct i2c_reg_value saa7127_init_config_50hz_pal[] = {
  190. { SAA7127_REG_BURST_START, 0x21 },
  191. /* BURST_END is also used as a chip ID in saa7127_probe */
  192. { SAA7127_REG_BURST_END, 0x1d },
  193. { SAA7127_REG_CHROMA_PHASE, 0x3f },
  194. { SAA7127_REG_GAINU, 0x7d },
  195. { SAA7127_REG_GAINV, 0xaf },
  196. { SAA7127_REG_BLACK_LEVEL, 0x33 },
  197. { SAA7127_REG_BLANKING_LEVEL, 0x35 },
  198. { SAA7127_REG_VBI_BLANKING, 0x35 },
  199. { SAA7127_REG_DAC_CONTROL, 0x02 },
  200. { SAA7127_REG_BURST_AMP, 0x2f },
  201. { SAA7127_REG_SUBC3, 0xcb },
  202. { SAA7127_REG_SUBC2, 0x8a },
  203. { SAA7127_REG_SUBC1, 0x09 },
  204. { SAA7127_REG_SUBC0, 0x2a },
  205. { SAA7127_REG_MULTI, 0xa0 },
  206. { SAA7127_REG_CLOSED_CAPTION, 0x00 },
  207. { 0, 0 }
  208. };
  209. #define SAA7127_50HZ_SECAM_DAC_CONTROL 0x08
  210. static struct i2c_reg_value saa7127_init_config_50hz_secam[] = {
  211. { SAA7127_REG_BURST_START, 0x21 },
  212. /* BURST_END is also used as a chip ID in saa7127_probe */
  213. { SAA7127_REG_BURST_END, 0x1d },
  214. { SAA7127_REG_CHROMA_PHASE, 0x3f },
  215. { SAA7127_REG_GAINU, 0x6a },
  216. { SAA7127_REG_GAINV, 0x81 },
  217. { SAA7127_REG_BLACK_LEVEL, 0x33 },
  218. { SAA7127_REG_BLANKING_LEVEL, 0x35 },
  219. { SAA7127_REG_VBI_BLANKING, 0x35 },
  220. { SAA7127_REG_DAC_CONTROL, 0x08 },
  221. { SAA7127_REG_BURST_AMP, 0x2f },
  222. { SAA7127_REG_SUBC3, 0xb2 },
  223. { SAA7127_REG_SUBC2, 0x3b },
  224. { SAA7127_REG_SUBC1, 0xa3 },
  225. { SAA7127_REG_SUBC0, 0x28 },
  226. { SAA7127_REG_MULTI, 0x90 },
  227. { SAA7127_REG_CLOSED_CAPTION, 0x00 },
  228. { 0, 0 }
  229. };
  230. /*
  231. **********************************************************************
  232. *
  233. * Encoder Struct, holds the configuration state of the encoder
  234. *
  235. **********************************************************************
  236. */
  237. enum saa712x_model {
  238. SAA7127,
  239. SAA7129,
  240. };
  241. struct saa7127_state {
  242. struct v4l2_subdev sd;
  243. v4l2_std_id std;
  244. enum saa712x_model ident;
  245. enum saa7127_input_type input_type;
  246. enum saa7127_output_type output_type;
  247. int video_enable;
  248. int wss_enable;
  249. u16 wss_mode;
  250. int cc_enable;
  251. u16 cc_data;
  252. int xds_enable;
  253. u16 xds_data;
  254. int vps_enable;
  255. u8 vps_data[5];
  256. u8 reg_2d;
  257. u8 reg_3a;
  258. u8 reg_3a_cb; /* colorbar bit */
  259. u8 reg_61;
  260. };
  261. static inline struct saa7127_state *to_state(struct v4l2_subdev *sd)
  262. {
  263. return container_of(sd, struct saa7127_state, sd);
  264. }
  265. static const char * const output_strs[] =
  266. {
  267. "S-Video + Composite",
  268. "Composite",
  269. "S-Video",
  270. "RGB",
  271. "YUV C",
  272. "YUV V"
  273. };
  274. static const char * const wss_strs[] = {
  275. "invalid",
  276. "letterbox 14:9 center",
  277. "letterbox 14:9 top",
  278. "invalid",
  279. "letterbox 16:9 top",
  280. "invalid",
  281. "invalid",
  282. "16:9 full format anamorphic",
  283. "4:3 full format",
  284. "invalid",
  285. "invalid",
  286. "letterbox 16:9 center",
  287. "invalid",
  288. "letterbox >16:9 center",
  289. "14:9 full format center",
  290. "invalid",
  291. };
  292. /* ----------------------------------------------------------------------- */
  293. static int saa7127_read(struct v4l2_subdev *sd, u8 reg)
  294. {
  295. struct i2c_client *client = v4l2_get_subdevdata(sd);
  296. return i2c_smbus_read_byte_data(client, reg);
  297. }
  298. /* ----------------------------------------------------------------------- */
  299. static int saa7127_write(struct v4l2_subdev *sd, u8 reg, u8 val)
  300. {
  301. struct i2c_client *client = v4l2_get_subdevdata(sd);
  302. int i;
  303. for (i = 0; i < 3; i++) {
  304. if (i2c_smbus_write_byte_data(client, reg, val) == 0)
  305. return 0;
  306. }
  307. v4l2_err(sd, "I2C Write Problem\n");
  308. return -1;
  309. }
  310. /* ----------------------------------------------------------------------- */
  311. static int saa7127_write_inittab(struct v4l2_subdev *sd,
  312. const struct i2c_reg_value *regs)
  313. {
  314. while (regs->reg != 0) {
  315. saa7127_write(sd, regs->reg, regs->value);
  316. regs++;
  317. }
  318. return 0;
  319. }
  320. /* ----------------------------------------------------------------------- */
  321. static int saa7127_set_vps(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
  322. {
  323. struct saa7127_state *state = to_state(sd);
  324. int enable = (data->line != 0);
  325. if (enable && (data->field != 0 || data->line != 16))
  326. return -EINVAL;
  327. if (state->vps_enable != enable) {
  328. v4l2_dbg(1, debug, sd, "Turn VPS Signal %s\n", enable ? "on" : "off");
  329. saa7127_write(sd, 0x54, enable << 7);
  330. state->vps_enable = enable;
  331. }
  332. if (!enable)
  333. return 0;
  334. state->vps_data[0] = data->data[2];
  335. state->vps_data[1] = data->data[8];
  336. state->vps_data[2] = data->data[9];
  337. state->vps_data[3] = data->data[10];
  338. state->vps_data[4] = data->data[11];
  339. v4l2_dbg(1, debug, sd, "Set VPS data %*ph\n", 5, state->vps_data);
  340. saa7127_write(sd, 0x55, state->vps_data[0]);
  341. saa7127_write(sd, 0x56, state->vps_data[1]);
  342. saa7127_write(sd, 0x57, state->vps_data[2]);
  343. saa7127_write(sd, 0x58, state->vps_data[3]);
  344. saa7127_write(sd, 0x59, state->vps_data[4]);
  345. return 0;
  346. }
  347. /* ----------------------------------------------------------------------- */
  348. static int saa7127_set_cc(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
  349. {
  350. struct saa7127_state *state = to_state(sd);
  351. u16 cc = data->data[1] << 8 | data->data[0];
  352. int enable = (data->line != 0);
  353. if (enable && (data->field != 0 || data->line != 21))
  354. return -EINVAL;
  355. if (state->cc_enable != enable) {
  356. v4l2_dbg(1, debug, sd,
  357. "Turn CC %s\n", enable ? "on" : "off");
  358. saa7127_write(sd, SAA7127_REG_CLOSED_CAPTION,
  359. (state->xds_enable << 7) | (enable << 6) | 0x11);
  360. state->cc_enable = enable;
  361. }
  362. if (!enable)
  363. return 0;
  364. v4l2_dbg(2, debug, sd, "CC data: %04x\n", cc);
  365. saa7127_write(sd, SAA7127_REG_LINE_21_ODD_0, cc & 0xff);
  366. saa7127_write(sd, SAA7127_REG_LINE_21_ODD_1, cc >> 8);
  367. state->cc_data = cc;
  368. return 0;
  369. }
  370. /* ----------------------------------------------------------------------- */
  371. static int saa7127_set_xds(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
  372. {
  373. struct saa7127_state *state = to_state(sd);
  374. u16 xds = data->data[1] << 8 | data->data[0];
  375. int enable = (data->line != 0);
  376. if (enable && (data->field != 1 || data->line != 21))
  377. return -EINVAL;
  378. if (state->xds_enable != enable) {
  379. v4l2_dbg(1, debug, sd, "Turn XDS %s\n", enable ? "on" : "off");
  380. saa7127_write(sd, SAA7127_REG_CLOSED_CAPTION,
  381. (enable << 7) | (state->cc_enable << 6) | 0x11);
  382. state->xds_enable = enable;
  383. }
  384. if (!enable)
  385. return 0;
  386. v4l2_dbg(2, debug, sd, "XDS data: %04x\n", xds);
  387. saa7127_write(sd, SAA7127_REG_LINE_21_EVEN_0, xds & 0xff);
  388. saa7127_write(sd, SAA7127_REG_LINE_21_EVEN_1, xds >> 8);
  389. state->xds_data = xds;
  390. return 0;
  391. }
  392. /* ----------------------------------------------------------------------- */
  393. static int saa7127_set_wss(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
  394. {
  395. struct saa7127_state *state = to_state(sd);
  396. int enable = (data->line != 0);
  397. if (enable && (data->field != 0 || data->line != 23))
  398. return -EINVAL;
  399. if (state->wss_enable != enable) {
  400. v4l2_dbg(1, debug, sd, "Turn WSS %s\n", enable ? "on" : "off");
  401. saa7127_write(sd, 0x27, enable << 7);
  402. state->wss_enable = enable;
  403. }
  404. if (!enable)
  405. return 0;
  406. saa7127_write(sd, 0x26, data->data[0]);
  407. saa7127_write(sd, 0x27, 0x80 | (data->data[1] & 0x3f));
  408. v4l2_dbg(1, debug, sd,
  409. "WSS mode: %s\n", wss_strs[data->data[0] & 0xf]);
  410. state->wss_mode = (data->data[1] & 0x3f) << 8 | data->data[0];
  411. return 0;
  412. }
  413. /* ----------------------------------------------------------------------- */
  414. static int saa7127_set_video_enable(struct v4l2_subdev *sd, int enable)
  415. {
  416. struct saa7127_state *state = to_state(sd);
  417. if (enable) {
  418. v4l2_dbg(1, debug, sd, "Enable Video Output\n");
  419. saa7127_write(sd, 0x2d, state->reg_2d);
  420. saa7127_write(sd, 0x61, state->reg_61);
  421. } else {
  422. v4l2_dbg(1, debug, sd, "Disable Video Output\n");
  423. saa7127_write(sd, 0x2d, (state->reg_2d & 0xf0));
  424. saa7127_write(sd, 0x61, (state->reg_61 | 0xc0));
  425. }
  426. state->video_enable = enable;
  427. return 0;
  428. }
  429. /* ----------------------------------------------------------------------- */
  430. static int saa7127_set_std(struct v4l2_subdev *sd, v4l2_std_id std)
  431. {
  432. struct saa7127_state *state = to_state(sd);
  433. const struct i2c_reg_value *inittab;
  434. if (std & V4L2_STD_525_60) {
  435. v4l2_dbg(1, debug, sd, "Selecting 60 Hz video Standard\n");
  436. inittab = saa7127_init_config_60hz;
  437. state->reg_61 = SAA7127_60HZ_DAC_CONTROL;
  438. } else if (state->ident == SAA7129 &&
  439. (std & V4L2_STD_SECAM) &&
  440. !(std & (V4L2_STD_625_50 & ~V4L2_STD_SECAM))) {
  441. /* If and only if SECAM, with a SAA712[89] */
  442. v4l2_dbg(1, debug, sd,
  443. "Selecting 50 Hz SECAM video Standard\n");
  444. inittab = saa7127_init_config_50hz_secam;
  445. state->reg_61 = SAA7127_50HZ_SECAM_DAC_CONTROL;
  446. } else {
  447. v4l2_dbg(1, debug, sd, "Selecting 50 Hz PAL video Standard\n");
  448. inittab = saa7127_init_config_50hz_pal;
  449. state->reg_61 = SAA7127_50HZ_PAL_DAC_CONTROL;
  450. }
  451. /* Write Table */
  452. saa7127_write_inittab(sd, inittab);
  453. state->std = std;
  454. return 0;
  455. }
  456. /* ----------------------------------------------------------------------- */
  457. static int saa7127_set_output_type(struct v4l2_subdev *sd, int output)
  458. {
  459. struct saa7127_state *state = to_state(sd);
  460. switch (output) {
  461. case SAA7127_OUTPUT_TYPE_RGB:
  462. state->reg_2d = 0x0f; /* RGB + CVBS (for sync) */
  463. state->reg_3a = 0x13; /* by default switch YUV to RGB-matrix on */
  464. break;
  465. case SAA7127_OUTPUT_TYPE_COMPOSITE:
  466. if (state->ident == SAA7129)
  467. state->reg_2d = 0x20; /* CVBS only */
  468. else
  469. state->reg_2d = 0x08; /* 00001000 CVBS only, RGB DAC's off (high impedance mode) */
  470. state->reg_3a = 0x13; /* by default switch YUV to RGB-matrix on */
  471. break;
  472. case SAA7127_OUTPUT_TYPE_SVIDEO:
  473. if (state->ident == SAA7129)
  474. state->reg_2d = 0x18; /* Y + C */
  475. else
  476. state->reg_2d = 0xff; /*11111111 croma -> R, luma -> CVBS + G + B */
  477. state->reg_3a = 0x13; /* by default switch YUV to RGB-matrix on */
  478. break;
  479. case SAA7127_OUTPUT_TYPE_YUV_V:
  480. state->reg_2d = 0x4f; /* reg 2D = 01001111, all DAC's on, RGB + VBS */
  481. state->reg_3a = 0x0b; /* reg 3A = 00001011, bypass RGB-matrix */
  482. break;
  483. case SAA7127_OUTPUT_TYPE_YUV_C:
  484. state->reg_2d = 0x0f; /* reg 2D = 00001111, all DAC's on, RGB + CVBS */
  485. state->reg_3a = 0x0b; /* reg 3A = 00001011, bypass RGB-matrix */
  486. break;
  487. case SAA7127_OUTPUT_TYPE_BOTH:
  488. if (state->ident == SAA7129)
  489. state->reg_2d = 0x38;
  490. else
  491. state->reg_2d = 0xbf;
  492. state->reg_3a = 0x13; /* by default switch YUV to RGB-matrix on */
  493. break;
  494. default:
  495. return -EINVAL;
  496. }
  497. v4l2_dbg(1, debug, sd,
  498. "Selecting %s output type\n", output_strs[output]);
  499. /* Configure Encoder */
  500. saa7127_write(sd, 0x2d, state->reg_2d);
  501. saa7127_write(sd, 0x3a, state->reg_3a | state->reg_3a_cb);
  502. state->output_type = output;
  503. return 0;
  504. }
  505. /* ----------------------------------------------------------------------- */
  506. static int saa7127_set_input_type(struct v4l2_subdev *sd, int input)
  507. {
  508. struct saa7127_state *state = to_state(sd);
  509. switch (input) {
  510. case SAA7127_INPUT_TYPE_NORMAL: /* avia */
  511. v4l2_dbg(1, debug, sd, "Selecting Normal Encoder Input\n");
  512. state->reg_3a_cb = 0;
  513. break;
  514. case SAA7127_INPUT_TYPE_TEST_IMAGE: /* color bar */
  515. v4l2_dbg(1, debug, sd, "Selecting Color Bar generator\n");
  516. state->reg_3a_cb = 0x80;
  517. break;
  518. default:
  519. return -EINVAL;
  520. }
  521. saa7127_write(sd, 0x3a, state->reg_3a | state->reg_3a_cb);
  522. state->input_type = input;
  523. return 0;
  524. }
  525. /* ----------------------------------------------------------------------- */
  526. static int saa7127_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
  527. {
  528. struct saa7127_state *state = to_state(sd);
  529. if (state->std == std)
  530. return 0;
  531. return saa7127_set_std(sd, std);
  532. }
  533. static int saa7127_s_routing(struct v4l2_subdev *sd,
  534. u32 input, u32 output, u32 config)
  535. {
  536. struct saa7127_state *state = to_state(sd);
  537. int rc = 0;
  538. if (state->input_type != input)
  539. rc = saa7127_set_input_type(sd, input);
  540. if (rc == 0 && state->output_type != output)
  541. rc = saa7127_set_output_type(sd, output);
  542. return rc;
  543. }
  544. static int saa7127_s_stream(struct v4l2_subdev *sd, int enable)
  545. {
  546. struct saa7127_state *state = to_state(sd);
  547. if (state->video_enable == enable)
  548. return 0;
  549. return saa7127_set_video_enable(sd, enable);
  550. }
  551. static int saa7127_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *fmt)
  552. {
  553. struct saa7127_state *state = to_state(sd);
  554. memset(fmt->service_lines, 0, sizeof(fmt->service_lines));
  555. if (state->vps_enable)
  556. fmt->service_lines[0][16] = V4L2_SLICED_VPS;
  557. if (state->wss_enable)
  558. fmt->service_lines[0][23] = V4L2_SLICED_WSS_625;
  559. if (state->cc_enable) {
  560. fmt->service_lines[0][21] = V4L2_SLICED_CAPTION_525;
  561. fmt->service_lines[1][21] = V4L2_SLICED_CAPTION_525;
  562. }
  563. fmt->service_set =
  564. (state->vps_enable ? V4L2_SLICED_VPS : 0) |
  565. (state->wss_enable ? V4L2_SLICED_WSS_625 : 0) |
  566. (state->cc_enable ? V4L2_SLICED_CAPTION_525 : 0);
  567. return 0;
  568. }
  569. static int saa7127_s_vbi_data(struct v4l2_subdev *sd, const struct v4l2_sliced_vbi_data *data)
  570. {
  571. switch (data->id) {
  572. case V4L2_SLICED_WSS_625:
  573. return saa7127_set_wss(sd, data);
  574. case V4L2_SLICED_VPS:
  575. return saa7127_set_vps(sd, data);
  576. case V4L2_SLICED_CAPTION_525:
  577. if (data->field == 0)
  578. return saa7127_set_cc(sd, data);
  579. return saa7127_set_xds(sd, data);
  580. default:
  581. return -EINVAL;
  582. }
  583. return 0;
  584. }
  585. #ifdef CONFIG_VIDEO_ADV_DEBUG
  586. static int saa7127_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
  587. {
  588. reg->val = saa7127_read(sd, reg->reg & 0xff);
  589. reg->size = 1;
  590. return 0;
  591. }
  592. static int saa7127_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
  593. {
  594. saa7127_write(sd, reg->reg & 0xff, reg->val & 0xff);
  595. return 0;
  596. }
  597. #endif
  598. static int saa7127_log_status(struct v4l2_subdev *sd)
  599. {
  600. struct saa7127_state *state = to_state(sd);
  601. v4l2_info(sd, "Standard: %s\n", (state->std & V4L2_STD_525_60) ? "60 Hz" : "50 Hz");
  602. v4l2_info(sd, "Input: %s\n", state->input_type ? "color bars" : "normal");
  603. v4l2_info(sd, "Output: %s\n", state->video_enable ?
  604. output_strs[state->output_type] : "disabled");
  605. v4l2_info(sd, "WSS: %s\n", state->wss_enable ?
  606. wss_strs[state->wss_mode] : "disabled");
  607. v4l2_info(sd, "VPS: %s\n", state->vps_enable ? "enabled" : "disabled");
  608. v4l2_info(sd, "CC: %s\n", state->cc_enable ? "enabled" : "disabled");
  609. return 0;
  610. }
  611. /* ----------------------------------------------------------------------- */
  612. static const struct v4l2_subdev_core_ops saa7127_core_ops = {
  613. .log_status = saa7127_log_status,
  614. #ifdef CONFIG_VIDEO_ADV_DEBUG
  615. .g_register = saa7127_g_register,
  616. .s_register = saa7127_s_register,
  617. #endif
  618. };
  619. static const struct v4l2_subdev_video_ops saa7127_video_ops = {
  620. .s_std_output = saa7127_s_std_output,
  621. .s_routing = saa7127_s_routing,
  622. .s_stream = saa7127_s_stream,
  623. };
  624. static const struct v4l2_subdev_vbi_ops saa7127_vbi_ops = {
  625. .s_vbi_data = saa7127_s_vbi_data,
  626. .g_sliced_fmt = saa7127_g_sliced_fmt,
  627. };
  628. static const struct v4l2_subdev_ops saa7127_ops = {
  629. .core = &saa7127_core_ops,
  630. .video = &saa7127_video_ops,
  631. .vbi = &saa7127_vbi_ops,
  632. };
  633. /* ----------------------------------------------------------------------- */
  634. static int saa7127_probe(struct i2c_client *client,
  635. const struct i2c_device_id *id)
  636. {
  637. struct saa7127_state *state;
  638. struct v4l2_subdev *sd;
  639. struct v4l2_sliced_vbi_data vbi = { 0, 0, 0, 0 }; /* set to disabled */
  640. /* Check if the adapter supports the needed features */
  641. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  642. return -EIO;
  643. v4l_dbg(1, debug, client, "detecting saa7127 client on address 0x%x\n",
  644. client->addr << 1);
  645. state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
  646. if (state == NULL)
  647. return -ENOMEM;
  648. sd = &state->sd;
  649. v4l2_i2c_subdev_init(sd, client, &saa7127_ops);
  650. /* First test register 0: Bits 5-7 are a version ID (should be 0),
  651. and bit 2 should also be 0.
  652. This is rather general, so the second test is more specific and
  653. looks at the 'ending point of burst in clock cycles' which is
  654. 0x1d after a reset and not expected to ever change. */
  655. if ((saa7127_read(sd, 0) & 0xe4) != 0 ||
  656. (saa7127_read(sd, 0x29) & 0x3f) != 0x1d) {
  657. v4l2_dbg(1, debug, sd, "saa7127 not found\n");
  658. return -ENODEV;
  659. }
  660. if (id->driver_data) { /* Chip type is already known */
  661. state->ident = id->driver_data;
  662. } else { /* Needs detection */
  663. int read_result;
  664. /* Detect if it's an saa7129 */
  665. read_result = saa7127_read(sd, SAA7129_REG_FADE_KEY_COL2);
  666. saa7127_write(sd, SAA7129_REG_FADE_KEY_COL2, 0xaa);
  667. if (saa7127_read(sd, SAA7129_REG_FADE_KEY_COL2) == 0xaa) {
  668. saa7127_write(sd, SAA7129_REG_FADE_KEY_COL2,
  669. read_result);
  670. state->ident = SAA7129;
  671. strlcpy(client->name, "saa7129", I2C_NAME_SIZE);
  672. } else {
  673. state->ident = SAA7127;
  674. strlcpy(client->name, "saa7127", I2C_NAME_SIZE);
  675. }
  676. }
  677. v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
  678. client->addr << 1, client->adapter->name);
  679. v4l2_dbg(1, debug, sd, "Configuring encoder\n");
  680. saa7127_write_inittab(sd, saa7127_init_config_common);
  681. saa7127_set_std(sd, V4L2_STD_NTSC);
  682. saa7127_set_output_type(sd, SAA7127_OUTPUT_TYPE_BOTH);
  683. saa7127_set_vps(sd, &vbi);
  684. saa7127_set_wss(sd, &vbi);
  685. saa7127_set_cc(sd, &vbi);
  686. saa7127_set_xds(sd, &vbi);
  687. if (test_image == 1)
  688. /* The Encoder has an internal Colorbar generator */
  689. /* This can be used for debugging */
  690. saa7127_set_input_type(sd, SAA7127_INPUT_TYPE_TEST_IMAGE);
  691. else
  692. saa7127_set_input_type(sd, SAA7127_INPUT_TYPE_NORMAL);
  693. saa7127_set_video_enable(sd, 1);
  694. if (state->ident == SAA7129)
  695. saa7127_write_inittab(sd, saa7129_init_config_extra);
  696. return 0;
  697. }
  698. /* ----------------------------------------------------------------------- */
  699. static int saa7127_remove(struct i2c_client *client)
  700. {
  701. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  702. v4l2_device_unregister_subdev(sd);
  703. /* Turn off TV output */
  704. saa7127_set_video_enable(sd, 0);
  705. return 0;
  706. }
  707. /* ----------------------------------------------------------------------- */
  708. static struct i2c_device_id saa7127_id[] = {
  709. { "saa7127_auto", 0 }, /* auto-detection */
  710. { "saa7126", SAA7127 },
  711. { "saa7127", SAA7127 },
  712. { "saa7128", SAA7129 },
  713. { "saa7129", SAA7129 },
  714. { }
  715. };
  716. MODULE_DEVICE_TABLE(i2c, saa7127_id);
  717. static struct i2c_driver saa7127_driver = {
  718. .driver = {
  719. .name = "saa7127",
  720. },
  721. .probe = saa7127_probe,
  722. .remove = saa7127_remove,
  723. .id_table = saa7127_id,
  724. };
  725. module_i2c_driver(saa7127_driver);