mt9m111.c 29 KB

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  1. /*
  2. * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
  3. *
  4. * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/videodev2.h>
  11. #include <linux/slab.h>
  12. #include <linux/i2c.h>
  13. #include <linux/log2.h>
  14. #include <linux/gpio.h>
  15. #include <linux/delay.h>
  16. #include <linux/v4l2-mediabus.h>
  17. #include <linux/module.h>
  18. #include <media/soc_camera.h>
  19. #include <media/v4l2-clk.h>
  20. #include <media/v4l2-common.h>
  21. #include <media/v4l2-ctrls.h>
  22. /*
  23. * MT9M111, MT9M112 and MT9M131:
  24. * i2c address is 0x48 or 0x5d (depending on SADDR pin)
  25. * The platform has to define struct i2c_board_info objects and link to them
  26. * from struct soc_camera_host_desc
  27. */
  28. /*
  29. * Sensor core register addresses (0x000..0x0ff)
  30. */
  31. #define MT9M111_CHIP_VERSION 0x000
  32. #define MT9M111_ROW_START 0x001
  33. #define MT9M111_COLUMN_START 0x002
  34. #define MT9M111_WINDOW_HEIGHT 0x003
  35. #define MT9M111_WINDOW_WIDTH 0x004
  36. #define MT9M111_HORIZONTAL_BLANKING_B 0x005
  37. #define MT9M111_VERTICAL_BLANKING_B 0x006
  38. #define MT9M111_HORIZONTAL_BLANKING_A 0x007
  39. #define MT9M111_VERTICAL_BLANKING_A 0x008
  40. #define MT9M111_SHUTTER_WIDTH 0x009
  41. #define MT9M111_ROW_SPEED 0x00a
  42. #define MT9M111_EXTRA_DELAY 0x00b
  43. #define MT9M111_SHUTTER_DELAY 0x00c
  44. #define MT9M111_RESET 0x00d
  45. #define MT9M111_READ_MODE_B 0x020
  46. #define MT9M111_READ_MODE_A 0x021
  47. #define MT9M111_FLASH_CONTROL 0x023
  48. #define MT9M111_GREEN1_GAIN 0x02b
  49. #define MT9M111_BLUE_GAIN 0x02c
  50. #define MT9M111_RED_GAIN 0x02d
  51. #define MT9M111_GREEN2_GAIN 0x02e
  52. #define MT9M111_GLOBAL_GAIN 0x02f
  53. #define MT9M111_CONTEXT_CONTROL 0x0c8
  54. #define MT9M111_PAGE_MAP 0x0f0
  55. #define MT9M111_BYTE_WISE_ADDR 0x0f1
  56. #define MT9M111_RESET_SYNC_CHANGES (1 << 15)
  57. #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
  58. #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
  59. #define MT9M111_RESET_RESET_SOC (1 << 5)
  60. #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
  61. #define MT9M111_RESET_CHIP_ENABLE (1 << 3)
  62. #define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
  63. #define MT9M111_RESET_RESTART_FRAME (1 << 1)
  64. #define MT9M111_RESET_RESET_MODE (1 << 0)
  65. #define MT9M111_RM_FULL_POWER_RD (0 << 10)
  66. #define MT9M111_RM_LOW_POWER_RD (1 << 10)
  67. #define MT9M111_RM_COL_SKIP_4X (1 << 5)
  68. #define MT9M111_RM_ROW_SKIP_4X (1 << 4)
  69. #define MT9M111_RM_COL_SKIP_2X (1 << 3)
  70. #define MT9M111_RM_ROW_SKIP_2X (1 << 2)
  71. #define MT9M111_RMB_MIRROR_COLS (1 << 1)
  72. #define MT9M111_RMB_MIRROR_ROWS (1 << 0)
  73. #define MT9M111_CTXT_CTRL_RESTART (1 << 15)
  74. #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
  75. #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
  76. #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
  77. #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
  78. #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
  79. #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
  80. #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
  81. #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
  82. #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
  83. /*
  84. * Colorpipe register addresses (0x100..0x1ff)
  85. */
  86. #define MT9M111_OPER_MODE_CTRL 0x106
  87. #define MT9M111_OUTPUT_FORMAT_CTRL 0x108
  88. #define MT9M111_REDUCER_XZOOM_B 0x1a0
  89. #define MT9M111_REDUCER_XSIZE_B 0x1a1
  90. #define MT9M111_REDUCER_YZOOM_B 0x1a3
  91. #define MT9M111_REDUCER_YSIZE_B 0x1a4
  92. #define MT9M111_REDUCER_XZOOM_A 0x1a6
  93. #define MT9M111_REDUCER_XSIZE_A 0x1a7
  94. #define MT9M111_REDUCER_YZOOM_A 0x1a9
  95. #define MT9M111_REDUCER_YSIZE_A 0x1aa
  96. #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
  97. #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
  98. #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
  99. #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
  100. #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9)
  101. #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8)
  102. #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
  103. #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
  104. #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
  105. #define MT9M111_OUTFMT_RGB (1 << 8)
  106. #define MT9M111_OUTFMT_RGB565 (0 << 6)
  107. #define MT9M111_OUTFMT_RGB555 (1 << 6)
  108. #define MT9M111_OUTFMT_RGB444x (2 << 6)
  109. #define MT9M111_OUTFMT_RGBx444 (3 << 6)
  110. #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
  111. #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
  112. #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
  113. #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
  114. #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
  115. #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
  116. #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1)
  117. #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
  118. /*
  119. * Camera control register addresses (0x200..0x2ff not implemented)
  120. */
  121. #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
  122. #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
  123. #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
  124. #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
  125. #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
  126. (val), (mask))
  127. #define MT9M111_MIN_DARK_ROWS 8
  128. #define MT9M111_MIN_DARK_COLS 26
  129. #define MT9M111_MAX_HEIGHT 1024
  130. #define MT9M111_MAX_WIDTH 1280
  131. struct mt9m111_context {
  132. u16 read_mode;
  133. u16 blanking_h;
  134. u16 blanking_v;
  135. u16 reducer_xzoom;
  136. u16 reducer_yzoom;
  137. u16 reducer_xsize;
  138. u16 reducer_ysize;
  139. u16 output_fmt_ctrl2;
  140. u16 control;
  141. };
  142. static struct mt9m111_context context_a = {
  143. .read_mode = MT9M111_READ_MODE_A,
  144. .blanking_h = MT9M111_HORIZONTAL_BLANKING_A,
  145. .blanking_v = MT9M111_VERTICAL_BLANKING_A,
  146. .reducer_xzoom = MT9M111_REDUCER_XZOOM_A,
  147. .reducer_yzoom = MT9M111_REDUCER_YZOOM_A,
  148. .reducer_xsize = MT9M111_REDUCER_XSIZE_A,
  149. .reducer_ysize = MT9M111_REDUCER_YSIZE_A,
  150. .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_A,
  151. .control = MT9M111_CTXT_CTRL_RESTART,
  152. };
  153. static struct mt9m111_context context_b = {
  154. .read_mode = MT9M111_READ_MODE_B,
  155. .blanking_h = MT9M111_HORIZONTAL_BLANKING_B,
  156. .blanking_v = MT9M111_VERTICAL_BLANKING_B,
  157. .reducer_xzoom = MT9M111_REDUCER_XZOOM_B,
  158. .reducer_yzoom = MT9M111_REDUCER_YZOOM_B,
  159. .reducer_xsize = MT9M111_REDUCER_XSIZE_B,
  160. .reducer_ysize = MT9M111_REDUCER_YSIZE_B,
  161. .output_fmt_ctrl2 = MT9M111_OUTPUT_FORMAT_CTRL2_B,
  162. .control = MT9M111_CTXT_CTRL_RESTART |
  163. MT9M111_CTXT_CTRL_DEFECTCOR_B | MT9M111_CTXT_CTRL_RESIZE_B |
  164. MT9M111_CTXT_CTRL_CTRL2_B | MT9M111_CTXT_CTRL_GAMMA_B |
  165. MT9M111_CTXT_CTRL_READ_MODE_B | MT9M111_CTXT_CTRL_VBLANK_SEL_B |
  166. MT9M111_CTXT_CTRL_HBLANK_SEL_B,
  167. };
  168. /* MT9M111 has only one fixed colorspace per pixelcode */
  169. struct mt9m111_datafmt {
  170. u32 code;
  171. enum v4l2_colorspace colorspace;
  172. };
  173. static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
  174. {MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
  175. {MEDIA_BUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
  176. {MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG},
  177. {MEDIA_BUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG},
  178. {MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  179. {MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
  180. {MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
  181. {MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
  182. {MEDIA_BUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB},
  183. {MEDIA_BUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB},
  184. {MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
  185. {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  186. };
  187. struct mt9m111 {
  188. struct v4l2_subdev subdev;
  189. struct v4l2_ctrl_handler hdl;
  190. struct v4l2_ctrl *gain;
  191. struct mt9m111_context *ctx;
  192. struct v4l2_rect rect; /* cropping rectangle */
  193. struct v4l2_clk *clk;
  194. unsigned int width; /* output */
  195. unsigned int height; /* sizes */
  196. struct mutex power_lock; /* lock to protect power_count */
  197. int power_count;
  198. const struct mt9m111_datafmt *fmt;
  199. int lastpage; /* PageMap cache value */
  200. };
  201. /* Find a data format by a pixel code */
  202. static const struct mt9m111_datafmt *mt9m111_find_datafmt(struct mt9m111 *mt9m111,
  203. u32 code)
  204. {
  205. int i;
  206. for (i = 0; i < ARRAY_SIZE(mt9m111_colour_fmts); i++)
  207. if (mt9m111_colour_fmts[i].code == code)
  208. return mt9m111_colour_fmts + i;
  209. return mt9m111->fmt;
  210. }
  211. static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
  212. {
  213. return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
  214. }
  215. static int reg_page_map_set(struct i2c_client *client, const u16 reg)
  216. {
  217. int ret;
  218. u16 page;
  219. struct mt9m111 *mt9m111 = to_mt9m111(client);
  220. page = (reg >> 8);
  221. if (page == mt9m111->lastpage)
  222. return 0;
  223. if (page > 2)
  224. return -EINVAL;
  225. ret = i2c_smbus_write_word_swapped(client, MT9M111_PAGE_MAP, page);
  226. if (!ret)
  227. mt9m111->lastpage = page;
  228. return ret;
  229. }
  230. static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
  231. {
  232. int ret;
  233. ret = reg_page_map_set(client, reg);
  234. if (!ret)
  235. ret = i2c_smbus_read_word_swapped(client, reg & 0xff);
  236. dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret);
  237. return ret;
  238. }
  239. static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
  240. const u16 data)
  241. {
  242. int ret;
  243. ret = reg_page_map_set(client, reg);
  244. if (!ret)
  245. ret = i2c_smbus_write_word_swapped(client, reg & 0xff, data);
  246. dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
  247. return ret;
  248. }
  249. static int mt9m111_reg_set(struct i2c_client *client, const u16 reg,
  250. const u16 data)
  251. {
  252. int ret;
  253. ret = mt9m111_reg_read(client, reg);
  254. if (ret >= 0)
  255. ret = mt9m111_reg_write(client, reg, ret | data);
  256. return ret;
  257. }
  258. static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg,
  259. const u16 data)
  260. {
  261. int ret;
  262. ret = mt9m111_reg_read(client, reg);
  263. if (ret >= 0)
  264. ret = mt9m111_reg_write(client, reg, ret & ~data);
  265. return ret;
  266. }
  267. static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg,
  268. const u16 data, const u16 mask)
  269. {
  270. int ret;
  271. ret = mt9m111_reg_read(client, reg);
  272. if (ret >= 0)
  273. ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data);
  274. return ret;
  275. }
  276. static int mt9m111_set_context(struct mt9m111 *mt9m111,
  277. struct mt9m111_context *ctx)
  278. {
  279. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  280. return reg_write(CONTEXT_CONTROL, ctx->control);
  281. }
  282. static int mt9m111_setup_rect_ctx(struct mt9m111 *mt9m111,
  283. struct mt9m111_context *ctx, struct v4l2_rect *rect,
  284. unsigned int width, unsigned int height)
  285. {
  286. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  287. int ret = mt9m111_reg_write(client, ctx->reducer_xzoom, rect->width);
  288. if (!ret)
  289. ret = mt9m111_reg_write(client, ctx->reducer_yzoom, rect->height);
  290. if (!ret)
  291. ret = mt9m111_reg_write(client, ctx->reducer_xsize, width);
  292. if (!ret)
  293. ret = mt9m111_reg_write(client, ctx->reducer_ysize, height);
  294. return ret;
  295. }
  296. static int mt9m111_setup_geometry(struct mt9m111 *mt9m111, struct v4l2_rect *rect,
  297. int width, int height, u32 code)
  298. {
  299. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  300. int ret;
  301. ret = reg_write(COLUMN_START, rect->left);
  302. if (!ret)
  303. ret = reg_write(ROW_START, rect->top);
  304. if (!ret)
  305. ret = reg_write(WINDOW_WIDTH, rect->width);
  306. if (!ret)
  307. ret = reg_write(WINDOW_HEIGHT, rect->height);
  308. if (code != MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) {
  309. /* IFP in use, down-scaling possible */
  310. if (!ret)
  311. ret = mt9m111_setup_rect_ctx(mt9m111, &context_b,
  312. rect, width, height);
  313. if (!ret)
  314. ret = mt9m111_setup_rect_ctx(mt9m111, &context_a,
  315. rect, width, height);
  316. }
  317. dev_dbg(&client->dev, "%s(%x): %ux%u@%u:%u -> %ux%u = %d\n",
  318. __func__, code, rect->width, rect->height, rect->left, rect->top,
  319. width, height, ret);
  320. return ret;
  321. }
  322. static int mt9m111_enable(struct mt9m111 *mt9m111)
  323. {
  324. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  325. return reg_write(RESET, MT9M111_RESET_CHIP_ENABLE);
  326. }
  327. static int mt9m111_reset(struct mt9m111 *mt9m111)
  328. {
  329. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  330. int ret;
  331. ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
  332. if (!ret)
  333. ret = reg_set(RESET, MT9M111_RESET_RESET_SOC);
  334. if (!ret)
  335. ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE
  336. | MT9M111_RESET_RESET_SOC);
  337. return ret;
  338. }
  339. static int mt9m111_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a)
  340. {
  341. struct v4l2_rect rect = a->c;
  342. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  343. int width, height;
  344. int ret;
  345. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  346. return -EINVAL;
  347. if (mt9m111->fmt->code == MEDIA_BUS_FMT_SBGGR8_1X8 ||
  348. mt9m111->fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) {
  349. /* Bayer format - even size lengths */
  350. rect.width = ALIGN(rect.width, 2);
  351. rect.height = ALIGN(rect.height, 2);
  352. /* Let the user play with the starting pixel */
  353. }
  354. /* FIXME: the datasheet doesn't specify minimum sizes */
  355. soc_camera_limit_side(&rect.left, &rect.width,
  356. MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
  357. soc_camera_limit_side(&rect.top, &rect.height,
  358. MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
  359. width = min(mt9m111->width, rect.width);
  360. height = min(mt9m111->height, rect.height);
  361. ret = mt9m111_setup_geometry(mt9m111, &rect, width, height, mt9m111->fmt->code);
  362. if (!ret) {
  363. mt9m111->rect = rect;
  364. mt9m111->width = width;
  365. mt9m111->height = height;
  366. }
  367. return ret;
  368. }
  369. static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  370. {
  371. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  372. a->c = mt9m111->rect;
  373. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  374. return 0;
  375. }
  376. static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
  377. {
  378. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  379. return -EINVAL;
  380. a->bounds.left = MT9M111_MIN_DARK_COLS;
  381. a->bounds.top = MT9M111_MIN_DARK_ROWS;
  382. a->bounds.width = MT9M111_MAX_WIDTH;
  383. a->bounds.height = MT9M111_MAX_HEIGHT;
  384. a->defrect = a->bounds;
  385. a->pixelaspect.numerator = 1;
  386. a->pixelaspect.denominator = 1;
  387. return 0;
  388. }
  389. static int mt9m111_get_fmt(struct v4l2_subdev *sd,
  390. struct v4l2_subdev_pad_config *cfg,
  391. struct v4l2_subdev_format *format)
  392. {
  393. struct v4l2_mbus_framefmt *mf = &format->format;
  394. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  395. if (format->pad)
  396. return -EINVAL;
  397. mf->width = mt9m111->width;
  398. mf->height = mt9m111->height;
  399. mf->code = mt9m111->fmt->code;
  400. mf->colorspace = mt9m111->fmt->colorspace;
  401. mf->field = V4L2_FIELD_NONE;
  402. return 0;
  403. }
  404. static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
  405. u32 code)
  406. {
  407. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  408. u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  409. MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB |
  410. MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 |
  411. MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 |
  412. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  413. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  414. int ret;
  415. switch (code) {
  416. case MEDIA_BUS_FMT_SBGGR8_1X8:
  417. data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  418. MT9M111_OUTFMT_RGB;
  419. break;
  420. case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE:
  421. data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB;
  422. break;
  423. case MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE:
  424. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 |
  425. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  426. break;
  427. case MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE:
  428. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555;
  429. break;
  430. case MEDIA_BUS_FMT_RGB565_2X8_LE:
  431. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  432. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  433. break;
  434. case MEDIA_BUS_FMT_RGB565_2X8_BE:
  435. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565;
  436. break;
  437. case MEDIA_BUS_FMT_BGR565_2X8_BE:
  438. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  439. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  440. break;
  441. case MEDIA_BUS_FMT_BGR565_2X8_LE:
  442. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  443. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  444. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  445. break;
  446. case MEDIA_BUS_FMT_UYVY8_2X8:
  447. data_outfmt2 = 0;
  448. break;
  449. case MEDIA_BUS_FMT_VYUY8_2X8:
  450. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  451. break;
  452. case MEDIA_BUS_FMT_YUYV8_2X8:
  453. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  454. break;
  455. case MEDIA_BUS_FMT_YVYU8_2X8:
  456. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  457. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  458. break;
  459. default:
  460. dev_err(&client->dev, "Pixel format not handled: %x\n", code);
  461. return -EINVAL;
  462. }
  463. ret = mt9m111_reg_mask(client, context_a.output_fmt_ctrl2,
  464. data_outfmt2, mask_outfmt2);
  465. if (!ret)
  466. ret = mt9m111_reg_mask(client, context_b.output_fmt_ctrl2,
  467. data_outfmt2, mask_outfmt2);
  468. return ret;
  469. }
  470. static int mt9m111_set_fmt(struct v4l2_subdev *sd,
  471. struct v4l2_subdev_pad_config *cfg,
  472. struct v4l2_subdev_format *format)
  473. {
  474. struct v4l2_mbus_framefmt *mf = &format->format;
  475. struct i2c_client *client = v4l2_get_subdevdata(sd);
  476. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  477. const struct mt9m111_datafmt *fmt;
  478. struct v4l2_rect *rect = &mt9m111->rect;
  479. bool bayer;
  480. int ret;
  481. if (format->pad)
  482. return -EINVAL;
  483. fmt = mt9m111_find_datafmt(mt9m111, mf->code);
  484. bayer = fmt->code == MEDIA_BUS_FMT_SBGGR8_1X8 ||
  485. fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE;
  486. /*
  487. * With Bayer format enforce even side lengths, but let the user play
  488. * with the starting pixel
  489. */
  490. if (bayer) {
  491. rect->width = ALIGN(rect->width, 2);
  492. rect->height = ALIGN(rect->height, 2);
  493. }
  494. if (fmt->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE) {
  495. /* IFP bypass mode, no scaling */
  496. mf->width = rect->width;
  497. mf->height = rect->height;
  498. } else {
  499. /* No upscaling */
  500. if (mf->width > rect->width)
  501. mf->width = rect->width;
  502. if (mf->height > rect->height)
  503. mf->height = rect->height;
  504. }
  505. dev_dbg(&client->dev, "%s(): %ux%u, code=%x\n", __func__,
  506. mf->width, mf->height, fmt->code);
  507. mf->code = fmt->code;
  508. mf->colorspace = fmt->colorspace;
  509. if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
  510. cfg->try_fmt = *mf;
  511. return 0;
  512. }
  513. ret = mt9m111_setup_geometry(mt9m111, rect, mf->width, mf->height, mf->code);
  514. if (!ret)
  515. ret = mt9m111_set_pixfmt(mt9m111, mf->code);
  516. if (!ret) {
  517. mt9m111->width = mf->width;
  518. mt9m111->height = mf->height;
  519. mt9m111->fmt = fmt;
  520. }
  521. return ret;
  522. }
  523. #ifdef CONFIG_VIDEO_ADV_DEBUG
  524. static int mt9m111_g_register(struct v4l2_subdev *sd,
  525. struct v4l2_dbg_register *reg)
  526. {
  527. struct i2c_client *client = v4l2_get_subdevdata(sd);
  528. int val;
  529. if (reg->reg > 0x2ff)
  530. return -EINVAL;
  531. val = mt9m111_reg_read(client, reg->reg);
  532. reg->size = 2;
  533. reg->val = (u64)val;
  534. if (reg->val > 0xffff)
  535. return -EIO;
  536. return 0;
  537. }
  538. static int mt9m111_s_register(struct v4l2_subdev *sd,
  539. const struct v4l2_dbg_register *reg)
  540. {
  541. struct i2c_client *client = v4l2_get_subdevdata(sd);
  542. if (reg->reg > 0x2ff)
  543. return -EINVAL;
  544. if (mt9m111_reg_write(client, reg->reg, reg->val) < 0)
  545. return -EIO;
  546. return 0;
  547. }
  548. #endif
  549. static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
  550. {
  551. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  552. int ret;
  553. if (flip)
  554. ret = mt9m111_reg_set(client, mt9m111->ctx->read_mode, mask);
  555. else
  556. ret = mt9m111_reg_clear(client, mt9m111->ctx->read_mode, mask);
  557. return ret;
  558. }
  559. static int mt9m111_get_global_gain(struct mt9m111 *mt9m111)
  560. {
  561. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  562. int data;
  563. data = reg_read(GLOBAL_GAIN);
  564. if (data >= 0)
  565. return (data & 0x2f) * (1 << ((data >> 10) & 1)) *
  566. (1 << ((data >> 9) & 1));
  567. return data;
  568. }
  569. static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain)
  570. {
  571. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  572. u16 val;
  573. if (gain > 63 * 2 * 2)
  574. return -EINVAL;
  575. if ((gain >= 64 * 2) && (gain < 63 * 2 * 2))
  576. val = (1 << 10) | (1 << 9) | (gain / 4);
  577. else if ((gain >= 64) && (gain < 64 * 2))
  578. val = (1 << 9) | (gain / 2);
  579. else
  580. val = gain;
  581. return reg_write(GLOBAL_GAIN, val);
  582. }
  583. static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int val)
  584. {
  585. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  586. if (val == V4L2_EXPOSURE_AUTO)
  587. return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  588. return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  589. }
  590. static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on)
  591. {
  592. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  593. if (on)
  594. return reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  595. return reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  596. }
  597. static int mt9m111_s_ctrl(struct v4l2_ctrl *ctrl)
  598. {
  599. struct mt9m111 *mt9m111 = container_of(ctrl->handler,
  600. struct mt9m111, hdl);
  601. switch (ctrl->id) {
  602. case V4L2_CID_VFLIP:
  603. return mt9m111_set_flip(mt9m111, ctrl->val,
  604. MT9M111_RMB_MIRROR_ROWS);
  605. case V4L2_CID_HFLIP:
  606. return mt9m111_set_flip(mt9m111, ctrl->val,
  607. MT9M111_RMB_MIRROR_COLS);
  608. case V4L2_CID_GAIN:
  609. return mt9m111_set_global_gain(mt9m111, ctrl->val);
  610. case V4L2_CID_EXPOSURE_AUTO:
  611. return mt9m111_set_autoexposure(mt9m111, ctrl->val);
  612. case V4L2_CID_AUTO_WHITE_BALANCE:
  613. return mt9m111_set_autowhitebalance(mt9m111, ctrl->val);
  614. }
  615. return -EINVAL;
  616. }
  617. static int mt9m111_suspend(struct mt9m111 *mt9m111)
  618. {
  619. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  620. int ret;
  621. v4l2_ctrl_s_ctrl(mt9m111->gain, mt9m111_get_global_gain(mt9m111));
  622. ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
  623. if (!ret)
  624. ret = reg_set(RESET, MT9M111_RESET_RESET_SOC |
  625. MT9M111_RESET_OUTPUT_DISABLE |
  626. MT9M111_RESET_ANALOG_STANDBY);
  627. if (!ret)
  628. ret = reg_clear(RESET, MT9M111_RESET_CHIP_ENABLE);
  629. return ret;
  630. }
  631. static void mt9m111_restore_state(struct mt9m111 *mt9m111)
  632. {
  633. mt9m111_set_context(mt9m111, mt9m111->ctx);
  634. mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
  635. mt9m111_setup_geometry(mt9m111, &mt9m111->rect,
  636. mt9m111->width, mt9m111->height, mt9m111->fmt->code);
  637. v4l2_ctrl_handler_setup(&mt9m111->hdl);
  638. }
  639. static int mt9m111_resume(struct mt9m111 *mt9m111)
  640. {
  641. int ret = mt9m111_enable(mt9m111);
  642. if (!ret)
  643. ret = mt9m111_reset(mt9m111);
  644. if (!ret)
  645. mt9m111_restore_state(mt9m111);
  646. return ret;
  647. }
  648. static int mt9m111_init(struct mt9m111 *mt9m111)
  649. {
  650. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  651. int ret;
  652. ret = mt9m111_enable(mt9m111);
  653. if (!ret)
  654. ret = mt9m111_reset(mt9m111);
  655. if (!ret)
  656. ret = mt9m111_set_context(mt9m111, mt9m111->ctx);
  657. if (ret)
  658. dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
  659. return ret;
  660. }
  661. static int mt9m111_power_on(struct mt9m111 *mt9m111)
  662. {
  663. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  664. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  665. int ret;
  666. ret = soc_camera_power_on(&client->dev, ssdd, mt9m111->clk);
  667. if (ret < 0)
  668. return ret;
  669. ret = mt9m111_resume(mt9m111);
  670. if (ret < 0) {
  671. dev_err(&client->dev, "Failed to resume the sensor: %d\n", ret);
  672. soc_camera_power_off(&client->dev, ssdd, mt9m111->clk);
  673. }
  674. return ret;
  675. }
  676. static void mt9m111_power_off(struct mt9m111 *mt9m111)
  677. {
  678. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  679. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  680. mt9m111_suspend(mt9m111);
  681. soc_camera_power_off(&client->dev, ssdd, mt9m111->clk);
  682. }
  683. static int mt9m111_s_power(struct v4l2_subdev *sd, int on)
  684. {
  685. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  686. int ret = 0;
  687. mutex_lock(&mt9m111->power_lock);
  688. /*
  689. * If the power count is modified from 0 to != 0 or from != 0 to 0,
  690. * update the power state.
  691. */
  692. if (mt9m111->power_count == !on) {
  693. if (on)
  694. ret = mt9m111_power_on(mt9m111);
  695. else
  696. mt9m111_power_off(mt9m111);
  697. }
  698. if (!ret) {
  699. /* Update the power count. */
  700. mt9m111->power_count += on ? 1 : -1;
  701. WARN_ON(mt9m111->power_count < 0);
  702. }
  703. mutex_unlock(&mt9m111->power_lock);
  704. return ret;
  705. }
  706. static const struct v4l2_ctrl_ops mt9m111_ctrl_ops = {
  707. .s_ctrl = mt9m111_s_ctrl,
  708. };
  709. static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
  710. .s_power = mt9m111_s_power,
  711. #ifdef CONFIG_VIDEO_ADV_DEBUG
  712. .g_register = mt9m111_g_register,
  713. .s_register = mt9m111_s_register,
  714. #endif
  715. };
  716. static int mt9m111_enum_mbus_code(struct v4l2_subdev *sd,
  717. struct v4l2_subdev_pad_config *cfg,
  718. struct v4l2_subdev_mbus_code_enum *code)
  719. {
  720. if (code->pad || code->index >= ARRAY_SIZE(mt9m111_colour_fmts))
  721. return -EINVAL;
  722. code->code = mt9m111_colour_fmts[code->index].code;
  723. return 0;
  724. }
  725. static int mt9m111_g_mbus_config(struct v4l2_subdev *sd,
  726. struct v4l2_mbus_config *cfg)
  727. {
  728. struct i2c_client *client = v4l2_get_subdevdata(sd);
  729. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  730. cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
  731. V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH |
  732. V4L2_MBUS_DATA_ACTIVE_HIGH;
  733. cfg->type = V4L2_MBUS_PARALLEL;
  734. cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);
  735. return 0;
  736. }
  737. static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
  738. .s_crop = mt9m111_s_crop,
  739. .g_crop = mt9m111_g_crop,
  740. .cropcap = mt9m111_cropcap,
  741. .g_mbus_config = mt9m111_g_mbus_config,
  742. };
  743. static const struct v4l2_subdev_pad_ops mt9m111_subdev_pad_ops = {
  744. .enum_mbus_code = mt9m111_enum_mbus_code,
  745. .get_fmt = mt9m111_get_fmt,
  746. .set_fmt = mt9m111_set_fmt,
  747. };
  748. static struct v4l2_subdev_ops mt9m111_subdev_ops = {
  749. .core = &mt9m111_subdev_core_ops,
  750. .video = &mt9m111_subdev_video_ops,
  751. .pad = &mt9m111_subdev_pad_ops,
  752. };
  753. /*
  754. * Interface active, can use i2c. If it fails, it can indeed mean, that
  755. * this wasn't our capture interface, so, we wait for the right one
  756. */
  757. static int mt9m111_video_probe(struct i2c_client *client)
  758. {
  759. struct mt9m111 *mt9m111 = to_mt9m111(client);
  760. s32 data;
  761. int ret;
  762. ret = mt9m111_s_power(&mt9m111->subdev, 1);
  763. if (ret < 0)
  764. return ret;
  765. data = reg_read(CHIP_VERSION);
  766. switch (data) {
  767. case 0x143a: /* MT9M111 or MT9M131 */
  768. dev_info(&client->dev,
  769. "Detected a MT9M111/MT9M131 chip ID %x\n", data);
  770. break;
  771. case 0x148c: /* MT9M112 */
  772. dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data);
  773. break;
  774. default:
  775. dev_err(&client->dev,
  776. "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
  777. data);
  778. ret = -ENODEV;
  779. goto done;
  780. }
  781. ret = mt9m111_init(mt9m111);
  782. if (ret)
  783. goto done;
  784. ret = v4l2_ctrl_handler_setup(&mt9m111->hdl);
  785. done:
  786. mt9m111_s_power(&mt9m111->subdev, 0);
  787. return ret;
  788. }
  789. static int mt9m111_probe(struct i2c_client *client,
  790. const struct i2c_device_id *did)
  791. {
  792. struct mt9m111 *mt9m111;
  793. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  794. struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
  795. int ret;
  796. if (client->dev.of_node) {
  797. ssdd = devm_kzalloc(&client->dev, sizeof(*ssdd), GFP_KERNEL);
  798. if (!ssdd)
  799. return -ENOMEM;
  800. client->dev.platform_data = ssdd;
  801. }
  802. if (!ssdd) {
  803. dev_err(&client->dev, "mt9m111: driver needs platform data\n");
  804. return -EINVAL;
  805. }
  806. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
  807. dev_warn(&adapter->dev,
  808. "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
  809. return -EIO;
  810. }
  811. mt9m111 = devm_kzalloc(&client->dev, sizeof(struct mt9m111), GFP_KERNEL);
  812. if (!mt9m111)
  813. return -ENOMEM;
  814. mt9m111->clk = v4l2_clk_get(&client->dev, "mclk");
  815. if (IS_ERR(mt9m111->clk))
  816. return -EPROBE_DEFER;
  817. /* Default HIGHPOWER context */
  818. mt9m111->ctx = &context_b;
  819. v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops);
  820. v4l2_ctrl_handler_init(&mt9m111->hdl, 5);
  821. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  822. V4L2_CID_VFLIP, 0, 1, 1, 0);
  823. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  824. V4L2_CID_HFLIP, 0, 1, 1, 0);
  825. v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  826. V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
  827. mt9m111->gain = v4l2_ctrl_new_std(&mt9m111->hdl, &mt9m111_ctrl_ops,
  828. V4L2_CID_GAIN, 0, 63 * 2 * 2, 1, 32);
  829. v4l2_ctrl_new_std_menu(&mt9m111->hdl,
  830. &mt9m111_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
  831. V4L2_EXPOSURE_AUTO);
  832. mt9m111->subdev.ctrl_handler = &mt9m111->hdl;
  833. if (mt9m111->hdl.error) {
  834. ret = mt9m111->hdl.error;
  835. goto out_clkput;
  836. }
  837. /* Second stage probe - when a capture adapter is there */
  838. mt9m111->rect.left = MT9M111_MIN_DARK_COLS;
  839. mt9m111->rect.top = MT9M111_MIN_DARK_ROWS;
  840. mt9m111->rect.width = MT9M111_MAX_WIDTH;
  841. mt9m111->rect.height = MT9M111_MAX_HEIGHT;
  842. mt9m111->width = mt9m111->rect.width;
  843. mt9m111->height = mt9m111->rect.height;
  844. mt9m111->fmt = &mt9m111_colour_fmts[0];
  845. mt9m111->lastpage = -1;
  846. mutex_init(&mt9m111->power_lock);
  847. ret = soc_camera_power_init(&client->dev, ssdd);
  848. if (ret < 0)
  849. goto out_hdlfree;
  850. ret = mt9m111_video_probe(client);
  851. if (ret < 0)
  852. goto out_hdlfree;
  853. mt9m111->subdev.dev = &client->dev;
  854. ret = v4l2_async_register_subdev(&mt9m111->subdev);
  855. if (ret < 0)
  856. goto out_hdlfree;
  857. return 0;
  858. out_hdlfree:
  859. v4l2_ctrl_handler_free(&mt9m111->hdl);
  860. out_clkput:
  861. v4l2_clk_put(mt9m111->clk);
  862. return ret;
  863. }
  864. static int mt9m111_remove(struct i2c_client *client)
  865. {
  866. struct mt9m111 *mt9m111 = to_mt9m111(client);
  867. v4l2_async_unregister_subdev(&mt9m111->subdev);
  868. v4l2_clk_put(mt9m111->clk);
  869. v4l2_ctrl_handler_free(&mt9m111->hdl);
  870. return 0;
  871. }
  872. static const struct of_device_id mt9m111_of_match[] = {
  873. { .compatible = "micron,mt9m111", },
  874. {},
  875. };
  876. MODULE_DEVICE_TABLE(of, mt9m111_of_match);
  877. static const struct i2c_device_id mt9m111_id[] = {
  878. { "mt9m111", 0 },
  879. { }
  880. };
  881. MODULE_DEVICE_TABLE(i2c, mt9m111_id);
  882. static struct i2c_driver mt9m111_i2c_driver = {
  883. .driver = {
  884. .name = "mt9m111",
  885. .of_match_table = of_match_ptr(mt9m111_of_match),
  886. },
  887. .probe = mt9m111_probe,
  888. .remove = mt9m111_remove,
  889. .id_table = mt9m111_id,
  890. };
  891. module_i2c_driver(mt9m111_i2c_driver);
  892. MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
  893. MODULE_AUTHOR("Robert Jarzmik");
  894. MODULE_LICENSE("GPL");