bt878.c 15 KB

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  1. /*
  2. * bt878.c: part of the driver for the Pinnacle PCTV Sat DVB PCI card
  3. *
  4. * Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@htp-tel.de>
  5. *
  6. * large parts based on the bttv driver
  7. * Copyright (C) 1996,97,98 Ralph Metzler (rjkm@metzlerbros.de)
  8. * & Marcus Metzler (mocm@metzlerbros.de)
  9. * (c) 1999,2000 Gerd Knorr <kraxel@goldbach.in-berlin.de>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  24. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/kernel.h>
  29. #include <linux/pci.h>
  30. #include <asm/io.h>
  31. #include <linux/ioport.h>
  32. #include <asm/pgtable.h>
  33. #include <asm/page.h>
  34. #include <linux/types.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/kmod.h>
  37. #include <linux/vmalloc.h>
  38. #include <linux/init.h>
  39. #include "dmxdev.h"
  40. #include "dvbdev.h"
  41. #include "bt878.h"
  42. #include "dst_priv.h"
  43. /**************************************/
  44. /* Miscellaneous utility definitions */
  45. /**************************************/
  46. static unsigned int bt878_verbose = 1;
  47. static unsigned int bt878_debug;
  48. module_param_named(verbose, bt878_verbose, int, 0444);
  49. MODULE_PARM_DESC(verbose,
  50. "verbose startup messages, default is 1 (yes)");
  51. module_param_named(debug, bt878_debug, int, 0644);
  52. MODULE_PARM_DESC(debug, "Turn on/off debugging, default is 0 (off).");
  53. int bt878_num;
  54. struct bt878 bt878[BT878_MAX];
  55. EXPORT_SYMBOL(bt878_num);
  56. EXPORT_SYMBOL(bt878);
  57. #define btwrite(dat,adr) bmtwrite((dat), (bt->bt878_mem+(adr)))
  58. #define btread(adr) bmtread(bt->bt878_mem+(adr))
  59. #define btand(dat,adr) btwrite((dat) & btread(adr), adr)
  60. #define btor(dat,adr) btwrite((dat) | btread(adr), adr)
  61. #define btaor(dat,mask,adr) btwrite((dat) | ((mask) & btread(adr)), adr)
  62. #if defined(dprintk)
  63. #undef dprintk
  64. #endif
  65. #define dprintk(fmt, arg...) \
  66. do { \
  67. if (bt878_debug) \
  68. printk(KERN_DEBUG fmt, ##arg); \
  69. } while (0)
  70. static void bt878_mem_free(struct bt878 *bt)
  71. {
  72. if (bt->buf_cpu) {
  73. pci_free_consistent(bt->dev, bt->buf_size, bt->buf_cpu,
  74. bt->buf_dma);
  75. bt->buf_cpu = NULL;
  76. }
  77. if (bt->risc_cpu) {
  78. pci_free_consistent(bt->dev, bt->risc_size, bt->risc_cpu,
  79. bt->risc_dma);
  80. bt->risc_cpu = NULL;
  81. }
  82. }
  83. static int bt878_mem_alloc(struct bt878 *bt)
  84. {
  85. if (!bt->buf_cpu) {
  86. bt->buf_size = 128 * 1024;
  87. bt->buf_cpu = pci_zalloc_consistent(bt->dev, bt->buf_size,
  88. &bt->buf_dma);
  89. if (!bt->buf_cpu)
  90. return -ENOMEM;
  91. }
  92. if (!bt->risc_cpu) {
  93. bt->risc_size = PAGE_SIZE;
  94. bt->risc_cpu = pci_zalloc_consistent(bt->dev, bt->risc_size,
  95. &bt->risc_dma);
  96. if (!bt->risc_cpu) {
  97. bt878_mem_free(bt);
  98. return -ENOMEM;
  99. }
  100. }
  101. return 0;
  102. }
  103. /* RISC instructions */
  104. #define RISC_WRITE (0x01 << 28)
  105. #define RISC_JUMP (0x07 << 28)
  106. #define RISC_SYNC (0x08 << 28)
  107. /* RISC bits */
  108. #define RISC_WR_SOL (1 << 27)
  109. #define RISC_WR_EOL (1 << 26)
  110. #define RISC_IRQ (1 << 24)
  111. #define RISC_STATUS(status) ((((~status) & 0x0F) << 20) | ((status & 0x0F) << 16))
  112. #define RISC_SYNC_RESYNC (1 << 15)
  113. #define RISC_SYNC_FM1 0x06
  114. #define RISC_SYNC_VRO 0x0C
  115. #define RISC_FLUSH() bt->risc_pos = 0
  116. #define RISC_INSTR(instr) bt->risc_cpu[bt->risc_pos++] = cpu_to_le32(instr)
  117. static int bt878_make_risc(struct bt878 *bt)
  118. {
  119. bt->block_bytes = bt->buf_size >> 4;
  120. bt->block_count = 1 << 4;
  121. bt->line_bytes = bt->block_bytes;
  122. bt->line_count = bt->block_count;
  123. while (bt->line_bytes > 4095) {
  124. bt->line_bytes >>= 1;
  125. bt->line_count <<= 1;
  126. }
  127. if (bt->line_count > 255) {
  128. printk(KERN_ERR "bt878: buffer size error!\n");
  129. return -EINVAL;
  130. }
  131. return 0;
  132. }
  133. static void bt878_risc_program(struct bt878 *bt, u32 op_sync_orin)
  134. {
  135. u32 buf_pos = 0;
  136. u32 line;
  137. RISC_FLUSH();
  138. RISC_INSTR(RISC_SYNC | RISC_SYNC_FM1 | op_sync_orin);
  139. RISC_INSTR(0);
  140. dprintk("bt878: risc len lines %u, bytes per line %u\n",
  141. bt->line_count, bt->line_bytes);
  142. for (line = 0; line < bt->line_count; line++) {
  143. // At the beginning of every block we issue an IRQ with previous (finished) block number set
  144. if (!(buf_pos % bt->block_bytes))
  145. RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
  146. RISC_IRQ |
  147. RISC_STATUS(((buf_pos /
  148. bt->block_bytes) +
  149. (bt->block_count -
  150. 1)) %
  151. bt->block_count) | bt->
  152. line_bytes);
  153. else
  154. RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
  155. bt->line_bytes);
  156. RISC_INSTR(bt->buf_dma + buf_pos);
  157. buf_pos += bt->line_bytes;
  158. }
  159. RISC_INSTR(RISC_SYNC | op_sync_orin | RISC_SYNC_VRO);
  160. RISC_INSTR(0);
  161. RISC_INSTR(RISC_JUMP);
  162. RISC_INSTR(bt->risc_dma);
  163. btwrite((bt->line_count << 16) | bt->line_bytes, BT878_APACK_LEN);
  164. }
  165. /*****************************/
  166. /* Start/Stop grabbing funcs */
  167. /*****************************/
  168. void bt878_start(struct bt878 *bt, u32 controlreg, u32 op_sync_orin,
  169. u32 irq_err_ignore)
  170. {
  171. u32 int_mask;
  172. dprintk("bt878 debug: bt878_start (ctl=%8.8x)\n", controlreg);
  173. /* complete the writing of the risc dma program now we have
  174. * the card specifics
  175. */
  176. bt878_risc_program(bt, op_sync_orin);
  177. controlreg &= ~0x1f;
  178. controlreg |= 0x1b;
  179. btwrite(bt->risc_dma, BT878_ARISC_START);
  180. /* original int mask had :
  181. * 6 2 8 4 0
  182. * 1111 1111 1000 0000 0000
  183. * SCERR|OCERR|PABORT|RIPERR|FDSR|FTRGT|FBUS|RISCI
  184. * Hacked for DST to:
  185. * SCERR | OCERR | FDSR | FTRGT | FBUS | RISCI
  186. */
  187. int_mask = BT878_ASCERR | BT878_AOCERR | BT878_APABORT |
  188. BT878_ARIPERR | BT878_APPERR | BT878_AFDSR | BT878_AFTRGT |
  189. BT878_AFBUS | BT878_ARISCI;
  190. /* ignore pesky bits */
  191. int_mask &= ~irq_err_ignore;
  192. btwrite(int_mask, BT878_AINT_MASK);
  193. btwrite(controlreg, BT878_AGPIO_DMA_CTL);
  194. }
  195. void bt878_stop(struct bt878 *bt)
  196. {
  197. u32 stat;
  198. int i = 0;
  199. dprintk("bt878 debug: bt878_stop\n");
  200. btwrite(0, BT878_AINT_MASK);
  201. btand(~0x13, BT878_AGPIO_DMA_CTL);
  202. do {
  203. stat = btread(BT878_AINT_STAT);
  204. if (!(stat & BT878_ARISC_EN))
  205. break;
  206. i++;
  207. } while (i < 500);
  208. dprintk("bt878(%d) debug: bt878_stop, i=%d, stat=0x%8.8x\n",
  209. bt->nr, i, stat);
  210. }
  211. EXPORT_SYMBOL(bt878_start);
  212. EXPORT_SYMBOL(bt878_stop);
  213. /*****************************/
  214. /* Interrupt service routine */
  215. /*****************************/
  216. static irqreturn_t bt878_irq(int irq, void *dev_id)
  217. {
  218. u32 stat, astat, mask;
  219. int count;
  220. struct bt878 *bt;
  221. bt = (struct bt878 *) dev_id;
  222. count = 0;
  223. while (1) {
  224. stat = btread(BT878_AINT_STAT);
  225. mask = btread(BT878_AINT_MASK);
  226. if (!(astat = (stat & mask)))
  227. return IRQ_NONE; /* this interrupt is not for me */
  228. /* dprintk("bt878(%d) debug: irq count %d, stat 0x%8.8x, mask 0x%8.8x\n",bt->nr,count,stat,mask); */
  229. btwrite(astat, BT878_AINT_STAT); /* try to clear interrupt condition */
  230. if (astat & (BT878_ASCERR | BT878_AOCERR)) {
  231. if (bt878_verbose) {
  232. printk(KERN_INFO
  233. "bt878(%d): irq%s%s risc_pc=%08x\n",
  234. bt->nr,
  235. (astat & BT878_ASCERR) ? " SCERR" :
  236. "",
  237. (astat & BT878_AOCERR) ? " OCERR" :
  238. "", btread(BT878_ARISC_PC));
  239. }
  240. }
  241. if (astat & (BT878_APABORT | BT878_ARIPERR | BT878_APPERR)) {
  242. if (bt878_verbose) {
  243. printk(KERN_INFO
  244. "bt878(%d): irq%s%s%s risc_pc=%08x\n",
  245. bt->nr,
  246. (astat & BT878_APABORT) ? " PABORT" :
  247. "",
  248. (astat & BT878_ARIPERR) ? " RIPERR" :
  249. "",
  250. (astat & BT878_APPERR) ? " PPERR" :
  251. "", btread(BT878_ARISC_PC));
  252. }
  253. }
  254. if (astat & (BT878_AFDSR | BT878_AFTRGT | BT878_AFBUS)) {
  255. if (bt878_verbose) {
  256. printk(KERN_INFO
  257. "bt878(%d): irq%s%s%s risc_pc=%08x\n",
  258. bt->nr,
  259. (astat & BT878_AFDSR) ? " FDSR" : "",
  260. (astat & BT878_AFTRGT) ? " FTRGT" :
  261. "",
  262. (astat & BT878_AFBUS) ? " FBUS" : "",
  263. btread(BT878_ARISC_PC));
  264. }
  265. }
  266. if (astat & BT878_ARISCI) {
  267. bt->finished_block = (stat & BT878_ARISCS) >> 28;
  268. tasklet_schedule(&bt->tasklet);
  269. break;
  270. }
  271. count++;
  272. if (count > 20) {
  273. btwrite(0, BT878_AINT_MASK);
  274. printk(KERN_ERR
  275. "bt878(%d): IRQ lockup, cleared int mask\n",
  276. bt->nr);
  277. break;
  278. }
  279. }
  280. return IRQ_HANDLED;
  281. }
  282. int
  283. bt878_device_control(struct bt878 *bt, unsigned int cmd, union dst_gpio_packet *mp)
  284. {
  285. int retval;
  286. retval = 0;
  287. if (mutex_lock_interruptible(&bt->gpio_lock))
  288. return -ERESTARTSYS;
  289. /* special gpio signal */
  290. switch (cmd) {
  291. case DST_IG_ENABLE:
  292. // dprintk("dvb_bt8xx: dst enable mask 0x%02x enb 0x%02x \n", mp->dstg.enb.mask, mp->dstg.enb.enable);
  293. retval = bttv_gpio_enable(bt->bttv_nr,
  294. mp->enb.mask,
  295. mp->enb.enable);
  296. break;
  297. case DST_IG_WRITE:
  298. // dprintk("dvb_bt8xx: dst write gpio mask 0x%02x out 0x%02x\n", mp->dstg.outp.mask, mp->dstg.outp.highvals);
  299. retval = bttv_write_gpio(bt->bttv_nr,
  300. mp->outp.mask,
  301. mp->outp.highvals);
  302. break;
  303. case DST_IG_READ:
  304. /* read */
  305. retval = bttv_read_gpio(bt->bttv_nr, &mp->rd.value);
  306. // dprintk("dvb_bt8xx: dst read gpio 0x%02x\n", (unsigned)mp->dstg.rd.value);
  307. break;
  308. case DST_IG_TS:
  309. /* Set packet size */
  310. bt->TS_Size = mp->psize;
  311. break;
  312. default:
  313. retval = -EINVAL;
  314. break;
  315. }
  316. mutex_unlock(&bt->gpio_lock);
  317. return retval;
  318. }
  319. EXPORT_SYMBOL(bt878_device_control);
  320. #define BROOKTREE_878_DEVICE(vend, dev, name) \
  321. { \
  322. .vendor = PCI_VENDOR_ID_BROOKTREE, \
  323. .device = PCI_DEVICE_ID_BROOKTREE_878, \
  324. .subvendor = (vend), .subdevice = (dev), \
  325. .driver_data = (unsigned long) name \
  326. }
  327. static struct pci_device_id bt878_pci_tbl[] = {
  328. BROOKTREE_878_DEVICE(0x0071, 0x0101, "Nebula Electronics DigiTV"),
  329. BROOKTREE_878_DEVICE(0x1461, 0x0761, "AverMedia AverTV DVB-T 761"),
  330. BROOKTREE_878_DEVICE(0x11bd, 0x001c, "Pinnacle PCTV Sat"),
  331. BROOKTREE_878_DEVICE(0x11bd, 0x0026, "Pinnacle PCTV SAT CI"),
  332. BROOKTREE_878_DEVICE(0x1822, 0x0001, "Twinhan VisionPlus DVB"),
  333. BROOKTREE_878_DEVICE(0x270f, 0xfc00,
  334. "ChainTech digitop DST-1000 DVB-S"),
  335. BROOKTREE_878_DEVICE(0x1461, 0x0771, "AVermedia AverTV DVB-T 771"),
  336. BROOKTREE_878_DEVICE(0x18ac, 0xdb10, "DViCO FusionHDTV DVB-T Lite"),
  337. BROOKTREE_878_DEVICE(0x18ac, 0xdb11, "Ultraview DVB-T Lite"),
  338. BROOKTREE_878_DEVICE(0x18ac, 0xd500, "DViCO FusionHDTV 5 Lite"),
  339. BROOKTREE_878_DEVICE(0x7063, 0x2000, "pcHDTV HD-2000 TV"),
  340. BROOKTREE_878_DEVICE(0x1822, 0x0026, "DNTV Live! Mini"),
  341. { }
  342. };
  343. MODULE_DEVICE_TABLE(pci, bt878_pci_tbl);
  344. static const char * card_name(const struct pci_device_id *id)
  345. {
  346. return id->driver_data ? (const char *)id->driver_data : "Unknown";
  347. }
  348. /***********************/
  349. /* PCI device handling */
  350. /***********************/
  351. static int bt878_probe(struct pci_dev *dev, const struct pci_device_id *pci_id)
  352. {
  353. int result = 0;
  354. unsigned char lat;
  355. struct bt878 *bt;
  356. unsigned int cardid;
  357. printk(KERN_INFO "bt878: Bt878 AUDIO function found (%d).\n",
  358. bt878_num);
  359. if (bt878_num >= BT878_MAX) {
  360. printk(KERN_ERR "bt878: Too many devices inserted\n");
  361. return -ENOMEM;
  362. }
  363. if (pci_enable_device(dev))
  364. return -EIO;
  365. cardid = dev->subsystem_device << 16;
  366. cardid |= dev->subsystem_vendor;
  367. printk(KERN_INFO "%s: card id=[0x%x],[ %s ] has DVB functions.\n",
  368. __func__, cardid, card_name(pci_id));
  369. bt = &bt878[bt878_num];
  370. bt->dev = dev;
  371. bt->nr = bt878_num;
  372. bt->shutdown = 0;
  373. bt->id = dev->device;
  374. bt->irq = dev->irq;
  375. bt->bt878_adr = pci_resource_start(dev, 0);
  376. if (!request_mem_region(pci_resource_start(dev, 0),
  377. pci_resource_len(dev, 0), "bt878")) {
  378. result = -EBUSY;
  379. goto fail0;
  380. }
  381. bt->revision = dev->revision;
  382. pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
  383. printk(KERN_INFO "bt878(%d): Bt%x (rev %d) at %02x:%02x.%x, ",
  384. bt878_num, bt->id, bt->revision, dev->bus->number,
  385. PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  386. printk("irq: %d, latency: %d, memory: 0x%lx\n",
  387. bt->irq, lat, bt->bt878_adr);
  388. #ifdef __sparc__
  389. bt->bt878_mem = (unsigned char *) bt->bt878_adr;
  390. #else
  391. bt->bt878_mem = ioremap(bt->bt878_adr, 0x1000);
  392. #endif
  393. /* clear interrupt mask */
  394. btwrite(0, BT848_INT_MASK);
  395. result = request_irq(bt->irq, bt878_irq,
  396. IRQF_SHARED, "bt878", (void *) bt);
  397. if (result == -EINVAL) {
  398. printk(KERN_ERR "bt878(%d): Bad irq number or handler\n",
  399. bt878_num);
  400. goto fail1;
  401. }
  402. if (result == -EBUSY) {
  403. printk(KERN_ERR
  404. "bt878(%d): IRQ %d busy, change your PnP config in BIOS\n",
  405. bt878_num, bt->irq);
  406. goto fail1;
  407. }
  408. if (result < 0)
  409. goto fail1;
  410. pci_set_master(dev);
  411. pci_set_drvdata(dev, bt);
  412. if ((result = bt878_mem_alloc(bt))) {
  413. printk(KERN_ERR "bt878: failed to allocate memory!\n");
  414. goto fail2;
  415. }
  416. bt878_make_risc(bt);
  417. btwrite(0, BT878_AINT_MASK);
  418. bt878_num++;
  419. return 0;
  420. fail2:
  421. free_irq(bt->irq, bt);
  422. fail1:
  423. release_mem_region(pci_resource_start(bt->dev, 0),
  424. pci_resource_len(bt->dev, 0));
  425. fail0:
  426. pci_disable_device(dev);
  427. return result;
  428. }
  429. static void bt878_remove(struct pci_dev *pci_dev)
  430. {
  431. u8 command;
  432. struct bt878 *bt = pci_get_drvdata(pci_dev);
  433. if (bt878_verbose)
  434. printk(KERN_INFO "bt878(%d): unloading\n", bt->nr);
  435. /* turn off all capturing, DMA and IRQs */
  436. btand(~0x13, BT878_AGPIO_DMA_CTL);
  437. /* first disable interrupts before unmapping the memory! */
  438. btwrite(0, BT878_AINT_MASK);
  439. btwrite(~0U, BT878_AINT_STAT);
  440. /* disable PCI bus-mastering */
  441. pci_read_config_byte(bt->dev, PCI_COMMAND, &command);
  442. /* Should this be &=~ ?? */
  443. command &= ~PCI_COMMAND_MASTER;
  444. pci_write_config_byte(bt->dev, PCI_COMMAND, command);
  445. free_irq(bt->irq, bt);
  446. printk(KERN_DEBUG "bt878_mem: 0x%p.\n", bt->bt878_mem);
  447. if (bt->bt878_mem)
  448. iounmap(bt->bt878_mem);
  449. release_mem_region(pci_resource_start(bt->dev, 0),
  450. pci_resource_len(bt->dev, 0));
  451. /* wake up any waiting processes
  452. because shutdown flag is set, no new processes (in this queue)
  453. are expected
  454. */
  455. bt->shutdown = 1;
  456. bt878_mem_free(bt);
  457. pci_disable_device(pci_dev);
  458. return;
  459. }
  460. static struct pci_driver bt878_pci_driver = {
  461. .name = "bt878",
  462. .id_table = bt878_pci_tbl,
  463. .probe = bt878_probe,
  464. .remove = bt878_remove,
  465. };
  466. /*******************************/
  467. /* Module management functions */
  468. /*******************************/
  469. static int __init bt878_init_module(void)
  470. {
  471. bt878_num = 0;
  472. printk(KERN_INFO "bt878: AUDIO driver version %d.%d.%d loaded\n",
  473. (BT878_VERSION_CODE >> 16) & 0xff,
  474. (BT878_VERSION_CODE >> 8) & 0xff,
  475. BT878_VERSION_CODE & 0xff);
  476. return pci_register_driver(&bt878_pci_driver);
  477. }
  478. static void __exit bt878_cleanup_module(void)
  479. {
  480. pci_unregister_driver(&bt878_pci_driver);
  481. }
  482. module_init(bt878_init_module);
  483. module_exit(bt878_cleanup_module);
  484. MODULE_LICENSE("GPL");