saa7164-core.c 41 KB

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  1. /*
  2. * Driver for the NXP SAA7164 PCIe bridge
  3. *
  4. * Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/list.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/kmod.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/delay.h>
  30. #include <asm/div64.h>
  31. #ifdef CONFIG_PROC_FS
  32. #include <linux/proc_fs.h>
  33. #endif
  34. #include "saa7164.h"
  35. MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards");
  36. MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>");
  37. MODULE_LICENSE("GPL");
  38. /*
  39. * 1 Basic
  40. * 2
  41. * 4 i2c
  42. * 8 api
  43. * 16 cmd
  44. * 32 bus
  45. */
  46. unsigned int saa_debug;
  47. module_param_named(debug, saa_debug, int, 0644);
  48. MODULE_PARM_DESC(debug, "enable debug messages");
  49. static unsigned int fw_debug;
  50. module_param(fw_debug, int, 0644);
  51. MODULE_PARM_DESC(fw_debug, "Firmware debug level def:2");
  52. unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS;
  53. module_param(encoder_buffers, int, 0644);
  54. MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64");
  55. unsigned int vbi_buffers = SAA7164_MAX_VBI_BUFFERS;
  56. module_param(vbi_buffers, int, 0644);
  57. MODULE_PARM_DESC(vbi_buffers, "Total buffers in read queue 16-512 def:64");
  58. unsigned int waitsecs = 10;
  59. module_param(waitsecs, int, 0644);
  60. MODULE_PARM_DESC(waitsecs, "timeout on firmware messages");
  61. static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET };
  62. module_param_array(card, int, NULL, 0444);
  63. MODULE_PARM_DESC(card, "card type");
  64. static unsigned int print_histogram = 64;
  65. module_param(print_histogram, int, 0644);
  66. MODULE_PARM_DESC(print_histogram, "print histogram values once");
  67. unsigned int crc_checking = 1;
  68. module_param(crc_checking, int, 0644);
  69. MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers");
  70. static unsigned int guard_checking = 1;
  71. module_param(guard_checking, int, 0644);
  72. MODULE_PARM_DESC(guard_checking,
  73. "enable dma sanity checking for buffer overruns");
  74. static bool enable_msi = true;
  75. module_param(enable_msi, bool, 0444);
  76. MODULE_PARM_DESC(enable_msi,
  77. "enable the use of an msi interrupt if available");
  78. static unsigned int saa7164_devcount;
  79. static DEFINE_MUTEX(devlist);
  80. LIST_HEAD(saa7164_devlist);
  81. #define INT_SIZE 16
  82. static void saa7164_pack_verifier(struct saa7164_buffer *buf)
  83. {
  84. u8 *p = (u8 *)buf->cpu;
  85. int i;
  86. for (i = 0; i < buf->actual_size; i += 2048) {
  87. if ((*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) ||
  88. (*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA)) {
  89. printk(KERN_ERR "No pack at 0x%x\n", i);
  90. #if 0
  91. print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
  92. p + 1, 32, false);
  93. #endif
  94. }
  95. }
  96. }
  97. #define FIXED_VIDEO_PID 0xf1
  98. #define FIXED_AUDIO_PID 0xf2
  99. static void saa7164_ts_verifier(struct saa7164_buffer *buf)
  100. {
  101. struct saa7164_port *port = buf->port;
  102. u32 i;
  103. u8 cc, a;
  104. u16 pid;
  105. u8 *bufcpu = (u8 *)buf->cpu;
  106. port->sync_errors = 0;
  107. port->v_cc_errors = 0;
  108. port->a_cc_errors = 0;
  109. for (i = 0; i < buf->actual_size; i += 188) {
  110. if (*(bufcpu + i) != 0x47)
  111. port->sync_errors++;
  112. /* TODO: Query pid lower 8 bits, ignoring upper bits intensionally */
  113. pid = ((*(bufcpu + i + 1) & 0x1f) << 8) | *(bufcpu + i + 2);
  114. cc = *(bufcpu + i + 3) & 0x0f;
  115. if (pid == FIXED_VIDEO_PID) {
  116. a = ((port->last_v_cc + 1) & 0x0f);
  117. if (a != cc) {
  118. printk(KERN_ERR "video cc last = %x current = %x i = %d\n",
  119. port->last_v_cc, cc, i);
  120. port->v_cc_errors++;
  121. }
  122. port->last_v_cc = cc;
  123. } else
  124. if (pid == FIXED_AUDIO_PID) {
  125. a = ((port->last_a_cc + 1) & 0x0f);
  126. if (a != cc) {
  127. printk(KERN_ERR "audio cc last = %x current = %x i = %d\n",
  128. port->last_a_cc, cc, i);
  129. port->a_cc_errors++;
  130. }
  131. port->last_a_cc = cc;
  132. }
  133. }
  134. /* Only report errors if we've been through this function atleast
  135. * once already and the cached cc values are primed. First time through
  136. * always generates errors.
  137. */
  138. if (port->v_cc_errors && (port->done_first_interrupt > 1))
  139. printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors);
  140. if (port->a_cc_errors && (port->done_first_interrupt > 1))
  141. printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors);
  142. if (port->sync_errors && (port->done_first_interrupt > 1))
  143. printk(KERN_ERR "sync_errors = %d\n", port->sync_errors);
  144. if (port->done_first_interrupt == 1)
  145. port->done_first_interrupt++;
  146. }
  147. static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name)
  148. {
  149. int i;
  150. memset(hg, 0, sizeof(struct saa7164_histogram));
  151. strcpy(hg->name, name);
  152. /* First 30ms x 1ms */
  153. for (i = 0; i < 30; i++)
  154. hg->counter1[0 + i].val = i;
  155. /* 30 - 200ms x 10ms */
  156. for (i = 0; i < 18; i++)
  157. hg->counter1[30 + i].val = 30 + (i * 10);
  158. /* 200 - 2000ms x 100ms */
  159. for (i = 0; i < 15; i++)
  160. hg->counter1[48 + i].val = 200 + (i * 200);
  161. /* Catch all massive value (2secs) */
  162. hg->counter1[55].val = 2000;
  163. /* Catch all massive value (4secs) */
  164. hg->counter1[56].val = 4000;
  165. /* Catch all massive value (8secs) */
  166. hg->counter1[57].val = 8000;
  167. /* Catch all massive value (15secs) */
  168. hg->counter1[58].val = 15000;
  169. /* Catch all massive value (30secs) */
  170. hg->counter1[59].val = 30000;
  171. /* Catch all massive value (60secs) */
  172. hg->counter1[60].val = 60000;
  173. /* Catch all massive value (5mins) */
  174. hg->counter1[61].val = 300000;
  175. /* Catch all massive value (15mins) */
  176. hg->counter1[62].val = 900000;
  177. /* Catch all massive values (1hr) */
  178. hg->counter1[63].val = 3600000;
  179. }
  180. void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val)
  181. {
  182. int i;
  183. for (i = 0; i < 64; i++) {
  184. if (val <= hg->counter1[i].val) {
  185. hg->counter1[i].count++;
  186. hg->counter1[i].update_time = jiffies;
  187. break;
  188. }
  189. }
  190. }
  191. static void saa7164_histogram_print(struct saa7164_port *port,
  192. struct saa7164_histogram *hg)
  193. {
  194. u32 entries = 0;
  195. int i;
  196. printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name);
  197. for (i = 0; i < 64; i++) {
  198. if (hg->counter1[i].count == 0)
  199. continue;
  200. printk(KERN_ERR " %4d %12d %Ld\n",
  201. hg->counter1[i].val,
  202. hg->counter1[i].count,
  203. hg->counter1[i].update_time);
  204. entries++;
  205. }
  206. printk(KERN_ERR "Total: %d\n", entries);
  207. }
  208. static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr)
  209. {
  210. struct saa7164_dev *dev = port->dev;
  211. struct saa7164_buffer *buf = NULL;
  212. struct saa7164_user_buffer *ubuf = NULL;
  213. struct list_head *c, *n;
  214. int i = 0;
  215. u8 *p;
  216. mutex_lock(&port->dmaqueue_lock);
  217. list_for_each_safe(c, n, &port->dmaqueue.list) {
  218. buf = list_entry(c, struct saa7164_buffer, list);
  219. if (i++ > port->hwcfg.buffercount) {
  220. printk(KERN_ERR "%s() illegal i count %d\n",
  221. __func__, i);
  222. break;
  223. }
  224. if (buf->idx == bufnr) {
  225. /* Found the buffer, deal with it */
  226. dprintk(DBGLVL_IRQ, "%s() bufnr: %d\n", __func__, bufnr);
  227. if (crc_checking) {
  228. /* Throw a new checksum on the dma buffer */
  229. buf->crc = crc32(0, buf->cpu, buf->actual_size);
  230. }
  231. if (guard_checking) {
  232. p = (u8 *)buf->cpu;
  233. if ((*(p + buf->actual_size + 0) != 0xff) ||
  234. (*(p + buf->actual_size + 1) != 0xff) ||
  235. (*(p + buf->actual_size + 2) != 0xff) ||
  236. (*(p + buf->actual_size + 3) != 0xff) ||
  237. (*(p + buf->actual_size + 0x10) != 0xff) ||
  238. (*(p + buf->actual_size + 0x11) != 0xff) ||
  239. (*(p + buf->actual_size + 0x12) != 0xff) ||
  240. (*(p + buf->actual_size + 0x13) != 0xff)) {
  241. printk(KERN_ERR "%s() buf %p guard buffer breach\n",
  242. __func__, buf);
  243. #if 0
  244. print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
  245. p + buf->actual_size - 32, 64, false);
  246. #endif
  247. }
  248. }
  249. if ((port->nr != SAA7164_PORT_VBI1) && (port->nr != SAA7164_PORT_VBI2)) {
  250. /* Validate the incoming buffer content */
  251. if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS)
  252. saa7164_ts_verifier(buf);
  253. else if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS)
  254. saa7164_pack_verifier(buf);
  255. }
  256. /* find a free user buffer and clone to it */
  257. if (!list_empty(&port->list_buf_free.list)) {
  258. /* Pull the first buffer from the used list */
  259. ubuf = list_first_entry(&port->list_buf_free.list,
  260. struct saa7164_user_buffer, list);
  261. if (buf->actual_size <= ubuf->actual_size) {
  262. memcpy(ubuf->data, buf->cpu, ubuf->actual_size);
  263. if (crc_checking) {
  264. /* Throw a new checksum on the read buffer */
  265. ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size);
  266. }
  267. /* Requeue the buffer on the free list */
  268. ubuf->pos = 0;
  269. list_move_tail(&ubuf->list,
  270. &port->list_buf_used.list);
  271. /* Flag any userland waiters */
  272. wake_up_interruptible(&port->wait_read);
  273. } else {
  274. printk(KERN_ERR "buf %p bufsize fails match\n", buf);
  275. }
  276. } else
  277. printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n");
  278. /* Ensure offset into buffer remains 0, fill buffer
  279. * with known bad data. We check for this data at a later point
  280. * in time. */
  281. saa7164_buffer_zero_offsets(port, bufnr);
  282. memset(buf->cpu, 0xff, buf->pci_size);
  283. if (crc_checking) {
  284. /* Throw yet aanother new checksum on the dma buffer */
  285. buf->crc = crc32(0, buf->cpu, buf->actual_size);
  286. }
  287. break;
  288. }
  289. }
  290. mutex_unlock(&port->dmaqueue_lock);
  291. }
  292. static void saa7164_work_enchandler(struct work_struct *w)
  293. {
  294. struct saa7164_port *port =
  295. container_of(w, struct saa7164_port, workenc);
  296. struct saa7164_dev *dev = port->dev;
  297. u32 wp, mcb, rp, cnt = 0;
  298. port->last_svc_msecs_diff = port->last_svc_msecs;
  299. port->last_svc_msecs = jiffies_to_msecs(jiffies);
  300. port->last_svc_msecs_diff = port->last_svc_msecs -
  301. port->last_svc_msecs_diff;
  302. saa7164_histogram_update(&port->svc_interval,
  303. port->last_svc_msecs_diff);
  304. port->last_irq_svc_msecs_diff = port->last_svc_msecs -
  305. port->last_irq_msecs;
  306. saa7164_histogram_update(&port->irq_svc_interval,
  307. port->last_irq_svc_msecs_diff);
  308. dprintk(DBGLVL_IRQ,
  309. "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
  310. __func__,
  311. port->last_svc_msecs_diff,
  312. port->last_irq_svc_msecs_diff,
  313. port->last_svc_wp,
  314. port->last_svc_rp
  315. );
  316. /* Current write position */
  317. wp = saa7164_readl(port->bufcounter);
  318. if (wp > (port->hwcfg.buffercount - 1)) {
  319. printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
  320. return;
  321. }
  322. /* Most current complete buffer */
  323. if (wp == 0)
  324. mcb = (port->hwcfg.buffercount - 1);
  325. else
  326. mcb = wp - 1;
  327. while (1) {
  328. if (port->done_first_interrupt == 0) {
  329. port->done_first_interrupt++;
  330. rp = mcb;
  331. } else
  332. rp = (port->last_svc_rp + 1) % 8;
  333. if (rp > (port->hwcfg.buffercount - 1)) {
  334. printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
  335. break;
  336. }
  337. saa7164_work_enchandler_helper(port, rp);
  338. port->last_svc_rp = rp;
  339. cnt++;
  340. if (rp == mcb)
  341. break;
  342. }
  343. /* TODO: Convert this into a /proc/saa7164 style readable file */
  344. if (print_histogram == port->nr) {
  345. saa7164_histogram_print(port, &port->irq_interval);
  346. saa7164_histogram_print(port, &port->svc_interval);
  347. saa7164_histogram_print(port, &port->irq_svc_interval);
  348. saa7164_histogram_print(port, &port->read_interval);
  349. saa7164_histogram_print(port, &port->poll_interval);
  350. /* TODO: fix this to preserve any previous state */
  351. print_histogram = 64 + port->nr;
  352. }
  353. }
  354. static void saa7164_work_vbihandler(struct work_struct *w)
  355. {
  356. struct saa7164_port *port =
  357. container_of(w, struct saa7164_port, workenc);
  358. struct saa7164_dev *dev = port->dev;
  359. u32 wp, mcb, rp, cnt = 0;
  360. port->last_svc_msecs_diff = port->last_svc_msecs;
  361. port->last_svc_msecs = jiffies_to_msecs(jiffies);
  362. port->last_svc_msecs_diff = port->last_svc_msecs -
  363. port->last_svc_msecs_diff;
  364. saa7164_histogram_update(&port->svc_interval,
  365. port->last_svc_msecs_diff);
  366. port->last_irq_svc_msecs_diff = port->last_svc_msecs -
  367. port->last_irq_msecs;
  368. saa7164_histogram_update(&port->irq_svc_interval,
  369. port->last_irq_svc_msecs_diff);
  370. dprintk(DBGLVL_IRQ,
  371. "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
  372. __func__,
  373. port->last_svc_msecs_diff,
  374. port->last_irq_svc_msecs_diff,
  375. port->last_svc_wp,
  376. port->last_svc_rp
  377. );
  378. /* Current write position */
  379. wp = saa7164_readl(port->bufcounter);
  380. if (wp > (port->hwcfg.buffercount - 1)) {
  381. printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
  382. return;
  383. }
  384. /* Most current complete buffer */
  385. if (wp == 0)
  386. mcb = (port->hwcfg.buffercount - 1);
  387. else
  388. mcb = wp - 1;
  389. while (1) {
  390. if (port->done_first_interrupt == 0) {
  391. port->done_first_interrupt++;
  392. rp = mcb;
  393. } else
  394. rp = (port->last_svc_rp + 1) % 8;
  395. if (rp > (port->hwcfg.buffercount - 1)) {
  396. printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
  397. break;
  398. }
  399. saa7164_work_enchandler_helper(port, rp);
  400. port->last_svc_rp = rp;
  401. cnt++;
  402. if (rp == mcb)
  403. break;
  404. }
  405. /* TODO: Convert this into a /proc/saa7164 style readable file */
  406. if (print_histogram == port->nr) {
  407. saa7164_histogram_print(port, &port->irq_interval);
  408. saa7164_histogram_print(port, &port->svc_interval);
  409. saa7164_histogram_print(port, &port->irq_svc_interval);
  410. saa7164_histogram_print(port, &port->read_interval);
  411. saa7164_histogram_print(port, &port->poll_interval);
  412. /* TODO: fix this to preserve any previous state */
  413. print_histogram = 64 + port->nr;
  414. }
  415. }
  416. static void saa7164_work_cmdhandler(struct work_struct *w)
  417. {
  418. struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd);
  419. /* Wake up any complete commands */
  420. saa7164_irq_dequeue(dev);
  421. }
  422. static void saa7164_buffer_deliver(struct saa7164_buffer *buf)
  423. {
  424. struct saa7164_port *port = buf->port;
  425. /* Feed the transport payload into the kernel demux */
  426. dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu,
  427. SAA7164_TS_NUMBER_OF_LINES);
  428. }
  429. static irqreturn_t saa7164_irq_vbi(struct saa7164_port *port)
  430. {
  431. struct saa7164_dev *dev = port->dev;
  432. /* Store old time */
  433. port->last_irq_msecs_diff = port->last_irq_msecs;
  434. /* Collect new stats */
  435. port->last_irq_msecs = jiffies_to_msecs(jiffies);
  436. /* Calculate stats */
  437. port->last_irq_msecs_diff = port->last_irq_msecs -
  438. port->last_irq_msecs_diff;
  439. saa7164_histogram_update(&port->irq_interval,
  440. port->last_irq_msecs_diff);
  441. dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
  442. port->last_irq_msecs_diff);
  443. /* Tis calls the vbi irq handler */
  444. schedule_work(&port->workenc);
  445. return 0;
  446. }
  447. static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port)
  448. {
  449. struct saa7164_dev *dev = port->dev;
  450. /* Store old time */
  451. port->last_irq_msecs_diff = port->last_irq_msecs;
  452. /* Collect new stats */
  453. port->last_irq_msecs = jiffies_to_msecs(jiffies);
  454. /* Calculate stats */
  455. port->last_irq_msecs_diff = port->last_irq_msecs -
  456. port->last_irq_msecs_diff;
  457. saa7164_histogram_update(&port->irq_interval,
  458. port->last_irq_msecs_diff);
  459. dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
  460. port->last_irq_msecs_diff);
  461. schedule_work(&port->workenc);
  462. return 0;
  463. }
  464. static irqreturn_t saa7164_irq_ts(struct saa7164_port *port)
  465. {
  466. struct saa7164_dev *dev = port->dev;
  467. struct saa7164_buffer *buf;
  468. struct list_head *c, *n;
  469. int wp, i = 0, rp;
  470. /* Find the current write point from the hardware */
  471. wp = saa7164_readl(port->bufcounter);
  472. if (wp > (port->hwcfg.buffercount - 1))
  473. BUG();
  474. /* Find the previous buffer to the current write point */
  475. if (wp == 0)
  476. rp = (port->hwcfg.buffercount - 1);
  477. else
  478. rp = wp - 1;
  479. /* Lookup the WP in the buffer list */
  480. /* TODO: turn this into a worker thread */
  481. list_for_each_safe(c, n, &port->dmaqueue.list) {
  482. buf = list_entry(c, struct saa7164_buffer, list);
  483. if (i++ > port->hwcfg.buffercount)
  484. BUG();
  485. if (buf->idx == rp) {
  486. /* Found the buffer, deal with it */
  487. dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n",
  488. __func__, wp, rp);
  489. saa7164_buffer_deliver(buf);
  490. break;
  491. }
  492. }
  493. return 0;
  494. }
  495. /* Primary IRQ handler and dispatch mechanism */
  496. static irqreturn_t saa7164_irq(int irq, void *dev_id)
  497. {
  498. struct saa7164_dev *dev = dev_id;
  499. struct saa7164_port *porta, *portb, *portc, *portd, *porte, *portf;
  500. u32 intid, intstat[INT_SIZE/4];
  501. int i, handled = 0, bit;
  502. if (dev == NULL) {
  503. printk(KERN_ERR "%s() No device specified\n", __func__);
  504. handled = 0;
  505. goto out;
  506. }
  507. porta = &dev->ports[SAA7164_PORT_TS1];
  508. portb = &dev->ports[SAA7164_PORT_TS2];
  509. portc = &dev->ports[SAA7164_PORT_ENC1];
  510. portd = &dev->ports[SAA7164_PORT_ENC2];
  511. porte = &dev->ports[SAA7164_PORT_VBI1];
  512. portf = &dev->ports[SAA7164_PORT_VBI2];
  513. /* Check that the hardware is accessible. If the status bytes are
  514. * 0xFF then the device is not accessible, the the IRQ belongs
  515. * to another driver.
  516. * 4 x u32 interrupt registers.
  517. */
  518. for (i = 0; i < INT_SIZE/4; i++) {
  519. /* TODO: Convert into saa7164_readl() */
  520. /* Read the 4 hardware interrupt registers */
  521. intstat[i] = saa7164_readl(dev->int_status + (i * 4));
  522. if (intstat[i])
  523. handled = 1;
  524. }
  525. if (handled == 0)
  526. goto out;
  527. /* For each of the HW interrupt registers */
  528. for (i = 0; i < INT_SIZE/4; i++) {
  529. if (intstat[i]) {
  530. /* Each function of the board has it's own interruptid.
  531. * Find the function that triggered then call
  532. * it's handler.
  533. */
  534. for (bit = 0; bit < 32; bit++) {
  535. if (((intstat[i] >> bit) & 0x00000001) == 0)
  536. continue;
  537. /* Calculate the interrupt id (0x00 to 0x7f) */
  538. intid = (i * 32) + bit;
  539. if (intid == dev->intfdesc.bInterruptId) {
  540. /* A response to an cmd/api call */
  541. schedule_work(&dev->workcmd);
  542. } else if (intid == porta->hwcfg.interruptid) {
  543. /* Transport path 1 */
  544. saa7164_irq_ts(porta);
  545. } else if (intid == portb->hwcfg.interruptid) {
  546. /* Transport path 2 */
  547. saa7164_irq_ts(portb);
  548. } else if (intid == portc->hwcfg.interruptid) {
  549. /* Encoder path 1 */
  550. saa7164_irq_encoder(portc);
  551. } else if (intid == portd->hwcfg.interruptid) {
  552. /* Encoder path 2 */
  553. saa7164_irq_encoder(portd);
  554. } else if (intid == porte->hwcfg.interruptid) {
  555. /* VBI path 1 */
  556. saa7164_irq_vbi(porte);
  557. } else if (intid == portf->hwcfg.interruptid) {
  558. /* VBI path 2 */
  559. saa7164_irq_vbi(portf);
  560. } else {
  561. /* Find the function */
  562. dprintk(DBGLVL_IRQ,
  563. "%s() unhandled interrupt "
  564. "reg 0x%x bit 0x%x "
  565. "intid = 0x%x\n",
  566. __func__, i, bit, intid);
  567. }
  568. }
  569. /* Ack it */
  570. saa7164_writel(dev->int_ack + (i * 4), intstat[i]);
  571. }
  572. }
  573. out:
  574. return IRQ_RETVAL(handled);
  575. }
  576. void saa7164_getfirmwarestatus(struct saa7164_dev *dev)
  577. {
  578. struct saa7164_fw_status *s = &dev->fw_status;
  579. dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS);
  580. dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE);
  581. dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC);
  582. dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST);
  583. dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD);
  584. dev->fw_status.remainheap =
  585. saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP);
  586. dprintk(1, "Firmware status:\n");
  587. dprintk(1, " .status = 0x%08x\n", s->status);
  588. dprintk(1, " .mode = 0x%08x\n", s->mode);
  589. dprintk(1, " .spec = 0x%08x\n", s->spec);
  590. dprintk(1, " .inst = 0x%08x\n", s->inst);
  591. dprintk(1, " .cpuload = 0x%08x\n", s->cpuload);
  592. dprintk(1, " .remainheap = 0x%08x\n", s->remainheap);
  593. }
  594. u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev)
  595. {
  596. u32 reg;
  597. reg = saa7164_readl(SAA_DEVICE_VERSION);
  598. dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n",
  599. (reg & 0x0000fc00) >> 10,
  600. (reg & 0x000003e0) >> 5,
  601. (reg & 0x0000001f),
  602. (reg & 0xffff0000) >> 16,
  603. reg);
  604. return reg;
  605. }
  606. /* TODO: Debugging func, remove */
  607. void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr)
  608. {
  609. int i;
  610. dprintk(1, "--------------------> "
  611. "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  612. for (i = 0; i < 0x100; i += 16)
  613. dprintk(1, "region0[0x%08x] = "
  614. "%02x %02x %02x %02x %02x %02x %02x %02x"
  615. " %02x %02x %02x %02x %02x %02x %02x %02x\n", i,
  616. (u8)saa7164_readb(addr + i + 0),
  617. (u8)saa7164_readb(addr + i + 1),
  618. (u8)saa7164_readb(addr + i + 2),
  619. (u8)saa7164_readb(addr + i + 3),
  620. (u8)saa7164_readb(addr + i + 4),
  621. (u8)saa7164_readb(addr + i + 5),
  622. (u8)saa7164_readb(addr + i + 6),
  623. (u8)saa7164_readb(addr + i + 7),
  624. (u8)saa7164_readb(addr + i + 8),
  625. (u8)saa7164_readb(addr + i + 9),
  626. (u8)saa7164_readb(addr + i + 10),
  627. (u8)saa7164_readb(addr + i + 11),
  628. (u8)saa7164_readb(addr + i + 12),
  629. (u8)saa7164_readb(addr + i + 13),
  630. (u8)saa7164_readb(addr + i + 14),
  631. (u8)saa7164_readb(addr + i + 15)
  632. );
  633. }
  634. static void saa7164_dump_hwdesc(struct saa7164_dev *dev)
  635. {
  636. dprintk(1, "@0x%p hwdesc sizeof(struct tmComResHWDescr) = %d bytes\n",
  637. &dev->hwdesc, (u32)sizeof(struct tmComResHWDescr));
  638. dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength);
  639. dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType);
  640. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  641. dev->hwdesc.bDescriptorSubtype);
  642. dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion);
  643. dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency);
  644. dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes);
  645. dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities);
  646. dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n",
  647. dev->hwdesc.dwDeviceRegistersLocation);
  648. dprintk(1, " .dwHostMemoryRegion = 0x%x\n",
  649. dev->hwdesc.dwHostMemoryRegion);
  650. dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n",
  651. dev->hwdesc.dwHostMemoryRegionSize);
  652. dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n",
  653. dev->hwdesc.dwHostHibernatMemRegion);
  654. dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n",
  655. dev->hwdesc.dwHostHibernatMemRegionSize);
  656. }
  657. static void saa7164_dump_intfdesc(struct saa7164_dev *dev)
  658. {
  659. dprintk(1, "@0x%p intfdesc "
  660. "sizeof(struct tmComResInterfaceDescr) = %d bytes\n",
  661. &dev->intfdesc, (u32)sizeof(struct tmComResInterfaceDescr));
  662. dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength);
  663. dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType);
  664. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  665. dev->intfdesc.bDescriptorSubtype);
  666. dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags);
  667. dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType);
  668. dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId);
  669. dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface);
  670. dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId);
  671. dprintk(1, " .bDebugInterruptId = 0x%x\n",
  672. dev->intfdesc.bDebugInterruptId);
  673. dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation);
  674. }
  675. static void saa7164_dump_busdesc(struct saa7164_dev *dev)
  676. {
  677. dprintk(1, "@0x%p busdesc sizeof(struct tmComResBusDescr) = %d bytes\n",
  678. &dev->busdesc, (u32)sizeof(struct tmComResBusDescr));
  679. dprintk(1, " .CommandRing = 0x%016Lx\n", dev->busdesc.CommandRing);
  680. dprintk(1, " .ResponseRing = 0x%016Lx\n", dev->busdesc.ResponseRing);
  681. dprintk(1, " .CommandWrite = 0x%x\n", dev->busdesc.CommandWrite);
  682. dprintk(1, " .CommandRead = 0x%x\n", dev->busdesc.CommandRead);
  683. dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite);
  684. dprintk(1, " .ResponseRead = 0x%x\n", dev->busdesc.ResponseRead);
  685. }
  686. /* Much of the hardware configuration and PCI registers are configured
  687. * dynamically depending on firmware. We have to cache some initial
  688. * structures then use these to locate other important structures
  689. * from PCI space.
  690. */
  691. static void saa7164_get_descriptors(struct saa7164_dev *dev)
  692. {
  693. memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(struct tmComResHWDescr));
  694. memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(struct tmComResHWDescr),
  695. sizeof(struct tmComResInterfaceDescr));
  696. memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation,
  697. sizeof(struct tmComResBusDescr));
  698. if (dev->hwdesc.bLength != sizeof(struct tmComResHWDescr)) {
  699. printk(KERN_ERR "Structure struct tmComResHWDescr is mangled\n");
  700. printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength,
  701. (u32)sizeof(struct tmComResHWDescr));
  702. } else
  703. saa7164_dump_hwdesc(dev);
  704. if (dev->intfdesc.bLength != sizeof(struct tmComResInterfaceDescr)) {
  705. printk(KERN_ERR "struct struct tmComResInterfaceDescr is mangled\n");
  706. printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength,
  707. (u32)sizeof(struct tmComResInterfaceDescr));
  708. } else
  709. saa7164_dump_intfdesc(dev);
  710. saa7164_dump_busdesc(dev);
  711. }
  712. static int saa7164_pci_quirks(struct saa7164_dev *dev)
  713. {
  714. return 0;
  715. }
  716. static int get_resources(struct saa7164_dev *dev)
  717. {
  718. if (request_mem_region(pci_resource_start(dev->pci, 0),
  719. pci_resource_len(dev->pci, 0), dev->name)) {
  720. if (request_mem_region(pci_resource_start(dev->pci, 2),
  721. pci_resource_len(dev->pci, 2), dev->name))
  722. return 0;
  723. }
  724. printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n",
  725. dev->name,
  726. (u64)pci_resource_start(dev->pci, 0),
  727. (u64)pci_resource_start(dev->pci, 2));
  728. return -EBUSY;
  729. }
  730. static int saa7164_port_init(struct saa7164_dev *dev, int portnr)
  731. {
  732. struct saa7164_port *port = NULL;
  733. if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS))
  734. BUG();
  735. port = &dev->ports[portnr];
  736. port->dev = dev;
  737. port->nr = portnr;
  738. if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2))
  739. port->type = SAA7164_MPEG_DVB;
  740. else
  741. if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2)) {
  742. port->type = SAA7164_MPEG_ENCODER;
  743. /* We need a deferred interrupt handler for cmd handling */
  744. INIT_WORK(&port->workenc, saa7164_work_enchandler);
  745. } else if ((portnr == SAA7164_PORT_VBI1) || (portnr == SAA7164_PORT_VBI2)) {
  746. port->type = SAA7164_MPEG_VBI;
  747. /* We need a deferred interrupt handler for cmd handling */
  748. INIT_WORK(&port->workenc, saa7164_work_vbihandler);
  749. } else
  750. BUG();
  751. /* Init all the critical resources */
  752. mutex_init(&port->dvb.lock);
  753. INIT_LIST_HEAD(&port->dmaqueue.list);
  754. mutex_init(&port->dmaqueue_lock);
  755. INIT_LIST_HEAD(&port->list_buf_used.list);
  756. INIT_LIST_HEAD(&port->list_buf_free.list);
  757. init_waitqueue_head(&port->wait_read);
  758. saa7164_histogram_reset(&port->irq_interval, "irq intervals");
  759. saa7164_histogram_reset(&port->svc_interval, "deferred intervals");
  760. saa7164_histogram_reset(&port->irq_svc_interval,
  761. "irq to deferred intervals");
  762. saa7164_histogram_reset(&port->read_interval,
  763. "encoder/vbi read() intervals");
  764. saa7164_histogram_reset(&port->poll_interval,
  765. "encoder/vbi poll() intervals");
  766. return 0;
  767. }
  768. static int saa7164_dev_setup(struct saa7164_dev *dev)
  769. {
  770. int i;
  771. mutex_init(&dev->lock);
  772. atomic_inc(&dev->refcount);
  773. dev->nr = saa7164_devcount++;
  774. snprintf(dev->name, sizeof(dev->name), "saa7164[%d]", dev->nr);
  775. mutex_lock(&devlist);
  776. list_add_tail(&dev->devlist, &saa7164_devlist);
  777. mutex_unlock(&devlist);
  778. /* board config */
  779. dev->board = UNSET;
  780. if (card[dev->nr] < saa7164_bcount)
  781. dev->board = card[dev->nr];
  782. for (i = 0; UNSET == dev->board && i < saa7164_idcount; i++)
  783. if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor &&
  784. dev->pci->subsystem_device ==
  785. saa7164_subids[i].subdevice)
  786. dev->board = saa7164_subids[i].card;
  787. if (UNSET == dev->board) {
  788. dev->board = SAA7164_BOARD_UNKNOWN;
  789. saa7164_card_list(dev);
  790. }
  791. dev->pci_bus = dev->pci->bus->number;
  792. dev->pci_slot = PCI_SLOT(dev->pci->devfn);
  793. /* I2C Defaults / setup */
  794. dev->i2c_bus[0].dev = dev;
  795. dev->i2c_bus[0].nr = 0;
  796. dev->i2c_bus[1].dev = dev;
  797. dev->i2c_bus[1].nr = 1;
  798. dev->i2c_bus[2].dev = dev;
  799. dev->i2c_bus[2].nr = 2;
  800. /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */
  801. saa7164_port_init(dev, SAA7164_PORT_TS1);
  802. saa7164_port_init(dev, SAA7164_PORT_TS2);
  803. saa7164_port_init(dev, SAA7164_PORT_ENC1);
  804. saa7164_port_init(dev, SAA7164_PORT_ENC2);
  805. saa7164_port_init(dev, SAA7164_PORT_VBI1);
  806. saa7164_port_init(dev, SAA7164_PORT_VBI2);
  807. if (get_resources(dev) < 0) {
  808. printk(KERN_ERR "CORE %s No more PCIe resources for "
  809. "subsystem: %04x:%04x\n",
  810. dev->name, dev->pci->subsystem_vendor,
  811. dev->pci->subsystem_device);
  812. saa7164_devcount--;
  813. return -ENODEV;
  814. }
  815. /* PCI/e allocations */
  816. dev->lmmio = ioremap(pci_resource_start(dev->pci, 0),
  817. pci_resource_len(dev->pci, 0));
  818. dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2),
  819. pci_resource_len(dev->pci, 2));
  820. dev->bmmio = (u8 __iomem *)dev->lmmio;
  821. dev->bmmio2 = (u8 __iomem *)dev->lmmio2;
  822. /* Inerrupt and ack register locations offset of bmmio */
  823. dev->int_status = 0x183000 + 0xf80;
  824. dev->int_ack = 0x183000 + 0xf90;
  825. printk(KERN_INFO
  826. "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
  827. dev->name, dev->pci->subsystem_vendor,
  828. dev->pci->subsystem_device, saa7164_boards[dev->board].name,
  829. dev->board, card[dev->nr] == dev->board ?
  830. "insmod option" : "autodetected");
  831. saa7164_pci_quirks(dev);
  832. return 0;
  833. }
  834. static void saa7164_dev_unregister(struct saa7164_dev *dev)
  835. {
  836. dprintk(1, "%s()\n", __func__);
  837. release_mem_region(pci_resource_start(dev->pci, 0),
  838. pci_resource_len(dev->pci, 0));
  839. release_mem_region(pci_resource_start(dev->pci, 2),
  840. pci_resource_len(dev->pci, 2));
  841. if (!atomic_dec_and_test(&dev->refcount))
  842. return;
  843. iounmap(dev->lmmio);
  844. iounmap(dev->lmmio2);
  845. return;
  846. }
  847. #ifdef CONFIG_PROC_FS
  848. static int saa7164_proc_show(struct seq_file *m, void *v)
  849. {
  850. struct saa7164_dev *dev;
  851. struct tmComResBusInfo *b;
  852. struct list_head *list;
  853. int i, c;
  854. if (saa7164_devcount == 0)
  855. return 0;
  856. list_for_each(list, &saa7164_devlist) {
  857. dev = list_entry(list, struct saa7164_dev, devlist);
  858. seq_printf(m, "%s = %p\n", dev->name, dev);
  859. /* Lock the bus from any other access */
  860. b = &dev->bus;
  861. mutex_lock(&b->lock);
  862. seq_printf(m, " .m_pdwSetWritePos = 0x%x (0x%08x)\n",
  863. b->m_dwSetReadPos, saa7164_readl(b->m_dwSetReadPos));
  864. seq_printf(m, " .m_pdwSetReadPos = 0x%x (0x%08x)\n",
  865. b->m_dwSetWritePos, saa7164_readl(b->m_dwSetWritePos));
  866. seq_printf(m, " .m_pdwGetWritePos = 0x%x (0x%08x)\n",
  867. b->m_dwGetReadPos, saa7164_readl(b->m_dwGetReadPos));
  868. seq_printf(m, " .m_pdwGetReadPos = 0x%x (0x%08x)\n",
  869. b->m_dwGetWritePos, saa7164_readl(b->m_dwGetWritePos));
  870. c = 0;
  871. seq_printf(m, "\n Set Ring:\n");
  872. seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  873. for (i = 0; i < b->m_dwSizeSetRing; i++) {
  874. if (c == 0)
  875. seq_printf(m, " %04x:", i);
  876. seq_printf(m, " %02x", readb(b->m_pdwSetRing + i));
  877. if (++c == 16) {
  878. seq_printf(m, "\n");
  879. c = 0;
  880. }
  881. }
  882. c = 0;
  883. seq_printf(m, "\n Get Ring:\n");
  884. seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  885. for (i = 0; i < b->m_dwSizeGetRing; i++) {
  886. if (c == 0)
  887. seq_printf(m, " %04x:", i);
  888. seq_printf(m, " %02x", readb(b->m_pdwGetRing + i));
  889. if (++c == 16) {
  890. seq_printf(m, "\n");
  891. c = 0;
  892. }
  893. }
  894. mutex_unlock(&b->lock);
  895. }
  896. return 0;
  897. }
  898. static int saa7164_proc_open(struct inode *inode, struct file *filp)
  899. {
  900. return single_open(filp, saa7164_proc_show, NULL);
  901. }
  902. static const struct file_operations saa7164_proc_fops = {
  903. .open = saa7164_proc_open,
  904. .read = seq_read,
  905. .llseek = seq_lseek,
  906. .release = single_release,
  907. };
  908. static int saa7164_proc_create(void)
  909. {
  910. struct proc_dir_entry *pe;
  911. pe = proc_create("saa7164", S_IRUGO, NULL, &saa7164_proc_fops);
  912. if (!pe)
  913. return -ENOMEM;
  914. return 0;
  915. }
  916. #endif
  917. static int saa7164_thread_function(void *data)
  918. {
  919. struct saa7164_dev *dev = data;
  920. struct tmFwInfoStruct fwinfo;
  921. u64 last_poll_time = 0;
  922. dprintk(DBGLVL_THR, "thread started\n");
  923. set_freezable();
  924. while (1) {
  925. msleep_interruptible(100);
  926. if (kthread_should_stop())
  927. break;
  928. try_to_freeze();
  929. dprintk(DBGLVL_THR, "thread running\n");
  930. /* Dump the firmware debug message to console */
  931. /* Polling this costs us 1-2% of the arm CPU */
  932. /* convert this into a respnde to interrupt 0x7a */
  933. saa7164_api_collect_debug(dev);
  934. /* Monitor CPU load every 1 second */
  935. if ((last_poll_time + 1000 /* ms */) < jiffies_to_msecs(jiffies)) {
  936. saa7164_api_get_load_info(dev, &fwinfo);
  937. last_poll_time = jiffies_to_msecs(jiffies);
  938. }
  939. }
  940. dprintk(DBGLVL_THR, "thread exiting\n");
  941. return 0;
  942. }
  943. static bool saa7164_enable_msi(struct pci_dev *pci_dev, struct saa7164_dev *dev)
  944. {
  945. int err;
  946. if (!enable_msi) {
  947. printk(KERN_WARNING "%s() MSI disabled by module parameter 'enable_msi'"
  948. , __func__);
  949. return false;
  950. }
  951. err = pci_enable_msi(pci_dev);
  952. if (err) {
  953. printk(KERN_ERR "%s() Failed to enable MSI interrupt."
  954. " Falling back to a shared IRQ\n", __func__);
  955. return false;
  956. }
  957. /* no error - so request an msi interrupt */
  958. err = request_irq(pci_dev->irq, saa7164_irq, 0,
  959. dev->name, dev);
  960. if (err) {
  961. /* fall back to legacy interrupt */
  962. printk(KERN_ERR "%s() Failed to get an MSI interrupt."
  963. " Falling back to a shared IRQ\n", __func__);
  964. pci_disable_msi(pci_dev);
  965. return false;
  966. }
  967. return true;
  968. }
  969. static int saa7164_initdev(struct pci_dev *pci_dev,
  970. const struct pci_device_id *pci_id)
  971. {
  972. struct saa7164_dev *dev;
  973. int err, i;
  974. u32 version;
  975. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  976. if (NULL == dev)
  977. return -ENOMEM;
  978. err = v4l2_device_register(&pci_dev->dev, &dev->v4l2_dev);
  979. if (err < 0) {
  980. dev_err(&pci_dev->dev, "v4l2_device_register failed\n");
  981. goto fail_free;
  982. }
  983. /* pci init */
  984. dev->pci = pci_dev;
  985. if (pci_enable_device(pci_dev)) {
  986. err = -EIO;
  987. goto fail_free;
  988. }
  989. if (saa7164_dev_setup(dev) < 0) {
  990. err = -EINVAL;
  991. goto fail_free;
  992. }
  993. /* print pci info */
  994. dev->pci_rev = pci_dev->revision;
  995. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  996. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
  997. "latency: %d, mmio: 0x%llx\n", dev->name,
  998. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  999. dev->pci_lat,
  1000. (unsigned long long)pci_resource_start(pci_dev, 0));
  1001. pci_set_master(pci_dev);
  1002. /* TODO */
  1003. err = pci_set_dma_mask(pci_dev, 0xffffffff);
  1004. if (err) {
  1005. printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name);
  1006. goto fail_irq;
  1007. }
  1008. /* irq bit */
  1009. if (saa7164_enable_msi(pci_dev, dev)) {
  1010. dev->msi = true;
  1011. } else {
  1012. /* if we have an error (i.e. we don't have an interrupt)
  1013. or msi is not enabled - fallback to shared interrupt */
  1014. err = request_irq(pci_dev->irq, saa7164_irq,
  1015. IRQF_SHARED, dev->name, dev);
  1016. if (err < 0) {
  1017. printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name,
  1018. pci_dev->irq);
  1019. err = -EIO;
  1020. goto fail_irq;
  1021. }
  1022. }
  1023. pci_set_drvdata(pci_dev, dev);
  1024. /* Init the internal command list */
  1025. for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) {
  1026. dev->cmds[i].seqno = i;
  1027. dev->cmds[i].inuse = 0;
  1028. mutex_init(&dev->cmds[i].lock);
  1029. init_waitqueue_head(&dev->cmds[i].wait);
  1030. }
  1031. /* We need a deferred interrupt handler for cmd handling */
  1032. INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler);
  1033. /* Only load the firmware if we know the board */
  1034. if (dev->board != SAA7164_BOARD_UNKNOWN) {
  1035. err = saa7164_downloadfirmware(dev);
  1036. if (err < 0) {
  1037. printk(KERN_ERR
  1038. "Failed to boot firmware, no features "
  1039. "registered\n");
  1040. goto fail_fw;
  1041. }
  1042. saa7164_get_descriptors(dev);
  1043. saa7164_dumpregs(dev, 0);
  1044. saa7164_getcurrentfirmwareversion(dev);
  1045. saa7164_getfirmwarestatus(dev);
  1046. err = saa7164_bus_setup(dev);
  1047. if (err < 0)
  1048. printk(KERN_ERR
  1049. "Failed to setup the bus, will continue\n");
  1050. saa7164_bus_dump(dev);
  1051. /* Ping the running firmware via the command bus and get the
  1052. * firmware version, this checks the bus is running OK.
  1053. */
  1054. version = 0;
  1055. if (saa7164_api_get_fw_version(dev, &version) == SAA_OK)
  1056. dprintk(1, "Bus is operating correctly using "
  1057. "version %d.%d.%d.%d (0x%x)\n",
  1058. (version & 0x0000fc00) >> 10,
  1059. (version & 0x000003e0) >> 5,
  1060. (version & 0x0000001f),
  1061. (version & 0xffff0000) >> 16,
  1062. version);
  1063. else
  1064. printk(KERN_ERR
  1065. "Failed to communicate with the firmware\n");
  1066. /* Bring up the I2C buses */
  1067. saa7164_i2c_register(&dev->i2c_bus[0]);
  1068. saa7164_i2c_register(&dev->i2c_bus[1]);
  1069. saa7164_i2c_register(&dev->i2c_bus[2]);
  1070. saa7164_gpio_setup(dev);
  1071. saa7164_card_setup(dev);
  1072. /* Parse the dynamic device configuration, find various
  1073. * media endpoints (MPEG, WMV, PS, TS) and cache their
  1074. * configuration details into the driver, so we can
  1075. * reference them later during simething_register() func,
  1076. * interrupt handlers, deferred work handlers etc.
  1077. */
  1078. saa7164_api_enum_subdevs(dev);
  1079. /* Begin to create the video sub-systems and register funcs */
  1080. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) {
  1081. if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS1]) < 0) {
  1082. printk(KERN_ERR "%s() Failed to register "
  1083. "dvb adapters on porta\n",
  1084. __func__);
  1085. }
  1086. }
  1087. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) {
  1088. if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS2]) < 0) {
  1089. printk(KERN_ERR"%s() Failed to register "
  1090. "dvb adapters on portb\n",
  1091. __func__);
  1092. }
  1093. }
  1094. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) {
  1095. if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC1]) < 0) {
  1096. printk(KERN_ERR"%s() Failed to register "
  1097. "mpeg encoder\n", __func__);
  1098. }
  1099. }
  1100. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) {
  1101. if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC2]) < 0) {
  1102. printk(KERN_ERR"%s() Failed to register "
  1103. "mpeg encoder\n", __func__);
  1104. }
  1105. }
  1106. if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) {
  1107. if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI1]) < 0) {
  1108. printk(KERN_ERR"%s() Failed to register "
  1109. "vbi device\n", __func__);
  1110. }
  1111. }
  1112. if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) {
  1113. if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI2]) < 0) {
  1114. printk(KERN_ERR"%s() Failed to register "
  1115. "vbi device\n", __func__);
  1116. }
  1117. }
  1118. saa7164_api_set_debug(dev, fw_debug);
  1119. if (fw_debug) {
  1120. dev->kthread = kthread_run(saa7164_thread_function, dev,
  1121. "saa7164 debug");
  1122. if (IS_ERR(dev->kthread)) {
  1123. dev->kthread = NULL;
  1124. printk(KERN_ERR "%s() Failed to create "
  1125. "debug kernel thread\n", __func__);
  1126. }
  1127. }
  1128. } /* != BOARD_UNKNOWN */
  1129. else
  1130. printk(KERN_ERR "%s() Unsupported board detected, "
  1131. "registering without firmware\n", __func__);
  1132. dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug);
  1133. dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs);
  1134. fail_fw:
  1135. return 0;
  1136. fail_irq:
  1137. saa7164_dev_unregister(dev);
  1138. fail_free:
  1139. v4l2_device_unregister(&dev->v4l2_dev);
  1140. kfree(dev);
  1141. return err;
  1142. }
  1143. static void saa7164_shutdown(struct saa7164_dev *dev)
  1144. {
  1145. dprintk(1, "%s()\n", __func__);
  1146. }
  1147. static void saa7164_finidev(struct pci_dev *pci_dev)
  1148. {
  1149. struct saa7164_dev *dev = pci_get_drvdata(pci_dev);
  1150. if (dev->board != SAA7164_BOARD_UNKNOWN) {
  1151. if (fw_debug && dev->kthread) {
  1152. kthread_stop(dev->kthread);
  1153. dev->kthread = NULL;
  1154. }
  1155. if (dev->firmwareloaded)
  1156. saa7164_api_set_debug(dev, 0x00);
  1157. }
  1158. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1159. &dev->ports[SAA7164_PORT_ENC1].irq_interval);
  1160. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1161. &dev->ports[SAA7164_PORT_ENC1].svc_interval);
  1162. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1163. &dev->ports[SAA7164_PORT_ENC1].irq_svc_interval);
  1164. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1165. &dev->ports[SAA7164_PORT_ENC1].read_interval);
  1166. saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1],
  1167. &dev->ports[SAA7164_PORT_ENC1].poll_interval);
  1168. saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI1],
  1169. &dev->ports[SAA7164_PORT_VBI1].read_interval);
  1170. saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI2],
  1171. &dev->ports[SAA7164_PORT_VBI2].poll_interval);
  1172. saa7164_shutdown(dev);
  1173. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB)
  1174. saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS1]);
  1175. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB)
  1176. saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS2]);
  1177. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER)
  1178. saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC1]);
  1179. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER)
  1180. saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC2]);
  1181. if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI)
  1182. saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI1]);
  1183. if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI)
  1184. saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI2]);
  1185. saa7164_i2c_unregister(&dev->i2c_bus[0]);
  1186. saa7164_i2c_unregister(&dev->i2c_bus[1]);
  1187. saa7164_i2c_unregister(&dev->i2c_bus[2]);
  1188. /* unregister stuff */
  1189. free_irq(pci_dev->irq, dev);
  1190. if (dev->msi) {
  1191. pci_disable_msi(pci_dev);
  1192. dev->msi = false;
  1193. }
  1194. pci_disable_device(pci_dev);
  1195. mutex_lock(&devlist);
  1196. list_del(&dev->devlist);
  1197. mutex_unlock(&devlist);
  1198. saa7164_dev_unregister(dev);
  1199. v4l2_device_unregister(&dev->v4l2_dev);
  1200. kfree(dev);
  1201. }
  1202. static struct pci_device_id saa7164_pci_tbl[] = {
  1203. {
  1204. /* SAA7164 */
  1205. .vendor = 0x1131,
  1206. .device = 0x7164,
  1207. .subvendor = PCI_ANY_ID,
  1208. .subdevice = PCI_ANY_ID,
  1209. }, {
  1210. /* --- end of list --- */
  1211. }
  1212. };
  1213. MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl);
  1214. static struct pci_driver saa7164_pci_driver = {
  1215. .name = "saa7164",
  1216. .id_table = saa7164_pci_tbl,
  1217. .probe = saa7164_initdev,
  1218. .remove = saa7164_finidev,
  1219. /* TODO */
  1220. .suspend = NULL,
  1221. .resume = NULL,
  1222. };
  1223. static int __init saa7164_init(void)
  1224. {
  1225. printk(KERN_INFO "saa7164 driver loaded\n");
  1226. #ifdef CONFIG_PROC_FS
  1227. saa7164_proc_create();
  1228. #endif
  1229. return pci_register_driver(&saa7164_pci_driver);
  1230. }
  1231. static void __exit saa7164_fini(void)
  1232. {
  1233. #ifdef CONFIG_PROC_FS
  1234. remove_proc_entry("saa7164", NULL);
  1235. #endif
  1236. pci_unregister_driver(&saa7164_pci_driver);
  1237. }
  1238. module_init(saa7164_init);
  1239. module_exit(saa7164_fini);