tw68-risc.c 6.9 KB

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  1. /*
  2. * tw68_risc.c
  3. * Part of the device driver for Techwell 68xx based cards
  4. *
  5. * Much of this code is derived from the cx88 and sa7134 drivers, which
  6. * were in turn derived from the bt87x driver. The original work was by
  7. * Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
  8. * Hans Verkuil, Andy Walls and many others. Their work is gratefully
  9. * acknowledged. Full credit goes to them - any problems within this code
  10. * are mine.
  11. *
  12. * Copyright (C) 2009 William M. Brack
  13. *
  14. * Refactored and updated to the latest v4l core frameworks:
  15. *
  16. * Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License as published by
  20. * the Free Software Foundation; either version 2 of the License, or
  21. * (at your option) any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. */
  28. #include "tw68.h"
  29. /**
  30. * @rp pointer to current risc program position
  31. * @sglist pointer to "scatter-gather list" of buffer pointers
  32. * @offset offset to target memory buffer
  33. * @sync_line 0 -> no sync, 1 -> odd sync, 2 -> even sync
  34. * @bpl number of bytes per scan line
  35. * @padding number of bytes of padding to add
  36. * @lines number of lines in field
  37. * @jump insert a jump at the start
  38. */
  39. static __le32 *tw68_risc_field(__le32 *rp, struct scatterlist *sglist,
  40. unsigned int offset, u32 sync_line,
  41. unsigned int bpl, unsigned int padding,
  42. unsigned int lines, bool jump)
  43. {
  44. struct scatterlist *sg;
  45. unsigned int line, todo, done;
  46. if (jump) {
  47. *(rp++) = cpu_to_le32(RISC_JUMP);
  48. *(rp++) = 0;
  49. }
  50. /* sync instruction */
  51. if (sync_line == 1)
  52. *(rp++) = cpu_to_le32(RISC_SYNCO);
  53. else
  54. *(rp++) = cpu_to_le32(RISC_SYNCE);
  55. *(rp++) = 0;
  56. /* scan lines */
  57. sg = sglist;
  58. for (line = 0; line < lines; line++) {
  59. /* calculate next starting position */
  60. while (offset && offset >= sg_dma_len(sg)) {
  61. offset -= sg_dma_len(sg);
  62. sg = sg_next(sg);
  63. }
  64. if (bpl <= sg_dma_len(sg) - offset) {
  65. /* fits into current chunk */
  66. *(rp++) = cpu_to_le32(RISC_LINESTART |
  67. /* (offset<<12) |*/ bpl);
  68. *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
  69. offset += bpl;
  70. } else {
  71. /*
  72. * scanline needs to be split. Put the start in
  73. * whatever memory remains using RISC_LINESTART,
  74. * then the remainder into following addresses
  75. * given by the scatter-gather list.
  76. */
  77. todo = bpl; /* one full line to be done */
  78. /* first fragment */
  79. done = (sg_dma_len(sg) - offset);
  80. *(rp++) = cpu_to_le32(RISC_LINESTART |
  81. (7 << 24) |
  82. done);
  83. *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
  84. todo -= done;
  85. sg = sg_next(sg);
  86. /* succeeding fragments have no offset */
  87. while (todo > sg_dma_len(sg)) {
  88. *(rp++) = cpu_to_le32(RISC_INLINE |
  89. (done << 12) |
  90. sg_dma_len(sg));
  91. *(rp++) = cpu_to_le32(sg_dma_address(sg));
  92. todo -= sg_dma_len(sg);
  93. sg = sg_next(sg);
  94. done += sg_dma_len(sg);
  95. }
  96. if (todo) {
  97. /* final chunk - offset 0, count 'todo' */
  98. *(rp++) = cpu_to_le32(RISC_INLINE |
  99. (done << 12) |
  100. todo);
  101. *(rp++) = cpu_to_le32(sg_dma_address(sg));
  102. }
  103. offset = todo;
  104. }
  105. offset += padding;
  106. }
  107. return rp;
  108. }
  109. /**
  110. * tw68_risc_buffer
  111. *
  112. * This routine is called by tw68-video. It allocates
  113. * memory for the dma controller "program" and then fills in that
  114. * memory with the appropriate "instructions".
  115. *
  116. * @pci_dev structure with info about the pci
  117. * slot which our device is in.
  118. * @risc structure with info about the memory
  119. * used for our controller program.
  120. * @sglist scatter-gather list entry
  121. * @top_offset offset within the risc program area for the
  122. * first odd frame line
  123. * @bottom_offset offset within the risc program area for the
  124. * first even frame line
  125. * @bpl number of data bytes per scan line
  126. * @padding number of extra bytes to add at end of line
  127. * @lines number of scan lines
  128. */
  129. int tw68_risc_buffer(struct pci_dev *pci,
  130. struct tw68_buf *buf,
  131. struct scatterlist *sglist,
  132. unsigned int top_offset,
  133. unsigned int bottom_offset,
  134. unsigned int bpl,
  135. unsigned int padding,
  136. unsigned int lines)
  137. {
  138. u32 instructions, fields;
  139. __le32 *rp;
  140. fields = 0;
  141. if (UNSET != top_offset)
  142. fields++;
  143. if (UNSET != bottom_offset)
  144. fields++;
  145. /*
  146. * estimate risc mem: worst case is one write per page border +
  147. * one write per scan line + syncs + 2 jumps (all 2 dwords).
  148. * Padding can cause next bpl to start close to a page border.
  149. * First DMA region may be smaller than PAGE_SIZE
  150. */
  151. instructions = fields * (1 + (((bpl + padding) * lines) /
  152. PAGE_SIZE) + lines) + 4;
  153. buf->size = instructions * 8;
  154. buf->cpu = pci_alloc_consistent(pci, buf->size, &buf->dma);
  155. if (buf->cpu == NULL)
  156. return -ENOMEM;
  157. /* write risc instructions */
  158. rp = buf->cpu;
  159. if (UNSET != top_offset) /* generates SYNCO */
  160. rp = tw68_risc_field(rp, sglist, top_offset, 1,
  161. bpl, padding, lines, true);
  162. if (UNSET != bottom_offset) /* generates SYNCE */
  163. rp = tw68_risc_field(rp, sglist, bottom_offset, 2,
  164. bpl, padding, lines, top_offset == UNSET);
  165. /* save pointer to jmp instruction address */
  166. buf->jmp = rp;
  167. buf->cpu[1] = cpu_to_le32(buf->dma + 8);
  168. /* assure risc buffer hasn't overflowed */
  169. BUG_ON((buf->jmp - buf->cpu + 2) * sizeof(buf->cpu[0]) > buf->size);
  170. return 0;
  171. }
  172. #if 0
  173. /* ------------------------------------------------------------------ */
  174. /* debug helper code */
  175. static void tw68_risc_decode(u32 risc, u32 addr)
  176. {
  177. #define RISC_OP(reg) (((reg) >> 28) & 7)
  178. static struct instr_details {
  179. char *name;
  180. u8 has_data_type;
  181. u8 has_byte_info;
  182. u8 has_addr;
  183. } instr[8] = {
  184. [RISC_OP(RISC_SYNCO)] = {"syncOdd", 0, 0, 0},
  185. [RISC_OP(RISC_SYNCE)] = {"syncEven", 0, 0, 0},
  186. [RISC_OP(RISC_JUMP)] = {"jump", 0, 0, 1},
  187. [RISC_OP(RISC_LINESTART)] = {"lineStart", 1, 1, 1},
  188. [RISC_OP(RISC_INLINE)] = {"inline", 1, 1, 1},
  189. };
  190. u32 p;
  191. p = RISC_OP(risc);
  192. if (!(risc & 0x80000000) || !instr[p].name) {
  193. pr_debug("0x%08x [ INVALID ]\n", risc);
  194. return;
  195. }
  196. pr_debug("0x%08x %-9s IRQ=%d",
  197. risc, instr[p].name, (risc >> 27) & 1);
  198. if (instr[p].has_data_type)
  199. pr_debug(" Type=%d", (risc >> 24) & 7);
  200. if (instr[p].has_byte_info)
  201. pr_debug(" Start=0x%03x Count=%03u",
  202. (risc >> 12) & 0xfff, risc & 0xfff);
  203. if (instr[p].has_addr)
  204. pr_debug(" StartAddr=0x%08x", addr);
  205. pr_debug("\n");
  206. }
  207. void tw68_risc_program_dump(struct tw68_core *core, struct tw68_buf *buf)
  208. {
  209. const __le32 *addr;
  210. pr_debug("%s: risc_program_dump: risc=%p, buf->cpu=0x%p, buf->jmp=0x%p\n",
  211. core->name, buf, buf->cpu, buf->jmp);
  212. for (addr = buf->cpu; addr <= buf->jmp; addr += 2)
  213. tw68_risc_decode(*addr, *(addr+1));
  214. }
  215. #endif