tda18271-fe.c 32 KB

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  1. /*
  2. tda18271-fe.c - driver for the Philips / NXP TDA18271 silicon tuner
  3. Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include <linux/delay.h>
  17. #include <linux/videodev2.h>
  18. #include "tda18271-priv.h"
  19. #include "tda8290.h"
  20. int tda18271_debug;
  21. module_param_named(debug, tda18271_debug, int, 0644);
  22. MODULE_PARM_DESC(debug, "set debug level "
  23. "(info=1, map=2, reg=4, adv=8, cal=16 (or-able))");
  24. static int tda18271_cal_on_startup = -1;
  25. module_param_named(cal, tda18271_cal_on_startup, int, 0644);
  26. MODULE_PARM_DESC(cal, "perform RF tracking filter calibration on startup");
  27. static DEFINE_MUTEX(tda18271_list_mutex);
  28. static LIST_HEAD(hybrid_tuner_instance_list);
  29. /*---------------------------------------------------------------------*/
  30. static int tda18271_toggle_output(struct dvb_frontend *fe, int standby)
  31. {
  32. struct tda18271_priv *priv = fe->tuner_priv;
  33. int ret = tda18271_set_standby_mode(fe, standby ? 1 : 0,
  34. priv->output_opt & TDA18271_OUTPUT_LT_OFF ? 1 : 0,
  35. priv->output_opt & TDA18271_OUTPUT_XT_OFF ? 1 : 0);
  36. if (tda_fail(ret))
  37. goto fail;
  38. tda_dbg("%s mode: xtal oscillator %s, slave tuner loop thru %s\n",
  39. standby ? "standby" : "active",
  40. priv->output_opt & TDA18271_OUTPUT_XT_OFF ? "off" : "on",
  41. priv->output_opt & TDA18271_OUTPUT_LT_OFF ? "off" : "on");
  42. fail:
  43. return ret;
  44. }
  45. /*---------------------------------------------------------------------*/
  46. static inline int charge_pump_source(struct dvb_frontend *fe, int force)
  47. {
  48. struct tda18271_priv *priv = fe->tuner_priv;
  49. return tda18271_charge_pump_source(fe,
  50. (priv->role == TDA18271_SLAVE) ?
  51. TDA18271_CAL_PLL :
  52. TDA18271_MAIN_PLL, force);
  53. }
  54. static inline void tda18271_set_if_notch(struct dvb_frontend *fe)
  55. {
  56. struct tda18271_priv *priv = fe->tuner_priv;
  57. unsigned char *regs = priv->tda18271_regs;
  58. switch (priv->mode) {
  59. case TDA18271_ANALOG:
  60. regs[R_MPD] &= ~0x80; /* IF notch = 0 */
  61. break;
  62. case TDA18271_DIGITAL:
  63. regs[R_MPD] |= 0x80; /* IF notch = 1 */
  64. break;
  65. }
  66. }
  67. static int tda18271_channel_configuration(struct dvb_frontend *fe,
  68. struct tda18271_std_map_item *map,
  69. u32 freq, u32 bw)
  70. {
  71. struct tda18271_priv *priv = fe->tuner_priv;
  72. unsigned char *regs = priv->tda18271_regs;
  73. int ret;
  74. u32 N;
  75. /* update TV broadcast parameters */
  76. /* set standard */
  77. regs[R_EP3] &= ~0x1f; /* clear std bits */
  78. regs[R_EP3] |= (map->agc_mode << 3) | map->std;
  79. if (priv->id == TDA18271HDC2) {
  80. /* set rfagc to high speed mode */
  81. regs[R_EP3] &= ~0x04;
  82. }
  83. /* set cal mode to normal */
  84. regs[R_EP4] &= ~0x03;
  85. /* update IF output level */
  86. regs[R_EP4] &= ~0x1c; /* clear if level bits */
  87. regs[R_EP4] |= (map->if_lvl << 2);
  88. /* update FM_RFn */
  89. regs[R_EP4] &= ~0x80;
  90. regs[R_EP4] |= map->fm_rfn << 7;
  91. /* update rf top / if top */
  92. regs[R_EB22] = 0x00;
  93. regs[R_EB22] |= map->rfagc_top;
  94. ret = tda18271_write_regs(fe, R_EB22, 1);
  95. if (tda_fail(ret))
  96. goto fail;
  97. /* --------------------------------------------------------------- */
  98. /* disable Power Level Indicator */
  99. regs[R_EP1] |= 0x40;
  100. /* make sure thermometer is off */
  101. regs[R_TM] &= ~0x10;
  102. /* frequency dependent parameters */
  103. tda18271_calc_ir_measure(fe, &freq);
  104. tda18271_calc_bp_filter(fe, &freq);
  105. tda18271_calc_rf_band(fe, &freq);
  106. tda18271_calc_gain_taper(fe, &freq);
  107. /* --------------------------------------------------------------- */
  108. /* dual tuner and agc1 extra configuration */
  109. switch (priv->role) {
  110. case TDA18271_MASTER:
  111. regs[R_EB1] |= 0x04; /* main vco */
  112. break;
  113. case TDA18271_SLAVE:
  114. regs[R_EB1] &= ~0x04; /* cal vco */
  115. break;
  116. }
  117. /* agc1 always active */
  118. regs[R_EB1] &= ~0x02;
  119. /* agc1 has priority on agc2 */
  120. regs[R_EB1] &= ~0x01;
  121. ret = tda18271_write_regs(fe, R_EB1, 1);
  122. if (tda_fail(ret))
  123. goto fail;
  124. /* --------------------------------------------------------------- */
  125. N = map->if_freq * 1000 + freq;
  126. switch (priv->role) {
  127. case TDA18271_MASTER:
  128. tda18271_calc_main_pll(fe, N);
  129. tda18271_set_if_notch(fe);
  130. tda18271_write_regs(fe, R_MPD, 4);
  131. break;
  132. case TDA18271_SLAVE:
  133. tda18271_calc_cal_pll(fe, N);
  134. tda18271_write_regs(fe, R_CPD, 4);
  135. regs[R_MPD] = regs[R_CPD] & 0x7f;
  136. tda18271_set_if_notch(fe);
  137. tda18271_write_regs(fe, R_MPD, 1);
  138. break;
  139. }
  140. ret = tda18271_write_regs(fe, R_TM, 7);
  141. if (tda_fail(ret))
  142. goto fail;
  143. /* force charge pump source */
  144. charge_pump_source(fe, 1);
  145. msleep(1);
  146. /* return pll to normal operation */
  147. charge_pump_source(fe, 0);
  148. msleep(20);
  149. if (priv->id == TDA18271HDC2) {
  150. /* set rfagc to normal speed mode */
  151. if (map->fm_rfn)
  152. regs[R_EP3] &= ~0x04;
  153. else
  154. regs[R_EP3] |= 0x04;
  155. ret = tda18271_write_regs(fe, R_EP3, 1);
  156. }
  157. fail:
  158. return ret;
  159. }
  160. static int tda18271_read_thermometer(struct dvb_frontend *fe)
  161. {
  162. struct tda18271_priv *priv = fe->tuner_priv;
  163. unsigned char *regs = priv->tda18271_regs;
  164. int tm;
  165. /* switch thermometer on */
  166. regs[R_TM] |= 0x10;
  167. tda18271_write_regs(fe, R_TM, 1);
  168. /* read thermometer info */
  169. tda18271_read_regs(fe);
  170. if ((((regs[R_TM] & 0x0f) == 0x00) && ((regs[R_TM] & 0x20) == 0x20)) ||
  171. (((regs[R_TM] & 0x0f) == 0x08) && ((regs[R_TM] & 0x20) == 0x00))) {
  172. if ((regs[R_TM] & 0x20) == 0x20)
  173. regs[R_TM] &= ~0x20;
  174. else
  175. regs[R_TM] |= 0x20;
  176. tda18271_write_regs(fe, R_TM, 1);
  177. msleep(10); /* temperature sensing */
  178. /* read thermometer info */
  179. tda18271_read_regs(fe);
  180. }
  181. tm = tda18271_lookup_thermometer(fe);
  182. /* switch thermometer off */
  183. regs[R_TM] &= ~0x10;
  184. tda18271_write_regs(fe, R_TM, 1);
  185. /* set CAL mode to normal */
  186. regs[R_EP4] &= ~0x03;
  187. tda18271_write_regs(fe, R_EP4, 1);
  188. return tm;
  189. }
  190. /* ------------------------------------------------------------------ */
  191. static int tda18271c2_rf_tracking_filters_correction(struct dvb_frontend *fe,
  192. u32 freq)
  193. {
  194. struct tda18271_priv *priv = fe->tuner_priv;
  195. struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
  196. unsigned char *regs = priv->tda18271_regs;
  197. int i, ret;
  198. u8 tm_current, dc_over_dt, rf_tab;
  199. s32 rfcal_comp, approx;
  200. /* power up */
  201. ret = tda18271_set_standby_mode(fe, 0, 0, 0);
  202. if (tda_fail(ret))
  203. goto fail;
  204. /* read die current temperature */
  205. tm_current = tda18271_read_thermometer(fe);
  206. /* frequency dependent parameters */
  207. tda18271_calc_rf_cal(fe, &freq);
  208. rf_tab = regs[R_EB14];
  209. i = tda18271_lookup_rf_band(fe, &freq, NULL);
  210. if (tda_fail(i))
  211. return i;
  212. if ((0 == map[i].rf3) || (freq / 1000 < map[i].rf2)) {
  213. approx = map[i].rf_a1 * (s32)(freq / 1000 - map[i].rf1) +
  214. map[i].rf_b1 + rf_tab;
  215. } else {
  216. approx = map[i].rf_a2 * (s32)(freq / 1000 - map[i].rf2) +
  217. map[i].rf_b2 + rf_tab;
  218. }
  219. if (approx < 0)
  220. approx = 0;
  221. if (approx > 255)
  222. approx = 255;
  223. tda18271_lookup_map(fe, RF_CAL_DC_OVER_DT, &freq, &dc_over_dt);
  224. /* calculate temperature compensation */
  225. rfcal_comp = dc_over_dt * (s32)(tm_current - priv->tm_rfcal) / 1000;
  226. regs[R_EB14] = (unsigned char)(approx + rfcal_comp);
  227. ret = tda18271_write_regs(fe, R_EB14, 1);
  228. fail:
  229. return ret;
  230. }
  231. static int tda18271_por(struct dvb_frontend *fe)
  232. {
  233. struct tda18271_priv *priv = fe->tuner_priv;
  234. unsigned char *regs = priv->tda18271_regs;
  235. int ret;
  236. /* power up detector 1 */
  237. regs[R_EB12] &= ~0x20;
  238. ret = tda18271_write_regs(fe, R_EB12, 1);
  239. if (tda_fail(ret))
  240. goto fail;
  241. regs[R_EB18] &= ~0x80; /* turn agc1 loop on */
  242. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  243. ret = tda18271_write_regs(fe, R_EB18, 1);
  244. if (tda_fail(ret))
  245. goto fail;
  246. regs[R_EB21] |= 0x03; /* set agc2_gain to -6 dB */
  247. /* POR mode */
  248. ret = tda18271_set_standby_mode(fe, 1, 0, 0);
  249. if (tda_fail(ret))
  250. goto fail;
  251. /* disable 1.5 MHz low pass filter */
  252. regs[R_EB23] &= ~0x04; /* forcelp_fc2_en = 0 */
  253. regs[R_EB23] &= ~0x02; /* XXX: lp_fc[2] = 0 */
  254. ret = tda18271_write_regs(fe, R_EB21, 3);
  255. fail:
  256. return ret;
  257. }
  258. static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
  259. {
  260. struct tda18271_priv *priv = fe->tuner_priv;
  261. unsigned char *regs = priv->tda18271_regs;
  262. u32 N;
  263. /* set CAL mode to normal */
  264. regs[R_EP4] &= ~0x03;
  265. tda18271_write_regs(fe, R_EP4, 1);
  266. /* switch off agc1 */
  267. regs[R_EP3] |= 0x40; /* sm_lt = 1 */
  268. regs[R_EB18] |= 0x03; /* set agc1_gain to 15 dB */
  269. tda18271_write_regs(fe, R_EB18, 1);
  270. /* frequency dependent parameters */
  271. tda18271_calc_bp_filter(fe, &freq);
  272. tda18271_calc_gain_taper(fe, &freq);
  273. tda18271_calc_rf_band(fe, &freq);
  274. tda18271_calc_km(fe, &freq);
  275. tda18271_write_regs(fe, R_EP1, 3);
  276. tda18271_write_regs(fe, R_EB13, 1);
  277. /* main pll charge pump source */
  278. tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1);
  279. /* cal pll charge pump source */
  280. tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 1);
  281. /* force dcdc converter to 0 V */
  282. regs[R_EB14] = 0x00;
  283. tda18271_write_regs(fe, R_EB14, 1);
  284. /* disable plls lock */
  285. regs[R_EB20] &= ~0x20;
  286. tda18271_write_regs(fe, R_EB20, 1);
  287. /* set CAL mode to RF tracking filter calibration */
  288. regs[R_EP4] |= 0x03;
  289. tda18271_write_regs(fe, R_EP4, 2);
  290. /* --------------------------------------------------------------- */
  291. /* set the internal calibration signal */
  292. N = freq;
  293. tda18271_calc_cal_pll(fe, N);
  294. tda18271_write_regs(fe, R_CPD, 4);
  295. /* downconvert internal calibration */
  296. N += 1000000;
  297. tda18271_calc_main_pll(fe, N);
  298. tda18271_write_regs(fe, R_MPD, 4);
  299. msleep(5);
  300. tda18271_write_regs(fe, R_EP2, 1);
  301. tda18271_write_regs(fe, R_EP1, 1);
  302. tda18271_write_regs(fe, R_EP2, 1);
  303. tda18271_write_regs(fe, R_EP1, 1);
  304. /* --------------------------------------------------------------- */
  305. /* normal operation for the main pll */
  306. tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0);
  307. /* normal operation for the cal pll */
  308. tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 0);
  309. msleep(10); /* plls locking */
  310. /* launch the rf tracking filters calibration */
  311. regs[R_EB20] |= 0x20;
  312. tda18271_write_regs(fe, R_EB20, 1);
  313. msleep(60); /* calibration */
  314. /* --------------------------------------------------------------- */
  315. /* set CAL mode to normal */
  316. regs[R_EP4] &= ~0x03;
  317. /* switch on agc1 */
  318. regs[R_EP3] &= ~0x40; /* sm_lt = 0 */
  319. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  320. tda18271_write_regs(fe, R_EB18, 1);
  321. tda18271_write_regs(fe, R_EP3, 2);
  322. /* synchronization */
  323. tda18271_write_regs(fe, R_EP1, 1);
  324. /* get calibration result */
  325. tda18271_read_extended(fe);
  326. return regs[R_EB14];
  327. }
  328. static int tda18271_powerscan(struct dvb_frontend *fe,
  329. u32 *freq_in, u32 *freq_out)
  330. {
  331. struct tda18271_priv *priv = fe->tuner_priv;
  332. unsigned char *regs = priv->tda18271_regs;
  333. int sgn, bcal, count, wait, ret;
  334. u8 cid_target;
  335. u16 count_limit;
  336. u32 freq;
  337. freq = *freq_in;
  338. tda18271_calc_rf_band(fe, &freq);
  339. tda18271_calc_rf_cal(fe, &freq);
  340. tda18271_calc_gain_taper(fe, &freq);
  341. tda18271_lookup_cid_target(fe, &freq, &cid_target, &count_limit);
  342. tda18271_write_regs(fe, R_EP2, 1);
  343. tda18271_write_regs(fe, R_EB14, 1);
  344. /* downconvert frequency */
  345. freq += 1000000;
  346. tda18271_calc_main_pll(fe, freq);
  347. tda18271_write_regs(fe, R_MPD, 4);
  348. msleep(5); /* pll locking */
  349. /* detection mode */
  350. regs[R_EP4] &= ~0x03;
  351. regs[R_EP4] |= 0x01;
  352. tda18271_write_regs(fe, R_EP4, 1);
  353. /* launch power detection measurement */
  354. tda18271_write_regs(fe, R_EP2, 1);
  355. /* read power detection info, stored in EB10 */
  356. ret = tda18271_read_extended(fe);
  357. if (tda_fail(ret))
  358. return ret;
  359. /* algorithm initialization */
  360. sgn = 1;
  361. *freq_out = *freq_in;
  362. bcal = 0;
  363. count = 0;
  364. wait = false;
  365. while ((regs[R_EB10] & 0x3f) < cid_target) {
  366. /* downconvert updated freq to 1 MHz */
  367. freq = *freq_in + (sgn * count) + 1000000;
  368. tda18271_calc_main_pll(fe, freq);
  369. tda18271_write_regs(fe, R_MPD, 4);
  370. if (wait) {
  371. msleep(5); /* pll locking */
  372. wait = false;
  373. } else
  374. udelay(100); /* pll locking */
  375. /* launch power detection measurement */
  376. tda18271_write_regs(fe, R_EP2, 1);
  377. /* read power detection info, stored in EB10 */
  378. ret = tda18271_read_extended(fe);
  379. if (tda_fail(ret))
  380. return ret;
  381. count += 200;
  382. if (count <= count_limit)
  383. continue;
  384. if (sgn <= 0)
  385. break;
  386. sgn = -1 * sgn;
  387. count = 200;
  388. wait = true;
  389. }
  390. if ((regs[R_EB10] & 0x3f) >= cid_target) {
  391. bcal = 1;
  392. *freq_out = freq - 1000000;
  393. } else
  394. bcal = 0;
  395. tda_cal("bcal = %d, freq_in = %d, freq_out = %d (freq = %d)\n",
  396. bcal, *freq_in, *freq_out, freq);
  397. return bcal;
  398. }
  399. static int tda18271_powerscan_init(struct dvb_frontend *fe)
  400. {
  401. struct tda18271_priv *priv = fe->tuner_priv;
  402. unsigned char *regs = priv->tda18271_regs;
  403. int ret;
  404. /* set standard to digital */
  405. regs[R_EP3] &= ~0x1f; /* clear std bits */
  406. regs[R_EP3] |= 0x12;
  407. /* set cal mode to normal */
  408. regs[R_EP4] &= ~0x03;
  409. /* update IF output level */
  410. regs[R_EP4] &= ~0x1c; /* clear if level bits */
  411. ret = tda18271_write_regs(fe, R_EP3, 2);
  412. if (tda_fail(ret))
  413. goto fail;
  414. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  415. ret = tda18271_write_regs(fe, R_EB18, 1);
  416. if (tda_fail(ret))
  417. goto fail;
  418. regs[R_EB21] &= ~0x03; /* set agc2_gain to -15 dB */
  419. /* 1.5 MHz low pass filter */
  420. regs[R_EB23] |= 0x04; /* forcelp_fc2_en = 1 */
  421. regs[R_EB23] |= 0x02; /* lp_fc[2] = 1 */
  422. ret = tda18271_write_regs(fe, R_EB21, 3);
  423. fail:
  424. return ret;
  425. }
  426. static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
  427. {
  428. struct tda18271_priv *priv = fe->tuner_priv;
  429. struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
  430. unsigned char *regs = priv->tda18271_regs;
  431. int bcal, rf, i;
  432. s32 divisor, dividend;
  433. #define RF1 0
  434. #define RF2 1
  435. #define RF3 2
  436. u32 rf_default[3];
  437. u32 rf_freq[3];
  438. s32 prog_cal[3];
  439. s32 prog_tab[3];
  440. i = tda18271_lookup_rf_band(fe, &freq, NULL);
  441. if (tda_fail(i))
  442. return i;
  443. rf_default[RF1] = 1000 * map[i].rf1_def;
  444. rf_default[RF2] = 1000 * map[i].rf2_def;
  445. rf_default[RF3] = 1000 * map[i].rf3_def;
  446. for (rf = RF1; rf <= RF3; rf++) {
  447. if (0 == rf_default[rf])
  448. return 0;
  449. tda_cal("freq = %d, rf = %d\n", freq, rf);
  450. /* look for optimized calibration frequency */
  451. bcal = tda18271_powerscan(fe, &rf_default[rf], &rf_freq[rf]);
  452. if (tda_fail(bcal))
  453. return bcal;
  454. tda18271_calc_rf_cal(fe, &rf_freq[rf]);
  455. prog_tab[rf] = (s32)regs[R_EB14];
  456. if (1 == bcal)
  457. prog_cal[rf] =
  458. (s32)tda18271_calibrate_rf(fe, rf_freq[rf]);
  459. else
  460. prog_cal[rf] = prog_tab[rf];
  461. switch (rf) {
  462. case RF1:
  463. map[i].rf_a1 = 0;
  464. map[i].rf_b1 = (prog_cal[RF1] - prog_tab[RF1]);
  465. map[i].rf1 = rf_freq[RF1] / 1000;
  466. break;
  467. case RF2:
  468. dividend = (prog_cal[RF2] - prog_tab[RF2] -
  469. prog_cal[RF1] + prog_tab[RF1]);
  470. divisor = (s32)(rf_freq[RF2] - rf_freq[RF1]) / 1000;
  471. map[i].rf_a1 = (dividend / divisor);
  472. map[i].rf2 = rf_freq[RF2] / 1000;
  473. break;
  474. case RF3:
  475. dividend = (prog_cal[RF3] - prog_tab[RF3] -
  476. prog_cal[RF2] + prog_tab[RF2]);
  477. divisor = (s32)(rf_freq[RF3] - rf_freq[RF2]) / 1000;
  478. map[i].rf_a2 = (dividend / divisor);
  479. map[i].rf_b2 = (prog_cal[RF2] - prog_tab[RF2]);
  480. map[i].rf3 = rf_freq[RF3] / 1000;
  481. break;
  482. default:
  483. BUG();
  484. }
  485. }
  486. return 0;
  487. }
  488. static int tda18271_calc_rf_filter_curve(struct dvb_frontend *fe)
  489. {
  490. struct tda18271_priv *priv = fe->tuner_priv;
  491. unsigned int i;
  492. int ret;
  493. tda_info("tda18271: performing RF tracking filter calibration\n");
  494. /* wait for die temperature stabilization */
  495. msleep(200);
  496. ret = tda18271_powerscan_init(fe);
  497. if (tda_fail(ret))
  498. goto fail;
  499. /* rf band calibration */
  500. for (i = 0; priv->rf_cal_state[i].rfmax != 0; i++) {
  501. ret =
  502. tda18271_rf_tracking_filters_init(fe, 1000 *
  503. priv->rf_cal_state[i].rfmax);
  504. if (tda_fail(ret))
  505. goto fail;
  506. }
  507. priv->tm_rfcal = tda18271_read_thermometer(fe);
  508. fail:
  509. return ret;
  510. }
  511. /* ------------------------------------------------------------------ */
  512. static int tda18271c2_rf_cal_init(struct dvb_frontend *fe)
  513. {
  514. struct tda18271_priv *priv = fe->tuner_priv;
  515. unsigned char *regs = priv->tda18271_regs;
  516. int ret;
  517. /* test RF_CAL_OK to see if we need init */
  518. if ((regs[R_EP1] & 0x10) == 0)
  519. priv->cal_initialized = false;
  520. if (priv->cal_initialized)
  521. return 0;
  522. ret = tda18271_calc_rf_filter_curve(fe);
  523. if (tda_fail(ret))
  524. goto fail;
  525. ret = tda18271_por(fe);
  526. if (tda_fail(ret))
  527. goto fail;
  528. tda_info("tda18271: RF tracking filter calibration complete\n");
  529. priv->cal_initialized = true;
  530. goto end;
  531. fail:
  532. tda_info("tda18271: RF tracking filter calibration failed!\n");
  533. end:
  534. return ret;
  535. }
  536. static int tda18271c1_rf_tracking_filter_calibration(struct dvb_frontend *fe,
  537. u32 freq, u32 bw)
  538. {
  539. struct tda18271_priv *priv = fe->tuner_priv;
  540. unsigned char *regs = priv->tda18271_regs;
  541. int ret;
  542. u32 N = 0;
  543. /* calculate bp filter */
  544. tda18271_calc_bp_filter(fe, &freq);
  545. tda18271_write_regs(fe, R_EP1, 1);
  546. regs[R_EB4] &= 0x07;
  547. regs[R_EB4] |= 0x60;
  548. tda18271_write_regs(fe, R_EB4, 1);
  549. regs[R_EB7] = 0x60;
  550. tda18271_write_regs(fe, R_EB7, 1);
  551. regs[R_EB14] = 0x00;
  552. tda18271_write_regs(fe, R_EB14, 1);
  553. regs[R_EB20] = 0xcc;
  554. tda18271_write_regs(fe, R_EB20, 1);
  555. /* set cal mode to RF tracking filter calibration */
  556. regs[R_EP4] |= 0x03;
  557. /* calculate cal pll */
  558. switch (priv->mode) {
  559. case TDA18271_ANALOG:
  560. N = freq - 1250000;
  561. break;
  562. case TDA18271_DIGITAL:
  563. N = freq + bw / 2;
  564. break;
  565. }
  566. tda18271_calc_cal_pll(fe, N);
  567. /* calculate main pll */
  568. switch (priv->mode) {
  569. case TDA18271_ANALOG:
  570. N = freq - 250000;
  571. break;
  572. case TDA18271_DIGITAL:
  573. N = freq + bw / 2 + 1000000;
  574. break;
  575. }
  576. tda18271_calc_main_pll(fe, N);
  577. ret = tda18271_write_regs(fe, R_EP3, 11);
  578. if (tda_fail(ret))
  579. return ret;
  580. msleep(5); /* RF tracking filter calibration initialization */
  581. /* search for K,M,CO for RF calibration */
  582. tda18271_calc_km(fe, &freq);
  583. tda18271_write_regs(fe, R_EB13, 1);
  584. /* search for rf band */
  585. tda18271_calc_rf_band(fe, &freq);
  586. /* search for gain taper */
  587. tda18271_calc_gain_taper(fe, &freq);
  588. tda18271_write_regs(fe, R_EP2, 1);
  589. tda18271_write_regs(fe, R_EP1, 1);
  590. tda18271_write_regs(fe, R_EP2, 1);
  591. tda18271_write_regs(fe, R_EP1, 1);
  592. regs[R_EB4] &= 0x07;
  593. regs[R_EB4] |= 0x40;
  594. tda18271_write_regs(fe, R_EB4, 1);
  595. regs[R_EB7] = 0x40;
  596. tda18271_write_regs(fe, R_EB7, 1);
  597. msleep(10); /* pll locking */
  598. regs[R_EB20] = 0xec;
  599. tda18271_write_regs(fe, R_EB20, 1);
  600. msleep(60); /* RF tracking filter calibration completion */
  601. regs[R_EP4] &= ~0x03; /* set cal mode to normal */
  602. tda18271_write_regs(fe, R_EP4, 1);
  603. tda18271_write_regs(fe, R_EP1, 1);
  604. /* RF tracking filter correction for VHF_Low band */
  605. if (0 == tda18271_calc_rf_cal(fe, &freq))
  606. tda18271_write_regs(fe, R_EB14, 1);
  607. return 0;
  608. }
  609. /* ------------------------------------------------------------------ */
  610. static int tda18271_ir_cal_init(struct dvb_frontend *fe)
  611. {
  612. struct tda18271_priv *priv = fe->tuner_priv;
  613. unsigned char *regs = priv->tda18271_regs;
  614. int ret;
  615. ret = tda18271_read_regs(fe);
  616. if (tda_fail(ret))
  617. goto fail;
  618. /* test IR_CAL_OK to see if we need init */
  619. if ((regs[R_EP1] & 0x08) == 0)
  620. ret = tda18271_init_regs(fe);
  621. fail:
  622. return ret;
  623. }
  624. static int tda18271_init(struct dvb_frontend *fe)
  625. {
  626. struct tda18271_priv *priv = fe->tuner_priv;
  627. int ret;
  628. mutex_lock(&priv->lock);
  629. /* full power up */
  630. ret = tda18271_set_standby_mode(fe, 0, 0, 0);
  631. if (tda_fail(ret))
  632. goto fail;
  633. /* initialization */
  634. ret = tda18271_ir_cal_init(fe);
  635. if (tda_fail(ret))
  636. goto fail;
  637. if (priv->id == TDA18271HDC2)
  638. tda18271c2_rf_cal_init(fe);
  639. fail:
  640. mutex_unlock(&priv->lock);
  641. return ret;
  642. }
  643. static int tda18271_sleep(struct dvb_frontend *fe)
  644. {
  645. struct tda18271_priv *priv = fe->tuner_priv;
  646. int ret;
  647. mutex_lock(&priv->lock);
  648. /* enter standby mode, with required output features enabled */
  649. ret = tda18271_toggle_output(fe, 1);
  650. mutex_unlock(&priv->lock);
  651. return ret;
  652. }
  653. /* ------------------------------------------------------------------ */
  654. static int tda18271_agc(struct dvb_frontend *fe)
  655. {
  656. struct tda18271_priv *priv = fe->tuner_priv;
  657. int ret = 0;
  658. switch (priv->config) {
  659. case TDA8290_LNA_OFF:
  660. /* no external agc configuration required */
  661. if (tda18271_debug & DBG_ADV)
  662. tda_dbg("no agc configuration provided\n");
  663. break;
  664. case TDA8290_LNA_ON_BRIDGE:
  665. /* switch with GPIO of saa713x */
  666. tda_dbg("invoking callback\n");
  667. if (fe->callback)
  668. ret = fe->callback(priv->i2c_props.adap->algo_data,
  669. DVB_FRONTEND_COMPONENT_TUNER,
  670. TDA18271_CALLBACK_CMD_AGC_ENABLE,
  671. priv->mode);
  672. break;
  673. case TDA8290_LNA_GP0_HIGH_ON:
  674. case TDA8290_LNA_GP0_HIGH_OFF:
  675. default:
  676. /* n/a - currently not supported */
  677. tda_err("unsupported configuration: %d\n", priv->config);
  678. ret = -EINVAL;
  679. break;
  680. }
  681. return ret;
  682. }
  683. static int tda18271_tune(struct dvb_frontend *fe,
  684. struct tda18271_std_map_item *map, u32 freq, u32 bw)
  685. {
  686. struct tda18271_priv *priv = fe->tuner_priv;
  687. int ret;
  688. tda_dbg("freq = %d, ifc = %d, bw = %d, agc_mode = %d, std = %d\n",
  689. freq, map->if_freq, bw, map->agc_mode, map->std);
  690. ret = tda18271_agc(fe);
  691. if (tda_fail(ret))
  692. tda_warn("failed to configure agc\n");
  693. ret = tda18271_init(fe);
  694. if (tda_fail(ret))
  695. goto fail;
  696. mutex_lock(&priv->lock);
  697. switch (priv->id) {
  698. case TDA18271HDC1:
  699. tda18271c1_rf_tracking_filter_calibration(fe, freq, bw);
  700. break;
  701. case TDA18271HDC2:
  702. tda18271c2_rf_tracking_filters_correction(fe, freq);
  703. break;
  704. }
  705. ret = tda18271_channel_configuration(fe, map, freq, bw);
  706. mutex_unlock(&priv->lock);
  707. fail:
  708. return ret;
  709. }
  710. /* ------------------------------------------------------------------ */
  711. static int tda18271_set_params(struct dvb_frontend *fe)
  712. {
  713. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  714. u32 delsys = c->delivery_system;
  715. u32 bw = c->bandwidth_hz;
  716. u32 freq = c->frequency;
  717. struct tda18271_priv *priv = fe->tuner_priv;
  718. struct tda18271_std_map *std_map = &priv->std;
  719. struct tda18271_std_map_item *map;
  720. int ret;
  721. priv->mode = TDA18271_DIGITAL;
  722. switch (delsys) {
  723. case SYS_ATSC:
  724. map = &std_map->atsc_6;
  725. bw = 6000000;
  726. break;
  727. case SYS_ISDBT:
  728. case SYS_DVBT:
  729. case SYS_DVBT2:
  730. if (bw <= 6000000) {
  731. map = &std_map->dvbt_6;
  732. } else if (bw <= 7000000) {
  733. map = &std_map->dvbt_7;
  734. } else {
  735. map = &std_map->dvbt_8;
  736. }
  737. break;
  738. case SYS_DVBC_ANNEX_B:
  739. bw = 6000000;
  740. /* falltrough */
  741. case SYS_DVBC_ANNEX_A:
  742. case SYS_DVBC_ANNEX_C:
  743. if (bw <= 6000000) {
  744. map = &std_map->qam_6;
  745. } else if (bw <= 7000000) {
  746. map = &std_map->qam_7;
  747. } else {
  748. map = &std_map->qam_8;
  749. }
  750. break;
  751. default:
  752. tda_warn("modulation type not supported!\n");
  753. return -EINVAL;
  754. }
  755. /* When tuning digital, the analog demod must be tri-stated */
  756. if (fe->ops.analog_ops.standby)
  757. fe->ops.analog_ops.standby(fe);
  758. ret = tda18271_tune(fe, map, freq, bw);
  759. if (tda_fail(ret))
  760. goto fail;
  761. priv->if_freq = map->if_freq;
  762. priv->frequency = freq;
  763. priv->bandwidth = bw;
  764. fail:
  765. return ret;
  766. }
  767. static int tda18271_set_analog_params(struct dvb_frontend *fe,
  768. struct analog_parameters *params)
  769. {
  770. struct tda18271_priv *priv = fe->tuner_priv;
  771. struct tda18271_std_map *std_map = &priv->std;
  772. struct tda18271_std_map_item *map;
  773. char *mode;
  774. int ret;
  775. u32 freq = params->frequency * 125 *
  776. ((params->mode == V4L2_TUNER_RADIO) ? 1 : 1000) / 2;
  777. priv->mode = TDA18271_ANALOG;
  778. if (params->mode == V4L2_TUNER_RADIO) {
  779. map = &std_map->fm_radio;
  780. mode = "fm";
  781. } else if (params->std & V4L2_STD_MN) {
  782. map = &std_map->atv_mn;
  783. mode = "MN";
  784. } else if (params->std & V4L2_STD_B) {
  785. map = &std_map->atv_b;
  786. mode = "B";
  787. } else if (params->std & V4L2_STD_GH) {
  788. map = &std_map->atv_gh;
  789. mode = "GH";
  790. } else if (params->std & V4L2_STD_PAL_I) {
  791. map = &std_map->atv_i;
  792. mode = "I";
  793. } else if (params->std & V4L2_STD_DK) {
  794. map = &std_map->atv_dk;
  795. mode = "DK";
  796. } else if (params->std & V4L2_STD_SECAM_L) {
  797. map = &std_map->atv_l;
  798. mode = "L";
  799. } else if (params->std & V4L2_STD_SECAM_LC) {
  800. map = &std_map->atv_lc;
  801. mode = "L'";
  802. } else {
  803. map = &std_map->atv_i;
  804. mode = "xx";
  805. }
  806. tda_dbg("setting tda18271 to system %s\n", mode);
  807. ret = tda18271_tune(fe, map, freq, 0);
  808. if (tda_fail(ret))
  809. goto fail;
  810. priv->if_freq = map->if_freq;
  811. priv->frequency = freq;
  812. priv->bandwidth = 0;
  813. fail:
  814. return ret;
  815. }
  816. static int tda18271_release(struct dvb_frontend *fe)
  817. {
  818. struct tda18271_priv *priv = fe->tuner_priv;
  819. mutex_lock(&tda18271_list_mutex);
  820. if (priv)
  821. hybrid_tuner_release_state(priv);
  822. mutex_unlock(&tda18271_list_mutex);
  823. fe->tuner_priv = NULL;
  824. return 0;
  825. }
  826. static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  827. {
  828. struct tda18271_priv *priv = fe->tuner_priv;
  829. *frequency = priv->frequency;
  830. return 0;
  831. }
  832. static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
  833. {
  834. struct tda18271_priv *priv = fe->tuner_priv;
  835. *bandwidth = priv->bandwidth;
  836. return 0;
  837. }
  838. static int tda18271_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  839. {
  840. struct tda18271_priv *priv = fe->tuner_priv;
  841. *frequency = (u32)priv->if_freq * 1000;
  842. return 0;
  843. }
  844. /* ------------------------------------------------------------------ */
  845. #define tda18271_update_std(std_cfg, name) do { \
  846. if (map->std_cfg.if_freq + \
  847. map->std_cfg.agc_mode + map->std_cfg.std + \
  848. map->std_cfg.if_lvl + map->std_cfg.rfagc_top > 0) { \
  849. tda_dbg("Using custom std config for %s\n", name); \
  850. memcpy(&std->std_cfg, &map->std_cfg, \
  851. sizeof(struct tda18271_std_map_item)); \
  852. } } while (0)
  853. #define tda18271_dump_std_item(std_cfg, name) do { \
  854. tda_dbg("(%s) if_freq = %d, agc_mode = %d, std = %d, " \
  855. "if_lvl = %d, rfagc_top = 0x%02x\n", \
  856. name, std->std_cfg.if_freq, \
  857. std->std_cfg.agc_mode, std->std_cfg.std, \
  858. std->std_cfg.if_lvl, std->std_cfg.rfagc_top); \
  859. } while (0)
  860. static int tda18271_dump_std_map(struct dvb_frontend *fe)
  861. {
  862. struct tda18271_priv *priv = fe->tuner_priv;
  863. struct tda18271_std_map *std = &priv->std;
  864. tda_dbg("========== STANDARD MAP SETTINGS ==========\n");
  865. tda18271_dump_std_item(fm_radio, " fm ");
  866. tda18271_dump_std_item(atv_b, "atv b ");
  867. tda18271_dump_std_item(atv_dk, "atv dk");
  868. tda18271_dump_std_item(atv_gh, "atv gh");
  869. tda18271_dump_std_item(atv_i, "atv i ");
  870. tda18271_dump_std_item(atv_l, "atv l ");
  871. tda18271_dump_std_item(atv_lc, "atv l'");
  872. tda18271_dump_std_item(atv_mn, "atv mn");
  873. tda18271_dump_std_item(atsc_6, "atsc 6");
  874. tda18271_dump_std_item(dvbt_6, "dvbt 6");
  875. tda18271_dump_std_item(dvbt_7, "dvbt 7");
  876. tda18271_dump_std_item(dvbt_8, "dvbt 8");
  877. tda18271_dump_std_item(qam_6, "qam 6 ");
  878. tda18271_dump_std_item(qam_7, "qam 7 ");
  879. tda18271_dump_std_item(qam_8, "qam 8 ");
  880. return 0;
  881. }
  882. static int tda18271_update_std_map(struct dvb_frontend *fe,
  883. struct tda18271_std_map *map)
  884. {
  885. struct tda18271_priv *priv = fe->tuner_priv;
  886. struct tda18271_std_map *std = &priv->std;
  887. if (!map)
  888. return -EINVAL;
  889. tda18271_update_std(fm_radio, "fm");
  890. tda18271_update_std(atv_b, "atv b");
  891. tda18271_update_std(atv_dk, "atv dk");
  892. tda18271_update_std(atv_gh, "atv gh");
  893. tda18271_update_std(atv_i, "atv i");
  894. tda18271_update_std(atv_l, "atv l");
  895. tda18271_update_std(atv_lc, "atv l'");
  896. tda18271_update_std(atv_mn, "atv mn");
  897. tda18271_update_std(atsc_6, "atsc 6");
  898. tda18271_update_std(dvbt_6, "dvbt 6");
  899. tda18271_update_std(dvbt_7, "dvbt 7");
  900. tda18271_update_std(dvbt_8, "dvbt 8");
  901. tda18271_update_std(qam_6, "qam 6");
  902. tda18271_update_std(qam_7, "qam 7");
  903. tda18271_update_std(qam_8, "qam 8");
  904. return 0;
  905. }
  906. static int tda18271_get_id(struct dvb_frontend *fe)
  907. {
  908. struct tda18271_priv *priv = fe->tuner_priv;
  909. unsigned char *regs = priv->tda18271_regs;
  910. char *name;
  911. int ret;
  912. mutex_lock(&priv->lock);
  913. ret = tda18271_read_regs(fe);
  914. mutex_unlock(&priv->lock);
  915. if (ret) {
  916. tda_info("Error reading device ID @ %d-%04x, bailing out.\n",
  917. i2c_adapter_id(priv->i2c_props.adap),
  918. priv->i2c_props.addr);
  919. return -EIO;
  920. }
  921. switch (regs[R_ID] & 0x7f) {
  922. case 3:
  923. name = "TDA18271HD/C1";
  924. priv->id = TDA18271HDC1;
  925. break;
  926. case 4:
  927. name = "TDA18271HD/C2";
  928. priv->id = TDA18271HDC2;
  929. break;
  930. default:
  931. tda_info("Unknown device (%i) detected @ %d-%04x, device not supported.\n",
  932. regs[R_ID], i2c_adapter_id(priv->i2c_props.adap),
  933. priv->i2c_props.addr);
  934. return -EINVAL;
  935. }
  936. tda_info("%s detected @ %d-%04x\n", name,
  937. i2c_adapter_id(priv->i2c_props.adap), priv->i2c_props.addr);
  938. return 0;
  939. }
  940. static int tda18271_setup_configuration(struct dvb_frontend *fe,
  941. struct tda18271_config *cfg)
  942. {
  943. struct tda18271_priv *priv = fe->tuner_priv;
  944. priv->gate = (cfg) ? cfg->gate : TDA18271_GATE_AUTO;
  945. priv->role = (cfg) ? cfg->role : TDA18271_MASTER;
  946. priv->config = (cfg) ? cfg->config : 0;
  947. priv->small_i2c = (cfg) ?
  948. cfg->small_i2c : TDA18271_39_BYTE_CHUNK_INIT;
  949. priv->output_opt = (cfg) ?
  950. cfg->output_opt : TDA18271_OUTPUT_LT_XT_ON;
  951. return 0;
  952. }
  953. static inline int tda18271_need_cal_on_startup(struct tda18271_config *cfg)
  954. {
  955. /* tda18271_cal_on_startup == -1 when cal module option is unset */
  956. return ((tda18271_cal_on_startup == -1) ?
  957. /* honor configuration setting */
  958. ((cfg) && (cfg->rf_cal_on_startup)) :
  959. /* module option overrides configuration setting */
  960. (tda18271_cal_on_startup)) ? 1 : 0;
  961. }
  962. static int tda18271_set_config(struct dvb_frontend *fe, void *priv_cfg)
  963. {
  964. struct tda18271_config *cfg = (struct tda18271_config *) priv_cfg;
  965. tda18271_setup_configuration(fe, cfg);
  966. if (tda18271_need_cal_on_startup(cfg))
  967. tda18271_init(fe);
  968. /* override default std map with values in config struct */
  969. if ((cfg) && (cfg->std_map))
  970. tda18271_update_std_map(fe, cfg->std_map);
  971. return 0;
  972. }
  973. static const struct dvb_tuner_ops tda18271_tuner_ops = {
  974. .info = {
  975. .name = "NXP TDA18271HD",
  976. .frequency_min = 45000000,
  977. .frequency_max = 864000000,
  978. .frequency_step = 62500
  979. },
  980. .init = tda18271_init,
  981. .sleep = tda18271_sleep,
  982. .set_params = tda18271_set_params,
  983. .set_analog_params = tda18271_set_analog_params,
  984. .release = tda18271_release,
  985. .set_config = tda18271_set_config,
  986. .get_frequency = tda18271_get_frequency,
  987. .get_bandwidth = tda18271_get_bandwidth,
  988. .get_if_frequency = tda18271_get_if_frequency,
  989. };
  990. struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
  991. struct i2c_adapter *i2c,
  992. struct tda18271_config *cfg)
  993. {
  994. struct tda18271_priv *priv = NULL;
  995. int instance, ret;
  996. mutex_lock(&tda18271_list_mutex);
  997. instance = hybrid_tuner_request_state(struct tda18271_priv, priv,
  998. hybrid_tuner_instance_list,
  999. i2c, addr, "tda18271");
  1000. switch (instance) {
  1001. case 0:
  1002. goto fail;
  1003. case 1:
  1004. /* new tuner instance */
  1005. fe->tuner_priv = priv;
  1006. tda18271_setup_configuration(fe, cfg);
  1007. priv->cal_initialized = false;
  1008. mutex_init(&priv->lock);
  1009. ret = tda18271_get_id(fe);
  1010. if (tda_fail(ret))
  1011. goto fail;
  1012. ret = tda18271_assign_map_layout(fe);
  1013. if (tda_fail(ret))
  1014. goto fail;
  1015. /* if delay_cal is set, delay IR & RF calibration until init()
  1016. * module option 'cal' overrides this delay */
  1017. if ((cfg->delay_cal) && (!tda18271_need_cal_on_startup(cfg)))
  1018. break;
  1019. mutex_lock(&priv->lock);
  1020. tda18271_init_regs(fe);
  1021. if ((tda18271_need_cal_on_startup(cfg)) &&
  1022. (priv->id == TDA18271HDC2))
  1023. tda18271c2_rf_cal_init(fe);
  1024. /* enter standby mode, with required output features enabled */
  1025. ret = tda18271_toggle_output(fe, 1);
  1026. tda_fail(ret);
  1027. mutex_unlock(&priv->lock);
  1028. break;
  1029. default:
  1030. /* existing tuner instance */
  1031. fe->tuner_priv = priv;
  1032. /* allow dvb driver to override configuration settings */
  1033. if (cfg) {
  1034. if (cfg->gate != TDA18271_GATE_ANALOG)
  1035. priv->gate = cfg->gate;
  1036. if (cfg->role)
  1037. priv->role = cfg->role;
  1038. if (cfg->config)
  1039. priv->config = cfg->config;
  1040. if (cfg->small_i2c)
  1041. priv->small_i2c = cfg->small_i2c;
  1042. if (cfg->output_opt)
  1043. priv->output_opt = cfg->output_opt;
  1044. if (cfg->std_map)
  1045. tda18271_update_std_map(fe, cfg->std_map);
  1046. }
  1047. if (tda18271_need_cal_on_startup(cfg))
  1048. tda18271_init(fe);
  1049. break;
  1050. }
  1051. /* override default std map with values in config struct */
  1052. if ((cfg) && (cfg->std_map))
  1053. tda18271_update_std_map(fe, cfg->std_map);
  1054. mutex_unlock(&tda18271_list_mutex);
  1055. memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
  1056. sizeof(struct dvb_tuner_ops));
  1057. if (tda18271_debug & (DBG_MAP | DBG_ADV))
  1058. tda18271_dump_std_map(fe);
  1059. return fe;
  1060. fail:
  1061. mutex_unlock(&tda18271_list_mutex);
  1062. tda18271_release(fe);
  1063. return NULL;
  1064. }
  1065. EXPORT_SYMBOL_GPL(tda18271_attach);
  1066. MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
  1067. MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
  1068. MODULE_LICENSE("GPL");
  1069. MODULE_VERSION("0.4");