ov519.c 135 KB

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  1. /**
  2. * OV519 driver
  3. *
  4. * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
  5. * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
  6. *
  7. * This module is adapted from the ov51x-jpeg package, which itself
  8. * was adapted from the ov511 driver.
  9. *
  10. * Original copyright for the ov511 driver is:
  11. *
  12. * Copyright (c) 1999-2006 Mark W. McClelland
  13. * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
  14. * Many improvements by Bret Wallach <bwallac1@san.rr.com>
  15. * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
  16. * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
  17. * Changes by Claudio Matsuoka <claudio@conectiva.com>
  18. *
  19. * ov51x-jpeg original copyright is:
  20. *
  21. * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
  22. * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
  23. *
  24. * This program is free software; you can redistribute it and/or modify
  25. * it under the terms of the GNU General Public License as published by
  26. * the Free Software Foundation; either version 2 of the License, or
  27. * any later version.
  28. *
  29. * This program is distributed in the hope that it will be useful,
  30. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  31. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  32. * GNU General Public License for more details.
  33. *
  34. * You should have received a copy of the GNU General Public License
  35. * along with this program; if not, write to the Free Software
  36. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  37. *
  38. */
  39. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  40. #define MODULE_NAME "ov519"
  41. #include <linux/input.h>
  42. #include "gspca.h"
  43. /* The jpeg_hdr is used by w996Xcf only */
  44. /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
  45. #define CONEX_CAM
  46. #include "jpeg.h"
  47. MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
  48. MODULE_DESCRIPTION("OV519 USB Camera Driver");
  49. MODULE_LICENSE("GPL");
  50. /* global parameters */
  51. static int frame_rate;
  52. /* Number of times to retry a failed I2C transaction. Increase this if you
  53. * are getting "Failed to read sensor ID..." */
  54. static int i2c_detect_tries = 10;
  55. /* ov519 device descriptor */
  56. struct sd {
  57. struct gspca_dev gspca_dev; /* !! must be the first item */
  58. struct v4l2_ctrl *jpegqual;
  59. struct v4l2_ctrl *freq;
  60. struct { /* h/vflip control cluster */
  61. struct v4l2_ctrl *hflip;
  62. struct v4l2_ctrl *vflip;
  63. };
  64. struct { /* autobrightness/brightness control cluster */
  65. struct v4l2_ctrl *autobright;
  66. struct v4l2_ctrl *brightness;
  67. };
  68. u8 revision;
  69. u8 packet_nr;
  70. char bridge;
  71. #define BRIDGE_OV511 0
  72. #define BRIDGE_OV511PLUS 1
  73. #define BRIDGE_OV518 2
  74. #define BRIDGE_OV518PLUS 3
  75. #define BRIDGE_OV519 4 /* = ov530 */
  76. #define BRIDGE_OVFX2 5
  77. #define BRIDGE_W9968CF 6
  78. #define BRIDGE_MASK 7
  79. char invert_led;
  80. #define BRIDGE_INVERT_LED 8
  81. char snapshot_pressed;
  82. char snapshot_needs_reset;
  83. /* Determined by sensor type */
  84. u8 sif;
  85. #define QUALITY_MIN 50
  86. #define QUALITY_MAX 70
  87. #define QUALITY_DEF 50
  88. u8 stopped; /* Streaming is temporarily paused */
  89. u8 first_frame;
  90. u8 frame_rate; /* current Framerate */
  91. u8 clockdiv; /* clockdiv override */
  92. s8 sensor; /* Type of image sensor chip (SEN_*) */
  93. u8 sensor_addr;
  94. u16 sensor_width;
  95. u16 sensor_height;
  96. s16 sensor_reg_cache[256];
  97. u8 jpeg_hdr[JPEG_HDR_SZ];
  98. };
  99. enum sensors {
  100. SEN_OV2610,
  101. SEN_OV2610AE,
  102. SEN_OV3610,
  103. SEN_OV6620,
  104. SEN_OV6630,
  105. SEN_OV66308AF,
  106. SEN_OV7610,
  107. SEN_OV7620,
  108. SEN_OV7620AE,
  109. SEN_OV7640,
  110. SEN_OV7648,
  111. SEN_OV7660,
  112. SEN_OV7670,
  113. SEN_OV76BE,
  114. SEN_OV8610,
  115. SEN_OV9600,
  116. };
  117. /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
  118. the ov sensors which is already present here. When we have the time we
  119. really should move the sensor drivers to v4l2 sub drivers. */
  120. #include "w996Xcf.c"
  121. /* table of the disabled controls */
  122. struct ctrl_valid {
  123. unsigned int has_brightness:1;
  124. unsigned int has_contrast:1;
  125. unsigned int has_exposure:1;
  126. unsigned int has_autogain:1;
  127. unsigned int has_sat:1;
  128. unsigned int has_hvflip:1;
  129. unsigned int has_autobright:1;
  130. unsigned int has_freq:1;
  131. };
  132. static const struct ctrl_valid valid_controls[] = {
  133. [SEN_OV2610] = {
  134. .has_exposure = 1,
  135. .has_autogain = 1,
  136. },
  137. [SEN_OV2610AE] = {
  138. .has_exposure = 1,
  139. .has_autogain = 1,
  140. },
  141. [SEN_OV3610] = {
  142. /* No controls */
  143. },
  144. [SEN_OV6620] = {
  145. .has_brightness = 1,
  146. .has_contrast = 1,
  147. .has_sat = 1,
  148. .has_autobright = 1,
  149. .has_freq = 1,
  150. },
  151. [SEN_OV6630] = {
  152. .has_brightness = 1,
  153. .has_contrast = 1,
  154. .has_sat = 1,
  155. .has_autobright = 1,
  156. .has_freq = 1,
  157. },
  158. [SEN_OV66308AF] = {
  159. .has_brightness = 1,
  160. .has_contrast = 1,
  161. .has_sat = 1,
  162. .has_autobright = 1,
  163. .has_freq = 1,
  164. },
  165. [SEN_OV7610] = {
  166. .has_brightness = 1,
  167. .has_contrast = 1,
  168. .has_sat = 1,
  169. .has_autobright = 1,
  170. .has_freq = 1,
  171. },
  172. [SEN_OV7620] = {
  173. .has_brightness = 1,
  174. .has_contrast = 1,
  175. .has_sat = 1,
  176. .has_autobright = 1,
  177. .has_freq = 1,
  178. },
  179. [SEN_OV7620AE] = {
  180. .has_brightness = 1,
  181. .has_contrast = 1,
  182. .has_sat = 1,
  183. .has_autobright = 1,
  184. .has_freq = 1,
  185. },
  186. [SEN_OV7640] = {
  187. .has_brightness = 1,
  188. .has_sat = 1,
  189. .has_freq = 1,
  190. },
  191. [SEN_OV7648] = {
  192. .has_brightness = 1,
  193. .has_sat = 1,
  194. .has_freq = 1,
  195. },
  196. [SEN_OV7660] = {
  197. .has_brightness = 1,
  198. .has_contrast = 1,
  199. .has_sat = 1,
  200. .has_hvflip = 1,
  201. .has_freq = 1,
  202. },
  203. [SEN_OV7670] = {
  204. .has_brightness = 1,
  205. .has_contrast = 1,
  206. .has_hvflip = 1,
  207. .has_freq = 1,
  208. },
  209. [SEN_OV76BE] = {
  210. .has_brightness = 1,
  211. .has_contrast = 1,
  212. .has_sat = 1,
  213. .has_autobright = 1,
  214. .has_freq = 1,
  215. },
  216. [SEN_OV8610] = {
  217. .has_brightness = 1,
  218. .has_contrast = 1,
  219. .has_sat = 1,
  220. .has_autobright = 1,
  221. },
  222. [SEN_OV9600] = {
  223. .has_exposure = 1,
  224. .has_autogain = 1,
  225. },
  226. };
  227. static const struct v4l2_pix_format ov519_vga_mode[] = {
  228. {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  229. .bytesperline = 320,
  230. .sizeimage = 320 * 240 * 3 / 8 + 590,
  231. .colorspace = V4L2_COLORSPACE_JPEG,
  232. .priv = 1},
  233. {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  234. .bytesperline = 640,
  235. .sizeimage = 640 * 480 * 3 / 8 + 590,
  236. .colorspace = V4L2_COLORSPACE_JPEG,
  237. .priv = 0},
  238. };
  239. static const struct v4l2_pix_format ov519_sif_mode[] = {
  240. {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  241. .bytesperline = 160,
  242. .sizeimage = 160 * 120 * 3 / 8 + 590,
  243. .colorspace = V4L2_COLORSPACE_JPEG,
  244. .priv = 3},
  245. {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  246. .bytesperline = 176,
  247. .sizeimage = 176 * 144 * 3 / 8 + 590,
  248. .colorspace = V4L2_COLORSPACE_JPEG,
  249. .priv = 1},
  250. {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  251. .bytesperline = 320,
  252. .sizeimage = 320 * 240 * 3 / 8 + 590,
  253. .colorspace = V4L2_COLORSPACE_JPEG,
  254. .priv = 2},
  255. {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
  256. .bytesperline = 352,
  257. .sizeimage = 352 * 288 * 3 / 8 + 590,
  258. .colorspace = V4L2_COLORSPACE_JPEG,
  259. .priv = 0},
  260. };
  261. /* Note some of the sizeimage values for the ov511 / ov518 may seem
  262. larger then necessary, however they need to be this big as the ov511 /
  263. ov518 always fills the entire isoc frame, using 0 padding bytes when
  264. it doesn't have any data. So with low framerates the amount of data
  265. transferred can become quite large (libv4l will remove all the 0 padding
  266. in userspace). */
  267. static const struct v4l2_pix_format ov518_vga_mode[] = {
  268. {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  269. .bytesperline = 320,
  270. .sizeimage = 320 * 240 * 3,
  271. .colorspace = V4L2_COLORSPACE_JPEG,
  272. .priv = 1},
  273. {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  274. .bytesperline = 640,
  275. .sizeimage = 640 * 480 * 2,
  276. .colorspace = V4L2_COLORSPACE_JPEG,
  277. .priv = 0},
  278. };
  279. static const struct v4l2_pix_format ov518_sif_mode[] = {
  280. {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  281. .bytesperline = 160,
  282. .sizeimage = 70000,
  283. .colorspace = V4L2_COLORSPACE_JPEG,
  284. .priv = 3},
  285. {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  286. .bytesperline = 176,
  287. .sizeimage = 70000,
  288. .colorspace = V4L2_COLORSPACE_JPEG,
  289. .priv = 1},
  290. {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  291. .bytesperline = 320,
  292. .sizeimage = 320 * 240 * 3,
  293. .colorspace = V4L2_COLORSPACE_JPEG,
  294. .priv = 2},
  295. {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
  296. .bytesperline = 352,
  297. .sizeimage = 352 * 288 * 3,
  298. .colorspace = V4L2_COLORSPACE_JPEG,
  299. .priv = 0},
  300. };
  301. static const struct v4l2_pix_format ov511_vga_mode[] = {
  302. {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  303. .bytesperline = 320,
  304. .sizeimage = 320 * 240 * 3,
  305. .colorspace = V4L2_COLORSPACE_JPEG,
  306. .priv = 1},
  307. {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  308. .bytesperline = 640,
  309. .sizeimage = 640 * 480 * 2,
  310. .colorspace = V4L2_COLORSPACE_JPEG,
  311. .priv = 0},
  312. };
  313. static const struct v4l2_pix_format ov511_sif_mode[] = {
  314. {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  315. .bytesperline = 160,
  316. .sizeimage = 70000,
  317. .colorspace = V4L2_COLORSPACE_JPEG,
  318. .priv = 3},
  319. {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  320. .bytesperline = 176,
  321. .sizeimage = 70000,
  322. .colorspace = V4L2_COLORSPACE_JPEG,
  323. .priv = 1},
  324. {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  325. .bytesperline = 320,
  326. .sizeimage = 320 * 240 * 3,
  327. .colorspace = V4L2_COLORSPACE_JPEG,
  328. .priv = 2},
  329. {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
  330. .bytesperline = 352,
  331. .sizeimage = 352 * 288 * 3,
  332. .colorspace = V4L2_COLORSPACE_JPEG,
  333. .priv = 0},
  334. };
  335. static const struct v4l2_pix_format ovfx2_vga_mode[] = {
  336. {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  337. .bytesperline = 320,
  338. .sizeimage = 320 * 240,
  339. .colorspace = V4L2_COLORSPACE_SRGB,
  340. .priv = 1},
  341. {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  342. .bytesperline = 640,
  343. .sizeimage = 640 * 480,
  344. .colorspace = V4L2_COLORSPACE_SRGB,
  345. .priv = 0},
  346. };
  347. static const struct v4l2_pix_format ovfx2_cif_mode[] = {
  348. {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  349. .bytesperline = 160,
  350. .sizeimage = 160 * 120,
  351. .colorspace = V4L2_COLORSPACE_SRGB,
  352. .priv = 3},
  353. {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  354. .bytesperline = 176,
  355. .sizeimage = 176 * 144,
  356. .colorspace = V4L2_COLORSPACE_SRGB,
  357. .priv = 1},
  358. {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  359. .bytesperline = 320,
  360. .sizeimage = 320 * 240,
  361. .colorspace = V4L2_COLORSPACE_SRGB,
  362. .priv = 2},
  363. {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  364. .bytesperline = 352,
  365. .sizeimage = 352 * 288,
  366. .colorspace = V4L2_COLORSPACE_SRGB,
  367. .priv = 0},
  368. };
  369. static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
  370. {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  371. .bytesperline = 800,
  372. .sizeimage = 800 * 600,
  373. .colorspace = V4L2_COLORSPACE_SRGB,
  374. .priv = 1},
  375. {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  376. .bytesperline = 1600,
  377. .sizeimage = 1600 * 1200,
  378. .colorspace = V4L2_COLORSPACE_SRGB},
  379. };
  380. static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
  381. {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  382. .bytesperline = 640,
  383. .sizeimage = 640 * 480,
  384. .colorspace = V4L2_COLORSPACE_SRGB,
  385. .priv = 1},
  386. {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  387. .bytesperline = 800,
  388. .sizeimage = 800 * 600,
  389. .colorspace = V4L2_COLORSPACE_SRGB,
  390. .priv = 1},
  391. {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  392. .bytesperline = 1024,
  393. .sizeimage = 1024 * 768,
  394. .colorspace = V4L2_COLORSPACE_SRGB,
  395. .priv = 1},
  396. {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  397. .bytesperline = 1600,
  398. .sizeimage = 1600 * 1200,
  399. .colorspace = V4L2_COLORSPACE_SRGB,
  400. .priv = 0},
  401. {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  402. .bytesperline = 2048,
  403. .sizeimage = 2048 * 1536,
  404. .colorspace = V4L2_COLORSPACE_SRGB,
  405. .priv = 0},
  406. };
  407. static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
  408. {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  409. .bytesperline = 640,
  410. .sizeimage = 640 * 480,
  411. .colorspace = V4L2_COLORSPACE_SRGB,
  412. .priv = 1},
  413. {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  414. .bytesperline = 1280,
  415. .sizeimage = 1280 * 1024,
  416. .colorspace = V4L2_COLORSPACE_SRGB},
  417. };
  418. /* Registers common to OV511 / OV518 */
  419. #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
  420. #define R51x_SYS_RESET 0x50
  421. /* Reset type flags */
  422. #define OV511_RESET_OMNICE 0x08
  423. #define R51x_SYS_INIT 0x53
  424. #define R51x_SYS_SNAP 0x52
  425. #define R51x_SYS_CUST_ID 0x5f
  426. #define R51x_COMP_LUT_BEGIN 0x80
  427. /* OV511 Camera interface register numbers */
  428. #define R511_CAM_DELAY 0x10
  429. #define R511_CAM_EDGE 0x11
  430. #define R511_CAM_PXCNT 0x12
  431. #define R511_CAM_LNCNT 0x13
  432. #define R511_CAM_PXDIV 0x14
  433. #define R511_CAM_LNDIV 0x15
  434. #define R511_CAM_UV_EN 0x16
  435. #define R511_CAM_LINE_MODE 0x17
  436. #define R511_CAM_OPTS 0x18
  437. #define R511_SNAP_FRAME 0x19
  438. #define R511_SNAP_PXCNT 0x1a
  439. #define R511_SNAP_LNCNT 0x1b
  440. #define R511_SNAP_PXDIV 0x1c
  441. #define R511_SNAP_LNDIV 0x1d
  442. #define R511_SNAP_UV_EN 0x1e
  443. #define R511_SNAP_OPTS 0x1f
  444. #define R511_DRAM_FLOW_CTL 0x20
  445. #define R511_FIFO_OPTS 0x31
  446. #define R511_I2C_CTL 0x40
  447. #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
  448. #define R511_COMP_EN 0x78
  449. #define R511_COMP_LUT_EN 0x79
  450. /* OV518 Camera interface register numbers */
  451. #define R518_GPIO_OUT 0x56 /* OV518(+) only */
  452. #define R518_GPIO_CTL 0x57 /* OV518(+) only */
  453. /* OV519 Camera interface register numbers */
  454. #define OV519_R10_H_SIZE 0x10
  455. #define OV519_R11_V_SIZE 0x11
  456. #define OV519_R12_X_OFFSETL 0x12
  457. #define OV519_R13_X_OFFSETH 0x13
  458. #define OV519_R14_Y_OFFSETL 0x14
  459. #define OV519_R15_Y_OFFSETH 0x15
  460. #define OV519_R16_DIVIDER 0x16
  461. #define OV519_R20_DFR 0x20
  462. #define OV519_R25_FORMAT 0x25
  463. /* OV519 System Controller register numbers */
  464. #define OV519_R51_RESET1 0x51
  465. #define OV519_R54_EN_CLK1 0x54
  466. #define OV519_R57_SNAPSHOT 0x57
  467. #define OV519_GPIO_DATA_OUT0 0x71
  468. #define OV519_GPIO_IO_CTRL0 0x72
  469. /*#define OV511_ENDPOINT_ADDRESS 1 * Isoc endpoint number */
  470. /*
  471. * The FX2 chip does not give us a zero length read at end of frame.
  472. * It does, however, give a short read at the end of a frame, if
  473. * necessary, rather than run two frames together.
  474. *
  475. * By choosing the right bulk transfer size, we are guaranteed to always
  476. * get a short read for the last read of each frame. Frame sizes are
  477. * always a composite number (width * height, or a multiple) so if we
  478. * choose a prime number, we are guaranteed that the last read of a
  479. * frame will be short.
  480. *
  481. * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
  482. * otherwise EOVERFLOW "babbling" errors occur. I have not been able
  483. * to figure out why. [PMiller]
  484. *
  485. * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
  486. *
  487. * It isn't enough to know the number of bytes per frame, in case we
  488. * have data dropouts or buffer overruns (even though the FX2 double
  489. * buffers, there are some pretty strict real time constraints for
  490. * isochronous transfer for larger frame sizes).
  491. */
  492. /*jfm: this value does not work for 800x600 - see isoc_init */
  493. #define OVFX2_BULK_SIZE (13 * 4096)
  494. /* I2C registers */
  495. #define R51x_I2C_W_SID 0x41
  496. #define R51x_I2C_SADDR_3 0x42
  497. #define R51x_I2C_SADDR_2 0x43
  498. #define R51x_I2C_R_SID 0x44
  499. #define R51x_I2C_DATA 0x45
  500. #define R518_I2C_CTL 0x47 /* OV518(+) only */
  501. #define OVFX2_I2C_ADDR 0x00
  502. /* I2C ADDRESSES */
  503. #define OV7xx0_SID 0x42
  504. #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
  505. #define OV8xx0_SID 0xa0
  506. #define OV6xx0_SID 0xc0
  507. /* OV7610 registers */
  508. #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
  509. #define OV7610_REG_BLUE 0x01 /* blue channel balance */
  510. #define OV7610_REG_RED 0x02 /* red channel balance */
  511. #define OV7610_REG_SAT 0x03 /* saturation */
  512. #define OV8610_REG_HUE 0x04 /* 04 reserved */
  513. #define OV7610_REG_CNT 0x05 /* Y contrast */
  514. #define OV7610_REG_BRT 0x06 /* Y brightness */
  515. #define OV7610_REG_COM_C 0x14 /* misc common regs */
  516. #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
  517. #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
  518. #define OV7610_REG_COM_I 0x29 /* misc settings */
  519. /* OV7660 and OV7670 registers */
  520. #define OV7670_R00_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
  521. #define OV7670_R01_BLUE 0x01 /* blue gain */
  522. #define OV7670_R02_RED 0x02 /* red gain */
  523. #define OV7670_R03_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
  524. #define OV7670_R04_COM1 0x04 /* Control 1 */
  525. /*#define OV7670_R07_AECHH 0x07 * AEC MS 5 bits */
  526. #define OV7670_R0C_COM3 0x0c /* Control 3 */
  527. #define OV7670_R0D_COM4 0x0d /* Control 4 */
  528. #define OV7670_R0E_COM5 0x0e /* All "reserved" */
  529. #define OV7670_R0F_COM6 0x0f /* Control 6 */
  530. #define OV7670_R10_AECH 0x10 /* More bits of AEC value */
  531. #define OV7670_R11_CLKRC 0x11 /* Clock control */
  532. #define OV7670_R12_COM7 0x12 /* Control 7 */
  533. #define OV7670_COM7_FMT_VGA 0x00
  534. /*#define OV7670_COM7_YUV 0x00 * YUV */
  535. #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
  536. #define OV7670_COM7_FMT_MASK 0x38
  537. #define OV7670_COM7_RESET 0x80 /* Register reset */
  538. #define OV7670_R13_COM8 0x13 /* Control 8 */
  539. #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
  540. #define OV7670_COM8_AWB 0x02 /* White balance enable */
  541. #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
  542. #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
  543. #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
  544. #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
  545. #define OV7670_R14_COM9 0x14 /* Control 9 - gain ceiling */
  546. #define OV7670_R15_COM10 0x15 /* Control 10 */
  547. #define OV7670_R17_HSTART 0x17 /* Horiz start high bits */
  548. #define OV7670_R18_HSTOP 0x18 /* Horiz stop high bits */
  549. #define OV7670_R19_VSTART 0x19 /* Vert start high bits */
  550. #define OV7670_R1A_VSTOP 0x1a /* Vert stop high bits */
  551. #define OV7670_R1E_MVFP 0x1e /* Mirror / vflip */
  552. #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
  553. #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
  554. #define OV7670_R24_AEW 0x24 /* AGC upper limit */
  555. #define OV7670_R25_AEB 0x25 /* AGC lower limit */
  556. #define OV7670_R26_VPT 0x26 /* AGC/AEC fast mode op region */
  557. #define OV7670_R32_HREF 0x32 /* HREF pieces */
  558. #define OV7670_R3A_TSLB 0x3a /* lots of stuff */
  559. #define OV7670_R3B_COM11 0x3b /* Control 11 */
  560. #define OV7670_COM11_EXP 0x02
  561. #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
  562. #define OV7670_R3C_COM12 0x3c /* Control 12 */
  563. #define OV7670_R3D_COM13 0x3d /* Control 13 */
  564. #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
  565. #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
  566. #define OV7670_R3E_COM14 0x3e /* Control 14 */
  567. #define OV7670_R3F_EDGE 0x3f /* Edge enhancement factor */
  568. #define OV7670_R40_COM15 0x40 /* Control 15 */
  569. /*#define OV7670_COM15_R00FF 0xc0 * 00 to FF */
  570. #define OV7670_R41_COM16 0x41 /* Control 16 */
  571. #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
  572. /* end of ov7660 common registers */
  573. #define OV7670_R55_BRIGHT 0x55 /* Brightness */
  574. #define OV7670_R56_CONTRAS 0x56 /* Contrast control */
  575. #define OV7670_R69_GFIX 0x69 /* Fix gain control */
  576. /*#define OV7670_R8C_RGB444 0x8c * RGB 444 control */
  577. #define OV7670_R9F_HAECC1 0x9f /* Hist AEC/AGC control 1 */
  578. #define OV7670_RA0_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
  579. #define OV7670_RA5_BD50MAX 0xa5 /* 50hz banding step limit */
  580. #define OV7670_RA6_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
  581. #define OV7670_RA7_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
  582. #define OV7670_RA8_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
  583. #define OV7670_RA9_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
  584. #define OV7670_RAA_HAECC7 0xaa /* Hist AEC/AGC control 7 */
  585. #define OV7670_RAB_BD60MAX 0xab /* 60hz banding step limit */
  586. struct ov_regvals {
  587. u8 reg;
  588. u8 val;
  589. };
  590. struct ov_i2c_regvals {
  591. u8 reg;
  592. u8 val;
  593. };
  594. /* Settings for OV2610 camera chip */
  595. static const struct ov_i2c_regvals norm_2610[] = {
  596. { 0x12, 0x80 }, /* reset */
  597. };
  598. static const struct ov_i2c_regvals norm_2610ae[] = {
  599. {0x12, 0x80}, /* reset */
  600. {0x13, 0xcd},
  601. {0x09, 0x01},
  602. {0x0d, 0x00},
  603. {0x11, 0x80},
  604. {0x12, 0x20}, /* 1600x1200 */
  605. {0x33, 0x0c},
  606. {0x35, 0x90},
  607. {0x36, 0x37},
  608. /* ms-win traces */
  609. {0x11, 0x83}, /* clock / 3 ? */
  610. {0x2d, 0x00}, /* 60 Hz filter */
  611. {0x24, 0xb0}, /* normal colors */
  612. {0x25, 0x90},
  613. {0x10, 0x43},
  614. };
  615. static const struct ov_i2c_regvals norm_3620b[] = {
  616. /*
  617. * From the datasheet: "Note that after writing to register COMH
  618. * (0x12) to change the sensor mode, registers related to the
  619. * sensor’s cropping window will be reset back to their default
  620. * values."
  621. *
  622. * "wait 4096 external clock ... to make sure the sensor is
  623. * stable and ready to access registers" i.e. 160us at 24MHz
  624. */
  625. { 0x12, 0x80 }, /* COMH reset */
  626. { 0x12, 0x00 }, /* QXGA, master */
  627. /*
  628. * 11 CLKRC "Clock Rate Control"
  629. * [7] internal frequency doublers: on
  630. * [6] video port mode: master
  631. * [5:0] clock divider: 1
  632. */
  633. { 0x11, 0x80 },
  634. /*
  635. * 13 COMI "Common Control I"
  636. * = 192 (0xC0) 11000000
  637. * COMI[7] "AEC speed selection"
  638. * = 1 (0x01) 1....... "Faster AEC correction"
  639. * COMI[6] "AEC speed step selection"
  640. * = 1 (0x01) .1...... "Big steps, fast"
  641. * COMI[5] "Banding filter on off"
  642. * = 0 (0x00) ..0..... "Off"
  643. * COMI[4] "Banding filter option"
  644. * = 0 (0x00) ...0.... "Main clock is 48 MHz and
  645. * the PLL is ON"
  646. * COMI[3] "Reserved"
  647. * = 0 (0x00) ....0...
  648. * COMI[2] "AGC auto manual control selection"
  649. * = 0 (0x00) .....0.. "Manual"
  650. * COMI[1] "AWB auto manual control selection"
  651. * = 0 (0x00) ......0. "Manual"
  652. * COMI[0] "Exposure control"
  653. * = 0 (0x00) .......0 "Manual"
  654. */
  655. { 0x13, 0xc0 },
  656. /*
  657. * 09 COMC "Common Control C"
  658. * = 8 (0x08) 00001000
  659. * COMC[7:5] "Reserved"
  660. * = 0 (0x00) 000.....
  661. * COMC[4] "Sleep Mode Enable"
  662. * = 0 (0x00) ...0.... "Normal mode"
  663. * COMC[3:2] "Sensor sampling reset timing selection"
  664. * = 2 (0x02) ....10.. "Longer reset time"
  665. * COMC[1:0] "Output drive current select"
  666. * = 0 (0x00) ......00 "Weakest"
  667. */
  668. { 0x09, 0x08 },
  669. /*
  670. * 0C COMD "Common Control D"
  671. * = 8 (0x08) 00001000
  672. * COMD[7] "Reserved"
  673. * = 0 (0x00) 0.......
  674. * COMD[6] "Swap MSB and LSB at the output port"
  675. * = 0 (0x00) .0...... "False"
  676. * COMD[5:3] "Reserved"
  677. * = 1 (0x01) ..001...
  678. * COMD[2] "Output Average On Off"
  679. * = 0 (0x00) .....0.. "Output Normal"
  680. * COMD[1] "Sensor precharge voltage selection"
  681. * = 0 (0x00) ......0. "Selects internal
  682. * reference precharge
  683. * voltage"
  684. * COMD[0] "Snapshot option"
  685. * = 0 (0x00) .......0 "Enable live video output
  686. * after snapshot sequence"
  687. */
  688. { 0x0c, 0x08 },
  689. /*
  690. * 0D COME "Common Control E"
  691. * = 161 (0xA1) 10100001
  692. * COME[7] "Output average option"
  693. * = 1 (0x01) 1....... "Output average of 4 pixels"
  694. * COME[6] "Anti-blooming control"
  695. * = 0 (0x00) .0...... "Off"
  696. * COME[5:3] "Reserved"
  697. * = 4 (0x04) ..100...
  698. * COME[2] "Clock output power down pin status"
  699. * = 0 (0x00) .....0.. "Tri-state data output pin
  700. * on power down"
  701. * COME[1] "Data output pin status selection at power down"
  702. * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
  703. * HREF, and CHSYNC pins on
  704. * power down"
  705. * COME[0] "Auto zero circuit select"
  706. * = 1 (0x01) .......1 "On"
  707. */
  708. { 0x0d, 0xa1 },
  709. /*
  710. * 0E COMF "Common Control F"
  711. * = 112 (0x70) 01110000
  712. * COMF[7] "System clock selection"
  713. * = 0 (0x00) 0....... "Use 24 MHz system clock"
  714. * COMF[6:4] "Reserved"
  715. * = 7 (0x07) .111....
  716. * COMF[3] "Manual auto negative offset canceling selection"
  717. * = 0 (0x00) ....0... "Auto detect negative
  718. * offset and cancel it"
  719. * COMF[2:0] "Reserved"
  720. * = 0 (0x00) .....000
  721. */
  722. { 0x0e, 0x70 },
  723. /*
  724. * 0F COMG "Common Control G"
  725. * = 66 (0x42) 01000010
  726. * COMG[7] "Optical black output selection"
  727. * = 0 (0x00) 0....... "Disable"
  728. * COMG[6] "Black level calibrate selection"
  729. * = 1 (0x01) .1...... "Use optical black pixels
  730. * to calibrate"
  731. * COMG[5:4] "Reserved"
  732. * = 0 (0x00) ..00....
  733. * COMG[3] "Channel offset adjustment"
  734. * = 0 (0x00) ....0... "Disable offset adjustment"
  735. * COMG[2] "ADC black level calibration option"
  736. * = 0 (0x00) .....0.. "Use B/G line and G/R
  737. * line to calibrate each
  738. * channel's black level"
  739. * COMG[1] "Reserved"
  740. * = 1 (0x01) ......1.
  741. * COMG[0] "ADC black level calibration enable"
  742. * = 0 (0x00) .......0 "Disable"
  743. */
  744. { 0x0f, 0x42 },
  745. /*
  746. * 14 COMJ "Common Control J"
  747. * = 198 (0xC6) 11000110
  748. * COMJ[7:6] "AGC gain ceiling"
  749. * = 3 (0x03) 11...... "8x"
  750. * COMJ[5:4] "Reserved"
  751. * = 0 (0x00) ..00....
  752. * COMJ[3] "Auto banding filter"
  753. * = 0 (0x00) ....0... "Banding filter is always
  754. * on off depending on
  755. * COMI[5] setting"
  756. * COMJ[2] "VSYNC drop option"
  757. * = 1 (0x01) .....1.. "SYNC is dropped if frame
  758. * data is dropped"
  759. * COMJ[1] "Frame data drop"
  760. * = 1 (0x01) ......1. "Drop frame data if
  761. * exposure is not within
  762. * tolerance. In AEC mode,
  763. * data is normally dropped
  764. * when data is out of
  765. * range."
  766. * COMJ[0] "Reserved"
  767. * = 0 (0x00) .......0
  768. */
  769. { 0x14, 0xc6 },
  770. /*
  771. * 15 COMK "Common Control K"
  772. * = 2 (0x02) 00000010
  773. * COMK[7] "CHSYNC pin output swap"
  774. * = 0 (0x00) 0....... "CHSYNC"
  775. * COMK[6] "HREF pin output swap"
  776. * = 0 (0x00) .0...... "HREF"
  777. * COMK[5] "PCLK output selection"
  778. * = 0 (0x00) ..0..... "PCLK always output"
  779. * COMK[4] "PCLK edge selection"
  780. * = 0 (0x00) ...0.... "Data valid on falling edge"
  781. * COMK[3] "HREF output polarity"
  782. * = 0 (0x00) ....0... "positive"
  783. * COMK[2] "Reserved"
  784. * = 0 (0x00) .....0..
  785. * COMK[1] "VSYNC polarity"
  786. * = 1 (0x01) ......1. "negative"
  787. * COMK[0] "HSYNC polarity"
  788. * = 0 (0x00) .......0 "positive"
  789. */
  790. { 0x15, 0x02 },
  791. /*
  792. * 33 CHLF "Current Control"
  793. * = 9 (0x09) 00001001
  794. * CHLF[7:6] "Sensor current control"
  795. * = 0 (0x00) 00......
  796. * CHLF[5] "Sensor current range control"
  797. * = 0 (0x00) ..0..... "normal range"
  798. * CHLF[4] "Sensor current"
  799. * = 0 (0x00) ...0.... "normal current"
  800. * CHLF[3] "Sensor buffer current control"
  801. * = 1 (0x01) ....1... "half current"
  802. * CHLF[2] "Column buffer current control"
  803. * = 0 (0x00) .....0.. "normal current"
  804. * CHLF[1] "Analog DSP current control"
  805. * = 0 (0x00) ......0. "normal current"
  806. * CHLF[1] "ADC current control"
  807. * = 0 (0x00) ......0. "normal current"
  808. */
  809. { 0x33, 0x09 },
  810. /*
  811. * 34 VBLM "Blooming Control"
  812. * = 80 (0x50) 01010000
  813. * VBLM[7] "Hard soft reset switch"
  814. * = 0 (0x00) 0....... "Hard reset"
  815. * VBLM[6:4] "Blooming voltage selection"
  816. * = 5 (0x05) .101....
  817. * VBLM[3:0] "Sensor current control"
  818. * = 0 (0x00) ....0000
  819. */
  820. { 0x34, 0x50 },
  821. /*
  822. * 36 VCHG "Sensor Precharge Voltage Control"
  823. * = 0 (0x00) 00000000
  824. * VCHG[7] "Reserved"
  825. * = 0 (0x00) 0.......
  826. * VCHG[6:4] "Sensor precharge voltage control"
  827. * = 0 (0x00) .000....
  828. * VCHG[3:0] "Sensor array common reference"
  829. * = 0 (0x00) ....0000
  830. */
  831. { 0x36, 0x00 },
  832. /*
  833. * 37 ADC "ADC Reference Control"
  834. * = 4 (0x04) 00000100
  835. * ADC[7:4] "Reserved"
  836. * = 0 (0x00) 0000....
  837. * ADC[3] "ADC input signal range"
  838. * = 0 (0x00) ....0... "Input signal 1.0x"
  839. * ADC[2:0] "ADC range control"
  840. * = 4 (0x04) .....100
  841. */
  842. { 0x37, 0x04 },
  843. /*
  844. * 38 ACOM "Analog Common Ground"
  845. * = 82 (0x52) 01010010
  846. * ACOM[7] "Analog gain control"
  847. * = 0 (0x00) 0....... "Gain 1x"
  848. * ACOM[6] "Analog black level calibration"
  849. * = 1 (0x01) .1...... "On"
  850. * ACOM[5:0] "Reserved"
  851. * = 18 (0x12) ..010010
  852. */
  853. { 0x38, 0x52 },
  854. /*
  855. * 3A FREFA "Internal Reference Adjustment"
  856. * = 0 (0x00) 00000000
  857. * FREFA[7:0] "Range"
  858. * = 0 (0x00) 00000000
  859. */
  860. { 0x3a, 0x00 },
  861. /*
  862. * 3C FVOPT "Internal Reference Adjustment"
  863. * = 31 (0x1F) 00011111
  864. * FVOPT[7:0] "Range"
  865. * = 31 (0x1F) 00011111
  866. */
  867. { 0x3c, 0x1f },
  868. /*
  869. * 44 Undocumented = 0 (0x00) 00000000
  870. * 44[7:0] "It's a secret"
  871. * = 0 (0x00) 00000000
  872. */
  873. { 0x44, 0x00 },
  874. /*
  875. * 40 Undocumented = 0 (0x00) 00000000
  876. * 40[7:0] "It's a secret"
  877. * = 0 (0x00) 00000000
  878. */
  879. { 0x40, 0x00 },
  880. /*
  881. * 41 Undocumented = 0 (0x00) 00000000
  882. * 41[7:0] "It's a secret"
  883. * = 0 (0x00) 00000000
  884. */
  885. { 0x41, 0x00 },
  886. /*
  887. * 42 Undocumented = 0 (0x00) 00000000
  888. * 42[7:0] "It's a secret"
  889. * = 0 (0x00) 00000000
  890. */
  891. { 0x42, 0x00 },
  892. /*
  893. * 43 Undocumented = 0 (0x00) 00000000
  894. * 43[7:0] "It's a secret"
  895. * = 0 (0x00) 00000000
  896. */
  897. { 0x43, 0x00 },
  898. /*
  899. * 45 Undocumented = 128 (0x80) 10000000
  900. * 45[7:0] "It's a secret"
  901. * = 128 (0x80) 10000000
  902. */
  903. { 0x45, 0x80 },
  904. /*
  905. * 48 Undocumented = 192 (0xC0) 11000000
  906. * 48[7:0] "It's a secret"
  907. * = 192 (0xC0) 11000000
  908. */
  909. { 0x48, 0xc0 },
  910. /*
  911. * 49 Undocumented = 25 (0x19) 00011001
  912. * 49[7:0] "It's a secret"
  913. * = 25 (0x19) 00011001
  914. */
  915. { 0x49, 0x19 },
  916. /*
  917. * 4B Undocumented = 128 (0x80) 10000000
  918. * 4B[7:0] "It's a secret"
  919. * = 128 (0x80) 10000000
  920. */
  921. { 0x4b, 0x80 },
  922. /*
  923. * 4D Undocumented = 196 (0xC4) 11000100
  924. * 4D[7:0] "It's a secret"
  925. * = 196 (0xC4) 11000100
  926. */
  927. { 0x4d, 0xc4 },
  928. /*
  929. * 35 VREF "Reference Voltage Control"
  930. * = 76 (0x4c) 01001100
  931. * VREF[7:5] "Column high reference control"
  932. * = 2 (0x02) 010..... "higher voltage"
  933. * VREF[4:2] "Column low reference control"
  934. * = 3 (0x03) ...011.. "Highest voltage"
  935. * VREF[1:0] "Reserved"
  936. * = 0 (0x00) ......00
  937. */
  938. { 0x35, 0x4c },
  939. /*
  940. * 3D Undocumented = 0 (0x00) 00000000
  941. * 3D[7:0] "It's a secret"
  942. * = 0 (0x00) 00000000
  943. */
  944. { 0x3d, 0x00 },
  945. /*
  946. * 3E Undocumented = 0 (0x00) 00000000
  947. * 3E[7:0] "It's a secret"
  948. * = 0 (0x00) 00000000
  949. */
  950. { 0x3e, 0x00 },
  951. /*
  952. * 3B FREFB "Internal Reference Adjustment"
  953. * = 24 (0x18) 00011000
  954. * FREFB[7:0] "Range"
  955. * = 24 (0x18) 00011000
  956. */
  957. { 0x3b, 0x18 },
  958. /*
  959. * 33 CHLF "Current Control"
  960. * = 25 (0x19) 00011001
  961. * CHLF[7:6] "Sensor current control"
  962. * = 0 (0x00) 00......
  963. * CHLF[5] "Sensor current range control"
  964. * = 0 (0x00) ..0..... "normal range"
  965. * CHLF[4] "Sensor current"
  966. * = 1 (0x01) ...1.... "double current"
  967. * CHLF[3] "Sensor buffer current control"
  968. * = 1 (0x01) ....1... "half current"
  969. * CHLF[2] "Column buffer current control"
  970. * = 0 (0x00) .....0.. "normal current"
  971. * CHLF[1] "Analog DSP current control"
  972. * = 0 (0x00) ......0. "normal current"
  973. * CHLF[1] "ADC current control"
  974. * = 0 (0x00) ......0. "normal current"
  975. */
  976. { 0x33, 0x19 },
  977. /*
  978. * 34 VBLM "Blooming Control"
  979. * = 90 (0x5A) 01011010
  980. * VBLM[7] "Hard soft reset switch"
  981. * = 0 (0x00) 0....... "Hard reset"
  982. * VBLM[6:4] "Blooming voltage selection"
  983. * = 5 (0x05) .101....
  984. * VBLM[3:0] "Sensor current control"
  985. * = 10 (0x0A) ....1010
  986. */
  987. { 0x34, 0x5a },
  988. /*
  989. * 3B FREFB "Internal Reference Adjustment"
  990. * = 0 (0x00) 00000000
  991. * FREFB[7:0] "Range"
  992. * = 0 (0x00) 00000000
  993. */
  994. { 0x3b, 0x00 },
  995. /*
  996. * 33 CHLF "Current Control"
  997. * = 9 (0x09) 00001001
  998. * CHLF[7:6] "Sensor current control"
  999. * = 0 (0x00) 00......
  1000. * CHLF[5] "Sensor current range control"
  1001. * = 0 (0x00) ..0..... "normal range"
  1002. * CHLF[4] "Sensor current"
  1003. * = 0 (0x00) ...0.... "normal current"
  1004. * CHLF[3] "Sensor buffer current control"
  1005. * = 1 (0x01) ....1... "half current"
  1006. * CHLF[2] "Column buffer current control"
  1007. * = 0 (0x00) .....0.. "normal current"
  1008. * CHLF[1] "Analog DSP current control"
  1009. * = 0 (0x00) ......0. "normal current"
  1010. * CHLF[1] "ADC current control"
  1011. * = 0 (0x00) ......0. "normal current"
  1012. */
  1013. { 0x33, 0x09 },
  1014. /*
  1015. * 34 VBLM "Blooming Control"
  1016. * = 80 (0x50) 01010000
  1017. * VBLM[7] "Hard soft reset switch"
  1018. * = 0 (0x00) 0....... "Hard reset"
  1019. * VBLM[6:4] "Blooming voltage selection"
  1020. * = 5 (0x05) .101....
  1021. * VBLM[3:0] "Sensor current control"
  1022. * = 0 (0x00) ....0000
  1023. */
  1024. { 0x34, 0x50 },
  1025. /*
  1026. * 12 COMH "Common Control H"
  1027. * = 64 (0x40) 01000000
  1028. * COMH[7] "SRST"
  1029. * = 0 (0x00) 0....... "No-op"
  1030. * COMH[6:4] "Resolution selection"
  1031. * = 4 (0x04) .100.... "XGA"
  1032. * COMH[3] "Master slave selection"
  1033. * = 0 (0x00) ....0... "Master mode"
  1034. * COMH[2] "Internal B/R channel option"
  1035. * = 0 (0x00) .....0.. "B/R use same channel"
  1036. * COMH[1] "Color bar test pattern"
  1037. * = 0 (0x00) ......0. "Off"
  1038. * COMH[0] "Reserved"
  1039. * = 0 (0x00) .......0
  1040. */
  1041. { 0x12, 0x40 },
  1042. /*
  1043. * 17 HREFST "Horizontal window start"
  1044. * = 31 (0x1F) 00011111
  1045. * HREFST[7:0] "Horizontal window start, 8 MSBs"
  1046. * = 31 (0x1F) 00011111
  1047. */
  1048. { 0x17, 0x1f },
  1049. /*
  1050. * 18 HREFEND "Horizontal window end"
  1051. * = 95 (0x5F) 01011111
  1052. * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
  1053. * = 95 (0x5F) 01011111
  1054. */
  1055. { 0x18, 0x5f },
  1056. /*
  1057. * 19 VSTRT "Vertical window start"
  1058. * = 0 (0x00) 00000000
  1059. * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
  1060. * = 0 (0x00) 00000000
  1061. */
  1062. { 0x19, 0x00 },
  1063. /*
  1064. * 1A VEND "Vertical window end"
  1065. * = 96 (0x60) 01100000
  1066. * VEND[7:0] "Vertical Window End, 8 MSBs"
  1067. * = 96 (0x60) 01100000
  1068. */
  1069. { 0x1a, 0x60 },
  1070. /*
  1071. * 32 COMM "Common Control M"
  1072. * = 18 (0x12) 00010010
  1073. * COMM[7:6] "Pixel clock divide option"
  1074. * = 0 (0x00) 00...... "/1"
  1075. * COMM[5:3] "Horizontal window end position, 3 LSBs"
  1076. * = 2 (0x02) ..010...
  1077. * COMM[2:0] "Horizontal window start position, 3 LSBs"
  1078. * = 2 (0x02) .....010
  1079. */
  1080. { 0x32, 0x12 },
  1081. /*
  1082. * 03 COMA "Common Control A"
  1083. * = 74 (0x4A) 01001010
  1084. * COMA[7:4] "AWB Update Threshold"
  1085. * = 4 (0x04) 0100....
  1086. * COMA[3:2] "Vertical window end line control 2 LSBs"
  1087. * = 2 (0x02) ....10..
  1088. * COMA[1:0] "Vertical window start line control 2 LSBs"
  1089. * = 2 (0x02) ......10
  1090. */
  1091. { 0x03, 0x4a },
  1092. /*
  1093. * 11 CLKRC "Clock Rate Control"
  1094. * = 128 (0x80) 10000000
  1095. * CLKRC[7] "Internal frequency doublers on off seclection"
  1096. * = 1 (0x01) 1....... "On"
  1097. * CLKRC[6] "Digital video master slave selection"
  1098. * = 0 (0x00) .0...... "Master mode, sensor
  1099. * provides PCLK"
  1100. * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
  1101. * = 0 (0x00) ..000000
  1102. */
  1103. { 0x11, 0x80 },
  1104. /*
  1105. * 12 COMH "Common Control H"
  1106. * = 0 (0x00) 00000000
  1107. * COMH[7] "SRST"
  1108. * = 0 (0x00) 0....... "No-op"
  1109. * COMH[6:4] "Resolution selection"
  1110. * = 0 (0x00) .000.... "QXGA"
  1111. * COMH[3] "Master slave selection"
  1112. * = 0 (0x00) ....0... "Master mode"
  1113. * COMH[2] "Internal B/R channel option"
  1114. * = 0 (0x00) .....0.. "B/R use same channel"
  1115. * COMH[1] "Color bar test pattern"
  1116. * = 0 (0x00) ......0. "Off"
  1117. * COMH[0] "Reserved"
  1118. * = 0 (0x00) .......0
  1119. */
  1120. { 0x12, 0x00 },
  1121. /*
  1122. * 12 COMH "Common Control H"
  1123. * = 64 (0x40) 01000000
  1124. * COMH[7] "SRST"
  1125. * = 0 (0x00) 0....... "No-op"
  1126. * COMH[6:4] "Resolution selection"
  1127. * = 4 (0x04) .100.... "XGA"
  1128. * COMH[3] "Master slave selection"
  1129. * = 0 (0x00) ....0... "Master mode"
  1130. * COMH[2] "Internal B/R channel option"
  1131. * = 0 (0x00) .....0.. "B/R use same channel"
  1132. * COMH[1] "Color bar test pattern"
  1133. * = 0 (0x00) ......0. "Off"
  1134. * COMH[0] "Reserved"
  1135. * = 0 (0x00) .......0
  1136. */
  1137. { 0x12, 0x40 },
  1138. /*
  1139. * 17 HREFST "Horizontal window start"
  1140. * = 31 (0x1F) 00011111
  1141. * HREFST[7:0] "Horizontal window start, 8 MSBs"
  1142. * = 31 (0x1F) 00011111
  1143. */
  1144. { 0x17, 0x1f },
  1145. /*
  1146. * 18 HREFEND "Horizontal window end"
  1147. * = 95 (0x5F) 01011111
  1148. * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
  1149. * = 95 (0x5F) 01011111
  1150. */
  1151. { 0x18, 0x5f },
  1152. /*
  1153. * 19 VSTRT "Vertical window start"
  1154. * = 0 (0x00) 00000000
  1155. * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
  1156. * = 0 (0x00) 00000000
  1157. */
  1158. { 0x19, 0x00 },
  1159. /*
  1160. * 1A VEND "Vertical window end"
  1161. * = 96 (0x60) 01100000
  1162. * VEND[7:0] "Vertical Window End, 8 MSBs"
  1163. * = 96 (0x60) 01100000
  1164. */
  1165. { 0x1a, 0x60 },
  1166. /*
  1167. * 32 COMM "Common Control M"
  1168. * = 18 (0x12) 00010010
  1169. * COMM[7:6] "Pixel clock divide option"
  1170. * = 0 (0x00) 00...... "/1"
  1171. * COMM[5:3] "Horizontal window end position, 3 LSBs"
  1172. * = 2 (0x02) ..010...
  1173. * COMM[2:0] "Horizontal window start position, 3 LSBs"
  1174. * = 2 (0x02) .....010
  1175. */
  1176. { 0x32, 0x12 },
  1177. /*
  1178. * 03 COMA "Common Control A"
  1179. * = 74 (0x4A) 01001010
  1180. * COMA[7:4] "AWB Update Threshold"
  1181. * = 4 (0x04) 0100....
  1182. * COMA[3:2] "Vertical window end line control 2 LSBs"
  1183. * = 2 (0x02) ....10..
  1184. * COMA[1:0] "Vertical window start line control 2 LSBs"
  1185. * = 2 (0x02) ......10
  1186. */
  1187. { 0x03, 0x4a },
  1188. /*
  1189. * 02 RED "Red Gain Control"
  1190. * = 175 (0xAF) 10101111
  1191. * RED[7] "Action"
  1192. * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
  1193. * RED[6:0] "Value"
  1194. * = 47 (0x2F) .0101111
  1195. */
  1196. { 0x02, 0xaf },
  1197. /*
  1198. * 2D ADDVSL "VSYNC Pulse Width"
  1199. * = 210 (0xD2) 11010010
  1200. * ADDVSL[7:0] "VSYNC pulse width, LSB"
  1201. * = 210 (0xD2) 11010010
  1202. */
  1203. { 0x2d, 0xd2 },
  1204. /*
  1205. * 00 GAIN = 24 (0x18) 00011000
  1206. * GAIN[7:6] "Reserved"
  1207. * = 0 (0x00) 00......
  1208. * GAIN[5] "Double"
  1209. * = 0 (0x00) ..0..... "False"
  1210. * GAIN[4] "Double"
  1211. * = 1 (0x01) ...1.... "True"
  1212. * GAIN[3:0] "Range"
  1213. * = 8 (0x08) ....1000
  1214. */
  1215. { 0x00, 0x18 },
  1216. /*
  1217. * 01 BLUE "Blue Gain Control"
  1218. * = 240 (0xF0) 11110000
  1219. * BLUE[7] "Action"
  1220. * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
  1221. * BLUE[6:0] "Value"
  1222. * = 112 (0x70) .1110000
  1223. */
  1224. { 0x01, 0xf0 },
  1225. /*
  1226. * 10 AEC "Automatic Exposure Control"
  1227. * = 10 (0x0A) 00001010
  1228. * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
  1229. * = 10 (0x0A) 00001010
  1230. */
  1231. { 0x10, 0x0a },
  1232. { 0xe1, 0x67 },
  1233. { 0xe3, 0x03 },
  1234. { 0xe4, 0x26 },
  1235. { 0xe5, 0x3e },
  1236. { 0xf8, 0x01 },
  1237. { 0xff, 0x01 },
  1238. };
  1239. static const struct ov_i2c_regvals norm_6x20[] = {
  1240. { 0x12, 0x80 }, /* reset */
  1241. { 0x11, 0x01 },
  1242. { 0x03, 0x60 },
  1243. { 0x05, 0x7f }, /* For when autoadjust is off */
  1244. { 0x07, 0xa8 },
  1245. /* The ratio of 0x0c and 0x0d controls the white point */
  1246. { 0x0c, 0x24 },
  1247. { 0x0d, 0x24 },
  1248. { 0x0f, 0x15 }, /* COMS */
  1249. { 0x10, 0x75 }, /* AEC Exposure time */
  1250. { 0x12, 0x24 }, /* Enable AGC */
  1251. { 0x14, 0x04 },
  1252. /* 0x16: 0x06 helps frame stability with moving objects */
  1253. { 0x16, 0x06 },
  1254. /* { 0x20, 0x30 }, * Aperture correction enable */
  1255. { 0x26, 0xb2 }, /* BLC enable */
  1256. /* 0x28: 0x05 Selects RGB format if RGB on */
  1257. { 0x28, 0x05 },
  1258. { 0x2a, 0x04 }, /* Disable framerate adjust */
  1259. /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
  1260. { 0x2d, 0x85 },
  1261. { 0x33, 0xa0 }, /* Color Processing Parameter */
  1262. { 0x34, 0xd2 }, /* Max A/D range */
  1263. { 0x38, 0x8b },
  1264. { 0x39, 0x40 },
  1265. { 0x3c, 0x39 }, /* Enable AEC mode changing */
  1266. { 0x3c, 0x3c }, /* Change AEC mode */
  1267. { 0x3c, 0x24 }, /* Disable AEC mode changing */
  1268. { 0x3d, 0x80 },
  1269. /* These next two registers (0x4a, 0x4b) are undocumented.
  1270. * They control the color balance */
  1271. { 0x4a, 0x80 },
  1272. { 0x4b, 0x80 },
  1273. { 0x4d, 0xd2 }, /* This reduces noise a bit */
  1274. { 0x4e, 0xc1 },
  1275. { 0x4f, 0x04 },
  1276. /* Do 50-53 have any effect? */
  1277. /* Toggle 0x12[2] off and on here? */
  1278. };
  1279. static const struct ov_i2c_regvals norm_6x30[] = {
  1280. { 0x12, 0x80 }, /* Reset */
  1281. { 0x00, 0x1f }, /* Gain */
  1282. { 0x01, 0x99 }, /* Blue gain */
  1283. { 0x02, 0x7c }, /* Red gain */
  1284. { 0x03, 0xc0 }, /* Saturation */
  1285. { 0x05, 0x0a }, /* Contrast */
  1286. { 0x06, 0x95 }, /* Brightness */
  1287. { 0x07, 0x2d }, /* Sharpness */
  1288. { 0x0c, 0x20 },
  1289. { 0x0d, 0x20 },
  1290. { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
  1291. { 0x0f, 0x05 },
  1292. { 0x10, 0x9a },
  1293. { 0x11, 0x00 }, /* Pixel clock = fastest */
  1294. { 0x12, 0x24 }, /* Enable AGC and AWB */
  1295. { 0x13, 0x21 },
  1296. { 0x14, 0x80 },
  1297. { 0x15, 0x01 },
  1298. { 0x16, 0x03 },
  1299. { 0x17, 0x38 },
  1300. { 0x18, 0xea },
  1301. { 0x19, 0x04 },
  1302. { 0x1a, 0x93 },
  1303. { 0x1b, 0x00 },
  1304. { 0x1e, 0xc4 },
  1305. { 0x1f, 0x04 },
  1306. { 0x20, 0x20 },
  1307. { 0x21, 0x10 },
  1308. { 0x22, 0x88 },
  1309. { 0x23, 0xc0 }, /* Crystal circuit power level */
  1310. { 0x25, 0x9a }, /* Increase AEC black ratio */
  1311. { 0x26, 0xb2 }, /* BLC enable */
  1312. { 0x27, 0xa2 },
  1313. { 0x28, 0x00 },
  1314. { 0x29, 0x00 },
  1315. { 0x2a, 0x84 }, /* 60 Hz power */
  1316. { 0x2b, 0xa8 }, /* 60 Hz power */
  1317. { 0x2c, 0xa0 },
  1318. { 0x2d, 0x95 }, /* Enable auto-brightness */
  1319. { 0x2e, 0x88 },
  1320. { 0x33, 0x26 },
  1321. { 0x34, 0x03 },
  1322. { 0x36, 0x8f },
  1323. { 0x37, 0x80 },
  1324. { 0x38, 0x83 },
  1325. { 0x39, 0x80 },
  1326. { 0x3a, 0x0f },
  1327. { 0x3b, 0x3c },
  1328. { 0x3c, 0x1a },
  1329. { 0x3d, 0x80 },
  1330. { 0x3e, 0x80 },
  1331. { 0x3f, 0x0e },
  1332. { 0x40, 0x00 }, /* White bal */
  1333. { 0x41, 0x00 }, /* White bal */
  1334. { 0x42, 0x80 },
  1335. { 0x43, 0x3f }, /* White bal */
  1336. { 0x44, 0x80 },
  1337. { 0x45, 0x20 },
  1338. { 0x46, 0x20 },
  1339. { 0x47, 0x80 },
  1340. { 0x48, 0x7f },
  1341. { 0x49, 0x00 },
  1342. { 0x4a, 0x00 },
  1343. { 0x4b, 0x80 },
  1344. { 0x4c, 0xd0 },
  1345. { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
  1346. { 0x4e, 0x40 },
  1347. { 0x4f, 0x07 }, /* UV avg., col. killer: max */
  1348. { 0x50, 0xff },
  1349. { 0x54, 0x23 }, /* Max AGC gain: 18dB */
  1350. { 0x55, 0xff },
  1351. { 0x56, 0x12 },
  1352. { 0x57, 0x81 },
  1353. { 0x58, 0x75 },
  1354. { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
  1355. { 0x5a, 0x2c },
  1356. { 0x5b, 0x0f }, /* AWB chrominance levels */
  1357. { 0x5c, 0x10 },
  1358. { 0x3d, 0x80 },
  1359. { 0x27, 0xa6 },
  1360. { 0x12, 0x20 }, /* Toggle AWB */
  1361. { 0x12, 0x24 },
  1362. };
  1363. /* Lawrence Glaister <lg@jfm.bc.ca> reports:
  1364. *
  1365. * Register 0x0f in the 7610 has the following effects:
  1366. *
  1367. * 0x85 (AEC method 1): Best overall, good contrast range
  1368. * 0x45 (AEC method 2): Very overexposed
  1369. * 0xa5 (spec sheet default): Ok, but the black level is
  1370. * shifted resulting in loss of contrast
  1371. * 0x05 (old driver setting): very overexposed, too much
  1372. * contrast
  1373. */
  1374. static const struct ov_i2c_regvals norm_7610[] = {
  1375. { 0x10, 0xff },
  1376. { 0x16, 0x06 },
  1377. { 0x28, 0x24 },
  1378. { 0x2b, 0xac },
  1379. { 0x12, 0x00 },
  1380. { 0x38, 0x81 },
  1381. { 0x28, 0x24 }, /* 0c */
  1382. { 0x0f, 0x85 }, /* lg's setting */
  1383. { 0x15, 0x01 },
  1384. { 0x20, 0x1c },
  1385. { 0x23, 0x2a },
  1386. { 0x24, 0x10 },
  1387. { 0x25, 0x8a },
  1388. { 0x26, 0xa2 },
  1389. { 0x27, 0xc2 },
  1390. { 0x2a, 0x04 },
  1391. { 0x2c, 0xfe },
  1392. { 0x2d, 0x93 },
  1393. { 0x30, 0x71 },
  1394. { 0x31, 0x60 },
  1395. { 0x32, 0x26 },
  1396. { 0x33, 0x20 },
  1397. { 0x34, 0x48 },
  1398. { 0x12, 0x24 },
  1399. { 0x11, 0x01 },
  1400. { 0x0c, 0x24 },
  1401. { 0x0d, 0x24 },
  1402. };
  1403. static const struct ov_i2c_regvals norm_7620[] = {
  1404. { 0x12, 0x80 }, /* reset */
  1405. { 0x00, 0x00 }, /* gain */
  1406. { 0x01, 0x80 }, /* blue gain */
  1407. { 0x02, 0x80 }, /* red gain */
  1408. { 0x03, 0xc0 }, /* OV7670_R03_VREF */
  1409. { 0x06, 0x60 },
  1410. { 0x07, 0x00 },
  1411. { 0x0c, 0x24 },
  1412. { 0x0c, 0x24 },
  1413. { 0x0d, 0x24 },
  1414. { 0x11, 0x01 },
  1415. { 0x12, 0x24 },
  1416. { 0x13, 0x01 },
  1417. { 0x14, 0x84 },
  1418. { 0x15, 0x01 },
  1419. { 0x16, 0x03 },
  1420. { 0x17, 0x2f },
  1421. { 0x18, 0xcf },
  1422. { 0x19, 0x06 },
  1423. { 0x1a, 0xf5 },
  1424. { 0x1b, 0x00 },
  1425. { 0x20, 0x18 },
  1426. { 0x21, 0x80 },
  1427. { 0x22, 0x80 },
  1428. { 0x23, 0x00 },
  1429. { 0x26, 0xa2 },
  1430. { 0x27, 0xea },
  1431. { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
  1432. { 0x29, 0x00 },
  1433. { 0x2a, 0x10 },
  1434. { 0x2b, 0x00 },
  1435. { 0x2c, 0x88 },
  1436. { 0x2d, 0x91 },
  1437. { 0x2e, 0x80 },
  1438. { 0x2f, 0x44 },
  1439. { 0x60, 0x27 },
  1440. { 0x61, 0x02 },
  1441. { 0x62, 0x5f },
  1442. { 0x63, 0xd5 },
  1443. { 0x64, 0x57 },
  1444. { 0x65, 0x83 },
  1445. { 0x66, 0x55 },
  1446. { 0x67, 0x92 },
  1447. { 0x68, 0xcf },
  1448. { 0x69, 0x76 },
  1449. { 0x6a, 0x22 },
  1450. { 0x6b, 0x00 },
  1451. { 0x6c, 0x02 },
  1452. { 0x6d, 0x44 },
  1453. { 0x6e, 0x80 },
  1454. { 0x6f, 0x1d },
  1455. { 0x70, 0x8b },
  1456. { 0x71, 0x00 },
  1457. { 0x72, 0x14 },
  1458. { 0x73, 0x54 },
  1459. { 0x74, 0x00 },
  1460. { 0x75, 0x8e },
  1461. { 0x76, 0x00 },
  1462. { 0x77, 0xff },
  1463. { 0x78, 0x80 },
  1464. { 0x79, 0x80 },
  1465. { 0x7a, 0x80 },
  1466. { 0x7b, 0xe2 },
  1467. { 0x7c, 0x00 },
  1468. };
  1469. /* 7640 and 7648. The defaults should be OK for most registers. */
  1470. static const struct ov_i2c_regvals norm_7640[] = {
  1471. { 0x12, 0x80 },
  1472. { 0x12, 0x14 },
  1473. };
  1474. static const struct ov_regvals init_519_ov7660[] = {
  1475. { 0x5d, 0x03 }, /* Turn off suspend mode */
  1476. { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
  1477. { 0x54, 0x0f }, /* bit2 (jpeg enable) */
  1478. { 0xa2, 0x20 }, /* a2-a5 are undocumented */
  1479. { 0xa3, 0x18 },
  1480. { 0xa4, 0x04 },
  1481. { 0xa5, 0x28 },
  1482. { 0x37, 0x00 }, /* SetUsbInit */
  1483. { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
  1484. /* Enable both fields, YUV Input, disable defect comp (why?) */
  1485. { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
  1486. { 0x21, 0x38 },
  1487. { 0x22, 0x1d },
  1488. { 0x17, 0x50 }, /* undocumented */
  1489. { 0x37, 0x00 }, /* undocumented */
  1490. { 0x40, 0xff }, /* I2C timeout counter */
  1491. { 0x46, 0x00 }, /* I2C clock prescaler */
  1492. };
  1493. static const struct ov_i2c_regvals norm_7660[] = {
  1494. {OV7670_R12_COM7, OV7670_COM7_RESET},
  1495. {OV7670_R11_CLKRC, 0x81},
  1496. {0x92, 0x00}, /* DM_LNL */
  1497. {0x93, 0x00}, /* DM_LNH */
  1498. {0x9d, 0x4c}, /* BD50ST */
  1499. {0x9e, 0x3f}, /* BD60ST */
  1500. {OV7670_R3B_COM11, 0x02},
  1501. {OV7670_R13_COM8, 0xf5},
  1502. {OV7670_R10_AECH, 0x00},
  1503. {OV7670_R00_GAIN, 0x00},
  1504. {OV7670_R01_BLUE, 0x7c},
  1505. {OV7670_R02_RED, 0x9d},
  1506. {OV7670_R12_COM7, 0x00},
  1507. {OV7670_R04_COM1, 00},
  1508. {OV7670_R18_HSTOP, 0x01},
  1509. {OV7670_R17_HSTART, 0x13},
  1510. {OV7670_R32_HREF, 0x92},
  1511. {OV7670_R19_VSTART, 0x02},
  1512. {OV7670_R1A_VSTOP, 0x7a},
  1513. {OV7670_R03_VREF, 0x00},
  1514. {OV7670_R0E_COM5, 0x04},
  1515. {OV7670_R0F_COM6, 0x62},
  1516. {OV7670_R15_COM10, 0x00},
  1517. {0x16, 0x02}, /* RSVD */
  1518. {0x1b, 0x00}, /* PSHFT */
  1519. {OV7670_R1E_MVFP, 0x01},
  1520. {0x29, 0x3c}, /* RSVD */
  1521. {0x33, 0x00}, /* CHLF */
  1522. {0x34, 0x07}, /* ARBLM */
  1523. {0x35, 0x84}, /* RSVD */
  1524. {0x36, 0x00}, /* RSVD */
  1525. {0x37, 0x04}, /* ADC */
  1526. {0x39, 0x43}, /* OFON */
  1527. {OV7670_R3A_TSLB, 0x00},
  1528. {OV7670_R3C_COM12, 0x6c},
  1529. {OV7670_R3D_COM13, 0x98},
  1530. {OV7670_R3F_EDGE, 0x23},
  1531. {OV7670_R40_COM15, 0xc1},
  1532. {OV7670_R41_COM16, 0x22},
  1533. {0x6b, 0x0a}, /* DBLV */
  1534. {0xa1, 0x08}, /* RSVD */
  1535. {0x69, 0x80}, /* HV */
  1536. {0x43, 0xf0}, /* RSVD.. */
  1537. {0x44, 0x10},
  1538. {0x45, 0x78},
  1539. {0x46, 0xa8},
  1540. {0x47, 0x60},
  1541. {0x48, 0x80},
  1542. {0x59, 0xba},
  1543. {0x5a, 0x9a},
  1544. {0x5b, 0x22},
  1545. {0x5c, 0xb9},
  1546. {0x5d, 0x9b},
  1547. {0x5e, 0x10},
  1548. {0x5f, 0xe0},
  1549. {0x60, 0x85},
  1550. {0x61, 0x60},
  1551. {0x9f, 0x9d}, /* RSVD */
  1552. {0xa0, 0xa0}, /* DSPC2 */
  1553. {0x4f, 0x60}, /* matrix */
  1554. {0x50, 0x64},
  1555. {0x51, 0x04},
  1556. {0x52, 0x18},
  1557. {0x53, 0x3c},
  1558. {0x54, 0x54},
  1559. {0x55, 0x40},
  1560. {0x56, 0x40},
  1561. {0x57, 0x40},
  1562. {0x58, 0x0d}, /* matrix sign */
  1563. {0x8b, 0xcc}, /* RSVD */
  1564. {0x8c, 0xcc},
  1565. {0x8d, 0xcf},
  1566. {0x6c, 0x40}, /* gamma curve */
  1567. {0x6d, 0xe0},
  1568. {0x6e, 0xa0},
  1569. {0x6f, 0x80},
  1570. {0x70, 0x70},
  1571. {0x71, 0x80},
  1572. {0x72, 0x60},
  1573. {0x73, 0x60},
  1574. {0x74, 0x50},
  1575. {0x75, 0x40},
  1576. {0x76, 0x38},
  1577. {0x77, 0x3c},
  1578. {0x78, 0x32},
  1579. {0x79, 0x1a},
  1580. {0x7a, 0x28},
  1581. {0x7b, 0x24},
  1582. {0x7c, 0x04}, /* gamma curve */
  1583. {0x7d, 0x12},
  1584. {0x7e, 0x26},
  1585. {0x7f, 0x46},
  1586. {0x80, 0x54},
  1587. {0x81, 0x64},
  1588. {0x82, 0x70},
  1589. {0x83, 0x7c},
  1590. {0x84, 0x86},
  1591. {0x85, 0x8e},
  1592. {0x86, 0x9c},
  1593. {0x87, 0xab},
  1594. {0x88, 0xc4},
  1595. {0x89, 0xd1},
  1596. {0x8a, 0xe5},
  1597. {OV7670_R14_COM9, 0x1e},
  1598. {OV7670_R24_AEW, 0x80},
  1599. {OV7670_R25_AEB, 0x72},
  1600. {OV7670_R26_VPT, 0xb3},
  1601. {0x62, 0x80}, /* LCC1 */
  1602. {0x63, 0x80}, /* LCC2 */
  1603. {0x64, 0x06}, /* LCC3 */
  1604. {0x65, 0x00}, /* LCC4 */
  1605. {0x66, 0x01}, /* LCC5 */
  1606. {0x94, 0x0e}, /* RSVD.. */
  1607. {0x95, 0x14},
  1608. {OV7670_R13_COM8, OV7670_COM8_FASTAEC
  1609. | OV7670_COM8_AECSTEP
  1610. | OV7670_COM8_BFILT
  1611. | 0x10
  1612. | OV7670_COM8_AGC
  1613. | OV7670_COM8_AWB
  1614. | OV7670_COM8_AEC},
  1615. {0xa1, 0xc8}
  1616. };
  1617. static const struct ov_i2c_regvals norm_9600[] = {
  1618. {0x12, 0x80},
  1619. {0x0c, 0x28},
  1620. {0x11, 0x80},
  1621. {0x13, 0xb5},
  1622. {0x14, 0x3e},
  1623. {0x1b, 0x04},
  1624. {0x24, 0xb0},
  1625. {0x25, 0x90},
  1626. {0x26, 0x94},
  1627. {0x35, 0x90},
  1628. {0x37, 0x07},
  1629. {0x38, 0x08},
  1630. {0x01, 0x8e},
  1631. {0x02, 0x85}
  1632. };
  1633. /* 7670. Defaults taken from OmniVision provided data,
  1634. * as provided by Jonathan Corbet of OLPC */
  1635. static const struct ov_i2c_regvals norm_7670[] = {
  1636. { OV7670_R12_COM7, OV7670_COM7_RESET },
  1637. { OV7670_R3A_TSLB, 0x04 }, /* OV */
  1638. { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
  1639. { OV7670_R11_CLKRC, 0x01 },
  1640. /*
  1641. * Set the hardware window. These values from OV don't entirely
  1642. * make sense - hstop is less than hstart. But they work...
  1643. */
  1644. { OV7670_R17_HSTART, 0x13 },
  1645. { OV7670_R18_HSTOP, 0x01 },
  1646. { OV7670_R32_HREF, 0xb6 },
  1647. { OV7670_R19_VSTART, 0x02 },
  1648. { OV7670_R1A_VSTOP, 0x7a },
  1649. { OV7670_R03_VREF, 0x0a },
  1650. { OV7670_R0C_COM3, 0x00 },
  1651. { OV7670_R3E_COM14, 0x00 },
  1652. /* Mystery scaling numbers */
  1653. { 0x70, 0x3a },
  1654. { 0x71, 0x35 },
  1655. { 0x72, 0x11 },
  1656. { 0x73, 0xf0 },
  1657. { 0xa2, 0x02 },
  1658. /* { OV7670_R15_COM10, 0x0 }, */
  1659. /* Gamma curve values */
  1660. { 0x7a, 0x20 },
  1661. { 0x7b, 0x10 },
  1662. { 0x7c, 0x1e },
  1663. { 0x7d, 0x35 },
  1664. { 0x7e, 0x5a },
  1665. { 0x7f, 0x69 },
  1666. { 0x80, 0x76 },
  1667. { 0x81, 0x80 },
  1668. { 0x82, 0x88 },
  1669. { 0x83, 0x8f },
  1670. { 0x84, 0x96 },
  1671. { 0x85, 0xa3 },
  1672. { 0x86, 0xaf },
  1673. { 0x87, 0xc4 },
  1674. { 0x88, 0xd7 },
  1675. { 0x89, 0xe8 },
  1676. /* AGC and AEC parameters. Note we start by disabling those features,
  1677. then turn them only after tweaking the values. */
  1678. { OV7670_R13_COM8, OV7670_COM8_FASTAEC
  1679. | OV7670_COM8_AECSTEP
  1680. | OV7670_COM8_BFILT },
  1681. { OV7670_R00_GAIN, 0x00 },
  1682. { OV7670_R10_AECH, 0x00 },
  1683. { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
  1684. { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
  1685. { OV7670_RA5_BD50MAX, 0x05 },
  1686. { OV7670_RAB_BD60MAX, 0x07 },
  1687. { OV7670_R24_AEW, 0x95 },
  1688. { OV7670_R25_AEB, 0x33 },
  1689. { OV7670_R26_VPT, 0xe3 },
  1690. { OV7670_R9F_HAECC1, 0x78 },
  1691. { OV7670_RA0_HAECC2, 0x68 },
  1692. { 0xa1, 0x03 }, /* magic */
  1693. { OV7670_RA6_HAECC3, 0xd8 },
  1694. { OV7670_RA7_HAECC4, 0xd8 },
  1695. { OV7670_RA8_HAECC5, 0xf0 },
  1696. { OV7670_RA9_HAECC6, 0x90 },
  1697. { OV7670_RAA_HAECC7, 0x94 },
  1698. { OV7670_R13_COM8, OV7670_COM8_FASTAEC
  1699. | OV7670_COM8_AECSTEP
  1700. | OV7670_COM8_BFILT
  1701. | OV7670_COM8_AGC
  1702. | OV7670_COM8_AEC },
  1703. /* Almost all of these are magic "reserved" values. */
  1704. { OV7670_R0E_COM5, 0x61 },
  1705. { OV7670_R0F_COM6, 0x4b },
  1706. { 0x16, 0x02 },
  1707. { OV7670_R1E_MVFP, 0x07 },
  1708. { 0x21, 0x02 },
  1709. { 0x22, 0x91 },
  1710. { 0x29, 0x07 },
  1711. { 0x33, 0x0b },
  1712. { 0x35, 0x0b },
  1713. { 0x37, 0x1d },
  1714. { 0x38, 0x71 },
  1715. { 0x39, 0x2a },
  1716. { OV7670_R3C_COM12, 0x78 },
  1717. { 0x4d, 0x40 },
  1718. { 0x4e, 0x20 },
  1719. { OV7670_R69_GFIX, 0x00 },
  1720. { 0x6b, 0x4a },
  1721. { 0x74, 0x10 },
  1722. { 0x8d, 0x4f },
  1723. { 0x8e, 0x00 },
  1724. { 0x8f, 0x00 },
  1725. { 0x90, 0x00 },
  1726. { 0x91, 0x00 },
  1727. { 0x96, 0x00 },
  1728. { 0x9a, 0x00 },
  1729. { 0xb0, 0x84 },
  1730. { 0xb1, 0x0c },
  1731. { 0xb2, 0x0e },
  1732. { 0xb3, 0x82 },
  1733. { 0xb8, 0x0a },
  1734. /* More reserved magic, some of which tweaks white balance */
  1735. { 0x43, 0x0a },
  1736. { 0x44, 0xf0 },
  1737. { 0x45, 0x34 },
  1738. { 0x46, 0x58 },
  1739. { 0x47, 0x28 },
  1740. { 0x48, 0x3a },
  1741. { 0x59, 0x88 },
  1742. { 0x5a, 0x88 },
  1743. { 0x5b, 0x44 },
  1744. { 0x5c, 0x67 },
  1745. { 0x5d, 0x49 },
  1746. { 0x5e, 0x0e },
  1747. { 0x6c, 0x0a },
  1748. { 0x6d, 0x55 },
  1749. { 0x6e, 0x11 },
  1750. { 0x6f, 0x9f }, /* "9e for advance AWB" */
  1751. { 0x6a, 0x40 },
  1752. { OV7670_R01_BLUE, 0x40 },
  1753. { OV7670_R02_RED, 0x60 },
  1754. { OV7670_R13_COM8, OV7670_COM8_FASTAEC
  1755. | OV7670_COM8_AECSTEP
  1756. | OV7670_COM8_BFILT
  1757. | OV7670_COM8_AGC
  1758. | OV7670_COM8_AEC
  1759. | OV7670_COM8_AWB },
  1760. /* Matrix coefficients */
  1761. { 0x4f, 0x80 },
  1762. { 0x50, 0x80 },
  1763. { 0x51, 0x00 },
  1764. { 0x52, 0x22 },
  1765. { 0x53, 0x5e },
  1766. { 0x54, 0x80 },
  1767. { 0x58, 0x9e },
  1768. { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
  1769. { OV7670_R3F_EDGE, 0x00 },
  1770. { 0x75, 0x05 },
  1771. { 0x76, 0xe1 },
  1772. { 0x4c, 0x00 },
  1773. { 0x77, 0x01 },
  1774. { OV7670_R3D_COM13, OV7670_COM13_GAMMA
  1775. | OV7670_COM13_UVSAT
  1776. | 2}, /* was 3 */
  1777. { 0x4b, 0x09 },
  1778. { 0xc9, 0x60 },
  1779. { OV7670_R41_COM16, 0x38 },
  1780. { 0x56, 0x40 },
  1781. { 0x34, 0x11 },
  1782. { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
  1783. { 0xa4, 0x88 },
  1784. { 0x96, 0x00 },
  1785. { 0x97, 0x30 },
  1786. { 0x98, 0x20 },
  1787. { 0x99, 0x30 },
  1788. { 0x9a, 0x84 },
  1789. { 0x9b, 0x29 },
  1790. { 0x9c, 0x03 },
  1791. { 0x9d, 0x4c },
  1792. { 0x9e, 0x3f },
  1793. { 0x78, 0x04 },
  1794. /* Extra-weird stuff. Some sort of multiplexor register */
  1795. { 0x79, 0x01 },
  1796. { 0xc8, 0xf0 },
  1797. { 0x79, 0x0f },
  1798. { 0xc8, 0x00 },
  1799. { 0x79, 0x10 },
  1800. { 0xc8, 0x7e },
  1801. { 0x79, 0x0a },
  1802. { 0xc8, 0x80 },
  1803. { 0x79, 0x0b },
  1804. { 0xc8, 0x01 },
  1805. { 0x79, 0x0c },
  1806. { 0xc8, 0x0f },
  1807. { 0x79, 0x0d },
  1808. { 0xc8, 0x20 },
  1809. { 0x79, 0x09 },
  1810. { 0xc8, 0x80 },
  1811. { 0x79, 0x02 },
  1812. { 0xc8, 0xc0 },
  1813. { 0x79, 0x03 },
  1814. { 0xc8, 0x40 },
  1815. { 0x79, 0x05 },
  1816. { 0xc8, 0x30 },
  1817. { 0x79, 0x26 },
  1818. };
  1819. static const struct ov_i2c_regvals norm_8610[] = {
  1820. { 0x12, 0x80 },
  1821. { 0x00, 0x00 },
  1822. { 0x01, 0x80 },
  1823. { 0x02, 0x80 },
  1824. { 0x03, 0xc0 },
  1825. { 0x04, 0x30 },
  1826. { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
  1827. { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
  1828. { 0x0a, 0x86 },
  1829. { 0x0b, 0xb0 },
  1830. { 0x0c, 0x20 },
  1831. { 0x0d, 0x20 },
  1832. { 0x11, 0x01 },
  1833. { 0x12, 0x25 },
  1834. { 0x13, 0x01 },
  1835. { 0x14, 0x04 },
  1836. { 0x15, 0x01 }, /* Lin and Win think different about UV order */
  1837. { 0x16, 0x03 },
  1838. { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
  1839. { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
  1840. { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
  1841. { 0x1a, 0xf5 },
  1842. { 0x1b, 0x00 },
  1843. { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
  1844. { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
  1845. { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
  1846. { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
  1847. { 0x26, 0xa2 },
  1848. { 0x27, 0xea },
  1849. { 0x28, 0x00 },
  1850. { 0x29, 0x00 },
  1851. { 0x2a, 0x80 },
  1852. { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
  1853. { 0x2c, 0xac },
  1854. { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
  1855. { 0x2e, 0x80 },
  1856. { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
  1857. { 0x4c, 0x00 },
  1858. { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
  1859. { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
  1860. { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
  1861. { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
  1862. { 0x63, 0xff },
  1863. { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
  1864. * maybe thats wrong */
  1865. { 0x65, 0x00 },
  1866. { 0x66, 0x55 },
  1867. { 0x67, 0xb0 },
  1868. { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
  1869. { 0x69, 0x02 },
  1870. { 0x6a, 0x22 },
  1871. { 0x6b, 0x00 },
  1872. { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
  1873. * deleting bit7 colors the first images red */
  1874. { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
  1875. { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
  1876. { 0x6f, 0x01 },
  1877. { 0x70, 0x8b },
  1878. { 0x71, 0x00 },
  1879. { 0x72, 0x14 },
  1880. { 0x73, 0x54 },
  1881. { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
  1882. { 0x75, 0x0e },
  1883. { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
  1884. { 0x77, 0xff },
  1885. { 0x78, 0x80 },
  1886. { 0x79, 0x80 },
  1887. { 0x7a, 0x80 },
  1888. { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
  1889. { 0x7c, 0x00 },
  1890. { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
  1891. { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
  1892. { 0x7f, 0xfb },
  1893. { 0x80, 0x28 },
  1894. { 0x81, 0x00 },
  1895. { 0x82, 0x23 },
  1896. { 0x83, 0x0b },
  1897. { 0x84, 0x00 },
  1898. { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
  1899. { 0x86, 0xc9 },
  1900. { 0x87, 0x00 },
  1901. { 0x88, 0x00 },
  1902. { 0x89, 0x01 },
  1903. { 0x12, 0x20 },
  1904. { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
  1905. };
  1906. static unsigned char ov7670_abs_to_sm(unsigned char v)
  1907. {
  1908. if (v > 127)
  1909. return v & 0x7f;
  1910. return (128 - v) | 0x80;
  1911. }
  1912. /* Write a OV519 register */
  1913. static void reg_w(struct sd *sd, u16 index, u16 value)
  1914. {
  1915. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  1916. int ret, req = 0;
  1917. if (sd->gspca_dev.usb_err < 0)
  1918. return;
  1919. switch (sd->bridge) {
  1920. case BRIDGE_OV511:
  1921. case BRIDGE_OV511PLUS:
  1922. req = 2;
  1923. break;
  1924. case BRIDGE_OVFX2:
  1925. req = 0x0a;
  1926. /* fall through */
  1927. case BRIDGE_W9968CF:
  1928. PDEBUG(D_USBO, "SET %02x %04x %04x",
  1929. req, value, index);
  1930. ret = usb_control_msg(sd->gspca_dev.dev,
  1931. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  1932. req,
  1933. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  1934. value, index, NULL, 0, 500);
  1935. goto leave;
  1936. default:
  1937. req = 1;
  1938. }
  1939. PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
  1940. req, index, value);
  1941. sd->gspca_dev.usb_buf[0] = value;
  1942. ret = usb_control_msg(sd->gspca_dev.dev,
  1943. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  1944. req,
  1945. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  1946. 0, index,
  1947. sd->gspca_dev.usb_buf, 1, 500);
  1948. leave:
  1949. if (ret < 0) {
  1950. PERR("reg_w %02x failed %d\n", index, ret);
  1951. sd->gspca_dev.usb_err = ret;
  1952. return;
  1953. }
  1954. }
  1955. /* Read from a OV519 register, note not valid for the w9968cf!! */
  1956. /* returns: negative is error, pos or zero is data */
  1957. static int reg_r(struct sd *sd, u16 index)
  1958. {
  1959. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  1960. int ret;
  1961. int req;
  1962. if (sd->gspca_dev.usb_err < 0)
  1963. return -1;
  1964. switch (sd->bridge) {
  1965. case BRIDGE_OV511:
  1966. case BRIDGE_OV511PLUS:
  1967. req = 3;
  1968. break;
  1969. case BRIDGE_OVFX2:
  1970. req = 0x0b;
  1971. break;
  1972. default:
  1973. req = 1;
  1974. }
  1975. ret = usb_control_msg(sd->gspca_dev.dev,
  1976. usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
  1977. req,
  1978. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  1979. 0, index, sd->gspca_dev.usb_buf, 1, 500);
  1980. if (ret >= 0) {
  1981. ret = sd->gspca_dev.usb_buf[0];
  1982. PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
  1983. req, index, ret);
  1984. } else {
  1985. PERR("reg_r %02x failed %d\n", index, ret);
  1986. sd->gspca_dev.usb_err = ret;
  1987. }
  1988. return ret;
  1989. }
  1990. /* Read 8 values from a OV519 register */
  1991. static int reg_r8(struct sd *sd,
  1992. u16 index)
  1993. {
  1994. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  1995. int ret;
  1996. if (sd->gspca_dev.usb_err < 0)
  1997. return -1;
  1998. ret = usb_control_msg(sd->gspca_dev.dev,
  1999. usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
  2000. 1, /* REQ_IO */
  2001. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  2002. 0, index, sd->gspca_dev.usb_buf, 8, 500);
  2003. if (ret >= 0) {
  2004. ret = sd->gspca_dev.usb_buf[0];
  2005. } else {
  2006. PERR("reg_r8 %02x failed %d\n", index, ret);
  2007. sd->gspca_dev.usb_err = ret;
  2008. }
  2009. return ret;
  2010. }
  2011. /*
  2012. * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
  2013. * the same position as 1's in "mask" are cleared and set to "value". Bits
  2014. * that are in the same position as 0's in "mask" are preserved, regardless
  2015. * of their respective state in "value".
  2016. */
  2017. static void reg_w_mask(struct sd *sd,
  2018. u16 index,
  2019. u8 value,
  2020. u8 mask)
  2021. {
  2022. int ret;
  2023. u8 oldval;
  2024. if (mask != 0xff) {
  2025. value &= mask; /* Enforce mask on value */
  2026. ret = reg_r(sd, index);
  2027. if (ret < 0)
  2028. return;
  2029. oldval = ret & ~mask; /* Clear the masked bits */
  2030. value |= oldval; /* Set the desired bits */
  2031. }
  2032. reg_w(sd, index, value);
  2033. }
  2034. /*
  2035. * Writes multiple (n) byte value to a single register. Only valid with certain
  2036. * registers (0x30 and 0xc4 - 0xce).
  2037. */
  2038. static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
  2039. {
  2040. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2041. int ret;
  2042. if (sd->gspca_dev.usb_err < 0)
  2043. return;
  2044. *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
  2045. ret = usb_control_msg(sd->gspca_dev.dev,
  2046. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  2047. 1 /* REG_IO */,
  2048. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  2049. 0, index,
  2050. sd->gspca_dev.usb_buf, n, 500);
  2051. if (ret < 0) {
  2052. PERR("reg_w32 %02x failed %d\n", index, ret);
  2053. sd->gspca_dev.usb_err = ret;
  2054. }
  2055. }
  2056. static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
  2057. {
  2058. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2059. int rc, retries;
  2060. PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
  2061. /* Three byte write cycle */
  2062. for (retries = 6; ; ) {
  2063. /* Select camera register */
  2064. reg_w(sd, R51x_I2C_SADDR_3, reg);
  2065. /* Write "value" to I2C data port of OV511 */
  2066. reg_w(sd, R51x_I2C_DATA, value);
  2067. /* Initiate 3-byte write cycle */
  2068. reg_w(sd, R511_I2C_CTL, 0x01);
  2069. do {
  2070. rc = reg_r(sd, R511_I2C_CTL);
  2071. } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
  2072. if (rc < 0)
  2073. return;
  2074. if ((rc & 2) == 0) /* Ack? */
  2075. break;
  2076. if (--retries < 0) {
  2077. PDEBUG(D_USBO, "i2c write retries exhausted");
  2078. return;
  2079. }
  2080. }
  2081. }
  2082. static int ov511_i2c_r(struct sd *sd, u8 reg)
  2083. {
  2084. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2085. int rc, value, retries;
  2086. /* Two byte write cycle */
  2087. for (retries = 6; ; ) {
  2088. /* Select camera register */
  2089. reg_w(sd, R51x_I2C_SADDR_2, reg);
  2090. /* Initiate 2-byte write cycle */
  2091. reg_w(sd, R511_I2C_CTL, 0x03);
  2092. do {
  2093. rc = reg_r(sd, R511_I2C_CTL);
  2094. } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
  2095. if (rc < 0)
  2096. return rc;
  2097. if ((rc & 2) == 0) /* Ack? */
  2098. break;
  2099. /* I2C abort */
  2100. reg_w(sd, R511_I2C_CTL, 0x10);
  2101. if (--retries < 0) {
  2102. PDEBUG(D_USBI, "i2c write retries exhausted");
  2103. return -1;
  2104. }
  2105. }
  2106. /* Two byte read cycle */
  2107. for (retries = 6; ; ) {
  2108. /* Initiate 2-byte read cycle */
  2109. reg_w(sd, R511_I2C_CTL, 0x05);
  2110. do {
  2111. rc = reg_r(sd, R511_I2C_CTL);
  2112. } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
  2113. if (rc < 0)
  2114. return rc;
  2115. if ((rc & 2) == 0) /* Ack? */
  2116. break;
  2117. /* I2C abort */
  2118. reg_w(sd, R511_I2C_CTL, 0x10);
  2119. if (--retries < 0) {
  2120. PDEBUG(D_USBI, "i2c read retries exhausted");
  2121. return -1;
  2122. }
  2123. }
  2124. value = reg_r(sd, R51x_I2C_DATA);
  2125. PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
  2126. /* This is needed to make i2c_w() work */
  2127. reg_w(sd, R511_I2C_CTL, 0x05);
  2128. return value;
  2129. }
  2130. /*
  2131. * The OV518 I2C I/O procedure is different, hence, this function.
  2132. * This is normally only called from i2c_w(). Note that this function
  2133. * always succeeds regardless of whether the sensor is present and working.
  2134. */
  2135. static void ov518_i2c_w(struct sd *sd,
  2136. u8 reg,
  2137. u8 value)
  2138. {
  2139. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2140. PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
  2141. /* Select camera register */
  2142. reg_w(sd, R51x_I2C_SADDR_3, reg);
  2143. /* Write "value" to I2C data port of OV511 */
  2144. reg_w(sd, R51x_I2C_DATA, value);
  2145. /* Initiate 3-byte write cycle */
  2146. reg_w(sd, R518_I2C_CTL, 0x01);
  2147. /* wait for write complete */
  2148. msleep(4);
  2149. reg_r8(sd, R518_I2C_CTL);
  2150. }
  2151. /*
  2152. * returns: negative is error, pos or zero is data
  2153. *
  2154. * The OV518 I2C I/O procedure is different, hence, this function.
  2155. * This is normally only called from i2c_r(). Note that this function
  2156. * always succeeds regardless of whether the sensor is present and working.
  2157. */
  2158. static int ov518_i2c_r(struct sd *sd, u8 reg)
  2159. {
  2160. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2161. int value;
  2162. /* Select camera register */
  2163. reg_w(sd, R51x_I2C_SADDR_2, reg);
  2164. /* Initiate 2-byte write cycle */
  2165. reg_w(sd, R518_I2C_CTL, 0x03);
  2166. reg_r8(sd, R518_I2C_CTL);
  2167. /* Initiate 2-byte read cycle */
  2168. reg_w(sd, R518_I2C_CTL, 0x05);
  2169. reg_r8(sd, R518_I2C_CTL);
  2170. value = reg_r(sd, R51x_I2C_DATA);
  2171. PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
  2172. return value;
  2173. }
  2174. static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
  2175. {
  2176. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2177. int ret;
  2178. if (sd->gspca_dev.usb_err < 0)
  2179. return;
  2180. ret = usb_control_msg(sd->gspca_dev.dev,
  2181. usb_sndctrlpipe(sd->gspca_dev.dev, 0),
  2182. 0x02,
  2183. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  2184. (u16) value, (u16) reg, NULL, 0, 500);
  2185. if (ret < 0) {
  2186. PERR("ovfx2_i2c_w %02x failed %d\n", reg, ret);
  2187. sd->gspca_dev.usb_err = ret;
  2188. }
  2189. PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
  2190. }
  2191. static int ovfx2_i2c_r(struct sd *sd, u8 reg)
  2192. {
  2193. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2194. int ret;
  2195. if (sd->gspca_dev.usb_err < 0)
  2196. return -1;
  2197. ret = usb_control_msg(sd->gspca_dev.dev,
  2198. usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
  2199. 0x03,
  2200. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  2201. 0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
  2202. if (ret >= 0) {
  2203. ret = sd->gspca_dev.usb_buf[0];
  2204. PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
  2205. } else {
  2206. PERR("ovfx2_i2c_r %02x failed %d\n", reg, ret);
  2207. sd->gspca_dev.usb_err = ret;
  2208. }
  2209. return ret;
  2210. }
  2211. static void i2c_w(struct sd *sd, u8 reg, u8 value)
  2212. {
  2213. if (sd->sensor_reg_cache[reg] == value)
  2214. return;
  2215. switch (sd->bridge) {
  2216. case BRIDGE_OV511:
  2217. case BRIDGE_OV511PLUS:
  2218. ov511_i2c_w(sd, reg, value);
  2219. break;
  2220. case BRIDGE_OV518:
  2221. case BRIDGE_OV518PLUS:
  2222. case BRIDGE_OV519:
  2223. ov518_i2c_w(sd, reg, value);
  2224. break;
  2225. case BRIDGE_OVFX2:
  2226. ovfx2_i2c_w(sd, reg, value);
  2227. break;
  2228. case BRIDGE_W9968CF:
  2229. w9968cf_i2c_w(sd, reg, value);
  2230. break;
  2231. }
  2232. if (sd->gspca_dev.usb_err >= 0) {
  2233. /* Up on sensor reset empty the register cache */
  2234. if (reg == 0x12 && (value & 0x80))
  2235. memset(sd->sensor_reg_cache, -1,
  2236. sizeof(sd->sensor_reg_cache));
  2237. else
  2238. sd->sensor_reg_cache[reg] = value;
  2239. }
  2240. }
  2241. static int i2c_r(struct sd *sd, u8 reg)
  2242. {
  2243. int ret = -1;
  2244. if (sd->sensor_reg_cache[reg] != -1)
  2245. return sd->sensor_reg_cache[reg];
  2246. switch (sd->bridge) {
  2247. case BRIDGE_OV511:
  2248. case BRIDGE_OV511PLUS:
  2249. ret = ov511_i2c_r(sd, reg);
  2250. break;
  2251. case BRIDGE_OV518:
  2252. case BRIDGE_OV518PLUS:
  2253. case BRIDGE_OV519:
  2254. ret = ov518_i2c_r(sd, reg);
  2255. break;
  2256. case BRIDGE_OVFX2:
  2257. ret = ovfx2_i2c_r(sd, reg);
  2258. break;
  2259. case BRIDGE_W9968CF:
  2260. ret = w9968cf_i2c_r(sd, reg);
  2261. break;
  2262. }
  2263. if (ret >= 0)
  2264. sd->sensor_reg_cache[reg] = ret;
  2265. return ret;
  2266. }
  2267. /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
  2268. * the same position as 1's in "mask" are cleared and set to "value". Bits
  2269. * that are in the same position as 0's in "mask" are preserved, regardless
  2270. * of their respective state in "value".
  2271. */
  2272. static void i2c_w_mask(struct sd *sd,
  2273. u8 reg,
  2274. u8 value,
  2275. u8 mask)
  2276. {
  2277. int rc;
  2278. u8 oldval;
  2279. value &= mask; /* Enforce mask on value */
  2280. rc = i2c_r(sd, reg);
  2281. if (rc < 0)
  2282. return;
  2283. oldval = rc & ~mask; /* Clear the masked bits */
  2284. value |= oldval; /* Set the desired bits */
  2285. i2c_w(sd, reg, value);
  2286. }
  2287. /* Temporarily stops OV511 from functioning. Must do this before changing
  2288. * registers while the camera is streaming */
  2289. static inline void ov51x_stop(struct sd *sd)
  2290. {
  2291. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2292. PDEBUG(D_STREAM, "stopping");
  2293. sd->stopped = 1;
  2294. switch (sd->bridge) {
  2295. case BRIDGE_OV511:
  2296. case BRIDGE_OV511PLUS:
  2297. reg_w(sd, R51x_SYS_RESET, 0x3d);
  2298. break;
  2299. case BRIDGE_OV518:
  2300. case BRIDGE_OV518PLUS:
  2301. reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
  2302. break;
  2303. case BRIDGE_OV519:
  2304. reg_w(sd, OV519_R51_RESET1, 0x0f);
  2305. reg_w(sd, OV519_R51_RESET1, 0x00);
  2306. reg_w(sd, 0x22, 0x00); /* FRAR */
  2307. break;
  2308. case BRIDGE_OVFX2:
  2309. reg_w_mask(sd, 0x0f, 0x00, 0x02);
  2310. break;
  2311. case BRIDGE_W9968CF:
  2312. reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
  2313. break;
  2314. }
  2315. }
  2316. /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
  2317. * actually stopped (for performance). */
  2318. static inline void ov51x_restart(struct sd *sd)
  2319. {
  2320. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2321. PDEBUG(D_STREAM, "restarting");
  2322. if (!sd->stopped)
  2323. return;
  2324. sd->stopped = 0;
  2325. /* Reinitialize the stream */
  2326. switch (sd->bridge) {
  2327. case BRIDGE_OV511:
  2328. case BRIDGE_OV511PLUS:
  2329. reg_w(sd, R51x_SYS_RESET, 0x00);
  2330. break;
  2331. case BRIDGE_OV518:
  2332. case BRIDGE_OV518PLUS:
  2333. reg_w(sd, 0x2f, 0x80);
  2334. reg_w(sd, R51x_SYS_RESET, 0x00);
  2335. break;
  2336. case BRIDGE_OV519:
  2337. reg_w(sd, OV519_R51_RESET1, 0x0f);
  2338. reg_w(sd, OV519_R51_RESET1, 0x00);
  2339. reg_w(sd, 0x22, 0x1d); /* FRAR */
  2340. break;
  2341. case BRIDGE_OVFX2:
  2342. reg_w_mask(sd, 0x0f, 0x02, 0x02);
  2343. break;
  2344. case BRIDGE_W9968CF:
  2345. reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
  2346. break;
  2347. }
  2348. }
  2349. static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
  2350. /* This does an initial reset of an OmniVision sensor and ensures that I2C
  2351. * is synchronized. Returns <0 on failure.
  2352. */
  2353. static int init_ov_sensor(struct sd *sd, u8 slave)
  2354. {
  2355. int i;
  2356. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2357. ov51x_set_slave_ids(sd, slave);
  2358. /* Reset the sensor */
  2359. i2c_w(sd, 0x12, 0x80);
  2360. /* Wait for it to initialize */
  2361. msleep(150);
  2362. for (i = 0; i < i2c_detect_tries; i++) {
  2363. if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
  2364. i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
  2365. PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
  2366. return 0;
  2367. }
  2368. /* Reset the sensor */
  2369. i2c_w(sd, 0x12, 0x80);
  2370. /* Wait for it to initialize */
  2371. msleep(150);
  2372. /* Dummy read to sync I2C */
  2373. if (i2c_r(sd, 0x00) < 0)
  2374. return -1;
  2375. }
  2376. return -1;
  2377. }
  2378. /* Set the read and write slave IDs. The "slave" argument is the write slave,
  2379. * and the read slave will be set to (slave + 1).
  2380. * This should not be called from outside the i2c I/O functions.
  2381. * Sets I2C read and write slave IDs. Returns <0 for error
  2382. */
  2383. static void ov51x_set_slave_ids(struct sd *sd,
  2384. u8 slave)
  2385. {
  2386. switch (sd->bridge) {
  2387. case BRIDGE_OVFX2:
  2388. reg_w(sd, OVFX2_I2C_ADDR, slave);
  2389. return;
  2390. case BRIDGE_W9968CF:
  2391. sd->sensor_addr = slave;
  2392. return;
  2393. }
  2394. reg_w(sd, R51x_I2C_W_SID, slave);
  2395. reg_w(sd, R51x_I2C_R_SID, slave + 1);
  2396. }
  2397. static void write_regvals(struct sd *sd,
  2398. const struct ov_regvals *regvals,
  2399. int n)
  2400. {
  2401. while (--n >= 0) {
  2402. reg_w(sd, regvals->reg, regvals->val);
  2403. regvals++;
  2404. }
  2405. }
  2406. static void write_i2c_regvals(struct sd *sd,
  2407. const struct ov_i2c_regvals *regvals,
  2408. int n)
  2409. {
  2410. while (--n >= 0) {
  2411. i2c_w(sd, regvals->reg, regvals->val);
  2412. regvals++;
  2413. }
  2414. }
  2415. /****************************************************************************
  2416. *
  2417. * OV511 and sensor configuration
  2418. *
  2419. ***************************************************************************/
  2420. /* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
  2421. static void ov_hires_configure(struct sd *sd)
  2422. {
  2423. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2424. int high, low;
  2425. if (sd->bridge != BRIDGE_OVFX2) {
  2426. PERR("error hires sensors only supported with ovfx2\n");
  2427. return;
  2428. }
  2429. PDEBUG(D_PROBE, "starting ov hires configuration");
  2430. /* Detect sensor (sub)type */
  2431. high = i2c_r(sd, 0x0a);
  2432. low = i2c_r(sd, 0x0b);
  2433. /* info("%x, %x", high, low); */
  2434. switch (high) {
  2435. case 0x96:
  2436. switch (low) {
  2437. case 0x40:
  2438. PDEBUG(D_PROBE, "Sensor is a OV2610");
  2439. sd->sensor = SEN_OV2610;
  2440. return;
  2441. case 0x41:
  2442. PDEBUG(D_PROBE, "Sensor is a OV2610AE");
  2443. sd->sensor = SEN_OV2610AE;
  2444. return;
  2445. case 0xb1:
  2446. PDEBUG(D_PROBE, "Sensor is a OV9600");
  2447. sd->sensor = SEN_OV9600;
  2448. return;
  2449. }
  2450. break;
  2451. case 0x36:
  2452. if ((low & 0x0f) == 0x00) {
  2453. PDEBUG(D_PROBE, "Sensor is a OV3610");
  2454. sd->sensor = SEN_OV3610;
  2455. return;
  2456. }
  2457. break;
  2458. }
  2459. PERR("Error unknown sensor type: %02x%02x\n", high, low);
  2460. }
  2461. /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
  2462. * the same register settings as the OV8610, since they are very similar.
  2463. */
  2464. static void ov8xx0_configure(struct sd *sd)
  2465. {
  2466. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2467. int rc;
  2468. PDEBUG(D_PROBE, "starting ov8xx0 configuration");
  2469. /* Detect sensor (sub)type */
  2470. rc = i2c_r(sd, OV7610_REG_COM_I);
  2471. if (rc < 0) {
  2472. PERR("Error detecting sensor type");
  2473. return;
  2474. }
  2475. if ((rc & 3) == 1)
  2476. sd->sensor = SEN_OV8610;
  2477. else
  2478. PERR("Unknown image sensor version: %d\n", rc & 3);
  2479. }
  2480. /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
  2481. * the same register settings as the OV7610, since they are very similar.
  2482. */
  2483. static void ov7xx0_configure(struct sd *sd)
  2484. {
  2485. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2486. int rc, high, low;
  2487. PDEBUG(D_PROBE, "starting OV7xx0 configuration");
  2488. /* Detect sensor (sub)type */
  2489. rc = i2c_r(sd, OV7610_REG_COM_I);
  2490. /* add OV7670 here
  2491. * it appears to be wrongly detected as a 7610 by default */
  2492. if (rc < 0) {
  2493. PERR("Error detecting sensor type\n");
  2494. return;
  2495. }
  2496. if ((rc & 3) == 3) {
  2497. /* quick hack to make OV7670s work */
  2498. high = i2c_r(sd, 0x0a);
  2499. low = i2c_r(sd, 0x0b);
  2500. /* info("%x, %x", high, low); */
  2501. if (high == 0x76 && (low & 0xf0) == 0x70) {
  2502. PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
  2503. sd->sensor = SEN_OV7670;
  2504. } else {
  2505. PDEBUG(D_PROBE, "Sensor is an OV7610");
  2506. sd->sensor = SEN_OV7610;
  2507. }
  2508. } else if ((rc & 3) == 1) {
  2509. /* I don't know what's different about the 76BE yet. */
  2510. if (i2c_r(sd, 0x15) & 1) {
  2511. PDEBUG(D_PROBE, "Sensor is an OV7620AE");
  2512. sd->sensor = SEN_OV7620AE;
  2513. } else {
  2514. PDEBUG(D_PROBE, "Sensor is an OV76BE");
  2515. sd->sensor = SEN_OV76BE;
  2516. }
  2517. } else if ((rc & 3) == 0) {
  2518. /* try to read product id registers */
  2519. high = i2c_r(sd, 0x0a);
  2520. if (high < 0) {
  2521. PERR("Error detecting camera chip PID\n");
  2522. return;
  2523. }
  2524. low = i2c_r(sd, 0x0b);
  2525. if (low < 0) {
  2526. PERR("Error detecting camera chip VER\n");
  2527. return;
  2528. }
  2529. if (high == 0x76) {
  2530. switch (low) {
  2531. case 0x30:
  2532. PERR("Sensor is an OV7630/OV7635\n");
  2533. PERR("7630 is not supported by this driver\n");
  2534. return;
  2535. case 0x40:
  2536. PDEBUG(D_PROBE, "Sensor is an OV7645");
  2537. sd->sensor = SEN_OV7640; /* FIXME */
  2538. break;
  2539. case 0x45:
  2540. PDEBUG(D_PROBE, "Sensor is an OV7645B");
  2541. sd->sensor = SEN_OV7640; /* FIXME */
  2542. break;
  2543. case 0x48:
  2544. PDEBUG(D_PROBE, "Sensor is an OV7648");
  2545. sd->sensor = SEN_OV7648;
  2546. break;
  2547. case 0x60:
  2548. PDEBUG(D_PROBE, "Sensor is a OV7660");
  2549. sd->sensor = SEN_OV7660;
  2550. break;
  2551. default:
  2552. PERR("Unknown sensor: 0x76%02x\n", low);
  2553. return;
  2554. }
  2555. } else {
  2556. PDEBUG(D_PROBE, "Sensor is an OV7620");
  2557. sd->sensor = SEN_OV7620;
  2558. }
  2559. } else {
  2560. PERR("Unknown image sensor version: %d\n", rc & 3);
  2561. }
  2562. }
  2563. /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
  2564. static void ov6xx0_configure(struct sd *sd)
  2565. {
  2566. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2567. int rc;
  2568. PDEBUG(D_PROBE, "starting OV6xx0 configuration");
  2569. /* Detect sensor (sub)type */
  2570. rc = i2c_r(sd, OV7610_REG_COM_I);
  2571. if (rc < 0) {
  2572. PERR("Error detecting sensor type\n");
  2573. return;
  2574. }
  2575. /* Ugh. The first two bits are the version bits, but
  2576. * the entire register value must be used. I guess OVT
  2577. * underestimated how many variants they would make. */
  2578. switch (rc) {
  2579. case 0x00:
  2580. sd->sensor = SEN_OV6630;
  2581. pr_warn("WARNING: Sensor is an OV66308. Your camera may have been misdetected in previous driver versions.\n");
  2582. break;
  2583. case 0x01:
  2584. sd->sensor = SEN_OV6620;
  2585. PDEBUG(D_PROBE, "Sensor is an OV6620");
  2586. break;
  2587. case 0x02:
  2588. sd->sensor = SEN_OV6630;
  2589. PDEBUG(D_PROBE, "Sensor is an OV66308AE");
  2590. break;
  2591. case 0x03:
  2592. sd->sensor = SEN_OV66308AF;
  2593. PDEBUG(D_PROBE, "Sensor is an OV66308AF");
  2594. break;
  2595. case 0x90:
  2596. sd->sensor = SEN_OV6630;
  2597. pr_warn("WARNING: Sensor is an OV66307. Your camera may have been misdetected in previous driver versions.\n");
  2598. break;
  2599. default:
  2600. PERR("FATAL: Unknown sensor version: 0x%02x\n", rc);
  2601. return;
  2602. }
  2603. /* Set sensor-specific vars */
  2604. sd->sif = 1;
  2605. }
  2606. /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
  2607. static void ov51x_led_control(struct sd *sd, int on)
  2608. {
  2609. if (sd->invert_led)
  2610. on = !on;
  2611. switch (sd->bridge) {
  2612. /* OV511 has no LED control */
  2613. case BRIDGE_OV511PLUS:
  2614. reg_w(sd, R511_SYS_LED_CTL, on);
  2615. break;
  2616. case BRIDGE_OV518:
  2617. case BRIDGE_OV518PLUS:
  2618. reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
  2619. break;
  2620. case BRIDGE_OV519:
  2621. reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
  2622. break;
  2623. }
  2624. }
  2625. static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
  2626. {
  2627. struct sd *sd = (struct sd *) gspca_dev;
  2628. if (!sd->snapshot_needs_reset)
  2629. return;
  2630. /* Note it is important that we clear sd->snapshot_needs_reset,
  2631. before actually clearing the snapshot state in the bridge
  2632. otherwise we might race with the pkt_scan interrupt handler */
  2633. sd->snapshot_needs_reset = 0;
  2634. switch (sd->bridge) {
  2635. case BRIDGE_OV511:
  2636. case BRIDGE_OV511PLUS:
  2637. reg_w(sd, R51x_SYS_SNAP, 0x02);
  2638. reg_w(sd, R51x_SYS_SNAP, 0x00);
  2639. break;
  2640. case BRIDGE_OV518:
  2641. case BRIDGE_OV518PLUS:
  2642. reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
  2643. reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
  2644. break;
  2645. case BRIDGE_OV519:
  2646. reg_w(sd, R51x_SYS_RESET, 0x40);
  2647. reg_w(sd, R51x_SYS_RESET, 0x00);
  2648. break;
  2649. }
  2650. }
  2651. static void ov51x_upload_quan_tables(struct sd *sd)
  2652. {
  2653. const unsigned char yQuanTable511[] = {
  2654. 0, 1, 1, 2, 2, 3, 3, 4,
  2655. 1, 1, 1, 2, 2, 3, 4, 4,
  2656. 1, 1, 2, 2, 3, 4, 4, 4,
  2657. 2, 2, 2, 3, 4, 4, 4, 4,
  2658. 2, 2, 3, 4, 4, 5, 5, 5,
  2659. 3, 3, 4, 4, 5, 5, 5, 5,
  2660. 3, 4, 4, 4, 5, 5, 5, 5,
  2661. 4, 4, 4, 4, 5, 5, 5, 5
  2662. };
  2663. const unsigned char uvQuanTable511[] = {
  2664. 0, 2, 2, 3, 4, 4, 4, 4,
  2665. 2, 2, 2, 4, 4, 4, 4, 4,
  2666. 2, 2, 3, 4, 4, 4, 4, 4,
  2667. 3, 4, 4, 4, 4, 4, 4, 4,
  2668. 4, 4, 4, 4, 4, 4, 4, 4,
  2669. 4, 4, 4, 4, 4, 4, 4, 4,
  2670. 4, 4, 4, 4, 4, 4, 4, 4,
  2671. 4, 4, 4, 4, 4, 4, 4, 4
  2672. };
  2673. /* OV518 quantization tables are 8x4 (instead of 8x8) */
  2674. const unsigned char yQuanTable518[] = {
  2675. 5, 4, 5, 6, 6, 7, 7, 7,
  2676. 5, 5, 5, 5, 6, 7, 7, 7,
  2677. 6, 6, 6, 6, 7, 7, 7, 8,
  2678. 7, 7, 6, 7, 7, 7, 8, 8
  2679. };
  2680. const unsigned char uvQuanTable518[] = {
  2681. 6, 6, 6, 7, 7, 7, 7, 7,
  2682. 6, 6, 6, 7, 7, 7, 7, 7,
  2683. 6, 6, 6, 7, 7, 7, 7, 8,
  2684. 7, 7, 7, 7, 7, 7, 8, 8
  2685. };
  2686. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  2687. const unsigned char *pYTable, *pUVTable;
  2688. unsigned char val0, val1;
  2689. int i, size, reg = R51x_COMP_LUT_BEGIN;
  2690. PDEBUG(D_PROBE, "Uploading quantization tables");
  2691. if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
  2692. pYTable = yQuanTable511;
  2693. pUVTable = uvQuanTable511;
  2694. size = 32;
  2695. } else {
  2696. pYTable = yQuanTable518;
  2697. pUVTable = uvQuanTable518;
  2698. size = 16;
  2699. }
  2700. for (i = 0; i < size; i++) {
  2701. val0 = *pYTable++;
  2702. val1 = *pYTable++;
  2703. val0 &= 0x0f;
  2704. val1 &= 0x0f;
  2705. val0 |= val1 << 4;
  2706. reg_w(sd, reg, val0);
  2707. val0 = *pUVTable++;
  2708. val1 = *pUVTable++;
  2709. val0 &= 0x0f;
  2710. val1 &= 0x0f;
  2711. val0 |= val1 << 4;
  2712. reg_w(sd, reg + size, val0);
  2713. reg++;
  2714. }
  2715. }
  2716. /* This initializes the OV511/OV511+ and the sensor */
  2717. static void ov511_configure(struct gspca_dev *gspca_dev)
  2718. {
  2719. struct sd *sd = (struct sd *) gspca_dev;
  2720. /* For 511 and 511+ */
  2721. const struct ov_regvals init_511[] = {
  2722. { R51x_SYS_RESET, 0x7f },
  2723. { R51x_SYS_INIT, 0x01 },
  2724. { R51x_SYS_RESET, 0x7f },
  2725. { R51x_SYS_INIT, 0x01 },
  2726. { R51x_SYS_RESET, 0x3f },
  2727. { R51x_SYS_INIT, 0x01 },
  2728. { R51x_SYS_RESET, 0x3d },
  2729. };
  2730. const struct ov_regvals norm_511[] = {
  2731. { R511_DRAM_FLOW_CTL, 0x01 },
  2732. { R51x_SYS_SNAP, 0x00 },
  2733. { R51x_SYS_SNAP, 0x02 },
  2734. { R51x_SYS_SNAP, 0x00 },
  2735. { R511_FIFO_OPTS, 0x1f },
  2736. { R511_COMP_EN, 0x00 },
  2737. { R511_COMP_LUT_EN, 0x03 },
  2738. };
  2739. const struct ov_regvals norm_511_p[] = {
  2740. { R511_DRAM_FLOW_CTL, 0xff },
  2741. { R51x_SYS_SNAP, 0x00 },
  2742. { R51x_SYS_SNAP, 0x02 },
  2743. { R51x_SYS_SNAP, 0x00 },
  2744. { R511_FIFO_OPTS, 0xff },
  2745. { R511_COMP_EN, 0x00 },
  2746. { R511_COMP_LUT_EN, 0x03 },
  2747. };
  2748. const struct ov_regvals compress_511[] = {
  2749. { 0x70, 0x1f },
  2750. { 0x71, 0x05 },
  2751. { 0x72, 0x06 },
  2752. { 0x73, 0x06 },
  2753. { 0x74, 0x14 },
  2754. { 0x75, 0x03 },
  2755. { 0x76, 0x04 },
  2756. { 0x77, 0x04 },
  2757. };
  2758. PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
  2759. write_regvals(sd, init_511, ARRAY_SIZE(init_511));
  2760. switch (sd->bridge) {
  2761. case BRIDGE_OV511:
  2762. write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
  2763. break;
  2764. case BRIDGE_OV511PLUS:
  2765. write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
  2766. break;
  2767. }
  2768. /* Init compression */
  2769. write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
  2770. ov51x_upload_quan_tables(sd);
  2771. }
  2772. /* This initializes the OV518/OV518+ and the sensor */
  2773. static void ov518_configure(struct gspca_dev *gspca_dev)
  2774. {
  2775. struct sd *sd = (struct sd *) gspca_dev;
  2776. /* For 518 and 518+ */
  2777. const struct ov_regvals init_518[] = {
  2778. { R51x_SYS_RESET, 0x40 },
  2779. { R51x_SYS_INIT, 0xe1 },
  2780. { R51x_SYS_RESET, 0x3e },
  2781. { R51x_SYS_INIT, 0xe1 },
  2782. { R51x_SYS_RESET, 0x00 },
  2783. { R51x_SYS_INIT, 0xe1 },
  2784. { 0x46, 0x00 },
  2785. { 0x5d, 0x03 },
  2786. };
  2787. const struct ov_regvals norm_518[] = {
  2788. { R51x_SYS_SNAP, 0x02 }, /* Reset */
  2789. { R51x_SYS_SNAP, 0x01 }, /* Enable */
  2790. { 0x31, 0x0f },
  2791. { 0x5d, 0x03 },
  2792. { 0x24, 0x9f },
  2793. { 0x25, 0x90 },
  2794. { 0x20, 0x00 },
  2795. { 0x51, 0x04 },
  2796. { 0x71, 0x19 },
  2797. { 0x2f, 0x80 },
  2798. };
  2799. const struct ov_regvals norm_518_p[] = {
  2800. { R51x_SYS_SNAP, 0x02 }, /* Reset */
  2801. { R51x_SYS_SNAP, 0x01 }, /* Enable */
  2802. { 0x31, 0x0f },
  2803. { 0x5d, 0x03 },
  2804. { 0x24, 0x9f },
  2805. { 0x25, 0x90 },
  2806. { 0x20, 0x60 },
  2807. { 0x51, 0x02 },
  2808. { 0x71, 0x19 },
  2809. { 0x40, 0xff },
  2810. { 0x41, 0x42 },
  2811. { 0x46, 0x00 },
  2812. { 0x33, 0x04 },
  2813. { 0x21, 0x19 },
  2814. { 0x3f, 0x10 },
  2815. { 0x2f, 0x80 },
  2816. };
  2817. /* First 5 bits of custom ID reg are a revision ID on OV518 */
  2818. sd->revision = reg_r(sd, R51x_SYS_CUST_ID) & 0x1f;
  2819. PDEBUG(D_PROBE, "Device revision %d", sd->revision);
  2820. write_regvals(sd, init_518, ARRAY_SIZE(init_518));
  2821. /* Set LED GPIO pin to output mode */
  2822. reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
  2823. switch (sd->bridge) {
  2824. case BRIDGE_OV518:
  2825. write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
  2826. break;
  2827. case BRIDGE_OV518PLUS:
  2828. write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
  2829. break;
  2830. }
  2831. ov51x_upload_quan_tables(sd);
  2832. reg_w(sd, 0x2f, 0x80);
  2833. }
  2834. static void ov519_configure(struct sd *sd)
  2835. {
  2836. static const struct ov_regvals init_519[] = {
  2837. { 0x5a, 0x6d }, /* EnableSystem */
  2838. { 0x53, 0x9b }, /* don't enable the microcontroller */
  2839. { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
  2840. { 0x5d, 0x03 },
  2841. { 0x49, 0x01 },
  2842. { 0x48, 0x00 },
  2843. /* Set LED pin to output mode. Bit 4 must be cleared or sensor
  2844. * detection will fail. This deserves further investigation. */
  2845. { OV519_GPIO_IO_CTRL0, 0xee },
  2846. { OV519_R51_RESET1, 0x0f },
  2847. { OV519_R51_RESET1, 0x00 },
  2848. { 0x22, 0x00 },
  2849. /* windows reads 0x55 at this point*/
  2850. };
  2851. write_regvals(sd, init_519, ARRAY_SIZE(init_519));
  2852. }
  2853. static void ovfx2_configure(struct sd *sd)
  2854. {
  2855. static const struct ov_regvals init_fx2[] = {
  2856. { 0x00, 0x60 },
  2857. { 0x02, 0x01 },
  2858. { 0x0f, 0x1d },
  2859. { 0xe9, 0x82 },
  2860. { 0xea, 0xc7 },
  2861. { 0xeb, 0x10 },
  2862. { 0xec, 0xf6 },
  2863. };
  2864. sd->stopped = 1;
  2865. write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
  2866. }
  2867. /* set the mode */
  2868. /* This function works for ov7660 only */
  2869. static void ov519_set_mode(struct sd *sd)
  2870. {
  2871. static const struct ov_regvals bridge_ov7660[2][10] = {
  2872. {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
  2873. {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
  2874. {0x25, 0x01}, {0x26, 0x00}},
  2875. {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
  2876. {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
  2877. {0x25, 0x03}, {0x26, 0x00}}
  2878. };
  2879. static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
  2880. {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
  2881. {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
  2882. };
  2883. static const struct ov_i2c_regvals sensor_ov7660_2[] = {
  2884. {OV7670_R17_HSTART, 0x13},
  2885. {OV7670_R18_HSTOP, 0x01},
  2886. {OV7670_R32_HREF, 0x92},
  2887. {OV7670_R19_VSTART, 0x02},
  2888. {OV7670_R1A_VSTOP, 0x7a},
  2889. {OV7670_R03_VREF, 0x00},
  2890. /* {0x33, 0x00}, */
  2891. /* {0x34, 0x07}, */
  2892. /* {0x36, 0x00}, */
  2893. /* {0x6b, 0x0a}, */
  2894. };
  2895. write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
  2896. ARRAY_SIZE(bridge_ov7660[0]));
  2897. write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
  2898. ARRAY_SIZE(sensor_ov7660[0]));
  2899. write_i2c_regvals(sd, sensor_ov7660_2,
  2900. ARRAY_SIZE(sensor_ov7660_2));
  2901. }
  2902. /* set the frame rate */
  2903. /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
  2904. static void ov519_set_fr(struct sd *sd)
  2905. {
  2906. int fr;
  2907. u8 clock;
  2908. /* frame rate table with indices:
  2909. * - mode = 0: 320x240, 1: 640x480
  2910. * - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
  2911. * - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
  2912. */
  2913. static const u8 fr_tb[2][6][3] = {
  2914. {{0x04, 0xff, 0x00},
  2915. {0x04, 0x1f, 0x00},
  2916. {0x04, 0x1b, 0x00},
  2917. {0x04, 0x15, 0x00},
  2918. {0x04, 0x09, 0x00},
  2919. {0x04, 0x01, 0x00}},
  2920. {{0x0c, 0xff, 0x00},
  2921. {0x0c, 0x1f, 0x00},
  2922. {0x0c, 0x1b, 0x00},
  2923. {0x04, 0xff, 0x01},
  2924. {0x04, 0x1f, 0x01},
  2925. {0x04, 0x1b, 0x01}},
  2926. };
  2927. if (frame_rate > 0)
  2928. sd->frame_rate = frame_rate;
  2929. if (sd->frame_rate >= 30)
  2930. fr = 0;
  2931. else if (sd->frame_rate >= 25)
  2932. fr = 1;
  2933. else if (sd->frame_rate >= 20)
  2934. fr = 2;
  2935. else if (sd->frame_rate >= 15)
  2936. fr = 3;
  2937. else if (sd->frame_rate >= 10)
  2938. fr = 4;
  2939. else
  2940. fr = 5;
  2941. reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
  2942. reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
  2943. clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
  2944. if (sd->sensor == SEN_OV7660)
  2945. clock |= 0x80; /* enable double clock */
  2946. ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
  2947. }
  2948. static void setautogain(struct gspca_dev *gspca_dev, s32 val)
  2949. {
  2950. struct sd *sd = (struct sd *) gspca_dev;
  2951. i2c_w_mask(sd, 0x13, val ? 0x05 : 0x00, 0x05);
  2952. }
  2953. /* this function is called at probe time */
  2954. static int sd_config(struct gspca_dev *gspca_dev,
  2955. const struct usb_device_id *id)
  2956. {
  2957. struct sd *sd = (struct sd *) gspca_dev;
  2958. struct cam *cam = &gspca_dev->cam;
  2959. sd->bridge = id->driver_info & BRIDGE_MASK;
  2960. sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
  2961. switch (sd->bridge) {
  2962. case BRIDGE_OV511:
  2963. case BRIDGE_OV511PLUS:
  2964. cam->cam_mode = ov511_vga_mode;
  2965. cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
  2966. break;
  2967. case BRIDGE_OV518:
  2968. case BRIDGE_OV518PLUS:
  2969. cam->cam_mode = ov518_vga_mode;
  2970. cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
  2971. break;
  2972. case BRIDGE_OV519:
  2973. cam->cam_mode = ov519_vga_mode;
  2974. cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
  2975. break;
  2976. case BRIDGE_OVFX2:
  2977. cam->cam_mode = ov519_vga_mode;
  2978. cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
  2979. cam->bulk_size = OVFX2_BULK_SIZE;
  2980. cam->bulk_nurbs = MAX_NURBS;
  2981. cam->bulk = 1;
  2982. break;
  2983. case BRIDGE_W9968CF:
  2984. cam->cam_mode = w9968cf_vga_mode;
  2985. cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
  2986. break;
  2987. }
  2988. sd->frame_rate = 15;
  2989. return 0;
  2990. }
  2991. /* this function is called at probe and resume time */
  2992. static int sd_init(struct gspca_dev *gspca_dev)
  2993. {
  2994. struct sd *sd = (struct sd *) gspca_dev;
  2995. struct cam *cam = &gspca_dev->cam;
  2996. switch (sd->bridge) {
  2997. case BRIDGE_OV511:
  2998. case BRIDGE_OV511PLUS:
  2999. ov511_configure(gspca_dev);
  3000. break;
  3001. case BRIDGE_OV518:
  3002. case BRIDGE_OV518PLUS:
  3003. ov518_configure(gspca_dev);
  3004. break;
  3005. case BRIDGE_OV519:
  3006. ov519_configure(sd);
  3007. break;
  3008. case BRIDGE_OVFX2:
  3009. ovfx2_configure(sd);
  3010. break;
  3011. case BRIDGE_W9968CF:
  3012. w9968cf_configure(sd);
  3013. break;
  3014. }
  3015. /* The OV519 must be more aggressive about sensor detection since
  3016. * I2C write will never fail if the sensor is not present. We have
  3017. * to try to initialize the sensor to detect its presence */
  3018. sd->sensor = -1;
  3019. /* Test for 76xx */
  3020. if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
  3021. ov7xx0_configure(sd);
  3022. /* Test for 6xx0 */
  3023. } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
  3024. ov6xx0_configure(sd);
  3025. /* Test for 8xx0 */
  3026. } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
  3027. ov8xx0_configure(sd);
  3028. /* Test for 3xxx / 2xxx */
  3029. } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
  3030. ov_hires_configure(sd);
  3031. } else {
  3032. PERR("Can't determine sensor slave IDs\n");
  3033. goto error;
  3034. }
  3035. if (sd->sensor < 0)
  3036. goto error;
  3037. ov51x_led_control(sd, 0); /* turn LED off */
  3038. switch (sd->bridge) {
  3039. case BRIDGE_OV511:
  3040. case BRIDGE_OV511PLUS:
  3041. if (sd->sif) {
  3042. cam->cam_mode = ov511_sif_mode;
  3043. cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
  3044. }
  3045. break;
  3046. case BRIDGE_OV518:
  3047. case BRIDGE_OV518PLUS:
  3048. if (sd->sif) {
  3049. cam->cam_mode = ov518_sif_mode;
  3050. cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
  3051. }
  3052. break;
  3053. case BRIDGE_OV519:
  3054. if (sd->sif) {
  3055. cam->cam_mode = ov519_sif_mode;
  3056. cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
  3057. }
  3058. break;
  3059. case BRIDGE_OVFX2:
  3060. switch (sd->sensor) {
  3061. case SEN_OV2610:
  3062. case SEN_OV2610AE:
  3063. cam->cam_mode = ovfx2_ov2610_mode;
  3064. cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
  3065. break;
  3066. case SEN_OV3610:
  3067. cam->cam_mode = ovfx2_ov3610_mode;
  3068. cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
  3069. break;
  3070. case SEN_OV9600:
  3071. cam->cam_mode = ovfx2_ov9600_mode;
  3072. cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
  3073. break;
  3074. default:
  3075. if (sd->sif) {
  3076. cam->cam_mode = ov519_sif_mode;
  3077. cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
  3078. }
  3079. break;
  3080. }
  3081. break;
  3082. case BRIDGE_W9968CF:
  3083. if (sd->sif)
  3084. cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
  3085. /* w9968cf needs initialisation once the sensor is known */
  3086. w9968cf_init(sd);
  3087. break;
  3088. }
  3089. /* initialize the sensor */
  3090. switch (sd->sensor) {
  3091. case SEN_OV2610:
  3092. write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
  3093. /* Enable autogain, autoexpo, awb, bandfilter */
  3094. i2c_w_mask(sd, 0x13, 0x27, 0x27);
  3095. break;
  3096. case SEN_OV2610AE:
  3097. write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
  3098. /* enable autoexpo */
  3099. i2c_w_mask(sd, 0x13, 0x05, 0x05);
  3100. break;
  3101. case SEN_OV3610:
  3102. write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
  3103. /* Enable autogain, autoexpo, awb, bandfilter */
  3104. i2c_w_mask(sd, 0x13, 0x27, 0x27);
  3105. break;
  3106. case SEN_OV6620:
  3107. write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
  3108. break;
  3109. case SEN_OV6630:
  3110. case SEN_OV66308AF:
  3111. write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
  3112. break;
  3113. default:
  3114. /* case SEN_OV7610: */
  3115. /* case SEN_OV76BE: */
  3116. write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
  3117. i2c_w_mask(sd, 0x0e, 0x00, 0x40);
  3118. break;
  3119. case SEN_OV7620:
  3120. case SEN_OV7620AE:
  3121. write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
  3122. break;
  3123. case SEN_OV7640:
  3124. case SEN_OV7648:
  3125. write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
  3126. break;
  3127. case SEN_OV7660:
  3128. i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
  3129. msleep(14);
  3130. reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
  3131. write_regvals(sd, init_519_ov7660,
  3132. ARRAY_SIZE(init_519_ov7660));
  3133. write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
  3134. sd->gspca_dev.curr_mode = 1; /* 640x480 */
  3135. ov519_set_mode(sd);
  3136. ov519_set_fr(sd);
  3137. sd_reset_snapshot(gspca_dev);
  3138. ov51x_restart(sd);
  3139. ov51x_stop(sd); /* not in win traces */
  3140. ov51x_led_control(sd, 0);
  3141. break;
  3142. case SEN_OV7670:
  3143. write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
  3144. break;
  3145. case SEN_OV8610:
  3146. write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
  3147. break;
  3148. case SEN_OV9600:
  3149. write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
  3150. /* enable autoexpo */
  3151. /* i2c_w_mask(sd, 0x13, 0x05, 0x05); */
  3152. break;
  3153. }
  3154. return gspca_dev->usb_err;
  3155. error:
  3156. PERR("OV519 Config failed");
  3157. return -EINVAL;
  3158. }
  3159. /* function called at start time before URB creation */
  3160. static int sd_isoc_init(struct gspca_dev *gspca_dev)
  3161. {
  3162. struct sd *sd = (struct sd *) gspca_dev;
  3163. switch (sd->bridge) {
  3164. case BRIDGE_OVFX2:
  3165. if (gspca_dev->pixfmt.width != 800)
  3166. gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
  3167. else
  3168. gspca_dev->cam.bulk_size = 7 * 4096;
  3169. break;
  3170. }
  3171. return 0;
  3172. }
  3173. /* Set up the OV511/OV511+ with the given image parameters.
  3174. *
  3175. * Do not put any sensor-specific code in here (including I2C I/O functions)
  3176. */
  3177. static void ov511_mode_init_regs(struct sd *sd)
  3178. {
  3179. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  3180. int hsegs, vsegs, packet_size, fps, needed;
  3181. int interlaced = 0;
  3182. struct usb_host_interface *alt;
  3183. struct usb_interface *intf;
  3184. intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
  3185. alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
  3186. if (!alt) {
  3187. PERR("Couldn't get altsetting\n");
  3188. sd->gspca_dev.usb_err = -EIO;
  3189. return;
  3190. }
  3191. packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
  3192. reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
  3193. reg_w(sd, R511_CAM_UV_EN, 0x01);
  3194. reg_w(sd, R511_SNAP_UV_EN, 0x01);
  3195. reg_w(sd, R511_SNAP_OPTS, 0x03);
  3196. /* Here I'm assuming that snapshot size == image size.
  3197. * I hope that's always true. --claudio
  3198. */
  3199. hsegs = (sd->gspca_dev.pixfmt.width >> 3) - 1;
  3200. vsegs = (sd->gspca_dev.pixfmt.height >> 3) - 1;
  3201. reg_w(sd, R511_CAM_PXCNT, hsegs);
  3202. reg_w(sd, R511_CAM_LNCNT, vsegs);
  3203. reg_w(sd, R511_CAM_PXDIV, 0x00);
  3204. reg_w(sd, R511_CAM_LNDIV, 0x00);
  3205. /* YUV420, low pass filter on */
  3206. reg_w(sd, R511_CAM_OPTS, 0x03);
  3207. /* Snapshot additions */
  3208. reg_w(sd, R511_SNAP_PXCNT, hsegs);
  3209. reg_w(sd, R511_SNAP_LNCNT, vsegs);
  3210. reg_w(sd, R511_SNAP_PXDIV, 0x00);
  3211. reg_w(sd, R511_SNAP_LNDIV, 0x00);
  3212. /******** Set the framerate ********/
  3213. if (frame_rate > 0)
  3214. sd->frame_rate = frame_rate;
  3215. switch (sd->sensor) {
  3216. case SEN_OV6620:
  3217. /* No framerate control, doesn't like higher rates yet */
  3218. sd->clockdiv = 3;
  3219. break;
  3220. /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
  3221. for more sensors we need to do this for them too */
  3222. case SEN_OV7620:
  3223. case SEN_OV7620AE:
  3224. case SEN_OV7640:
  3225. case SEN_OV7648:
  3226. case SEN_OV76BE:
  3227. if (sd->gspca_dev.pixfmt.width == 320)
  3228. interlaced = 1;
  3229. /* Fall through */
  3230. case SEN_OV6630:
  3231. case SEN_OV7610:
  3232. case SEN_OV7670:
  3233. switch (sd->frame_rate) {
  3234. case 30:
  3235. case 25:
  3236. /* Not enough bandwidth to do 640x480 @ 30 fps */
  3237. if (sd->gspca_dev.pixfmt.width != 640) {
  3238. sd->clockdiv = 0;
  3239. break;
  3240. }
  3241. /* Fall through for 640x480 case */
  3242. default:
  3243. /* case 20: */
  3244. /* case 15: */
  3245. sd->clockdiv = 1;
  3246. break;
  3247. case 10:
  3248. sd->clockdiv = 2;
  3249. break;
  3250. case 5:
  3251. sd->clockdiv = 5;
  3252. break;
  3253. }
  3254. if (interlaced) {
  3255. sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
  3256. /* Higher then 10 does not work */
  3257. if (sd->clockdiv > 10)
  3258. sd->clockdiv = 10;
  3259. }
  3260. break;
  3261. case SEN_OV8610:
  3262. /* No framerate control ?? */
  3263. sd->clockdiv = 0;
  3264. break;
  3265. }
  3266. /* Check if we have enough bandwidth to disable compression */
  3267. fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
  3268. needed = fps * sd->gspca_dev.pixfmt.width *
  3269. sd->gspca_dev.pixfmt.height * 3 / 2;
  3270. /* 1000 isoc packets/sec */
  3271. if (needed > 1000 * packet_size) {
  3272. /* Enable Y and UV quantization and compression */
  3273. reg_w(sd, R511_COMP_EN, 0x07);
  3274. reg_w(sd, R511_COMP_LUT_EN, 0x03);
  3275. } else {
  3276. reg_w(sd, R511_COMP_EN, 0x06);
  3277. reg_w(sd, R511_COMP_LUT_EN, 0x00);
  3278. }
  3279. reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
  3280. reg_w(sd, R51x_SYS_RESET, 0);
  3281. }
  3282. /* Sets up the OV518/OV518+ with the given image parameters
  3283. *
  3284. * OV518 needs a completely different approach, until we can figure out what
  3285. * the individual registers do. Also, only 15 FPS is supported now.
  3286. *
  3287. * Do not put any sensor-specific code in here (including I2C I/O functions)
  3288. */
  3289. static void ov518_mode_init_regs(struct sd *sd)
  3290. {
  3291. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  3292. int hsegs, vsegs, packet_size;
  3293. struct usb_host_interface *alt;
  3294. struct usb_interface *intf;
  3295. intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
  3296. alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
  3297. if (!alt) {
  3298. PERR("Couldn't get altsetting\n");
  3299. sd->gspca_dev.usb_err = -EIO;
  3300. return;
  3301. }
  3302. packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
  3303. ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
  3304. /******** Set the mode ********/
  3305. reg_w(sd, 0x2b, 0);
  3306. reg_w(sd, 0x2c, 0);
  3307. reg_w(sd, 0x2d, 0);
  3308. reg_w(sd, 0x2e, 0);
  3309. reg_w(sd, 0x3b, 0);
  3310. reg_w(sd, 0x3c, 0);
  3311. reg_w(sd, 0x3d, 0);
  3312. reg_w(sd, 0x3e, 0);
  3313. if (sd->bridge == BRIDGE_OV518) {
  3314. /* Set 8-bit (YVYU) input format */
  3315. reg_w_mask(sd, 0x20, 0x08, 0x08);
  3316. /* Set 12-bit (4:2:0) output format */
  3317. reg_w_mask(sd, 0x28, 0x80, 0xf0);
  3318. reg_w_mask(sd, 0x38, 0x80, 0xf0);
  3319. } else {
  3320. reg_w(sd, 0x28, 0x80);
  3321. reg_w(sd, 0x38, 0x80);
  3322. }
  3323. hsegs = sd->gspca_dev.pixfmt.width / 16;
  3324. vsegs = sd->gspca_dev.pixfmt.height / 4;
  3325. reg_w(sd, 0x29, hsegs);
  3326. reg_w(sd, 0x2a, vsegs);
  3327. reg_w(sd, 0x39, hsegs);
  3328. reg_w(sd, 0x3a, vsegs);
  3329. /* Windows driver does this here; who knows why */
  3330. reg_w(sd, 0x2f, 0x80);
  3331. /******** Set the framerate ********/
  3332. if (sd->bridge == BRIDGE_OV518PLUS && sd->revision == 0 &&
  3333. sd->sensor == SEN_OV7620AE)
  3334. sd->clockdiv = 0;
  3335. else
  3336. sd->clockdiv = 1;
  3337. /* Mode independent, but framerate dependent, regs */
  3338. /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
  3339. reg_w(sd, 0x51, 0x04);
  3340. reg_w(sd, 0x22, 0x18);
  3341. reg_w(sd, 0x23, 0xff);
  3342. if (sd->bridge == BRIDGE_OV518PLUS) {
  3343. switch (sd->sensor) {
  3344. case SEN_OV7620AE:
  3345. /*
  3346. * HdG: 640x480 needs special handling on device
  3347. * revision 2, we check for device revison > 0 to
  3348. * avoid regressions, as we don't know the correct
  3349. * thing todo for revision 1.
  3350. *
  3351. * Also this likely means we don't need to
  3352. * differentiate between the OV7620 and OV7620AE,
  3353. * earlier testing hitting this same problem likely
  3354. * happened to be with revision < 2 cams using an
  3355. * OV7620 and revision 2 cams using an OV7620AE.
  3356. */
  3357. if (sd->revision > 0 &&
  3358. sd->gspca_dev.pixfmt.width == 640) {
  3359. reg_w(sd, 0x20, 0x60);
  3360. reg_w(sd, 0x21, 0x1f);
  3361. } else {
  3362. reg_w(sd, 0x20, 0x00);
  3363. reg_w(sd, 0x21, 0x19);
  3364. }
  3365. break;
  3366. case SEN_OV7620:
  3367. reg_w(sd, 0x20, 0x00);
  3368. reg_w(sd, 0x21, 0x19);
  3369. break;
  3370. default:
  3371. reg_w(sd, 0x21, 0x19);
  3372. }
  3373. } else
  3374. reg_w(sd, 0x71, 0x17); /* Compression-related? */
  3375. /* FIXME: Sensor-specific */
  3376. /* Bit 5 is what matters here. Of course, it is "reserved" */
  3377. i2c_w(sd, 0x54, 0x23);
  3378. reg_w(sd, 0x2f, 0x80);
  3379. if (sd->bridge == BRIDGE_OV518PLUS) {
  3380. reg_w(sd, 0x24, 0x94);
  3381. reg_w(sd, 0x25, 0x90);
  3382. ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
  3383. ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
  3384. ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
  3385. ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
  3386. ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
  3387. ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
  3388. ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
  3389. ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
  3390. ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
  3391. } else {
  3392. reg_w(sd, 0x24, 0x9f);
  3393. reg_w(sd, 0x25, 0x90);
  3394. ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
  3395. ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
  3396. ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
  3397. ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
  3398. ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
  3399. ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
  3400. ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
  3401. ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
  3402. ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
  3403. }
  3404. reg_w(sd, 0x2f, 0x80);
  3405. }
  3406. /* Sets up the OV519 with the given image parameters
  3407. *
  3408. * OV519 needs a completely different approach, until we can figure out what
  3409. * the individual registers do.
  3410. *
  3411. * Do not put any sensor-specific code in here (including I2C I/O functions)
  3412. */
  3413. static void ov519_mode_init_regs(struct sd *sd)
  3414. {
  3415. static const struct ov_regvals mode_init_519_ov7670[] = {
  3416. { 0x5d, 0x03 }, /* Turn off suspend mode */
  3417. { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
  3418. { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
  3419. { 0xa2, 0x20 }, /* a2-a5 are undocumented */
  3420. { 0xa3, 0x18 },
  3421. { 0xa4, 0x04 },
  3422. { 0xa5, 0x28 },
  3423. { 0x37, 0x00 }, /* SetUsbInit */
  3424. { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
  3425. /* Enable both fields, YUV Input, disable defect comp (why?) */
  3426. { 0x20, 0x0c },
  3427. { 0x21, 0x38 },
  3428. { 0x22, 0x1d },
  3429. { 0x17, 0x50 }, /* undocumented */
  3430. { 0x37, 0x00 }, /* undocumented */
  3431. { 0x40, 0xff }, /* I2C timeout counter */
  3432. { 0x46, 0x00 }, /* I2C clock prescaler */
  3433. { 0x59, 0x04 }, /* new from windrv 090403 */
  3434. { 0xff, 0x00 }, /* undocumented */
  3435. /* windows reads 0x55 at this point, why? */
  3436. };
  3437. static const struct ov_regvals mode_init_519[] = {
  3438. { 0x5d, 0x03 }, /* Turn off suspend mode */
  3439. { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
  3440. { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
  3441. { 0xa2, 0x20 }, /* a2-a5 are undocumented */
  3442. { 0xa3, 0x18 },
  3443. { 0xa4, 0x04 },
  3444. { 0xa5, 0x28 },
  3445. { 0x37, 0x00 }, /* SetUsbInit */
  3446. { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
  3447. /* Enable both fields, YUV Input, disable defect comp (why?) */
  3448. { 0x22, 0x1d },
  3449. { 0x17, 0x50 }, /* undocumented */
  3450. { 0x37, 0x00 }, /* undocumented */
  3451. { 0x40, 0xff }, /* I2C timeout counter */
  3452. { 0x46, 0x00 }, /* I2C clock prescaler */
  3453. { 0x59, 0x04 }, /* new from windrv 090403 */
  3454. { 0xff, 0x00 }, /* undocumented */
  3455. /* windows reads 0x55 at this point, why? */
  3456. };
  3457. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  3458. /******** Set the mode ********/
  3459. switch (sd->sensor) {
  3460. default:
  3461. write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
  3462. if (sd->sensor == SEN_OV7640 ||
  3463. sd->sensor == SEN_OV7648) {
  3464. /* Select 8-bit input mode */
  3465. reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
  3466. }
  3467. break;
  3468. case SEN_OV7660:
  3469. return; /* done by ov519_set_mode/fr() */
  3470. case SEN_OV7670:
  3471. write_regvals(sd, mode_init_519_ov7670,
  3472. ARRAY_SIZE(mode_init_519_ov7670));
  3473. break;
  3474. }
  3475. reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.pixfmt.width >> 4);
  3476. reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.pixfmt.height >> 3);
  3477. if (sd->sensor == SEN_OV7670 &&
  3478. sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
  3479. reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
  3480. else if (sd->sensor == SEN_OV7648 &&
  3481. sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
  3482. reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
  3483. else
  3484. reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
  3485. reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
  3486. reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
  3487. reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
  3488. reg_w(sd, OV519_R16_DIVIDER, 0x00);
  3489. reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
  3490. reg_w(sd, 0x26, 0x00); /* Undocumented */
  3491. /******** Set the framerate ********/
  3492. if (frame_rate > 0)
  3493. sd->frame_rate = frame_rate;
  3494. /* FIXME: These are only valid at the max resolution. */
  3495. sd->clockdiv = 0;
  3496. switch (sd->sensor) {
  3497. case SEN_OV7640:
  3498. case SEN_OV7648:
  3499. switch (sd->frame_rate) {
  3500. default:
  3501. /* case 30: */
  3502. reg_w(sd, 0xa4, 0x0c);
  3503. reg_w(sd, 0x23, 0xff);
  3504. break;
  3505. case 25:
  3506. reg_w(sd, 0xa4, 0x0c);
  3507. reg_w(sd, 0x23, 0x1f);
  3508. break;
  3509. case 20:
  3510. reg_w(sd, 0xa4, 0x0c);
  3511. reg_w(sd, 0x23, 0x1b);
  3512. break;
  3513. case 15:
  3514. reg_w(sd, 0xa4, 0x04);
  3515. reg_w(sd, 0x23, 0xff);
  3516. sd->clockdiv = 1;
  3517. break;
  3518. case 10:
  3519. reg_w(sd, 0xa4, 0x04);
  3520. reg_w(sd, 0x23, 0x1f);
  3521. sd->clockdiv = 1;
  3522. break;
  3523. case 5:
  3524. reg_w(sd, 0xa4, 0x04);
  3525. reg_w(sd, 0x23, 0x1b);
  3526. sd->clockdiv = 1;
  3527. break;
  3528. }
  3529. break;
  3530. case SEN_OV8610:
  3531. switch (sd->frame_rate) {
  3532. default: /* 15 fps */
  3533. /* case 15: */
  3534. reg_w(sd, 0xa4, 0x06);
  3535. reg_w(sd, 0x23, 0xff);
  3536. break;
  3537. case 10:
  3538. reg_w(sd, 0xa4, 0x06);
  3539. reg_w(sd, 0x23, 0x1f);
  3540. break;
  3541. case 5:
  3542. reg_w(sd, 0xa4, 0x06);
  3543. reg_w(sd, 0x23, 0x1b);
  3544. break;
  3545. }
  3546. break;
  3547. case SEN_OV7670: /* guesses, based on 7640 */
  3548. PDEBUG(D_STREAM, "Setting framerate to %d fps",
  3549. (sd->frame_rate == 0) ? 15 : sd->frame_rate);
  3550. reg_w(sd, 0xa4, 0x10);
  3551. switch (sd->frame_rate) {
  3552. case 30:
  3553. reg_w(sd, 0x23, 0xff);
  3554. break;
  3555. case 20:
  3556. reg_w(sd, 0x23, 0x1b);
  3557. break;
  3558. default:
  3559. /* case 15: */
  3560. reg_w(sd, 0x23, 0xff);
  3561. sd->clockdiv = 1;
  3562. break;
  3563. }
  3564. break;
  3565. }
  3566. }
  3567. static void mode_init_ov_sensor_regs(struct sd *sd)
  3568. {
  3569. struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
  3570. int qvga, xstart, xend, ystart, yend;
  3571. u8 v;
  3572. qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
  3573. /******** Mode (VGA/QVGA) and sensor specific regs ********/
  3574. switch (sd->sensor) {
  3575. case SEN_OV2610:
  3576. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3577. i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
  3578. i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
  3579. i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
  3580. i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
  3581. i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
  3582. i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
  3583. return;
  3584. case SEN_OV2610AE: {
  3585. u8 v;
  3586. /* frame rates:
  3587. * 10fps / 5 fps for 1600x1200
  3588. * 40fps / 20fps for 800x600
  3589. */
  3590. v = 80;
  3591. if (qvga) {
  3592. if (sd->frame_rate < 25)
  3593. v = 0x81;
  3594. } else {
  3595. if (sd->frame_rate < 10)
  3596. v = 0x81;
  3597. }
  3598. i2c_w(sd, 0x11, v);
  3599. i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
  3600. return;
  3601. }
  3602. case SEN_OV3610:
  3603. if (qvga) {
  3604. xstart = (1040 - gspca_dev->pixfmt.width) / 2 +
  3605. (0x1f << 4);
  3606. ystart = (776 - gspca_dev->pixfmt.height) / 2;
  3607. } else {
  3608. xstart = (2076 - gspca_dev->pixfmt.width) / 2 +
  3609. (0x10 << 4);
  3610. ystart = (1544 - gspca_dev->pixfmt.height) / 2;
  3611. }
  3612. xend = xstart + gspca_dev->pixfmt.width;
  3613. yend = ystart + gspca_dev->pixfmt.height;
  3614. /* Writing to the COMH register resets the other windowing regs
  3615. to their default values, so we must do this first. */
  3616. i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
  3617. i2c_w_mask(sd, 0x32,
  3618. (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
  3619. 0x3f);
  3620. i2c_w_mask(sd, 0x03,
  3621. (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
  3622. 0x0f);
  3623. i2c_w(sd, 0x17, xstart >> 4);
  3624. i2c_w(sd, 0x18, xend >> 4);
  3625. i2c_w(sd, 0x19, ystart >> 3);
  3626. i2c_w(sd, 0x1a, yend >> 3);
  3627. return;
  3628. case SEN_OV8610:
  3629. /* For OV8610 qvga means qsvga */
  3630. i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
  3631. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3632. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3633. i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
  3634. i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
  3635. break;
  3636. case SEN_OV7610:
  3637. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3638. i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
  3639. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3640. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3641. break;
  3642. case SEN_OV7620:
  3643. case SEN_OV7620AE:
  3644. case SEN_OV76BE:
  3645. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3646. i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
  3647. i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
  3648. i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
  3649. i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
  3650. i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
  3651. i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
  3652. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3653. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3654. if (sd->sensor == SEN_OV76BE)
  3655. i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
  3656. break;
  3657. case SEN_OV7640:
  3658. case SEN_OV7648:
  3659. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3660. i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
  3661. /* Setting this undocumented bit in qvga mode removes a very
  3662. annoying vertical shaking of the image */
  3663. i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
  3664. /* Unknown */
  3665. i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
  3666. /* Allow higher automatic gain (to allow higher framerates) */
  3667. i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
  3668. i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
  3669. break;
  3670. case SEN_OV7670:
  3671. /* set COM7_FMT_VGA or COM7_FMT_QVGA
  3672. * do we need to set anything else?
  3673. * HSTART etc are set in set_ov_sensor_window itself */
  3674. i2c_w_mask(sd, OV7670_R12_COM7,
  3675. qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
  3676. OV7670_COM7_FMT_MASK);
  3677. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3678. i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
  3679. OV7670_COM8_AWB);
  3680. if (qvga) { /* QVGA from ov7670.c by
  3681. * Jonathan Corbet */
  3682. xstart = 164;
  3683. xend = 28;
  3684. ystart = 14;
  3685. yend = 494;
  3686. } else { /* VGA */
  3687. xstart = 158;
  3688. xend = 14;
  3689. ystart = 10;
  3690. yend = 490;
  3691. }
  3692. /* OV7670 hardware window registers are split across
  3693. * multiple locations */
  3694. i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
  3695. i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
  3696. v = i2c_r(sd, OV7670_R32_HREF);
  3697. v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
  3698. msleep(10); /* need to sleep between read and write to
  3699. * same reg! */
  3700. i2c_w(sd, OV7670_R32_HREF, v);
  3701. i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
  3702. i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
  3703. v = i2c_r(sd, OV7670_R03_VREF);
  3704. v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
  3705. msleep(10); /* need to sleep between read and write to
  3706. * same reg! */
  3707. i2c_w(sd, OV7670_R03_VREF, v);
  3708. break;
  3709. case SEN_OV6620:
  3710. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3711. i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
  3712. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3713. break;
  3714. case SEN_OV6630:
  3715. case SEN_OV66308AF:
  3716. i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
  3717. i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
  3718. break;
  3719. case SEN_OV9600: {
  3720. const struct ov_i2c_regvals *vals;
  3721. static const struct ov_i2c_regvals sxga_15[] = {
  3722. {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
  3723. };
  3724. static const struct ov_i2c_regvals sxga_7_5[] = {
  3725. {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
  3726. };
  3727. static const struct ov_i2c_regvals vga_30[] = {
  3728. {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
  3729. };
  3730. static const struct ov_i2c_regvals vga_15[] = {
  3731. {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
  3732. };
  3733. /* frame rates:
  3734. * 15fps / 7.5 fps for 1280x1024
  3735. * 30fps / 15fps for 640x480
  3736. */
  3737. i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
  3738. if (qvga)
  3739. vals = sd->frame_rate < 30 ? vga_15 : vga_30;
  3740. else
  3741. vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
  3742. write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
  3743. return;
  3744. }
  3745. default:
  3746. return;
  3747. }
  3748. /******** Clock programming ********/
  3749. i2c_w(sd, 0x11, sd->clockdiv);
  3750. }
  3751. /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
  3752. static void sethvflip(struct gspca_dev *gspca_dev, s32 hflip, s32 vflip)
  3753. {
  3754. struct sd *sd = (struct sd *) gspca_dev;
  3755. if (sd->gspca_dev.streaming)
  3756. reg_w(sd, OV519_R51_RESET1, 0x0f); /* block stream */
  3757. i2c_w_mask(sd, OV7670_R1E_MVFP,
  3758. OV7670_MVFP_MIRROR * hflip | OV7670_MVFP_VFLIP * vflip,
  3759. OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
  3760. if (sd->gspca_dev.streaming)
  3761. reg_w(sd, OV519_R51_RESET1, 0x00); /* restart stream */
  3762. }
  3763. static void set_ov_sensor_window(struct sd *sd)
  3764. {
  3765. struct gspca_dev *gspca_dev;
  3766. int qvga, crop;
  3767. int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
  3768. /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
  3769. switch (sd->sensor) {
  3770. case SEN_OV2610:
  3771. case SEN_OV2610AE:
  3772. case SEN_OV3610:
  3773. case SEN_OV7670:
  3774. case SEN_OV9600:
  3775. mode_init_ov_sensor_regs(sd);
  3776. return;
  3777. case SEN_OV7660:
  3778. ov519_set_mode(sd);
  3779. ov519_set_fr(sd);
  3780. return;
  3781. }
  3782. gspca_dev = &sd->gspca_dev;
  3783. qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
  3784. crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
  3785. /* The different sensor ICs handle setting up of window differently.
  3786. * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
  3787. switch (sd->sensor) {
  3788. case SEN_OV8610:
  3789. hwsbase = 0x1e;
  3790. hwebase = 0x1e;
  3791. vwsbase = 0x02;
  3792. vwebase = 0x02;
  3793. break;
  3794. case SEN_OV7610:
  3795. case SEN_OV76BE:
  3796. hwsbase = 0x38;
  3797. hwebase = 0x3a;
  3798. vwsbase = vwebase = 0x05;
  3799. break;
  3800. case SEN_OV6620:
  3801. case SEN_OV6630:
  3802. case SEN_OV66308AF:
  3803. hwsbase = 0x38;
  3804. hwebase = 0x3a;
  3805. vwsbase = 0x05;
  3806. vwebase = 0x06;
  3807. if (sd->sensor == SEN_OV66308AF && qvga)
  3808. /* HDG: this fixes U and V getting swapped */
  3809. hwsbase++;
  3810. if (crop) {
  3811. hwsbase += 8;
  3812. hwebase += 8;
  3813. vwsbase += 11;
  3814. vwebase += 11;
  3815. }
  3816. break;
  3817. case SEN_OV7620:
  3818. case SEN_OV7620AE:
  3819. hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
  3820. hwebase = 0x2f;
  3821. vwsbase = vwebase = 0x05;
  3822. break;
  3823. case SEN_OV7640:
  3824. case SEN_OV7648:
  3825. hwsbase = 0x1a;
  3826. hwebase = 0x1a;
  3827. vwsbase = vwebase = 0x03;
  3828. break;
  3829. default:
  3830. return;
  3831. }
  3832. switch (sd->sensor) {
  3833. case SEN_OV6620:
  3834. case SEN_OV6630:
  3835. case SEN_OV66308AF:
  3836. if (qvga) { /* QCIF */
  3837. hwscale = 0;
  3838. vwscale = 0;
  3839. } else { /* CIF */
  3840. hwscale = 1;
  3841. vwscale = 1; /* The datasheet says 0;
  3842. * it's wrong */
  3843. }
  3844. break;
  3845. case SEN_OV8610:
  3846. if (qvga) { /* QSVGA */
  3847. hwscale = 1;
  3848. vwscale = 1;
  3849. } else { /* SVGA */
  3850. hwscale = 2;
  3851. vwscale = 2;
  3852. }
  3853. break;
  3854. default: /* SEN_OV7xx0 */
  3855. if (qvga) { /* QVGA */
  3856. hwscale = 1;
  3857. vwscale = 0;
  3858. } else { /* VGA */
  3859. hwscale = 2;
  3860. vwscale = 1;
  3861. }
  3862. }
  3863. mode_init_ov_sensor_regs(sd);
  3864. i2c_w(sd, 0x17, hwsbase);
  3865. i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
  3866. i2c_w(sd, 0x19, vwsbase);
  3867. i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
  3868. }
  3869. /* -- start the camera -- */
  3870. static int sd_start(struct gspca_dev *gspca_dev)
  3871. {
  3872. struct sd *sd = (struct sd *) gspca_dev;
  3873. /* Default for most bridges, allow bridge_mode_init_regs to override */
  3874. sd->sensor_width = sd->gspca_dev.pixfmt.width;
  3875. sd->sensor_height = sd->gspca_dev.pixfmt.height;
  3876. switch (sd->bridge) {
  3877. case BRIDGE_OV511:
  3878. case BRIDGE_OV511PLUS:
  3879. ov511_mode_init_regs(sd);
  3880. break;
  3881. case BRIDGE_OV518:
  3882. case BRIDGE_OV518PLUS:
  3883. ov518_mode_init_regs(sd);
  3884. break;
  3885. case BRIDGE_OV519:
  3886. ov519_mode_init_regs(sd);
  3887. break;
  3888. /* case BRIDGE_OVFX2: nothing to do */
  3889. case BRIDGE_W9968CF:
  3890. w9968cf_mode_init_regs(sd);
  3891. break;
  3892. }
  3893. set_ov_sensor_window(sd);
  3894. /* Force clear snapshot state in case the snapshot button was
  3895. pressed while we weren't streaming */
  3896. sd->snapshot_needs_reset = 1;
  3897. sd_reset_snapshot(gspca_dev);
  3898. sd->first_frame = 3;
  3899. ov51x_restart(sd);
  3900. ov51x_led_control(sd, 1);
  3901. return gspca_dev->usb_err;
  3902. }
  3903. static void sd_stopN(struct gspca_dev *gspca_dev)
  3904. {
  3905. struct sd *sd = (struct sd *) gspca_dev;
  3906. ov51x_stop(sd);
  3907. ov51x_led_control(sd, 0);
  3908. }
  3909. static void sd_stop0(struct gspca_dev *gspca_dev)
  3910. {
  3911. struct sd *sd = (struct sd *) gspca_dev;
  3912. if (!sd->gspca_dev.present)
  3913. return;
  3914. if (sd->bridge == BRIDGE_W9968CF)
  3915. w9968cf_stop0(sd);
  3916. #if IS_ENABLED(CONFIG_INPUT)
  3917. /* If the last button state is pressed, release it now! */
  3918. if (sd->snapshot_pressed) {
  3919. input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
  3920. input_sync(gspca_dev->input_dev);
  3921. sd->snapshot_pressed = 0;
  3922. }
  3923. #endif
  3924. if (sd->bridge == BRIDGE_OV519)
  3925. reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
  3926. }
  3927. static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
  3928. {
  3929. struct sd *sd = (struct sd *) gspca_dev;
  3930. if (sd->snapshot_pressed != state) {
  3931. #if IS_ENABLED(CONFIG_INPUT)
  3932. input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
  3933. input_sync(gspca_dev->input_dev);
  3934. #endif
  3935. if (state)
  3936. sd->snapshot_needs_reset = 1;
  3937. sd->snapshot_pressed = state;
  3938. } else {
  3939. /* On the ov511 / ov519 we need to reset the button state
  3940. multiple times, as resetting does not work as long as the
  3941. button stays pressed */
  3942. switch (sd->bridge) {
  3943. case BRIDGE_OV511:
  3944. case BRIDGE_OV511PLUS:
  3945. case BRIDGE_OV519:
  3946. if (state)
  3947. sd->snapshot_needs_reset = 1;
  3948. break;
  3949. }
  3950. }
  3951. }
  3952. static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
  3953. u8 *in, /* isoc packet */
  3954. int len) /* iso packet length */
  3955. {
  3956. struct sd *sd = (struct sd *) gspca_dev;
  3957. /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
  3958. * byte non-zero. The EOF packet has image width/height in the
  3959. * 10th and 11th bytes. The 9th byte is given as follows:
  3960. *
  3961. * bit 7: EOF
  3962. * 6: compression enabled
  3963. * 5: 422/420/400 modes
  3964. * 4: 422/420/400 modes
  3965. * 3: 1
  3966. * 2: snapshot button on
  3967. * 1: snapshot frame
  3968. * 0: even/odd field
  3969. */
  3970. if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
  3971. (in[8] & 0x08)) {
  3972. ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
  3973. if (in[8] & 0x80) {
  3974. /* Frame end */
  3975. if ((in[9] + 1) * 8 != gspca_dev->pixfmt.width ||
  3976. (in[10] + 1) * 8 != gspca_dev->pixfmt.height) {
  3977. PERR("Invalid frame size, got: %dx%d,"
  3978. " requested: %dx%d\n",
  3979. (in[9] + 1) * 8, (in[10] + 1) * 8,
  3980. gspca_dev->pixfmt.width,
  3981. gspca_dev->pixfmt.height);
  3982. gspca_dev->last_packet_type = DISCARD_PACKET;
  3983. return;
  3984. }
  3985. /* Add 11 byte footer to frame, might be useful */
  3986. gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
  3987. return;
  3988. } else {
  3989. /* Frame start */
  3990. gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
  3991. sd->packet_nr = 0;
  3992. }
  3993. }
  3994. /* Ignore the packet number */
  3995. len--;
  3996. /* intermediate packet */
  3997. gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
  3998. }
  3999. static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
  4000. u8 *data, /* isoc packet */
  4001. int len) /* iso packet length */
  4002. {
  4003. struct sd *sd = (struct sd *) gspca_dev;
  4004. /* A false positive here is likely, until OVT gives me
  4005. * the definitive SOF/EOF format */
  4006. if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
  4007. ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
  4008. gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
  4009. gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
  4010. sd->packet_nr = 0;
  4011. }
  4012. if (gspca_dev->last_packet_type == DISCARD_PACKET)
  4013. return;
  4014. /* Does this device use packet numbers ? */
  4015. if (len & 7) {
  4016. len--;
  4017. if (sd->packet_nr == data[len])
  4018. sd->packet_nr++;
  4019. /* The last few packets of the frame (which are all 0's
  4020. except that they may contain part of the footer), are
  4021. numbered 0 */
  4022. else if (sd->packet_nr == 0 || data[len]) {
  4023. PERR("Invalid packet nr: %d (expect: %d)",
  4024. (int)data[len], (int)sd->packet_nr);
  4025. gspca_dev->last_packet_type = DISCARD_PACKET;
  4026. return;
  4027. }
  4028. }
  4029. /* intermediate packet */
  4030. gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
  4031. }
  4032. static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
  4033. u8 *data, /* isoc packet */
  4034. int len) /* iso packet length */
  4035. {
  4036. /* Header of ov519 is 16 bytes:
  4037. * Byte Value Description
  4038. * 0 0xff magic
  4039. * 1 0xff magic
  4040. * 2 0xff magic
  4041. * 3 0xXX 0x50 = SOF, 0x51 = EOF
  4042. * 9 0xXX 0x01 initial frame without data,
  4043. * 0x00 standard frame with image
  4044. * 14 Lo in EOF: length of image data / 8
  4045. * 15 Hi
  4046. */
  4047. if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
  4048. switch (data[3]) {
  4049. case 0x50: /* start of frame */
  4050. /* Don't check the button state here, as the state
  4051. usually (always ?) changes at EOF and checking it
  4052. here leads to unnecessary snapshot state resets. */
  4053. #define HDRSZ 16
  4054. data += HDRSZ;
  4055. len -= HDRSZ;
  4056. #undef HDRSZ
  4057. if (data[0] == 0xff || data[1] == 0xd8)
  4058. gspca_frame_add(gspca_dev, FIRST_PACKET,
  4059. data, len);
  4060. else
  4061. gspca_dev->last_packet_type = DISCARD_PACKET;
  4062. return;
  4063. case 0x51: /* end of frame */
  4064. ov51x_handle_button(gspca_dev, data[11] & 1);
  4065. if (data[9] != 0)
  4066. gspca_dev->last_packet_type = DISCARD_PACKET;
  4067. gspca_frame_add(gspca_dev, LAST_PACKET,
  4068. NULL, 0);
  4069. return;
  4070. }
  4071. }
  4072. /* intermediate packet */
  4073. gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
  4074. }
  4075. static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
  4076. u8 *data, /* isoc packet */
  4077. int len) /* iso packet length */
  4078. {
  4079. struct sd *sd = (struct sd *) gspca_dev;
  4080. gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
  4081. /* A short read signals EOF */
  4082. if (len < gspca_dev->cam.bulk_size) {
  4083. /* If the frame is short, and it is one of the first ones
  4084. the sensor and bridge are still syncing, so drop it. */
  4085. if (sd->first_frame) {
  4086. sd->first_frame--;
  4087. if (gspca_dev->image_len <
  4088. sd->gspca_dev.pixfmt.width *
  4089. sd->gspca_dev.pixfmt.height)
  4090. gspca_dev->last_packet_type = DISCARD_PACKET;
  4091. }
  4092. gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
  4093. gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
  4094. }
  4095. }
  4096. static void sd_pkt_scan(struct gspca_dev *gspca_dev,
  4097. u8 *data, /* isoc packet */
  4098. int len) /* iso packet length */
  4099. {
  4100. struct sd *sd = (struct sd *) gspca_dev;
  4101. switch (sd->bridge) {
  4102. case BRIDGE_OV511:
  4103. case BRIDGE_OV511PLUS:
  4104. ov511_pkt_scan(gspca_dev, data, len);
  4105. break;
  4106. case BRIDGE_OV518:
  4107. case BRIDGE_OV518PLUS:
  4108. ov518_pkt_scan(gspca_dev, data, len);
  4109. break;
  4110. case BRIDGE_OV519:
  4111. ov519_pkt_scan(gspca_dev, data, len);
  4112. break;
  4113. case BRIDGE_OVFX2:
  4114. ovfx2_pkt_scan(gspca_dev, data, len);
  4115. break;
  4116. case BRIDGE_W9968CF:
  4117. w9968cf_pkt_scan(gspca_dev, data, len);
  4118. break;
  4119. }
  4120. }
  4121. /* -- management routines -- */
  4122. static void setbrightness(struct gspca_dev *gspca_dev, s32 val)
  4123. {
  4124. struct sd *sd = (struct sd *) gspca_dev;
  4125. static const struct ov_i2c_regvals brit_7660[][7] = {
  4126. {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
  4127. {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
  4128. {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
  4129. {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
  4130. {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
  4131. {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
  4132. {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
  4133. {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
  4134. {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
  4135. {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
  4136. {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
  4137. {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
  4138. {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
  4139. {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
  4140. };
  4141. switch (sd->sensor) {
  4142. case SEN_OV8610:
  4143. case SEN_OV7610:
  4144. case SEN_OV76BE:
  4145. case SEN_OV6620:
  4146. case SEN_OV6630:
  4147. case SEN_OV66308AF:
  4148. case SEN_OV7640:
  4149. case SEN_OV7648:
  4150. i2c_w(sd, OV7610_REG_BRT, val);
  4151. break;
  4152. case SEN_OV7620:
  4153. case SEN_OV7620AE:
  4154. i2c_w(sd, OV7610_REG_BRT, val);
  4155. break;
  4156. case SEN_OV7660:
  4157. write_i2c_regvals(sd, brit_7660[val],
  4158. ARRAY_SIZE(brit_7660[0]));
  4159. break;
  4160. case SEN_OV7670:
  4161. /*win trace
  4162. * i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
  4163. i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
  4164. break;
  4165. }
  4166. }
  4167. static void setcontrast(struct gspca_dev *gspca_dev, s32 val)
  4168. {
  4169. struct sd *sd = (struct sd *) gspca_dev;
  4170. static const struct ov_i2c_regvals contrast_7660[][31] = {
  4171. {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
  4172. {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
  4173. {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
  4174. {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
  4175. {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
  4176. {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
  4177. {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
  4178. {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
  4179. {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
  4180. {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
  4181. {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
  4182. {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
  4183. {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
  4184. {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
  4185. {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
  4186. {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
  4187. {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
  4188. {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
  4189. {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
  4190. {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
  4191. {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
  4192. {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
  4193. {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
  4194. {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
  4195. {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
  4196. {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
  4197. {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
  4198. {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
  4199. {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
  4200. {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
  4201. {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
  4202. {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
  4203. {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
  4204. {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
  4205. {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
  4206. {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
  4207. {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
  4208. {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
  4209. {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
  4210. {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
  4211. {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
  4212. {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
  4213. {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
  4214. {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
  4215. {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
  4216. {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
  4217. {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
  4218. {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
  4219. {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
  4220. {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
  4221. {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
  4222. {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
  4223. {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
  4224. {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
  4225. {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
  4226. {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
  4227. };
  4228. switch (sd->sensor) {
  4229. case SEN_OV7610:
  4230. case SEN_OV6620:
  4231. i2c_w(sd, OV7610_REG_CNT, val);
  4232. break;
  4233. case SEN_OV6630:
  4234. case SEN_OV66308AF:
  4235. i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
  4236. break;
  4237. case SEN_OV8610: {
  4238. static const u8 ctab[] = {
  4239. 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
  4240. };
  4241. /* Use Y gamma control instead. Bit 0 enables it. */
  4242. i2c_w(sd, 0x64, ctab[val >> 5]);
  4243. break;
  4244. }
  4245. case SEN_OV7620:
  4246. case SEN_OV7620AE: {
  4247. static const u8 ctab[] = {
  4248. 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
  4249. 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
  4250. };
  4251. /* Use Y gamma control instead. Bit 0 enables it. */
  4252. i2c_w(sd, 0x64, ctab[val >> 4]);
  4253. break;
  4254. }
  4255. case SEN_OV7660:
  4256. write_i2c_regvals(sd, contrast_7660[val],
  4257. ARRAY_SIZE(contrast_7660[0]));
  4258. break;
  4259. case SEN_OV7670:
  4260. /* check that this isn't just the same as ov7610 */
  4261. i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
  4262. break;
  4263. }
  4264. }
  4265. static void setexposure(struct gspca_dev *gspca_dev, s32 val)
  4266. {
  4267. struct sd *sd = (struct sd *) gspca_dev;
  4268. i2c_w(sd, 0x10, val);
  4269. }
  4270. static void setcolors(struct gspca_dev *gspca_dev, s32 val)
  4271. {
  4272. struct sd *sd = (struct sd *) gspca_dev;
  4273. static const struct ov_i2c_regvals colors_7660[][6] = {
  4274. {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
  4275. {0x53, 0x19}, {0x54, 0x23}},
  4276. {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
  4277. {0x53, 0x2c}, {0x54, 0x3e}},
  4278. {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
  4279. {0x53, 0x40}, {0x54, 0x59}},
  4280. {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
  4281. {0x53, 0x53}, {0x54, 0x73}},
  4282. {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
  4283. {0x53, 0x66}, {0x54, 0x8e}},
  4284. };
  4285. switch (sd->sensor) {
  4286. case SEN_OV8610:
  4287. case SEN_OV7610:
  4288. case SEN_OV76BE:
  4289. case SEN_OV6620:
  4290. case SEN_OV6630:
  4291. case SEN_OV66308AF:
  4292. i2c_w(sd, OV7610_REG_SAT, val);
  4293. break;
  4294. case SEN_OV7620:
  4295. case SEN_OV7620AE:
  4296. /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
  4297. /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
  4298. if (rc < 0)
  4299. goto out; */
  4300. i2c_w(sd, OV7610_REG_SAT, val);
  4301. break;
  4302. case SEN_OV7640:
  4303. case SEN_OV7648:
  4304. i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
  4305. break;
  4306. case SEN_OV7660:
  4307. write_i2c_regvals(sd, colors_7660[val],
  4308. ARRAY_SIZE(colors_7660[0]));
  4309. break;
  4310. case SEN_OV7670:
  4311. /* supported later once I work out how to do it
  4312. * transparently fail now! */
  4313. /* set REG_COM13 values for UV sat auto mode */
  4314. break;
  4315. }
  4316. }
  4317. static void setautobright(struct gspca_dev *gspca_dev, s32 val)
  4318. {
  4319. struct sd *sd = (struct sd *) gspca_dev;
  4320. i2c_w_mask(sd, 0x2d, val ? 0x10 : 0x00, 0x10);
  4321. }
  4322. static void setfreq_i(struct sd *sd, s32 val)
  4323. {
  4324. if (sd->sensor == SEN_OV7660
  4325. || sd->sensor == SEN_OV7670) {
  4326. switch (val) {
  4327. case 0: /* Banding filter disabled */
  4328. i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
  4329. break;
  4330. case 1: /* 50 hz */
  4331. i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
  4332. OV7670_COM8_BFILT);
  4333. i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
  4334. break;
  4335. case 2: /* 60 hz */
  4336. i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
  4337. OV7670_COM8_BFILT);
  4338. i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
  4339. break;
  4340. case 3: /* Auto hz - ov7670 only */
  4341. i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
  4342. OV7670_COM8_BFILT);
  4343. i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
  4344. 0x18);
  4345. break;
  4346. }
  4347. } else {
  4348. switch (val) {
  4349. case 0: /* Banding filter disabled */
  4350. i2c_w_mask(sd, 0x2d, 0x00, 0x04);
  4351. i2c_w_mask(sd, 0x2a, 0x00, 0x80);
  4352. break;
  4353. case 1: /* 50 hz (filter on and framerate adj) */
  4354. i2c_w_mask(sd, 0x2d, 0x04, 0x04);
  4355. i2c_w_mask(sd, 0x2a, 0x80, 0x80);
  4356. /* 20 fps -> 16.667 fps */
  4357. if (sd->sensor == SEN_OV6620 ||
  4358. sd->sensor == SEN_OV6630 ||
  4359. sd->sensor == SEN_OV66308AF)
  4360. i2c_w(sd, 0x2b, 0x5e);
  4361. else
  4362. i2c_w(sd, 0x2b, 0xac);
  4363. break;
  4364. case 2: /* 60 hz (filter on, ...) */
  4365. i2c_w_mask(sd, 0x2d, 0x04, 0x04);
  4366. if (sd->sensor == SEN_OV6620 ||
  4367. sd->sensor == SEN_OV6630 ||
  4368. sd->sensor == SEN_OV66308AF) {
  4369. /* 20 fps -> 15 fps */
  4370. i2c_w_mask(sd, 0x2a, 0x80, 0x80);
  4371. i2c_w(sd, 0x2b, 0xa8);
  4372. } else {
  4373. /* no framerate adj. */
  4374. i2c_w_mask(sd, 0x2a, 0x00, 0x80);
  4375. }
  4376. break;
  4377. }
  4378. }
  4379. }
  4380. static void setfreq(struct gspca_dev *gspca_dev, s32 val)
  4381. {
  4382. struct sd *sd = (struct sd *) gspca_dev;
  4383. setfreq_i(sd, val);
  4384. /* Ugly but necessary */
  4385. if (sd->bridge == BRIDGE_W9968CF)
  4386. w9968cf_set_crop_window(sd);
  4387. }
  4388. static int sd_get_jcomp(struct gspca_dev *gspca_dev,
  4389. struct v4l2_jpegcompression *jcomp)
  4390. {
  4391. struct sd *sd = (struct sd *) gspca_dev;
  4392. if (sd->bridge != BRIDGE_W9968CF)
  4393. return -ENOTTY;
  4394. memset(jcomp, 0, sizeof *jcomp);
  4395. jcomp->quality = v4l2_ctrl_g_ctrl(sd->jpegqual);
  4396. jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
  4397. V4L2_JPEG_MARKER_DRI;
  4398. return 0;
  4399. }
  4400. static int sd_set_jcomp(struct gspca_dev *gspca_dev,
  4401. const struct v4l2_jpegcompression *jcomp)
  4402. {
  4403. struct sd *sd = (struct sd *) gspca_dev;
  4404. if (sd->bridge != BRIDGE_W9968CF)
  4405. return -ENOTTY;
  4406. v4l2_ctrl_s_ctrl(sd->jpegqual, jcomp->quality);
  4407. return 0;
  4408. }
  4409. static int sd_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
  4410. {
  4411. struct gspca_dev *gspca_dev =
  4412. container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
  4413. struct sd *sd = (struct sd *)gspca_dev;
  4414. gspca_dev->usb_err = 0;
  4415. switch (ctrl->id) {
  4416. case V4L2_CID_AUTOGAIN:
  4417. gspca_dev->exposure->val = i2c_r(sd, 0x10);
  4418. break;
  4419. }
  4420. return 0;
  4421. }
  4422. static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
  4423. {
  4424. struct gspca_dev *gspca_dev =
  4425. container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
  4426. struct sd *sd = (struct sd *)gspca_dev;
  4427. gspca_dev->usb_err = 0;
  4428. if (!gspca_dev->streaming)
  4429. return 0;
  4430. switch (ctrl->id) {
  4431. case V4L2_CID_BRIGHTNESS:
  4432. setbrightness(gspca_dev, ctrl->val);
  4433. break;
  4434. case V4L2_CID_CONTRAST:
  4435. setcontrast(gspca_dev, ctrl->val);
  4436. break;
  4437. case V4L2_CID_POWER_LINE_FREQUENCY:
  4438. setfreq(gspca_dev, ctrl->val);
  4439. break;
  4440. case V4L2_CID_AUTOBRIGHTNESS:
  4441. if (ctrl->is_new)
  4442. setautobright(gspca_dev, ctrl->val);
  4443. if (!ctrl->val && sd->brightness->is_new)
  4444. setbrightness(gspca_dev, sd->brightness->val);
  4445. break;
  4446. case V4L2_CID_SATURATION:
  4447. setcolors(gspca_dev, ctrl->val);
  4448. break;
  4449. case V4L2_CID_HFLIP:
  4450. sethvflip(gspca_dev, ctrl->val, sd->vflip->val);
  4451. break;
  4452. case V4L2_CID_AUTOGAIN:
  4453. if (ctrl->is_new)
  4454. setautogain(gspca_dev, ctrl->val);
  4455. if (!ctrl->val && gspca_dev->exposure->is_new)
  4456. setexposure(gspca_dev, gspca_dev->exposure->val);
  4457. break;
  4458. case V4L2_CID_JPEG_COMPRESSION_QUALITY:
  4459. return -EBUSY; /* Should never happen, as we grab the ctrl */
  4460. }
  4461. return gspca_dev->usb_err;
  4462. }
  4463. static const struct v4l2_ctrl_ops sd_ctrl_ops = {
  4464. .g_volatile_ctrl = sd_g_volatile_ctrl,
  4465. .s_ctrl = sd_s_ctrl,
  4466. };
  4467. static int sd_init_controls(struct gspca_dev *gspca_dev)
  4468. {
  4469. struct sd *sd = (struct sd *)gspca_dev;
  4470. struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
  4471. gspca_dev->vdev.ctrl_handler = hdl;
  4472. v4l2_ctrl_handler_init(hdl, 10);
  4473. if (valid_controls[sd->sensor].has_brightness)
  4474. sd->brightness = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  4475. V4L2_CID_BRIGHTNESS, 0,
  4476. sd->sensor == SEN_OV7660 ? 6 : 255, 1,
  4477. sd->sensor == SEN_OV7660 ? 3 : 127);
  4478. if (valid_controls[sd->sensor].has_contrast) {
  4479. if (sd->sensor == SEN_OV7660)
  4480. v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  4481. V4L2_CID_CONTRAST, 0, 6, 1, 3);
  4482. else
  4483. v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  4484. V4L2_CID_CONTRAST, 0, 255, 1,
  4485. (sd->sensor == SEN_OV6630 ||
  4486. sd->sensor == SEN_OV66308AF) ? 200 : 127);
  4487. }
  4488. if (valid_controls[sd->sensor].has_sat)
  4489. v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  4490. V4L2_CID_SATURATION, 0,
  4491. sd->sensor == SEN_OV7660 ? 4 : 255, 1,
  4492. sd->sensor == SEN_OV7660 ? 2 : 127);
  4493. if (valid_controls[sd->sensor].has_exposure)
  4494. gspca_dev->exposure = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  4495. V4L2_CID_EXPOSURE, 0, 255, 1, 127);
  4496. if (valid_controls[sd->sensor].has_hvflip) {
  4497. sd->hflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  4498. V4L2_CID_HFLIP, 0, 1, 1, 0);
  4499. sd->vflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  4500. V4L2_CID_VFLIP, 0, 1, 1, 0);
  4501. }
  4502. if (valid_controls[sd->sensor].has_autobright)
  4503. sd->autobright = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  4504. V4L2_CID_AUTOBRIGHTNESS, 0, 1, 1, 1);
  4505. if (valid_controls[sd->sensor].has_autogain)
  4506. gspca_dev->autogain = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  4507. V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
  4508. if (valid_controls[sd->sensor].has_freq) {
  4509. if (sd->sensor == SEN_OV7670)
  4510. sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
  4511. V4L2_CID_POWER_LINE_FREQUENCY,
  4512. V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
  4513. V4L2_CID_POWER_LINE_FREQUENCY_AUTO);
  4514. else
  4515. sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
  4516. V4L2_CID_POWER_LINE_FREQUENCY,
  4517. V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0, 0);
  4518. }
  4519. if (sd->bridge == BRIDGE_W9968CF)
  4520. sd->jpegqual = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  4521. V4L2_CID_JPEG_COMPRESSION_QUALITY,
  4522. QUALITY_MIN, QUALITY_MAX, 1, QUALITY_DEF);
  4523. if (hdl->error) {
  4524. PERR("Could not initialize controls\n");
  4525. return hdl->error;
  4526. }
  4527. if (gspca_dev->autogain)
  4528. v4l2_ctrl_auto_cluster(3, &gspca_dev->autogain, 0, true);
  4529. if (sd->autobright)
  4530. v4l2_ctrl_auto_cluster(2, &sd->autobright, 0, false);
  4531. if (sd->hflip)
  4532. v4l2_ctrl_cluster(2, &sd->hflip);
  4533. return 0;
  4534. }
  4535. /* sub-driver description */
  4536. static const struct sd_desc sd_desc = {
  4537. .name = MODULE_NAME,
  4538. .config = sd_config,
  4539. .init = sd_init,
  4540. .init_controls = sd_init_controls,
  4541. .isoc_init = sd_isoc_init,
  4542. .start = sd_start,
  4543. .stopN = sd_stopN,
  4544. .stop0 = sd_stop0,
  4545. .pkt_scan = sd_pkt_scan,
  4546. .dq_callback = sd_reset_snapshot,
  4547. .get_jcomp = sd_get_jcomp,
  4548. .set_jcomp = sd_set_jcomp,
  4549. #if IS_ENABLED(CONFIG_INPUT)
  4550. .other_input = 1,
  4551. #endif
  4552. };
  4553. /* -- module initialisation -- */
  4554. static const struct usb_device_id device_table[] = {
  4555. {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
  4556. {USB_DEVICE(0x041e, 0x4052),
  4557. .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
  4558. {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
  4559. {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
  4560. {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
  4561. {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
  4562. {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
  4563. {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
  4564. {USB_DEVICE(0x045e, 0x028c),
  4565. .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
  4566. {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
  4567. {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
  4568. {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
  4569. {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
  4570. {USB_DEVICE(0x05a9, 0x0519),
  4571. .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
  4572. {USB_DEVICE(0x05a9, 0x0530),
  4573. .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
  4574. {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
  4575. {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
  4576. {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
  4577. {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
  4578. {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
  4579. {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
  4580. {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
  4581. {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
  4582. {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
  4583. {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
  4584. {}
  4585. };
  4586. MODULE_DEVICE_TABLE(usb, device_table);
  4587. /* -- device connect -- */
  4588. static int sd_probe(struct usb_interface *intf,
  4589. const struct usb_device_id *id)
  4590. {
  4591. return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
  4592. THIS_MODULE);
  4593. }
  4594. static struct usb_driver sd_driver = {
  4595. .name = MODULE_NAME,
  4596. .id_table = device_table,
  4597. .probe = sd_probe,
  4598. .disconnect = gspca_disconnect,
  4599. #ifdef CONFIG_PM
  4600. .suspend = gspca_suspend,
  4601. .resume = gspca_resume,
  4602. .reset_resume = gspca_resume,
  4603. #endif
  4604. };
  4605. module_usb_driver(sd_driver);
  4606. module_param(frame_rate, int, 0644);
  4607. MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");