pvrusb2-encoder.c 14 KB

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  1. /*
  2. *
  3. *
  4. * Copyright (C) 2005 Mike Isely <isely@pobox.com>
  5. * Copyright (C) 2004 Aurelien Alleaume <slts@free.fr>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #include <linux/device.h> // for linux/firmware.h
  22. #include <linux/firmware.h>
  23. #include "pvrusb2-util.h"
  24. #include "pvrusb2-encoder.h"
  25. #include "pvrusb2-hdw-internal.h"
  26. #include "pvrusb2-debug.h"
  27. #include "pvrusb2-fx2-cmd.h"
  28. /* Firmware mailbox flags - definitions found from ivtv */
  29. #define IVTV_MBOX_FIRMWARE_DONE 0x00000004
  30. #define IVTV_MBOX_DRIVER_DONE 0x00000002
  31. #define IVTV_MBOX_DRIVER_BUSY 0x00000001
  32. #define MBOX_BASE 0x44
  33. static int pvr2_encoder_write_words(struct pvr2_hdw *hdw,
  34. unsigned int offs,
  35. const u32 *data, unsigned int dlen)
  36. {
  37. unsigned int idx,addr;
  38. unsigned int bAddr;
  39. int ret;
  40. unsigned int chunkCnt;
  41. /*
  42. Format: First byte must be 0x01. Remaining 32 bit words are
  43. spread out into chunks of 7 bytes each, with the first 4 bytes
  44. being the data word (little endian), and the next 3 bytes
  45. being the address where that data word is to be written (big
  46. endian). Repeat request for additional words, with offset
  47. adjusted accordingly.
  48. */
  49. while (dlen) {
  50. chunkCnt = 8;
  51. if (chunkCnt > dlen) chunkCnt = dlen;
  52. memset(hdw->cmd_buffer,0,sizeof(hdw->cmd_buffer));
  53. bAddr = 0;
  54. hdw->cmd_buffer[bAddr++] = FX2CMD_MEM_WRITE_DWORD;
  55. for (idx = 0; idx < chunkCnt; idx++) {
  56. addr = idx + offs;
  57. hdw->cmd_buffer[bAddr+6] = (addr & 0xffu);
  58. hdw->cmd_buffer[bAddr+5] = ((addr>>8) & 0xffu);
  59. hdw->cmd_buffer[bAddr+4] = ((addr>>16) & 0xffu);
  60. PVR2_DECOMPOSE_LE(hdw->cmd_buffer, bAddr,data[idx]);
  61. bAddr += 7;
  62. }
  63. ret = pvr2_send_request(hdw,
  64. hdw->cmd_buffer,1+(chunkCnt*7),
  65. NULL,0);
  66. if (ret) return ret;
  67. data += chunkCnt;
  68. dlen -= chunkCnt;
  69. offs += chunkCnt;
  70. }
  71. return 0;
  72. }
  73. static int pvr2_encoder_read_words(struct pvr2_hdw *hdw,
  74. unsigned int offs,
  75. u32 *data, unsigned int dlen)
  76. {
  77. unsigned int idx;
  78. int ret;
  79. unsigned int chunkCnt;
  80. /*
  81. Format: First byte must be 0x02 (status check) or 0x28 (read
  82. back block of 32 bit words). Next 6 bytes must be zero,
  83. followed by a single byte of MBOX_BASE+offset for portion to
  84. be read. Returned data is packed set of 32 bits words that
  85. were read.
  86. */
  87. while (dlen) {
  88. chunkCnt = 16;
  89. if (chunkCnt > dlen) chunkCnt = dlen;
  90. if (chunkCnt < 16) chunkCnt = 1;
  91. hdw->cmd_buffer[0] =
  92. ((chunkCnt == 1) ?
  93. FX2CMD_MEM_READ_DWORD : FX2CMD_MEM_READ_64BYTES);
  94. hdw->cmd_buffer[1] = 0;
  95. hdw->cmd_buffer[2] = 0;
  96. hdw->cmd_buffer[3] = 0;
  97. hdw->cmd_buffer[4] = 0;
  98. hdw->cmd_buffer[5] = ((offs>>16) & 0xffu);
  99. hdw->cmd_buffer[6] = ((offs>>8) & 0xffu);
  100. hdw->cmd_buffer[7] = (offs & 0xffu);
  101. ret = pvr2_send_request(hdw,
  102. hdw->cmd_buffer,8,
  103. hdw->cmd_buffer,
  104. (chunkCnt == 1 ? 4 : 16 * 4));
  105. if (ret) return ret;
  106. for (idx = 0; idx < chunkCnt; idx++) {
  107. data[idx] = PVR2_COMPOSE_LE(hdw->cmd_buffer,idx*4);
  108. }
  109. data += chunkCnt;
  110. dlen -= chunkCnt;
  111. offs += chunkCnt;
  112. }
  113. return 0;
  114. }
  115. /* This prototype is set up to be compatible with the
  116. cx2341x_mbox_func prototype in cx2341x.h, which should be in
  117. kernels 2.6.18 or later. We do this so that we can enable
  118. cx2341x.ko to write to our encoder (by handing it a pointer to this
  119. function). For earlier kernels this doesn't really matter. */
  120. static int pvr2_encoder_cmd(void *ctxt,
  121. u32 cmd,
  122. int arg_cnt_send,
  123. int arg_cnt_recv,
  124. u32 *argp)
  125. {
  126. unsigned int poll_count;
  127. unsigned int try_count = 0;
  128. int retry_flag;
  129. int ret = 0;
  130. unsigned int idx;
  131. /* These sizes look to be limited by the FX2 firmware implementation */
  132. u32 wrData[16];
  133. u32 rdData[16];
  134. struct pvr2_hdw *hdw = (struct pvr2_hdw *)ctxt;
  135. /*
  136. The encoder seems to speak entirely using blocks 32 bit words.
  137. In ivtv driver terms, this is a mailbox at MBOX_BASE which we
  138. populate with data and watch what the hardware does with it.
  139. The first word is a set of flags used to control the
  140. transaction, the second word is the command to execute, the
  141. third byte is zero (ivtv driver suggests that this is some
  142. kind of return value), and the fourth byte is a specified
  143. timeout (windows driver always uses 0x00060000 except for one
  144. case when it is zero). All successive words are the argument
  145. words for the command.
  146. First, write out the entire set of words, with the first word
  147. being zero.
  148. Next, write out just the first word again, but set it to
  149. IVTV_MBOX_DRIVER_DONE | IVTV_DRIVER_BUSY this time (which
  150. probably means "go").
  151. Next, read back the return count words. Check the first word,
  152. which should have IVTV_MBOX_FIRMWARE_DONE set. If however
  153. that bit is not set, then the command isn't done so repeat the
  154. read until it is set.
  155. Finally, write out just the first word again, but set it to
  156. 0x0 this time (which probably means "idle").
  157. */
  158. if (arg_cnt_send > (ARRAY_SIZE(wrData) - 4)) {
  159. pvr2_trace(
  160. PVR2_TRACE_ERROR_LEGS,
  161. "Failed to write cx23416 command"
  162. " - too many input arguments"
  163. " (was given %u limit %lu)",
  164. arg_cnt_send, (long unsigned) ARRAY_SIZE(wrData) - 4);
  165. return -EINVAL;
  166. }
  167. if (arg_cnt_recv > (ARRAY_SIZE(rdData) - 4)) {
  168. pvr2_trace(
  169. PVR2_TRACE_ERROR_LEGS,
  170. "Failed to write cx23416 command"
  171. " - too many return arguments"
  172. " (was given %u limit %lu)",
  173. arg_cnt_recv, (long unsigned) ARRAY_SIZE(rdData) - 4);
  174. return -EINVAL;
  175. }
  176. LOCK_TAKE(hdw->ctl_lock); do {
  177. if (!hdw->state_encoder_ok) {
  178. ret = -EIO;
  179. break;
  180. }
  181. retry_flag = 0;
  182. try_count++;
  183. ret = 0;
  184. wrData[0] = 0;
  185. wrData[1] = cmd;
  186. wrData[2] = 0;
  187. wrData[3] = 0x00060000;
  188. for (idx = 0; idx < arg_cnt_send; idx++) {
  189. wrData[idx+4] = argp[idx];
  190. }
  191. for (; idx < ARRAY_SIZE(wrData) - 4; idx++) {
  192. wrData[idx+4] = 0;
  193. }
  194. ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,idx);
  195. if (ret) break;
  196. wrData[0] = IVTV_MBOX_DRIVER_DONE|IVTV_MBOX_DRIVER_BUSY;
  197. ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1);
  198. if (ret) break;
  199. poll_count = 0;
  200. while (1) {
  201. poll_count++;
  202. ret = pvr2_encoder_read_words(hdw,MBOX_BASE,rdData,
  203. arg_cnt_recv+4);
  204. if (ret) {
  205. break;
  206. }
  207. if (rdData[0] & IVTV_MBOX_FIRMWARE_DONE) {
  208. break;
  209. }
  210. if (rdData[0] && (poll_count < 1000)) continue;
  211. if (!rdData[0]) {
  212. retry_flag = !0;
  213. pvr2_trace(
  214. PVR2_TRACE_ERROR_LEGS,
  215. "Encoder timed out waiting for us"
  216. "; arranging to retry");
  217. } else {
  218. pvr2_trace(
  219. PVR2_TRACE_ERROR_LEGS,
  220. "***WARNING*** device's encoder"
  221. " appears to be stuck"
  222. " (status=0x%08x)",rdData[0]);
  223. }
  224. pvr2_trace(
  225. PVR2_TRACE_ERROR_LEGS,
  226. "Encoder command: 0x%02x",cmd);
  227. for (idx = 4; idx < arg_cnt_send; idx++) {
  228. pvr2_trace(
  229. PVR2_TRACE_ERROR_LEGS,
  230. "Encoder arg%d: 0x%08x",
  231. idx-3,wrData[idx]);
  232. }
  233. ret = -EBUSY;
  234. break;
  235. }
  236. if (retry_flag) {
  237. if (try_count < 20) continue;
  238. pvr2_trace(
  239. PVR2_TRACE_ERROR_LEGS,
  240. "Too many retries...");
  241. ret = -EBUSY;
  242. }
  243. if (ret) {
  244. del_timer_sync(&hdw->encoder_run_timer);
  245. hdw->state_encoder_ok = 0;
  246. pvr2_trace(PVR2_TRACE_STBITS,
  247. "State bit %s <-- %s",
  248. "state_encoder_ok",
  249. (hdw->state_encoder_ok ? "true" : "false"));
  250. if (hdw->state_encoder_runok) {
  251. hdw->state_encoder_runok = 0;
  252. pvr2_trace(PVR2_TRACE_STBITS,
  253. "State bit %s <-- %s",
  254. "state_encoder_runok",
  255. (hdw->state_encoder_runok ?
  256. "true" : "false"));
  257. }
  258. pvr2_trace(
  259. PVR2_TRACE_ERROR_LEGS,
  260. "Giving up on command."
  261. " This is normally recovered via a firmware"
  262. " reload and re-initialization; concern"
  263. " is only warranted if this happens repeatedly"
  264. " and rapidly.");
  265. break;
  266. }
  267. wrData[0] = 0x7;
  268. for (idx = 0; idx < arg_cnt_recv; idx++) {
  269. argp[idx] = rdData[idx+4];
  270. }
  271. wrData[0] = 0x0;
  272. ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1);
  273. if (ret) break;
  274. } while(0); LOCK_GIVE(hdw->ctl_lock);
  275. return ret;
  276. }
  277. static int pvr2_encoder_vcmd(struct pvr2_hdw *hdw, int cmd,
  278. int args, ...)
  279. {
  280. va_list vl;
  281. unsigned int idx;
  282. u32 data[12];
  283. if (args > ARRAY_SIZE(data)) {
  284. pvr2_trace(
  285. PVR2_TRACE_ERROR_LEGS,
  286. "Failed to write cx23416 command"
  287. " - too many arguments"
  288. " (was given %u limit %lu)",
  289. args, (long unsigned) ARRAY_SIZE(data));
  290. return -EINVAL;
  291. }
  292. va_start(vl, args);
  293. for (idx = 0; idx < args; idx++) {
  294. data[idx] = va_arg(vl, u32);
  295. }
  296. va_end(vl);
  297. return pvr2_encoder_cmd(hdw,cmd,args,0,data);
  298. }
  299. /* This implements some extra setup for the encoder that seems to be
  300. specific to the PVR USB2 hardware. */
  301. static int pvr2_encoder_prep_config(struct pvr2_hdw *hdw)
  302. {
  303. int ret = 0;
  304. int encMisc3Arg = 0;
  305. #if 0
  306. /* This inexplicable bit happens in the Hauppauge windows
  307. driver (for both 24xxx and 29xxx devices). However I
  308. currently see no difference in behavior with or without
  309. this stuff. Leave this here as a note of its existence,
  310. but don't use it. */
  311. LOCK_TAKE(hdw->ctl_lock); do {
  312. u32 dat[1];
  313. dat[0] = 0x80000640;
  314. pvr2_encoder_write_words(hdw,0x01fe,dat,1);
  315. pvr2_encoder_write_words(hdw,0x023e,dat,1);
  316. } while(0); LOCK_GIVE(hdw->ctl_lock);
  317. #endif
  318. /* Mike Isely <isely@pobox.com> 26-Jan-2006 The windows driver
  319. sends the following list of ENC_MISC commands (for both
  320. 24xxx and 29xxx devices). Meanings are not entirely clear,
  321. however without the ENC_MISC(3,1) command then we risk
  322. random perpetual video corruption whenever the video input
  323. breaks up for a moment (like when switching channels). */
  324. #if 0
  325. /* This ENC_MISC(5,0) command seems to hurt 29xxx sync
  326. performance on channel changes, but is not a problem on
  327. 24xxx devices. */
  328. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 5,0,0,0);
  329. #endif
  330. /* This ENC_MISC(3,encMisc3Arg) command is critical - without
  331. it there will eventually be video corruption. Also, the
  332. saa7115 case is strange - the Windows driver is passing 1
  333. regardless of device type but if we have 1 for saa7115
  334. devices the video turns sluggish. */
  335. if (hdw->hdw_desc->flag_has_cx25840) {
  336. encMisc3Arg = 1;
  337. } else {
  338. encMisc3Arg = 0;
  339. }
  340. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 3,
  341. encMisc3Arg,0,0);
  342. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 8,0,0,0);
  343. #if 0
  344. /* This ENC_MISC(4,1) command is poisonous, so it is commented
  345. out. But I'm leaving it here anyway to document its
  346. existence in the Windows driver. The effect of this
  347. command is that apps displaying the stream become sluggish
  348. with stuttering video. */
  349. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 4,1,0,0);
  350. #endif
  351. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 0,3,0,0);
  352. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4,15,0,0,0);
  353. /* prevent the PTSs from slowly drifting away in the generated
  354. MPEG stream */
  355. ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC, 2, 4, 1);
  356. return ret;
  357. }
  358. int pvr2_encoder_adjust(struct pvr2_hdw *hdw)
  359. {
  360. int ret;
  361. ret = cx2341x_update(hdw,pvr2_encoder_cmd,
  362. (hdw->enc_cur_valid ? &hdw->enc_cur_state : NULL),
  363. &hdw->enc_ctl_state);
  364. if (ret) {
  365. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  366. "Error from cx2341x module code=%d",ret);
  367. } else {
  368. hdw->enc_cur_state = hdw->enc_ctl_state;
  369. hdw->enc_cur_valid = !0;
  370. }
  371. return ret;
  372. }
  373. int pvr2_encoder_configure(struct pvr2_hdw *hdw)
  374. {
  375. int ret;
  376. int val;
  377. pvr2_trace(PVR2_TRACE_ENCODER,"pvr2_encoder_configure"
  378. " (cx2341x module)");
  379. hdw->enc_ctl_state.port = CX2341X_PORT_STREAMING;
  380. hdw->enc_ctl_state.width = hdw->res_hor_val;
  381. hdw->enc_ctl_state.height = hdw->res_ver_val;
  382. hdw->enc_ctl_state.is_50hz = ((hdw->std_mask_cur & V4L2_STD_525_60) ?
  383. 0 : 1);
  384. ret = 0;
  385. ret |= pvr2_encoder_prep_config(hdw);
  386. /* saa7115: 0xf0 */
  387. val = 0xf0;
  388. if (hdw->hdw_desc->flag_has_cx25840) {
  389. /* ivtv cx25840: 0x140 */
  390. val = 0x140;
  391. }
  392. if (!ret) ret = pvr2_encoder_vcmd(
  393. hdw,CX2341X_ENC_SET_NUM_VSYNC_LINES, 2,
  394. val, val);
  395. /* setup firmware to notify us about some events (don't know why...) */
  396. if (!ret) ret = pvr2_encoder_vcmd(
  397. hdw,CX2341X_ENC_SET_EVENT_NOTIFICATION, 4,
  398. 0, 0, 0x10000000, 0xffffffff);
  399. if (!ret) ret = pvr2_encoder_vcmd(
  400. hdw,CX2341X_ENC_SET_VBI_LINE, 5,
  401. 0xffffffff,0,0,0,0);
  402. if (ret) {
  403. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  404. "Failed to configure cx23416");
  405. return ret;
  406. }
  407. ret = pvr2_encoder_adjust(hdw);
  408. if (ret) return ret;
  409. ret = pvr2_encoder_vcmd(
  410. hdw, CX2341X_ENC_INITIALIZE_INPUT, 0);
  411. if (ret) {
  412. pvr2_trace(PVR2_TRACE_ERROR_LEGS,
  413. "Failed to initialize cx23416 video input");
  414. return ret;
  415. }
  416. return 0;
  417. }
  418. int pvr2_encoder_start(struct pvr2_hdw *hdw)
  419. {
  420. int status;
  421. /* unmask some interrupts */
  422. pvr2_write_register(hdw, 0x0048, 0xbfffffff);
  423. pvr2_encoder_vcmd(hdw,CX2341X_ENC_MUTE_VIDEO,1,
  424. hdw->input_val == PVR2_CVAL_INPUT_RADIO ? 1 : 0);
  425. switch (hdw->active_stream_type) {
  426. case pvr2_config_vbi:
  427. status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
  428. 0x01,0x14);
  429. break;
  430. case pvr2_config_mpeg:
  431. status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
  432. 0,0x13);
  433. break;
  434. default: /* Unhandled cases for now */
  435. status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
  436. 0,0x13);
  437. break;
  438. }
  439. return status;
  440. }
  441. int pvr2_encoder_stop(struct pvr2_hdw *hdw)
  442. {
  443. int status;
  444. /* mask all interrupts */
  445. pvr2_write_register(hdw, 0x0048, 0xffffffff);
  446. switch (hdw->active_stream_type) {
  447. case pvr2_config_vbi:
  448. status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
  449. 0x01,0x01,0x14);
  450. break;
  451. case pvr2_config_mpeg:
  452. status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
  453. 0x01,0,0x13);
  454. break;
  455. default: /* Unhandled cases for now */
  456. status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
  457. 0x01,0,0x13);
  458. break;
  459. }
  460. return status;
  461. }