tifm_ms.c 17 KB

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  1. /*
  2. * TI FlashMedia driver
  3. *
  4. * Copyright (C) 2007 Alex Dubov <oakad@yahoo.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Special thanks to Carlos Corbacho for providing various MemoryStick cards
  11. * that made this driver possible.
  12. *
  13. */
  14. #include <linux/tifm.h>
  15. #include <linux/memstick.h>
  16. #include <linux/highmem.h>
  17. #include <linux/scatterlist.h>
  18. #include <linux/log2.h>
  19. #include <linux/module.h>
  20. #include <asm/io.h>
  21. #define DRIVER_NAME "tifm_ms"
  22. static bool no_dma;
  23. module_param(no_dma, bool, 0644);
  24. /*
  25. * Some control bits of TIFM appear to conform to Sony's reference design,
  26. * so I'm just assuming they all are.
  27. */
  28. #define TIFM_MS_STAT_DRQ 0x04000
  29. #define TIFM_MS_STAT_MSINT 0x02000
  30. #define TIFM_MS_STAT_RDY 0x01000
  31. #define TIFM_MS_STAT_CRC 0x00200
  32. #define TIFM_MS_STAT_TOE 0x00100
  33. #define TIFM_MS_STAT_EMP 0x00020
  34. #define TIFM_MS_STAT_FUL 0x00010
  35. #define TIFM_MS_STAT_CED 0x00008
  36. #define TIFM_MS_STAT_ERR 0x00004
  37. #define TIFM_MS_STAT_BRQ 0x00002
  38. #define TIFM_MS_STAT_CNK 0x00001
  39. #define TIFM_MS_SYS_DMA 0x10000
  40. #define TIFM_MS_SYS_RESET 0x08000
  41. #define TIFM_MS_SYS_SRAC 0x04000
  42. #define TIFM_MS_SYS_INTEN 0x02000
  43. #define TIFM_MS_SYS_NOCRC 0x01000
  44. #define TIFM_MS_SYS_INTCLR 0x00800
  45. #define TIFM_MS_SYS_MSIEN 0x00400
  46. #define TIFM_MS_SYS_FCLR 0x00200
  47. #define TIFM_MS_SYS_FDIR 0x00100
  48. #define TIFM_MS_SYS_DAM 0x00080
  49. #define TIFM_MS_SYS_DRM 0x00040
  50. #define TIFM_MS_SYS_DRQSL 0x00020
  51. #define TIFM_MS_SYS_REI 0x00010
  52. #define TIFM_MS_SYS_REO 0x00008
  53. #define TIFM_MS_SYS_BSY_MASK 0x00007
  54. #define TIFM_MS_SYS_FIFO (TIFM_MS_SYS_INTEN | TIFM_MS_SYS_MSIEN \
  55. | TIFM_MS_SYS_FCLR | TIFM_MS_SYS_BSY_MASK)
  56. /* Hardware flags */
  57. enum {
  58. CMD_READY = 0x01,
  59. FIFO_READY = 0x02,
  60. CARD_INT = 0x04
  61. };
  62. struct tifm_ms {
  63. struct tifm_dev *dev;
  64. struct timer_list timer;
  65. struct memstick_request *req;
  66. struct tasklet_struct notify;
  67. unsigned int mode_mask;
  68. unsigned int block_pos;
  69. unsigned long timeout_jiffies;
  70. unsigned char eject:1,
  71. use_dma:1;
  72. unsigned char cmd_flags;
  73. unsigned char io_pos;
  74. unsigned int io_word;
  75. };
  76. static unsigned int tifm_ms_read_data(struct tifm_ms *host,
  77. unsigned char *buf, unsigned int length)
  78. {
  79. struct tifm_dev *sock = host->dev;
  80. unsigned int off = 0;
  81. while (host->io_pos && length) {
  82. buf[off++] = host->io_word & 0xff;
  83. host->io_word >>= 8;
  84. length--;
  85. host->io_pos--;
  86. }
  87. if (!length)
  88. return off;
  89. while (!(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
  90. if (length < 4)
  91. break;
  92. *(unsigned int *)(buf + off) = __raw_readl(sock->addr
  93. + SOCK_MS_DATA);
  94. length -= 4;
  95. off += 4;
  96. }
  97. if (length
  98. && !(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
  99. host->io_word = readl(sock->addr + SOCK_MS_DATA);
  100. for (host->io_pos = 4; host->io_pos; --host->io_pos) {
  101. buf[off++] = host->io_word & 0xff;
  102. host->io_word >>= 8;
  103. length--;
  104. if (!length)
  105. break;
  106. }
  107. }
  108. return off;
  109. }
  110. static unsigned int tifm_ms_write_data(struct tifm_ms *host,
  111. unsigned char *buf, unsigned int length)
  112. {
  113. struct tifm_dev *sock = host->dev;
  114. unsigned int off = 0;
  115. if (host->io_pos) {
  116. while (host->io_pos < 4 && length) {
  117. host->io_word |= buf[off++] << (host->io_pos * 8);
  118. host->io_pos++;
  119. length--;
  120. }
  121. }
  122. if (host->io_pos == 4
  123. && !(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
  124. writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
  125. sock->addr + SOCK_MS_SYSTEM);
  126. writel(host->io_word, sock->addr + SOCK_MS_DATA);
  127. host->io_pos = 0;
  128. host->io_word = 0;
  129. } else if (host->io_pos) {
  130. return off;
  131. }
  132. if (!length)
  133. return off;
  134. while (!(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
  135. if (length < 4)
  136. break;
  137. writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
  138. sock->addr + SOCK_MS_SYSTEM);
  139. __raw_writel(*(unsigned int *)(buf + off),
  140. sock->addr + SOCK_MS_DATA);
  141. length -= 4;
  142. off += 4;
  143. }
  144. switch (length) {
  145. case 3:
  146. host->io_word |= buf[off + 2] << 16;
  147. host->io_pos++;
  148. case 2:
  149. host->io_word |= buf[off + 1] << 8;
  150. host->io_pos++;
  151. case 1:
  152. host->io_word |= buf[off];
  153. host->io_pos++;
  154. }
  155. off += host->io_pos;
  156. return off;
  157. }
  158. static unsigned int tifm_ms_transfer_data(struct tifm_ms *host)
  159. {
  160. struct tifm_dev *sock = host->dev;
  161. unsigned int length;
  162. unsigned int off;
  163. unsigned int t_size, p_cnt;
  164. unsigned char *buf;
  165. struct page *pg;
  166. unsigned long flags = 0;
  167. if (host->req->long_data) {
  168. length = host->req->sg.length - host->block_pos;
  169. off = host->req->sg.offset + host->block_pos;
  170. } else {
  171. length = host->req->data_len - host->block_pos;
  172. off = 0;
  173. }
  174. dev_dbg(&sock->dev, "fifo data transfer, %d, %d\n", length,
  175. host->block_pos);
  176. while (length) {
  177. unsigned int uninitialized_var(p_off);
  178. if (host->req->long_data) {
  179. pg = nth_page(sg_page(&host->req->sg),
  180. off >> PAGE_SHIFT);
  181. p_off = offset_in_page(off);
  182. p_cnt = PAGE_SIZE - p_off;
  183. p_cnt = min(p_cnt, length);
  184. local_irq_save(flags);
  185. buf = kmap_atomic(pg) + p_off;
  186. } else {
  187. buf = host->req->data + host->block_pos;
  188. p_cnt = host->req->data_len - host->block_pos;
  189. }
  190. t_size = host->req->data_dir == WRITE
  191. ? tifm_ms_write_data(host, buf, p_cnt)
  192. : tifm_ms_read_data(host, buf, p_cnt);
  193. if (host->req->long_data) {
  194. kunmap_atomic(buf - p_off);
  195. local_irq_restore(flags);
  196. }
  197. if (!t_size)
  198. break;
  199. host->block_pos += t_size;
  200. length -= t_size;
  201. off += t_size;
  202. }
  203. dev_dbg(&sock->dev, "fifo data transfer, %d remaining\n", length);
  204. if (!length && (host->req->data_dir == WRITE)) {
  205. if (host->io_pos) {
  206. writel(TIFM_MS_SYS_FDIR
  207. | readl(sock->addr + SOCK_MS_SYSTEM),
  208. sock->addr + SOCK_MS_SYSTEM);
  209. writel(host->io_word, sock->addr + SOCK_MS_DATA);
  210. }
  211. writel(TIFM_MS_SYS_FDIR
  212. | readl(sock->addr + SOCK_MS_SYSTEM),
  213. sock->addr + SOCK_MS_SYSTEM);
  214. writel(0, sock->addr + SOCK_MS_DATA);
  215. } else {
  216. readl(sock->addr + SOCK_MS_DATA);
  217. }
  218. return length;
  219. }
  220. static int tifm_ms_issue_cmd(struct tifm_ms *host)
  221. {
  222. struct tifm_dev *sock = host->dev;
  223. unsigned char *data;
  224. unsigned int data_len, cmd, sys_param;
  225. host->cmd_flags = 0;
  226. host->block_pos = 0;
  227. host->io_pos = 0;
  228. host->io_word = 0;
  229. host->cmd_flags = 0;
  230. data = host->req->data;
  231. host->use_dma = !no_dma;
  232. if (host->req->long_data) {
  233. data_len = host->req->sg.length;
  234. if (!is_power_of_2(data_len))
  235. host->use_dma = 0;
  236. } else {
  237. data_len = host->req->data_len;
  238. host->use_dma = 0;
  239. }
  240. writel(TIFM_FIFO_INT_SETALL,
  241. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  242. writel(TIFM_FIFO_ENABLE,
  243. sock->addr + SOCK_FIFO_CONTROL);
  244. if (host->use_dma) {
  245. if (1 != tifm_map_sg(sock, &host->req->sg, 1,
  246. host->req->data_dir == READ
  247. ? PCI_DMA_FROMDEVICE
  248. : PCI_DMA_TODEVICE)) {
  249. host->req->error = -ENOMEM;
  250. return host->req->error;
  251. }
  252. data_len = sg_dma_len(&host->req->sg);
  253. writel(ilog2(data_len) - 2,
  254. sock->addr + SOCK_FIFO_PAGE_SIZE);
  255. writel(TIFM_FIFO_INTMASK,
  256. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  257. sys_param = TIFM_DMA_EN | (1 << 8);
  258. if (host->req->data_dir == WRITE)
  259. sys_param |= TIFM_DMA_TX;
  260. writel(TIFM_FIFO_INTMASK,
  261. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  262. writel(sg_dma_address(&host->req->sg),
  263. sock->addr + SOCK_DMA_ADDRESS);
  264. writel(sys_param, sock->addr + SOCK_DMA_CONTROL);
  265. } else {
  266. writel(host->mode_mask | TIFM_MS_SYS_FIFO,
  267. sock->addr + SOCK_MS_SYSTEM);
  268. writel(TIFM_FIFO_MORE,
  269. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  270. }
  271. mod_timer(&host->timer, jiffies + host->timeout_jiffies);
  272. writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
  273. sock->addr + SOCK_CONTROL);
  274. host->req->error = 0;
  275. sys_param = readl(sock->addr + SOCK_MS_SYSTEM);
  276. sys_param |= TIFM_MS_SYS_INTCLR;
  277. if (host->use_dma)
  278. sys_param |= TIFM_MS_SYS_DMA;
  279. else
  280. sys_param &= ~TIFM_MS_SYS_DMA;
  281. writel(sys_param, sock->addr + SOCK_MS_SYSTEM);
  282. cmd = (host->req->tpc & 0xf) << 12;
  283. cmd |= data_len;
  284. writel(cmd, sock->addr + SOCK_MS_COMMAND);
  285. dev_dbg(&sock->dev, "executing TPC %x, %x\n", cmd, sys_param);
  286. return 0;
  287. }
  288. static void tifm_ms_complete_cmd(struct tifm_ms *host)
  289. {
  290. struct tifm_dev *sock = host->dev;
  291. struct memstick_host *msh = tifm_get_drvdata(sock);
  292. int rc;
  293. del_timer(&host->timer);
  294. host->req->int_reg = readl(sock->addr + SOCK_MS_STATUS) & 0xff;
  295. host->req->int_reg = (host->req->int_reg & 1)
  296. | ((host->req->int_reg << 4) & 0xe0);
  297. writel(TIFM_FIFO_INT_SETALL,
  298. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  299. writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
  300. if (host->use_dma) {
  301. tifm_unmap_sg(sock, &host->req->sg, 1,
  302. host->req->data_dir == READ
  303. ? PCI_DMA_FROMDEVICE
  304. : PCI_DMA_TODEVICE);
  305. }
  306. writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
  307. sock->addr + SOCK_CONTROL);
  308. dev_dbg(&sock->dev, "TPC complete\n");
  309. do {
  310. rc = memstick_next_req(msh, &host->req);
  311. } while (!rc && tifm_ms_issue_cmd(host));
  312. }
  313. static int tifm_ms_check_status(struct tifm_ms *host)
  314. {
  315. if (!host->req->error) {
  316. if (!(host->cmd_flags & CMD_READY))
  317. return 1;
  318. if (!(host->cmd_flags & FIFO_READY))
  319. return 1;
  320. if (host->req->need_card_int
  321. && !(host->cmd_flags & CARD_INT))
  322. return 1;
  323. }
  324. return 0;
  325. }
  326. /* Called from interrupt handler */
  327. static void tifm_ms_data_event(struct tifm_dev *sock)
  328. {
  329. struct tifm_ms *host;
  330. unsigned int fifo_status = 0, host_status = 0;
  331. int rc = 1;
  332. spin_lock(&sock->lock);
  333. host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock));
  334. fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
  335. host_status = readl(sock->addr + SOCK_MS_STATUS);
  336. dev_dbg(&sock->dev,
  337. "data event: fifo_status %x, host_status %x, flags %x\n",
  338. fifo_status, host_status, host->cmd_flags);
  339. if (host->req) {
  340. if (host->use_dma && (fifo_status & 1)) {
  341. host->cmd_flags |= FIFO_READY;
  342. rc = tifm_ms_check_status(host);
  343. }
  344. if (!host->use_dma && (fifo_status & TIFM_FIFO_MORE)) {
  345. if (!tifm_ms_transfer_data(host)) {
  346. host->cmd_flags |= FIFO_READY;
  347. rc = tifm_ms_check_status(host);
  348. }
  349. }
  350. }
  351. writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
  352. if (!rc)
  353. tifm_ms_complete_cmd(host);
  354. spin_unlock(&sock->lock);
  355. }
  356. /* Called from interrupt handler */
  357. static void tifm_ms_card_event(struct tifm_dev *sock)
  358. {
  359. struct tifm_ms *host;
  360. unsigned int host_status = 0;
  361. int rc = 1;
  362. spin_lock(&sock->lock);
  363. host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock));
  364. host_status = readl(sock->addr + SOCK_MS_STATUS);
  365. dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n",
  366. host_status, host->cmd_flags);
  367. if (host->req) {
  368. if (host_status & TIFM_MS_STAT_TOE)
  369. host->req->error = -ETIME;
  370. else if (host_status & TIFM_MS_STAT_CRC)
  371. host->req->error = -EILSEQ;
  372. if (host_status & TIFM_MS_STAT_RDY)
  373. host->cmd_flags |= CMD_READY;
  374. if (host_status & TIFM_MS_STAT_MSINT)
  375. host->cmd_flags |= CARD_INT;
  376. rc = tifm_ms_check_status(host);
  377. }
  378. writel(TIFM_MS_SYS_INTCLR | readl(sock->addr + SOCK_MS_SYSTEM),
  379. sock->addr + SOCK_MS_SYSTEM);
  380. if (!rc)
  381. tifm_ms_complete_cmd(host);
  382. spin_unlock(&sock->lock);
  383. return;
  384. }
  385. static void tifm_ms_req_tasklet(unsigned long data)
  386. {
  387. struct memstick_host *msh = (struct memstick_host *)data;
  388. struct tifm_ms *host = memstick_priv(msh);
  389. struct tifm_dev *sock = host->dev;
  390. unsigned long flags;
  391. int rc;
  392. spin_lock_irqsave(&sock->lock, flags);
  393. if (!host->req) {
  394. if (host->eject) {
  395. do {
  396. rc = memstick_next_req(msh, &host->req);
  397. if (!rc)
  398. host->req->error = -ETIME;
  399. } while (!rc);
  400. spin_unlock_irqrestore(&sock->lock, flags);
  401. return;
  402. }
  403. do {
  404. rc = memstick_next_req(msh, &host->req);
  405. } while (!rc && tifm_ms_issue_cmd(host));
  406. }
  407. spin_unlock_irqrestore(&sock->lock, flags);
  408. }
  409. static void tifm_ms_dummy_submit(struct memstick_host *msh)
  410. {
  411. return;
  412. }
  413. static void tifm_ms_submit_req(struct memstick_host *msh)
  414. {
  415. struct tifm_ms *host = memstick_priv(msh);
  416. tasklet_schedule(&host->notify);
  417. }
  418. static int tifm_ms_set_param(struct memstick_host *msh,
  419. enum memstick_param param,
  420. int value)
  421. {
  422. struct tifm_ms *host = memstick_priv(msh);
  423. struct tifm_dev *sock = host->dev;
  424. switch (param) {
  425. case MEMSTICK_POWER:
  426. /* also affected by media detection mechanism */
  427. if (value == MEMSTICK_POWER_ON) {
  428. host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI;
  429. writel(TIFM_MS_SYS_RESET, sock->addr + SOCK_MS_SYSTEM);
  430. writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
  431. sock->addr + SOCK_MS_SYSTEM);
  432. writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
  433. } else if (value == MEMSTICK_POWER_OFF) {
  434. writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
  435. sock->addr + SOCK_MS_SYSTEM);
  436. writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
  437. } else
  438. return -EINVAL;
  439. break;
  440. case MEMSTICK_INTERFACE:
  441. if (value == MEMSTICK_SERIAL) {
  442. host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI;
  443. writel((~TIFM_CTRL_FAST_CLK)
  444. & readl(sock->addr + SOCK_CONTROL),
  445. sock->addr + SOCK_CONTROL);
  446. } else if (value == MEMSTICK_PAR4) {
  447. host->mode_mask = 0;
  448. writel(TIFM_CTRL_FAST_CLK
  449. | readl(sock->addr + SOCK_CONTROL),
  450. sock->addr + SOCK_CONTROL);
  451. } else
  452. return -EINVAL;
  453. break;
  454. };
  455. return 0;
  456. }
  457. static void tifm_ms_abort(unsigned long data)
  458. {
  459. struct tifm_ms *host = (struct tifm_ms *)data;
  460. dev_dbg(&host->dev->dev, "status %x\n",
  461. readl(host->dev->addr + SOCK_MS_STATUS));
  462. printk(KERN_ERR
  463. "%s : card failed to respond for a long period of time "
  464. "(%x, %x)\n",
  465. dev_name(&host->dev->dev), host->req ? host->req->tpc : 0,
  466. host->cmd_flags);
  467. tifm_eject(host->dev);
  468. }
  469. static int tifm_ms_probe(struct tifm_dev *sock)
  470. {
  471. struct memstick_host *msh;
  472. struct tifm_ms *host;
  473. int rc = -EIO;
  474. if (!(TIFM_SOCK_STATE_OCCUPIED
  475. & readl(sock->addr + SOCK_PRESENT_STATE))) {
  476. printk(KERN_WARNING "%s : card gone, unexpectedly\n",
  477. dev_name(&sock->dev));
  478. return rc;
  479. }
  480. msh = memstick_alloc_host(sizeof(struct tifm_ms), &sock->dev);
  481. if (!msh)
  482. return -ENOMEM;
  483. host = memstick_priv(msh);
  484. tifm_set_drvdata(sock, msh);
  485. host->dev = sock;
  486. host->timeout_jiffies = msecs_to_jiffies(1000);
  487. setup_timer(&host->timer, tifm_ms_abort, (unsigned long)host);
  488. tasklet_init(&host->notify, tifm_ms_req_tasklet, (unsigned long)msh);
  489. msh->request = tifm_ms_submit_req;
  490. msh->set_param = tifm_ms_set_param;
  491. sock->card_event = tifm_ms_card_event;
  492. sock->data_event = tifm_ms_data_event;
  493. if (tifm_has_ms_pif(sock))
  494. msh->caps |= MEMSTICK_CAP_PAR4;
  495. rc = memstick_add_host(msh);
  496. if (!rc)
  497. return 0;
  498. memstick_free_host(msh);
  499. return rc;
  500. }
  501. static void tifm_ms_remove(struct tifm_dev *sock)
  502. {
  503. struct memstick_host *msh = tifm_get_drvdata(sock);
  504. struct tifm_ms *host = memstick_priv(msh);
  505. int rc = 0;
  506. unsigned long flags;
  507. msh->request = tifm_ms_dummy_submit;
  508. tasklet_kill(&host->notify);
  509. spin_lock_irqsave(&sock->lock, flags);
  510. host->eject = 1;
  511. if (host->req) {
  512. del_timer(&host->timer);
  513. writel(TIFM_FIFO_INT_SETALL,
  514. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  515. writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
  516. if (host->use_dma)
  517. tifm_unmap_sg(sock, &host->req->sg, 1,
  518. host->req->data_dir == READ
  519. ? PCI_DMA_TODEVICE
  520. : PCI_DMA_FROMDEVICE);
  521. host->req->error = -ETIME;
  522. do {
  523. rc = memstick_next_req(msh, &host->req);
  524. if (!rc)
  525. host->req->error = -ETIME;
  526. } while (!rc);
  527. }
  528. spin_unlock_irqrestore(&sock->lock, flags);
  529. memstick_remove_host(msh);
  530. memstick_free_host(msh);
  531. }
  532. #ifdef CONFIG_PM
  533. static int tifm_ms_suspend(struct tifm_dev *sock, pm_message_t state)
  534. {
  535. struct memstick_host *msh = tifm_get_drvdata(sock);
  536. memstick_suspend_host(msh);
  537. return 0;
  538. }
  539. static int tifm_ms_resume(struct tifm_dev *sock)
  540. {
  541. struct memstick_host *msh = tifm_get_drvdata(sock);
  542. memstick_resume_host(msh);
  543. return 0;
  544. }
  545. #else
  546. #define tifm_ms_suspend NULL
  547. #define tifm_ms_resume NULL
  548. #endif /* CONFIG_PM */
  549. static struct tifm_device_id tifm_ms_id_tbl[] = {
  550. { TIFM_TYPE_MS }, { 0 }
  551. };
  552. static struct tifm_driver tifm_ms_driver = {
  553. .driver = {
  554. .name = DRIVER_NAME,
  555. .owner = THIS_MODULE
  556. },
  557. .id_table = tifm_ms_id_tbl,
  558. .probe = tifm_ms_probe,
  559. .remove = tifm_ms_remove,
  560. .suspend = tifm_ms_suspend,
  561. .resume = tifm_ms_resume
  562. };
  563. static int __init tifm_ms_init(void)
  564. {
  565. return tifm_register_driver(&tifm_ms_driver);
  566. }
  567. static void __exit tifm_ms_exit(void)
  568. {
  569. tifm_unregister_driver(&tifm_ms_driver);
  570. }
  571. MODULE_AUTHOR("Alex Dubov");
  572. MODULE_DESCRIPTION("TI FlashMedia MemoryStick driver");
  573. MODULE_LICENSE("GPL");
  574. MODULE_DEVICE_TABLE(tifm, tifm_ms_id_tbl);
  575. module_init(tifm_ms_init);
  576. module_exit(tifm_ms_exit);