mpi_ioc.h 59 KB

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  1. /*
  2. * Copyright (c) 2000-2008 LSI Corporation.
  3. *
  4. *
  5. * Name: mpi_ioc.h
  6. * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
  7. * Creation Date: August 11, 2000
  8. *
  9. * mpi_ioc.h Version: 01.05.16
  10. *
  11. * Version History
  12. * ---------------
  13. *
  14. * Date Version Description
  15. * -------- -------- ------------------------------------------------------
  16. * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
  17. * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure.
  18. * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
  19. * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure.
  20. * Added _MSG_EVENT_ACK_REPLY structure.
  21. * Added _MSG_FW_DOWNLOAD_REPLY structure.
  22. * Added _MSG_TOOLBOX_REPLY structure.
  23. * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure.
  24. * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI,
  25. * _LINK_STATUS, _LOOP_STATE and _LOGOUT.
  26. * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in
  27. * _MSG_EVENT_ACK_REPLY structure to match specification.
  28. * 11-02-00 01.01.01 Original release for post 1.0 work.
  29. * Added a value for Manufacturer to WhoInit.
  30. * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and
  31. * removed toolbox message.
  32. * 01-09-01 01.01.03 Added event enabled and disabled defines.
  33. * Added structures for FwHeader and DataHeader.
  34. * Added ImageType to FwUpload reply.
  35. * 02-20-01 01.01.04 Started using MPI_POINTER.
  36. * 02-27-01 01.01.05 Added event for RAID status change and its event data.
  37. * Added IocNumber field to MSG_IOC_FACTS_REPLY.
  38. * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER.
  39. * Added structure offset comments.
  40. * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE.
  41. * 08-08-01 01.02.01 Original release for v1.2 work.
  42. * New format for FWVersion and ProductId in
  43. * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
  44. * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
  45. * related structure and defines.
  46. * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
  47. * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
  48. * Replaced a reserved field in MSG_IOC_FACTS_REPLY with
  49. * IOCExceptions and changed DataImageSize to reserved.
  50. * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
  51. * MPI_FW_UPLOAD_ITYPE_NVDATA.
  52. * 09-28-01 01.02.03 Modified Event Data for Integrated RAID.
  53. * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
  54. * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
  55. * 05-31-02 01.02.06 Added define for
  56. * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
  57. * Added AliasIndex to EVENT_DATA_LOGOUT structure.
  58. * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.
  59. * 06-26-03 01.02.08 Added new values to the product family defines.
  60. * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
  61. * added related defines.
  62. * 05-11-04 01.03.01 Original release for MPI v1.3.
  63. * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT.
  64. * Added three new fields to MSG_IOC_FACTS_REPLY.
  65. * Defined four new bits for the IOCCapabilities field of
  66. * the IOCFacts reply.
  67. * Added two new PortTypes for the PortFacts reply.
  68. * Added six new events along with their EventData
  69. * structures.
  70. * Added a new MsgFlag to the FwDownload request to
  71. * indicate last segment.
  72. * Defined a new image type of boot loader.
  73. * Added FW family codes for SAS product families.
  74. * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to
  75. * MSG_IOC_FACTS_REPLY.
  76. * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event.
  77. * 12-09-04 01.05.04 Added Unsupported device to SAS Device event.
  78. * 01-15-05 01.05.05 Added event data for SAS SES Event.
  79. * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
  80. * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts
  81. * Reply and IOC Init Request.
  82. * 03-11-05 01.05.08 Added family code for 1068E family.
  83. * Removed IOCFacts Reply EEDP Capability bit.
  84. * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits.
  85. * Added Max SATA Targets to SAS Discovery Error event.
  86. * 08-30-05 01.05.10 Added 4 new events and their event data structures.
  87. * Added new ReasonCode value for SAS Device Status Change
  88. * event.
  89. * Added new family code for FC949E.
  90. * 03-27-06 01.05.11 Added MPI_IOCFACTS_CAPABILITY_TLR.
  91. * Added additional Reason Codes and more event data fields
  92. * to EVENT_DATA_SAS_DEVICE_STATUS_CHANGE.
  93. * Added EVENT_DATA_SAS_BROADCAST_PRIMITIVE structure and
  94. * new event.
  95. * Added MPI_EVENT_SAS_SMP_ERROR and event data structure.
  96. * Added MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE and event
  97. * data structure.
  98. * Added MPI_EVENT_SAS_INIT_TABLE_OVERFLOW and event
  99. * data structure.
  100. * Added MPI_EXT_IMAGE_TYPE_INITIALIZATION.
  101. * 10-11-06 01.05.12 Added MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED.
  102. * Added MaxInitiators field to PortFacts reply.
  103. * Added SAS Device Status Change ReasonCode for
  104. * asynchronous notificaiton.
  105. * Added MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE and event
  106. * data structure.
  107. * Added new ImageType values for FWDownload and FWUpload
  108. * requests.
  109. * 02-28-07 01.05.13 Added MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT for SAS
  110. * Broadcast Event Data (replacing _RESERVED2).
  111. * For Discovery Error Event Data DiscoveryStatus field,
  112. * replaced _MULTPL_PATHS with _UNSUPPORTED_DEVICE and
  113. * added _MULTI_PORT_DOMAIN.
  114. * 05-24-07 01.05.14 Added Common Boot Block type to FWDownload Request.
  115. * Added Common Boot Block type to FWUpload Request.
  116. * 08-07-07 01.05.15 Added MPI_EVENT_SAS_INIT_RC_REMOVED define.
  117. * Added MPI_EVENT_IR2_RC_DUAL_PORT_ADDED and
  118. * MPI_EVENT_IR2_RC_DUAL_PORT_REMOVED for IR2 event data.
  119. * Added SASAddress field to SAS Initiator Device Table
  120. * Overflow event data structure.
  121. * 03-28-08 01.05.16 Added two new ReasonCode values to SAS Device Status
  122. * Change Event data to indicate completion of internally
  123. * generated task management.
  124. * Added MPI_EVENT_DSCVRY_ERR_DS_SATA_INIT_FAILURE define.
  125. * Added MPI_EVENT_SAS_INIT_RC_INACCESSIBLE define.
  126. * --------------------------------------------------------------------------
  127. */
  128. #ifndef MPI_IOC_H
  129. #define MPI_IOC_H
  130. /*****************************************************************************
  131. *
  132. * I O C M e s s a g e s
  133. *
  134. *****************************************************************************/
  135. /****************************************************************************/
  136. /* IOCInit message */
  137. /****************************************************************************/
  138. typedef struct _MSG_IOC_INIT
  139. {
  140. U8 WhoInit; /* 00h */
  141. U8 Reserved; /* 01h */
  142. U8 ChainOffset; /* 02h */
  143. U8 Function; /* 03h */
  144. U8 Flags; /* 04h */
  145. U8 MaxDevices; /* 05h */
  146. U8 MaxBuses; /* 06h */
  147. U8 MsgFlags; /* 07h */
  148. U32 MsgContext; /* 08h */
  149. U16 ReplyFrameSize; /* 0Ch */
  150. U8 Reserved1[2]; /* 0Eh */
  151. U32 HostMfaHighAddr; /* 10h */
  152. U32 SenseBufferHighAddr; /* 14h */
  153. U32 ReplyFifoHostSignalingAddr; /* 18h */
  154. SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */
  155. U16 MsgVersion; /* 28h */
  156. U16 HeaderVersion; /* 2Ah */
  157. } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
  158. IOCInit_t, MPI_POINTER pIOCInit_t;
  159. /* WhoInit values */
  160. #define MPI_WHOINIT_NO_ONE (0x00)
  161. #define MPI_WHOINIT_SYSTEM_BIOS (0x01)
  162. #define MPI_WHOINIT_ROM_BIOS (0x02)
  163. #define MPI_WHOINIT_PCI_PEER (0x03)
  164. #define MPI_WHOINIT_HOST_DRIVER (0x04)
  165. #define MPI_WHOINIT_MANUFACTURER (0x05)
  166. /* Flags values */
  167. #define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
  168. #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
  169. #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
  170. /* MsgVersion */
  171. #define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
  172. #define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
  173. #define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
  174. #define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
  175. /* HeaderVersion */
  176. #define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00)
  177. #define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8)
  178. #define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF)
  179. #define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0)
  180. typedef struct _MSG_IOC_INIT_REPLY
  181. {
  182. U8 WhoInit; /* 00h */
  183. U8 Reserved; /* 01h */
  184. U8 MsgLength; /* 02h */
  185. U8 Function; /* 03h */
  186. U8 Flags; /* 04h */
  187. U8 MaxDevices; /* 05h */
  188. U8 MaxBuses; /* 06h */
  189. U8 MsgFlags; /* 07h */
  190. U32 MsgContext; /* 08h */
  191. U16 Reserved2; /* 0Ch */
  192. U16 IOCStatus; /* 0Eh */
  193. U32 IOCLogInfo; /* 10h */
  194. } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
  195. IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
  196. /****************************************************************************/
  197. /* IOC Facts message */
  198. /****************************************************************************/
  199. typedef struct _MSG_IOC_FACTS
  200. {
  201. U8 Reserved[2]; /* 00h */
  202. U8 ChainOffset; /* 01h */
  203. U8 Function; /* 02h */
  204. U8 Reserved1[3]; /* 03h */
  205. U8 MsgFlags; /* 04h */
  206. U32 MsgContext; /* 08h */
  207. } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
  208. IOCFacts_t, MPI_POINTER pIOCFacts_t;
  209. typedef struct _MPI_FW_VERSION_STRUCT
  210. {
  211. U8 Dev; /* 00h */
  212. U8 Unit; /* 01h */
  213. U8 Minor; /* 02h */
  214. U8 Major; /* 03h */
  215. } MPI_FW_VERSION_STRUCT;
  216. typedef union _MPI_FW_VERSION
  217. {
  218. MPI_FW_VERSION_STRUCT Struct;
  219. U32 Word;
  220. } MPI_FW_VERSION;
  221. /* IOC Facts Reply */
  222. typedef struct _MSG_IOC_FACTS_REPLY
  223. {
  224. U16 MsgVersion; /* 00h */
  225. U8 MsgLength; /* 02h */
  226. U8 Function; /* 03h */
  227. U16 HeaderVersion; /* 04h */
  228. U8 IOCNumber; /* 06h */
  229. U8 MsgFlags; /* 07h */
  230. U32 MsgContext; /* 08h */
  231. U16 IOCExceptions; /* 0Ch */
  232. U16 IOCStatus; /* 0Eh */
  233. U32 IOCLogInfo; /* 10h */
  234. U8 MaxChainDepth; /* 14h */
  235. U8 WhoInit; /* 15h */
  236. U8 BlockSize; /* 16h */
  237. U8 Flags; /* 17h */
  238. U16 ReplyQueueDepth; /* 18h */
  239. U16 RequestFrameSize; /* 1Ah */
  240. U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */
  241. U16 ProductID; /* 1Eh */
  242. U32 CurrentHostMfaHighAddr; /* 20h */
  243. U16 GlobalCredits; /* 24h */
  244. U8 NumberOfPorts; /* 26h */
  245. U8 EventState; /* 27h */
  246. U32 CurrentSenseBufferHighAddr; /* 28h */
  247. U16 CurReplyFrameSize; /* 2Ch */
  248. U8 MaxDevices; /* 2Eh */
  249. U8 MaxBuses; /* 2Fh */
  250. U32 FWImageSize; /* 30h */
  251. U32 IOCCapabilities; /* 34h */
  252. MPI_FW_VERSION FWVersion; /* 38h */
  253. U16 HighPriorityQueueDepth; /* 3Ch */
  254. U16 Reserved2; /* 3Eh */
  255. SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */
  256. U32 ReplyFifoHostSignalingAddr; /* 4Ch */
  257. } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
  258. IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
  259. #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
  260. #define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
  261. #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
  262. #define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
  263. #define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
  264. #define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
  265. #define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
  266. #define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
  267. #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
  268. #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
  269. #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
  270. #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
  271. #define MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010)
  272. #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
  273. #define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
  274. #define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
  275. #define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
  276. #define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
  277. #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
  278. #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
  279. #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
  280. #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
  281. #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
  282. #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
  283. #define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
  284. #define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080)
  285. #define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
  286. #define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200)
  287. #define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400)
  288. #define MPI_IOCFACTS_CAPABILITY_TLR (0x00000800)
  289. /*****************************************************************************
  290. *
  291. * P o r t M e s s a g e s
  292. *
  293. *****************************************************************************/
  294. /****************************************************************************/
  295. /* Port Facts message and Reply */
  296. /****************************************************************************/
  297. typedef struct _MSG_PORT_FACTS
  298. {
  299. U8 Reserved[2]; /* 00h */
  300. U8 ChainOffset; /* 02h */
  301. U8 Function; /* 03h */
  302. U8 Reserved1[2]; /* 04h */
  303. U8 PortNumber; /* 06h */
  304. U8 MsgFlags; /* 07h */
  305. U32 MsgContext; /* 08h */
  306. } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
  307. PortFacts_t, MPI_POINTER pPortFacts_t;
  308. typedef struct _MSG_PORT_FACTS_REPLY
  309. {
  310. U16 Reserved; /* 00h */
  311. U8 MsgLength; /* 02h */
  312. U8 Function; /* 03h */
  313. U16 Reserved1; /* 04h */
  314. U8 PortNumber; /* 06h */
  315. U8 MsgFlags; /* 07h */
  316. U32 MsgContext; /* 08h */
  317. U16 Reserved2; /* 0Ch */
  318. U16 IOCStatus; /* 0Eh */
  319. U32 IOCLogInfo; /* 10h */
  320. U8 Reserved3; /* 14h */
  321. U8 PortType; /* 15h */
  322. U16 MaxDevices; /* 16h */
  323. U16 PortSCSIID; /* 18h */
  324. U16 ProtocolFlags; /* 1Ah */
  325. U16 MaxPostedCmdBuffers; /* 1Ch */
  326. U16 MaxPersistentIDs; /* 1Eh */
  327. U16 MaxLanBuckets; /* 20h */
  328. U8 MaxInitiators; /* 22h */
  329. U8 Reserved4; /* 23h */
  330. U32 Reserved5; /* 24h */
  331. } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
  332. PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
  333. /* PortTypes values */
  334. #define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)
  335. #define MPI_PORTFACTS_PORTTYPE_SCSI (0x01)
  336. #define MPI_PORTFACTS_PORTTYPE_FC (0x10)
  337. #define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20)
  338. #define MPI_PORTFACTS_PORTTYPE_SAS (0x30)
  339. /* ProtocolFlags values */
  340. #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01)
  341. #define MPI_PORTFACTS_PROTOCOL_LAN (0x02)
  342. #define MPI_PORTFACTS_PROTOCOL_TARGET (0x04)
  343. #define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08)
  344. /****************************************************************************/
  345. /* Port Enable Message */
  346. /****************************************************************************/
  347. typedef struct _MSG_PORT_ENABLE
  348. {
  349. U8 Reserved[2]; /* 00h */
  350. U8 ChainOffset; /* 02h */
  351. U8 Function; /* 03h */
  352. U8 Reserved1[2]; /* 04h */
  353. U8 PortNumber; /* 06h */
  354. U8 MsgFlags; /* 07h */
  355. U32 MsgContext; /* 08h */
  356. } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
  357. PortEnable_t, MPI_POINTER pPortEnable_t;
  358. typedef struct _MSG_PORT_ENABLE_REPLY
  359. {
  360. U8 Reserved[2]; /* 00h */
  361. U8 MsgLength; /* 02h */
  362. U8 Function; /* 03h */
  363. U8 Reserved1[2]; /* 04h */
  364. U8 PortNumber; /* 05h */
  365. U8 MsgFlags; /* 07h */
  366. U32 MsgContext; /* 08h */
  367. U16 Reserved2; /* 0Ch */
  368. U16 IOCStatus; /* 0Eh */
  369. U32 IOCLogInfo; /* 10h */
  370. } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
  371. PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
  372. /*****************************************************************************
  373. *
  374. * E v e n t M e s s a g e s
  375. *
  376. *****************************************************************************/
  377. /****************************************************************************/
  378. /* Event Notification messages */
  379. /****************************************************************************/
  380. typedef struct _MSG_EVENT_NOTIFY
  381. {
  382. U8 Switch; /* 00h */
  383. U8 Reserved; /* 01h */
  384. U8 ChainOffset; /* 02h */
  385. U8 Function; /* 03h */
  386. U8 Reserved1[3]; /* 04h */
  387. U8 MsgFlags; /* 07h */
  388. U32 MsgContext; /* 08h */
  389. } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
  390. EventNotification_t, MPI_POINTER pEventNotification_t;
  391. /* Event Notification Reply */
  392. typedef struct _MSG_EVENT_NOTIFY_REPLY
  393. {
  394. U16 EventDataLength; /* 00h */
  395. U8 MsgLength; /* 02h */
  396. U8 Function; /* 03h */
  397. U8 Reserved1[2]; /* 04h */
  398. U8 AckRequired; /* 06h */
  399. U8 MsgFlags; /* 07h */
  400. U32 MsgContext; /* 08h */
  401. U8 Reserved2[2]; /* 0Ch */
  402. U16 IOCStatus; /* 0Eh */
  403. U32 IOCLogInfo; /* 10h */
  404. U32 Event; /* 14h */
  405. U32 EventContext; /* 18h */
  406. U32 Data[1]; /* 1Ch */
  407. } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
  408. EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
  409. /* Event Acknowledge */
  410. typedef struct _MSG_EVENT_ACK
  411. {
  412. U8 Reserved[2]; /* 00h */
  413. U8 ChainOffset; /* 02h */
  414. U8 Function; /* 03h */
  415. U8 Reserved1[3]; /* 04h */
  416. U8 MsgFlags; /* 07h */
  417. U32 MsgContext; /* 08h */
  418. U32 Event; /* 0Ch */
  419. U32 EventContext; /* 10h */
  420. } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
  421. EventAck_t, MPI_POINTER pEventAck_t;
  422. typedef struct _MSG_EVENT_ACK_REPLY
  423. {
  424. U8 Reserved[2]; /* 00h */
  425. U8 MsgLength; /* 02h */
  426. U8 Function; /* 03h */
  427. U8 Reserved1[3]; /* 04h */
  428. U8 MsgFlags; /* 07h */
  429. U32 MsgContext; /* 08h */
  430. U16 Reserved2; /* 0Ch */
  431. U16 IOCStatus; /* 0Eh */
  432. U32 IOCLogInfo; /* 10h */
  433. } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
  434. EventAckReply_t, MPI_POINTER pEventAckReply_t;
  435. /* Switch */
  436. #define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
  437. #define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
  438. /* Event */
  439. #define MPI_EVENT_NONE (0x00000000)
  440. #define MPI_EVENT_LOG_DATA (0x00000001)
  441. #define MPI_EVENT_STATE_CHANGE (0x00000002)
  442. #define MPI_EVENT_UNIT_ATTENTION (0x00000003)
  443. #define MPI_EVENT_IOC_BUS_RESET (0x00000004)
  444. #define MPI_EVENT_EXT_BUS_RESET (0x00000005)
  445. #define MPI_EVENT_RESCAN (0x00000006)
  446. #define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
  447. #define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
  448. #define MPI_EVENT_LOGOUT (0x00000009)
  449. #define MPI_EVENT_EVENT_CHANGE (0x0000000A)
  450. #define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
  451. #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
  452. #define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
  453. #define MPI_EVENT_QUEUE_FULL (0x0000000E)
  454. #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
  455. #define MPI_EVENT_SAS_SES (0x00000010)
  456. #define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
  457. #define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
  458. #define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
  459. #define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014)
  460. #define MPI_EVENT_IR2 (0x00000015)
  461. #define MPI_EVENT_SAS_DISCOVERY (0x00000016)
  462. #define MPI_EVENT_SAS_BROADCAST_PRIMITIVE (0x00000017)
  463. #define MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x00000018)
  464. #define MPI_EVENT_SAS_INIT_TABLE_OVERFLOW (0x00000019)
  465. #define MPI_EVENT_SAS_SMP_ERROR (0x0000001A)
  466. #define MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE (0x0000001B)
  467. #define MPI_EVENT_LOG_ENTRY_ADDED (0x00000021)
  468. /* AckRequired field values */
  469. #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
  470. #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
  471. /* EventChange Event data */
  472. typedef struct _EVENT_DATA_EVENT_CHANGE
  473. {
  474. U8 EventState; /* 00h */
  475. U8 Reserved; /* 01h */
  476. U16 Reserved1; /* 02h */
  477. } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
  478. EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
  479. /* LogEntryAdded Event data */
  480. /* this structure matches MPI_LOG_0_ENTRY in mpi_cnfg.h */
  481. #define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH (0x1C)
  482. typedef struct _EVENT_DATA_LOG_ENTRY
  483. {
  484. U32 TimeStamp; /* 00h */
  485. U32 Reserved1; /* 04h */
  486. U16 LogSequence; /* 08h */
  487. U16 LogEntryQualifier; /* 0Ah */
  488. U8 LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH]; /* 0Ch */
  489. } EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY,
  490. MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t;
  491. typedef struct _EVENT_DATA_LOG_ENTRY_ADDED
  492. {
  493. U16 LogSequence; /* 00h */
  494. U16 Reserved1; /* 02h */
  495. U32 Reserved2; /* 04h */
  496. EVENT_DATA_LOG_ENTRY LogEntry; /* 08h */
  497. } EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED,
  498. MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t;
  499. /* SCSI Event data for Port, Bus and Device forms */
  500. typedef struct _EVENT_DATA_SCSI
  501. {
  502. U8 TargetID; /* 00h */
  503. U8 BusPort; /* 01h */
  504. U16 Reserved; /* 02h */
  505. } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
  506. EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
  507. /* SCSI Device Status Change Event data */
  508. typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
  509. {
  510. U8 TargetID; /* 00h */
  511. U8 Bus; /* 01h */
  512. U8 ReasonCode; /* 02h */
  513. U8 LUN; /* 03h */
  514. U8 ASC; /* 04h */
  515. U8 ASCQ; /* 05h */
  516. U16 Reserved; /* 06h */
  517. } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
  518. MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
  519. MpiEventDataScsiDeviceStatusChange_t,
  520. MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
  521. /* MPI SCSI Device Status Change Event data ReasonCode values */
  522. #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03)
  523. #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04)
  524. #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05)
  525. /* SAS Device Status Change Event data */
  526. typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
  527. {
  528. U8 TargetID; /* 00h */
  529. U8 Bus; /* 01h */
  530. U8 ReasonCode; /* 02h */
  531. U8 Reserved; /* 03h */
  532. U8 ASC; /* 04h */
  533. U8 ASCQ; /* 05h */
  534. U16 DevHandle; /* 06h */
  535. U32 DeviceInfo; /* 08h */
  536. U16 ParentDevHandle; /* 0Ch */
  537. U8 PhyNum; /* 0Eh */
  538. U8 Reserved1; /* 0Fh */
  539. U64 SASAddress; /* 10h */
  540. U8 LUN[8]; /* 18h */
  541. U16 TaskTag; /* 20h */
  542. U16 Reserved2; /* 22h */
  543. } EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
  544. MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
  545. MpiEventDataSasDeviceStatusChange_t,
  546. MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
  547. /* MPI SAS Device Status Change Event data ReasonCode values */
  548. #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03)
  549. #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
  550. #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
  551. #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
  552. #define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
  553. #define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
  554. #define MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09)
  555. #define MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A)
  556. #define MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B)
  557. #define MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C)
  558. #define MPI_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D)
  559. #define MPI_EVENT_SAS_DEV_STAT_RC_CMPL_INTERNAL_DEV_RESET (0x0E)
  560. #define MPI_EVENT_SAS_DEV_STAT_RC_CMPL_TASK_ABORT_INTERNAL (0x0F)
  561. /* SCSI Event data for Queue Full event */
  562. typedef struct _EVENT_DATA_QUEUE_FULL
  563. {
  564. U8 TargetID; /* 00h */
  565. U8 Bus; /* 01h */
  566. U16 CurrentDepth; /* 02h */
  567. } EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
  568. EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
  569. /* MPI Integrated RAID Event data */
  570. typedef struct _EVENT_DATA_RAID
  571. {
  572. U8 VolumeID; /* 00h */
  573. U8 VolumeBus; /* 01h */
  574. U8 ReasonCode; /* 02h */
  575. U8 PhysDiskNum; /* 03h */
  576. U8 ASC; /* 04h */
  577. U8 ASCQ; /* 05h */
  578. U16 Reserved; /* 06h */
  579. U32 SettingsStatus; /* 08h */
  580. } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
  581. MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
  582. /* MPI Integrated RAID Event data ReasonCode values */
  583. #define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
  584. #define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
  585. #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
  586. #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
  587. #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
  588. #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
  589. #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
  590. #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
  591. #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
  592. #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
  593. #define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
  594. #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
  595. /* MPI Integrated RAID Resync Update Event data */
  596. typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE
  597. {
  598. U8 VolumeID; /* 00h */
  599. U8 VolumeBus; /* 01h */
  600. U8 ResyncComplete; /* 02h */
  601. U8 Reserved1; /* 03h */
  602. U32 Reserved2; /* 04h */
  603. } MPI_EVENT_DATA_IR_RESYNC_UPDATE,
  604. MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE,
  605. MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t;
  606. /* MPI IR2 Event data */
  607. /* MPI_LD_STATE or MPI_PD_STATE */
  608. typedef struct _IR2_STATE_CHANGED
  609. {
  610. U16 PreviousState; /* 00h */
  611. U16 NewState; /* 02h */
  612. } IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED;
  613. typedef struct _IR2_PD_INFO
  614. {
  615. U16 DeviceHandle; /* 00h */
  616. U8 TruncEnclosureHandle; /* 02h */
  617. U8 TruncatedSlot; /* 03h */
  618. } IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO;
  619. typedef union _MPI_IR2_RC_EVENT_DATA
  620. {
  621. IR2_STATE_CHANGED StateChanged;
  622. U32 Lba;
  623. IR2_PD_INFO PdInfo;
  624. } MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA;
  625. typedef struct _MPI_EVENT_DATA_IR2
  626. {
  627. U8 TargetID; /* 00h */
  628. U8 Bus; /* 01h */
  629. U8 ReasonCode; /* 02h */
  630. U8 PhysDiskNum; /* 03h */
  631. MPI_IR2_RC_EVENT_DATA IR2EventData; /* 04h */
  632. } MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2,
  633. MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t;
  634. /* MPI IR2 Event data ReasonCode values */
  635. #define MPI_EVENT_IR2_RC_LD_STATE_CHANGED (0x01)
  636. #define MPI_EVENT_IR2_RC_PD_STATE_CHANGED (0x02)
  637. #define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL (0x03)
  638. #define MPI_EVENT_IR2_RC_PD_INSERTED (0x04)
  639. #define MPI_EVENT_IR2_RC_PD_REMOVED (0x05)
  640. #define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED (0x06)
  641. #define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR (0x07)
  642. #define MPI_EVENT_IR2_RC_DUAL_PORT_ADDED (0x08)
  643. #define MPI_EVENT_IR2_RC_DUAL_PORT_REMOVED (0x09)
  644. /* defines for logical disk states */
  645. #define MPI_LD_STATE_OPTIMAL (0x00)
  646. #define MPI_LD_STATE_DEGRADED (0x01)
  647. #define MPI_LD_STATE_FAILED (0x02)
  648. #define MPI_LD_STATE_MISSING (0x03)
  649. #define MPI_LD_STATE_OFFLINE (0x04)
  650. /* defines for physical disk states */
  651. #define MPI_PD_STATE_ONLINE (0x00)
  652. #define MPI_PD_STATE_MISSING (0x01)
  653. #define MPI_PD_STATE_NOT_COMPATIBLE (0x02)
  654. #define MPI_PD_STATE_FAILED (0x03)
  655. #define MPI_PD_STATE_INITIALIZING (0x04)
  656. #define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST (0x05)
  657. #define MPI_PD_STATE_FAILED_AT_HOST_REQUEST (0x06)
  658. #define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON (0xFF)
  659. /* MPI Link Status Change Event data */
  660. typedef struct _EVENT_DATA_LINK_STATUS
  661. {
  662. U8 State; /* 00h */
  663. U8 Reserved; /* 01h */
  664. U16 Reserved1; /* 02h */
  665. U8 Reserved2; /* 04h */
  666. U8 Port; /* 05h */
  667. U16 Reserved3; /* 06h */
  668. } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
  669. EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
  670. #define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000)
  671. #define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001)
  672. /* MPI Loop State Change Event data */
  673. typedef struct _EVENT_DATA_LOOP_STATE
  674. {
  675. U8 Character4; /* 00h */
  676. U8 Character3; /* 01h */
  677. U8 Type; /* 02h */
  678. U8 Reserved; /* 03h */
  679. U8 Reserved1; /* 04h */
  680. U8 Port; /* 05h */
  681. U16 Reserved2; /* 06h */
  682. } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
  683. EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
  684. #define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001)
  685. #define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002)
  686. #define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003)
  687. /* MPI LOGOUT Event data */
  688. typedef struct _EVENT_DATA_LOGOUT
  689. {
  690. U32 NPortID; /* 00h */
  691. U8 AliasIndex; /* 04h */
  692. U8 Port; /* 05h */
  693. U16 Reserved1; /* 06h */
  694. } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
  695. EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
  696. #define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF)
  697. /* SAS SES Event data */
  698. typedef struct _EVENT_DATA_SAS_SES
  699. {
  700. U8 PhyNum; /* 00h */
  701. U8 Port; /* 01h */
  702. U8 PortWidth; /* 02h */
  703. U8 Reserved1; /* 04h */
  704. } EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
  705. MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
  706. /* SAS Broadcast Primitive Event data */
  707. typedef struct _EVENT_DATA_SAS_BROADCAST_PRIMITIVE
  708. {
  709. U8 PhyNum; /* 00h */
  710. U8 Port; /* 01h */
  711. U8 PortWidth; /* 02h */
  712. U8 Primitive; /* 04h */
  713. } EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
  714. MPI_POINTER PTR_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
  715. MpiEventDataSasBroadcastPrimitive_t,
  716. MPI_POINTER pMpiEventDataSasBroadcastPrimitive_t;
  717. #define MPI_EVENT_PRIMITIVE_CHANGE (0x01)
  718. #define MPI_EVENT_PRIMITIVE_EXPANDER (0x03)
  719. #define MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04)
  720. #define MPI_EVENT_PRIMITIVE_RESERVED3 (0x05)
  721. #define MPI_EVENT_PRIMITIVE_RESERVED4 (0x06)
  722. #define MPI_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07)
  723. #define MPI_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08)
  724. /* SAS Phy Link Status Event data */
  725. typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
  726. {
  727. U8 PhyNum; /* 00h */
  728. U8 LinkRates; /* 01h */
  729. U16 DevHandle; /* 02h */
  730. U64 SASAddress; /* 04h */
  731. } EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
  732. MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
  733. /* defines for the LinkRates field of the SAS PHY Link Status event */
  734. #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0)
  735. #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4)
  736. #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F)
  737. #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0)
  738. #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00)
  739. #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01)
  740. #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02)
  741. #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03)
  742. #define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08)
  743. #define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09)
  744. #define MPI_EVENT_SAS_PLS_LR_RATE_6_0 (0x0A)
  745. /* SAS Discovery Event data */
  746. typedef struct _EVENT_DATA_SAS_DISCOVERY
  747. {
  748. U32 DiscoveryStatus; /* 00h */
  749. U32 Reserved1; /* 04h */
  750. } EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY,
  751. EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t;
  752. #define MPI_EVENT_SAS_DSCVRY_COMPLETE (0x00000000)
  753. #define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS (0x00000001)
  754. #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK (0xFFFF0000)
  755. #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT (16)
  756. /* SAS Discovery Error Event data */
  757. typedef struct _EVENT_DATA_DISCOVERY_ERROR
  758. {
  759. U32 DiscoveryStatus; /* 00h */
  760. U8 Port; /* 04h */
  761. U8 Reserved1; /* 05h */
  762. U16 Reserved2; /* 06h */
  763. } EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
  764. EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
  765. #define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001)
  766. #define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002)
  767. #define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004)
  768. #define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
  769. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
  770. #define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
  771. #define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
  772. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
  773. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
  774. #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
  775. #define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
  776. #define MPI_EVENT_DSCVRY_ERR_DS_UNSUPPORTED_DEVICE (0x00000800)
  777. #define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000)
  778. #define MPI_EVENT_DSCVRY_ERR_DS_MULTI_PORT_DOMAIN (0x00002000)
  779. #define MPI_EVENT_DSCVRY_ERR_DS_SATA_INIT_FAILURE (0x00004000)
  780. /* SAS SMP Error Event data */
  781. typedef struct _EVENT_DATA_SAS_SMP_ERROR
  782. {
  783. U8 Status; /* 00h */
  784. U8 Port; /* 01h */
  785. U8 SMPFunctionResult; /* 02h */
  786. U8 Reserved1; /* 03h */
  787. U64 SASAddress; /* 04h */
  788. } EVENT_DATA_SAS_SMP_ERROR, MPI_POINTER PTR_EVENT_DATA_SAS_SMP_ERROR,
  789. MpiEventDataSasSmpError_t, MPI_POINTER pMpiEventDataSasSmpError_t;
  790. /* defines for the Status field of the SAS SMP Error event */
  791. #define MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID (0x00)
  792. #define MPI_EVENT_SAS_SMP_CRC_ERROR (0x01)
  793. #define MPI_EVENT_SAS_SMP_TIMEOUT (0x02)
  794. #define MPI_EVENT_SAS_SMP_NO_DESTINATION (0x03)
  795. #define MPI_EVENT_SAS_SMP_BAD_DESTINATION (0x04)
  796. /* SAS Initiator Device Status Change Event data */
  797. typedef struct _EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
  798. {
  799. U8 ReasonCode; /* 00h */
  800. U8 Port; /* 01h */
  801. U16 DevHandle; /* 02h */
  802. U64 SASAddress; /* 04h */
  803. } EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
  804. MPI_POINTER PTR_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
  805. MpiEventDataSasInitDevStatusChange_t,
  806. MPI_POINTER pMpiEventDataSasInitDevStatusChange_t;
  807. /* defines for the ReasonCode field of the SAS Initiator Device Status Change event */
  808. #define MPI_EVENT_SAS_INIT_RC_ADDED (0x01)
  809. #define MPI_EVENT_SAS_INIT_RC_REMOVED (0x02)
  810. #define MPI_EVENT_SAS_INIT_RC_INACCESSIBLE (0x03)
  811. /* SAS Initiator Device Table Overflow Event data */
  812. typedef struct _EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
  813. {
  814. U8 MaxInit; /* 00h */
  815. U8 CurrentInit; /* 01h */
  816. U16 Reserved1; /* 02h */
  817. U64 SASAddress; /* 04h */
  818. } EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
  819. MPI_POINTER PTR_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
  820. MpiEventDataSasInitTableOverflow_t,
  821. MPI_POINTER pMpiEventDataSasInitTableOverflow_t;
  822. /* SAS Expander Status Change Event data */
  823. typedef struct _EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE
  824. {
  825. U8 ReasonCode; /* 00h */
  826. U8 Reserved1; /* 01h */
  827. U16 Reserved2; /* 02h */
  828. U8 PhysicalPort; /* 04h */
  829. U8 Reserved3; /* 05h */
  830. U16 EnclosureHandle; /* 06h */
  831. U64 SASAddress; /* 08h */
  832. U32 DiscoveryStatus; /* 10h */
  833. U16 DevHandle; /* 14h */
  834. U16 ParentDevHandle; /* 16h */
  835. U16 ExpanderChangeCount; /* 18h */
  836. U16 ExpanderRouteIndexes; /* 1Ah */
  837. U8 NumPhys; /* 1Ch */
  838. U8 SASLevel; /* 1Dh */
  839. U8 Flags; /* 1Eh */
  840. U8 Reserved4; /* 1Fh */
  841. } EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
  842. MPI_POINTER PTR_EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
  843. MpiEventDataSasExpanderStatusChange_t,
  844. MPI_POINTER pMpiEventDataSasExpanderStatusChange_t;
  845. /* values for ReasonCode field of SAS Expander Status Change Event data */
  846. #define MPI_EVENT_SAS_EXP_RC_ADDED (0x00)
  847. #define MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING (0x01)
  848. /* values for DiscoveryStatus field of SAS Expander Status Change Event data */
  849. #define MPI_EVENT_SAS_EXP_DS_LOOP_DETECTED (0x00000001)
  850. #define MPI_EVENT_SAS_EXP_DS_UNADDRESSABLE_DEVICE (0x00000002)
  851. #define MPI_EVENT_SAS_EXP_DS_MULTIPLE_PORTS (0x00000004)
  852. #define MPI_EVENT_SAS_EXP_DS_EXPANDER_ERR (0x00000008)
  853. #define MPI_EVENT_SAS_EXP_DS_SMP_TIMEOUT (0x00000010)
  854. #define MPI_EVENT_SAS_EXP_DS_OUT_ROUTE_ENTRIES (0x00000020)
  855. #define MPI_EVENT_SAS_EXP_DS_INDEX_NOT_EXIST (0x00000040)
  856. #define MPI_EVENT_SAS_EXP_DS_SMP_FUNCTION_FAILED (0x00000080)
  857. #define MPI_EVENT_SAS_EXP_DS_SMP_CRC_ERROR (0x00000100)
  858. #define MPI_EVENT_SAS_EXP_DS_SUBTRACTIVE_LINK (0x00000200)
  859. #define MPI_EVENT_SAS_EXP_DS_TABLE_LINK (0x00000400)
  860. #define MPI_EVENT_SAS_EXP_DS_UNSUPPORTED_DEVICE (0x00000800)
  861. /* values for Flags field of SAS Expander Status Change Event data */
  862. #define MPI_EVENT_SAS_EXP_FLAGS_ROUTE_TABLE_CONFIG (0x02)
  863. #define MPI_EVENT_SAS_EXP_FLAGS_CONFIG_IN_PROGRESS (0x01)
  864. /*****************************************************************************
  865. *
  866. * F i r m w a r e L o a d M e s s a g e s
  867. *
  868. *****************************************************************************/
  869. /****************************************************************************/
  870. /* Firmware Download message and associated structures */
  871. /****************************************************************************/
  872. typedef struct _MSG_FW_DOWNLOAD
  873. {
  874. U8 ImageType; /* 00h */
  875. U8 Reserved; /* 01h */
  876. U8 ChainOffset; /* 02h */
  877. U8 Function; /* 03h */
  878. U8 Reserved1[3]; /* 04h */
  879. U8 MsgFlags; /* 07h */
  880. U32 MsgContext; /* 08h */
  881. SGE_MPI_UNION SGL; /* 0Ch */
  882. } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
  883. FWDownload_t, MPI_POINTER pFWDownload_t;
  884. #define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
  885. #define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
  886. #define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
  887. #define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
  888. #define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
  889. #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
  890. #define MPI_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06)
  891. #define MPI_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07)
  892. #define MPI_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08)
  893. #define MPI_FW_DOWNLOAD_ITYPE_MEGARAID (0x09)
  894. #define MPI_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
  895. typedef struct _FWDownloadTCSGE
  896. {
  897. U8 Reserved; /* 00h */
  898. U8 ContextSize; /* 01h */
  899. U8 DetailsLength; /* 02h */
  900. U8 Flags; /* 03h */
  901. U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */
  902. U32 ImageOffset; /* 08h */
  903. U32 ImageSize; /* 0Ch */
  904. } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
  905. FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
  906. /* Firmware Download reply */
  907. typedef struct _MSG_FW_DOWNLOAD_REPLY
  908. {
  909. U8 ImageType; /* 00h */
  910. U8 Reserved; /* 01h */
  911. U8 MsgLength; /* 02h */
  912. U8 Function; /* 03h */
  913. U8 Reserved1[3]; /* 04h */
  914. U8 MsgFlags; /* 07h */
  915. U32 MsgContext; /* 08h */
  916. U16 Reserved2; /* 0Ch */
  917. U16 IOCStatus; /* 0Eh */
  918. U32 IOCLogInfo; /* 10h */
  919. } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
  920. FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
  921. /****************************************************************************/
  922. /* Firmware Upload message and associated structures */
  923. /****************************************************************************/
  924. typedef struct _MSG_FW_UPLOAD
  925. {
  926. U8 ImageType; /* 00h */
  927. U8 Reserved; /* 01h */
  928. U8 ChainOffset; /* 02h */
  929. U8 Function; /* 03h */
  930. U8 Reserved1[3]; /* 04h */
  931. U8 MsgFlags; /* 07h */
  932. U32 MsgContext; /* 08h */
  933. SGE_MPI_UNION SGL; /* 0Ch */
  934. } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
  935. FWUpload_t, MPI_POINTER pFWUpload_t;
  936. #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
  937. #define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
  938. #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
  939. #define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
  940. #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
  941. #define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
  942. #define MPI_FW_UPLOAD_ITYPE_MANUFACTURING (0x06)
  943. #define MPI_FW_UPLOAD_ITYPE_CONFIG_1 (0x07)
  944. #define MPI_FW_UPLOAD_ITYPE_CONFIG_2 (0x08)
  945. #define MPI_FW_UPLOAD_ITYPE_MEGARAID (0x09)
  946. #define MPI_FW_UPLOAD_ITYPE_COMPLETE (0x0A)
  947. #define MPI_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
  948. typedef struct _FWUploadTCSGE
  949. {
  950. U8 Reserved; /* 00h */
  951. U8 ContextSize; /* 01h */
  952. U8 DetailsLength; /* 02h */
  953. U8 Flags; /* 03h */
  954. U32 Reserved1; /* 04h */
  955. U32 ImageOffset; /* 08h */
  956. U32 ImageSize; /* 0Ch */
  957. } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
  958. FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
  959. /* Firmware Upload reply */
  960. typedef struct _MSG_FW_UPLOAD_REPLY
  961. {
  962. U8 ImageType; /* 00h */
  963. U8 Reserved; /* 01h */
  964. U8 MsgLength; /* 02h */
  965. U8 Function; /* 03h */
  966. U8 Reserved1[3]; /* 04h */
  967. U8 MsgFlags; /* 07h */
  968. U32 MsgContext; /* 08h */
  969. U16 Reserved2; /* 0Ch */
  970. U16 IOCStatus; /* 0Eh */
  971. U32 IOCLogInfo; /* 10h */
  972. U32 ActualImageSize; /* 14h */
  973. } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
  974. FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
  975. typedef struct _MPI_FW_HEADER
  976. {
  977. U32 ArmBranchInstruction0; /* 00h */
  978. U32 Signature0; /* 04h */
  979. U32 Signature1; /* 08h */
  980. U32 Signature2; /* 0Ch */
  981. U32 ArmBranchInstruction1; /* 10h */
  982. U32 ArmBranchInstruction2; /* 14h */
  983. U32 Reserved; /* 18h */
  984. U32 Checksum; /* 1Ch */
  985. U16 VendorId; /* 20h */
  986. U16 ProductId; /* 22h */
  987. MPI_FW_VERSION FWVersion; /* 24h */
  988. U32 SeqCodeVersion; /* 28h */
  989. U32 ImageSize; /* 2Ch */
  990. U32 NextImageHeaderOffset; /* 30h */
  991. U32 LoadStartAddress; /* 34h */
  992. U32 IopResetVectorValue; /* 38h */
  993. U32 IopResetRegAddr; /* 3Ch */
  994. U32 VersionNameWhat; /* 40h */
  995. U8 VersionName[32]; /* 44h */
  996. U32 VendorNameWhat; /* 64h */
  997. U8 VendorName[32]; /* 68h */
  998. } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
  999. MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
  1000. #define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840)
  1001. /* defines for using the ProductId field */
  1002. #define MPI_FW_HEADER_PID_TYPE_MASK (0xF000)
  1003. #define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000)
  1004. #define MPI_FW_HEADER_PID_TYPE_FC (0x1000)
  1005. #define MPI_FW_HEADER_PID_TYPE_SAS (0x2000)
  1006. #define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A)
  1007. #define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5)
  1008. #define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA)
  1009. #define MPI_FW_HEADER_PID_PROD_MASK (0x0F00)
  1010. #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100)
  1011. #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
  1012. #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300)
  1013. #define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
  1014. #define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
  1015. #define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
  1016. #define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
  1017. #define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
  1018. /* SCSI */
  1019. #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001)
  1020. #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002)
  1021. #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003)
  1022. #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004)
  1023. #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005)
  1024. #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006)
  1025. #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007)
  1026. #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008)
  1027. #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009)
  1028. #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A)
  1029. #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B)
  1030. #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C)
  1031. /* Fibre Channel */
  1032. #define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
  1033. #define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */
  1034. #define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */
  1035. #define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */
  1036. #define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */
  1037. #define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005)
  1038. #define MPI_FW_HEADER_PID_FAMILY_949E_FC (0x0006)
  1039. /* SAS */
  1040. #define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001)
  1041. #define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002)
  1042. #define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003)
  1043. #define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */
  1044. typedef struct _MPI_EXT_IMAGE_HEADER
  1045. {
  1046. U8 ImageType; /* 00h */
  1047. U8 Reserved; /* 01h */
  1048. U16 Reserved1; /* 02h */
  1049. U32 Checksum; /* 04h */
  1050. U32 ImageSize; /* 08h */
  1051. U32 NextImageHeaderOffset; /* 0Ch */
  1052. U32 LoadStartAddress; /* 10h */
  1053. U32 Reserved2; /* 14h */
  1054. } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
  1055. MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
  1056. /* defines for the ImageType field */
  1057. #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
  1058. #define MPI_EXT_IMAGE_TYPE_FW (0x01)
  1059. #define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
  1060. #define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
  1061. #define MPI_EXT_IMAGE_TYPE_INITIALIZATION (0x05)
  1062. #endif