arizona-core.c 34 KB

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  1. /*
  2. * Arizona core driver
  3. *
  4. * Copyright 2012 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/err.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/mfd/core.h>
  17. #include <linux/module.h>
  18. #include <linux/of.h>
  19. #include <linux/of_device.h>
  20. #include <linux/of_gpio.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/regmap.h>
  23. #include <linux/regulator/consumer.h>
  24. #include <linux/regulator/machine.h>
  25. #include <linux/slab.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/mfd/arizona/core.h>
  28. #include <linux/mfd/arizona/registers.h>
  29. #include "arizona.h"
  30. static const char * const wm5102_core_supplies[] = {
  31. "AVDD",
  32. "DBVDD1",
  33. };
  34. int arizona_clk32k_enable(struct arizona *arizona)
  35. {
  36. int ret = 0;
  37. mutex_lock(&arizona->clk_lock);
  38. arizona->clk32k_ref++;
  39. if (arizona->clk32k_ref == 1) {
  40. switch (arizona->pdata.clk32k_src) {
  41. case ARIZONA_32KZ_MCLK1:
  42. ret = pm_runtime_get_sync(arizona->dev);
  43. if (ret != 0)
  44. goto out;
  45. break;
  46. }
  47. ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  48. ARIZONA_CLK_32K_ENA,
  49. ARIZONA_CLK_32K_ENA);
  50. }
  51. out:
  52. if (ret != 0)
  53. arizona->clk32k_ref--;
  54. mutex_unlock(&arizona->clk_lock);
  55. return ret;
  56. }
  57. EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
  58. int arizona_clk32k_disable(struct arizona *arizona)
  59. {
  60. mutex_lock(&arizona->clk_lock);
  61. BUG_ON(arizona->clk32k_ref <= 0);
  62. arizona->clk32k_ref--;
  63. if (arizona->clk32k_ref == 0) {
  64. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  65. ARIZONA_CLK_32K_ENA, 0);
  66. switch (arizona->pdata.clk32k_src) {
  67. case ARIZONA_32KZ_MCLK1:
  68. pm_runtime_put_sync(arizona->dev);
  69. break;
  70. }
  71. }
  72. mutex_unlock(&arizona->clk_lock);
  73. return 0;
  74. }
  75. EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
  76. static irqreturn_t arizona_clkgen_err(int irq, void *data)
  77. {
  78. struct arizona *arizona = data;
  79. dev_err(arizona->dev, "CLKGEN error\n");
  80. return IRQ_HANDLED;
  81. }
  82. static irqreturn_t arizona_underclocked(int irq, void *data)
  83. {
  84. struct arizona *arizona = data;
  85. unsigned int val;
  86. int ret;
  87. ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
  88. &val);
  89. if (ret != 0) {
  90. dev_err(arizona->dev, "Failed to read underclock status: %d\n",
  91. ret);
  92. return IRQ_NONE;
  93. }
  94. if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
  95. dev_err(arizona->dev, "AIF3 underclocked\n");
  96. if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
  97. dev_err(arizona->dev, "AIF2 underclocked\n");
  98. if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
  99. dev_err(arizona->dev, "AIF1 underclocked\n");
  100. if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
  101. dev_err(arizona->dev, "ISRC3 underclocked\n");
  102. if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
  103. dev_err(arizona->dev, "ISRC2 underclocked\n");
  104. if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
  105. dev_err(arizona->dev, "ISRC1 underclocked\n");
  106. if (val & ARIZONA_FX_UNDERCLOCKED_STS)
  107. dev_err(arizona->dev, "FX underclocked\n");
  108. if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
  109. dev_err(arizona->dev, "ASRC underclocked\n");
  110. if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
  111. dev_err(arizona->dev, "DAC underclocked\n");
  112. if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
  113. dev_err(arizona->dev, "ADC underclocked\n");
  114. if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
  115. dev_err(arizona->dev, "Mixer dropped sample\n");
  116. return IRQ_HANDLED;
  117. }
  118. static irqreturn_t arizona_overclocked(int irq, void *data)
  119. {
  120. struct arizona *arizona = data;
  121. unsigned int val[3];
  122. int ret;
  123. ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
  124. &val[0], 3);
  125. if (ret != 0) {
  126. dev_err(arizona->dev, "Failed to read overclock status: %d\n",
  127. ret);
  128. return IRQ_NONE;
  129. }
  130. switch (arizona->type) {
  131. case WM8998:
  132. case WM1814:
  133. /* Some bits are shifted on WM8998,
  134. * rearrange to match the standard bit layout
  135. */
  136. val[0] = ((val[0] & 0x60e0) >> 1) |
  137. ((val[0] & 0x1e00) >> 2) |
  138. (val[0] & 0x000f);
  139. break;
  140. default:
  141. break;
  142. }
  143. if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
  144. dev_err(arizona->dev, "PWM overclocked\n");
  145. if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
  146. dev_err(arizona->dev, "FX core overclocked\n");
  147. if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
  148. dev_err(arizona->dev, "DAC SYS overclocked\n");
  149. if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
  150. dev_err(arizona->dev, "DAC WARP overclocked\n");
  151. if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
  152. dev_err(arizona->dev, "ADC overclocked\n");
  153. if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
  154. dev_err(arizona->dev, "Mixer overclocked\n");
  155. if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
  156. dev_err(arizona->dev, "AIF3 overclocked\n");
  157. if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
  158. dev_err(arizona->dev, "AIF2 overclocked\n");
  159. if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
  160. dev_err(arizona->dev, "AIF1 overclocked\n");
  161. if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
  162. dev_err(arizona->dev, "Pad control overclocked\n");
  163. if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
  164. dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
  165. if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
  166. dev_err(arizona->dev, "Slimbus async overclocked\n");
  167. if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
  168. dev_err(arizona->dev, "Slimbus sync overclocked\n");
  169. if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
  170. dev_err(arizona->dev, "ASRC async system overclocked\n");
  171. if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
  172. dev_err(arizona->dev, "ASRC async WARP overclocked\n");
  173. if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
  174. dev_err(arizona->dev, "ASRC sync system overclocked\n");
  175. if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
  176. dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
  177. if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
  178. dev_err(arizona->dev, "DSP1 overclocked\n");
  179. if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
  180. dev_err(arizona->dev, "ISRC3 overclocked\n");
  181. if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
  182. dev_err(arizona->dev, "ISRC2 overclocked\n");
  183. if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
  184. dev_err(arizona->dev, "ISRC1 overclocked\n");
  185. if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
  186. dev_err(arizona->dev, "SPDIF overclocked\n");
  187. return IRQ_HANDLED;
  188. }
  189. static int arizona_poll_reg(struct arizona *arizona,
  190. int timeout, unsigned int reg,
  191. unsigned int mask, unsigned int target)
  192. {
  193. unsigned int val = 0;
  194. int ret, i;
  195. for (i = 0; i < timeout; i++) {
  196. ret = regmap_read(arizona->regmap, reg, &val);
  197. if (ret != 0) {
  198. dev_err(arizona->dev, "Failed to read reg %u: %d\n",
  199. reg, ret);
  200. continue;
  201. }
  202. if ((val & mask) == target)
  203. return 0;
  204. msleep(1);
  205. }
  206. dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
  207. return -ETIMEDOUT;
  208. }
  209. static int arizona_wait_for_boot(struct arizona *arizona)
  210. {
  211. int ret;
  212. /*
  213. * We can't use an interrupt as we need to runtime resume to do so,
  214. * we won't race with the interrupt handler as it'll be blocked on
  215. * runtime resume.
  216. */
  217. ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
  218. ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
  219. if (!ret)
  220. regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
  221. ARIZONA_BOOT_DONE_STS);
  222. pm_runtime_mark_last_busy(arizona->dev);
  223. return ret;
  224. }
  225. static inline void arizona_enable_reset(struct arizona *arizona)
  226. {
  227. if (arizona->pdata.reset)
  228. gpio_set_value_cansleep(arizona->pdata.reset, 0);
  229. }
  230. static void arizona_disable_reset(struct arizona *arizona)
  231. {
  232. if (arizona->pdata.reset) {
  233. switch (arizona->type) {
  234. case WM5110:
  235. case WM8280:
  236. /* Meet requirements for minimum reset duration */
  237. msleep(5);
  238. break;
  239. default:
  240. break;
  241. }
  242. gpio_set_value_cansleep(arizona->pdata.reset, 1);
  243. msleep(1);
  244. }
  245. }
  246. struct arizona_sysclk_state {
  247. unsigned int fll;
  248. unsigned int sysclk;
  249. };
  250. static int arizona_enable_freerun_sysclk(struct arizona *arizona,
  251. struct arizona_sysclk_state *state)
  252. {
  253. int ret, err;
  254. /* Cache existing FLL and SYSCLK settings */
  255. ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll);
  256. if (ret) {
  257. dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
  258. ret);
  259. return ret;
  260. }
  261. ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
  262. &state->sysclk);
  263. if (ret) {
  264. dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
  265. ret);
  266. return ret;
  267. }
  268. /* Start up SYSCLK using the FLL in free running mode */
  269. ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
  270. ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
  271. if (ret) {
  272. dev_err(arizona->dev,
  273. "Failed to start FLL in freerunning mode: %d\n",
  274. ret);
  275. return ret;
  276. }
  277. ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
  278. ARIZONA_FLL1_CLOCK_OK_STS,
  279. ARIZONA_FLL1_CLOCK_OK_STS);
  280. if (ret) {
  281. ret = -ETIMEDOUT;
  282. goto err_fll;
  283. }
  284. ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
  285. if (ret) {
  286. dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
  287. goto err_fll;
  288. }
  289. return 0;
  290. err_fll:
  291. err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
  292. if (err)
  293. dev_err(arizona->dev,
  294. "Failed to re-apply old FLL settings: %d\n", err);
  295. return ret;
  296. }
  297. static int arizona_disable_freerun_sysclk(struct arizona *arizona,
  298. struct arizona_sysclk_state *state)
  299. {
  300. int ret;
  301. ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
  302. state->sysclk);
  303. if (ret) {
  304. dev_err(arizona->dev,
  305. "Failed to re-apply old SYSCLK settings: %d\n", ret);
  306. return ret;
  307. }
  308. ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
  309. if (ret) {
  310. dev_err(arizona->dev,
  311. "Failed to re-apply old FLL settings: %d\n", ret);
  312. return ret;
  313. }
  314. return 0;
  315. }
  316. static int wm5102_apply_hardware_patch(struct arizona *arizona)
  317. {
  318. struct arizona_sysclk_state state;
  319. int err, ret;
  320. ret = arizona_enable_freerun_sysclk(arizona, &state);
  321. if (ret)
  322. return ret;
  323. /* Start the write sequencer and wait for it to finish */
  324. ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
  325. ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
  326. if (ret) {
  327. dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
  328. ret);
  329. goto err;
  330. }
  331. ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
  332. ARIZONA_WSEQ_BUSY, 0);
  333. if (ret) {
  334. regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
  335. ARIZONA_WSEQ_ABORT);
  336. ret = -ETIMEDOUT;
  337. }
  338. err:
  339. err = arizona_disable_freerun_sysclk(arizona, &state);
  340. return ret ?: err;
  341. }
  342. /*
  343. * Register patch to some of the CODECs internal write sequences
  344. * to ensure a clean exit from the low power sleep state.
  345. */
  346. static const struct reg_sequence wm5110_sleep_patch[] = {
  347. { 0x337A, 0xC100 },
  348. { 0x337B, 0x0041 },
  349. { 0x3300, 0xA210 },
  350. { 0x3301, 0x050C },
  351. };
  352. static int wm5110_apply_sleep_patch(struct arizona *arizona)
  353. {
  354. struct arizona_sysclk_state state;
  355. int err, ret;
  356. ret = arizona_enable_freerun_sysclk(arizona, &state);
  357. if (ret)
  358. return ret;
  359. ret = regmap_multi_reg_write_bypassed(arizona->regmap,
  360. wm5110_sleep_patch,
  361. ARRAY_SIZE(wm5110_sleep_patch));
  362. err = arizona_disable_freerun_sysclk(arizona, &state);
  363. return ret ?: err;
  364. }
  365. static int wm5102_clear_write_sequencer(struct arizona *arizona)
  366. {
  367. int ret;
  368. ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
  369. 0x0);
  370. if (ret) {
  371. dev_err(arizona->dev,
  372. "Failed to clear write sequencer state: %d\n", ret);
  373. return ret;
  374. }
  375. arizona_enable_reset(arizona);
  376. regulator_disable(arizona->dcvdd);
  377. msleep(20);
  378. ret = regulator_enable(arizona->dcvdd);
  379. if (ret) {
  380. dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
  381. return ret;
  382. }
  383. arizona_disable_reset(arizona);
  384. return 0;
  385. }
  386. #ifdef CONFIG_PM
  387. static int arizona_isolate_dcvdd(struct arizona *arizona)
  388. {
  389. int ret;
  390. ret = regmap_update_bits(arizona->regmap,
  391. ARIZONA_ISOLATION_CONTROL,
  392. ARIZONA_ISOLATE_DCVDD1,
  393. ARIZONA_ISOLATE_DCVDD1);
  394. if (ret != 0)
  395. dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret);
  396. return ret;
  397. }
  398. static int arizona_connect_dcvdd(struct arizona *arizona)
  399. {
  400. int ret;
  401. ret = regmap_update_bits(arizona->regmap,
  402. ARIZONA_ISOLATION_CONTROL,
  403. ARIZONA_ISOLATE_DCVDD1, 0);
  404. if (ret != 0)
  405. dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret);
  406. return ret;
  407. }
  408. static int arizona_is_jack_det_active(struct arizona *arizona)
  409. {
  410. unsigned int val;
  411. int ret;
  412. ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val);
  413. if (ret) {
  414. dev_err(arizona->dev,
  415. "Failed to check jack det status: %d\n", ret);
  416. return ret;
  417. } else if (val & ARIZONA_JD1_ENA) {
  418. return 1;
  419. } else {
  420. return 0;
  421. }
  422. }
  423. static int arizona_runtime_resume(struct device *dev)
  424. {
  425. struct arizona *arizona = dev_get_drvdata(dev);
  426. int ret;
  427. dev_dbg(arizona->dev, "Leaving AoD mode\n");
  428. if (arizona->has_fully_powered_off) {
  429. dev_dbg(arizona->dev, "Re-enabling core supplies\n");
  430. ret = regulator_bulk_enable(arizona->num_core_supplies,
  431. arizona->core_supplies);
  432. if (ret) {
  433. dev_err(dev, "Failed to enable core supplies: %d\n",
  434. ret);
  435. return ret;
  436. }
  437. }
  438. ret = regulator_enable(arizona->dcvdd);
  439. if (ret != 0) {
  440. dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
  441. if (arizona->has_fully_powered_off)
  442. regulator_bulk_disable(arizona->num_core_supplies,
  443. arizona->core_supplies);
  444. return ret;
  445. }
  446. if (arizona->has_fully_powered_off) {
  447. arizona_disable_reset(arizona);
  448. enable_irq(arizona->irq);
  449. arizona->has_fully_powered_off = false;
  450. }
  451. regcache_cache_only(arizona->regmap, false);
  452. switch (arizona->type) {
  453. case WM5102:
  454. if (arizona->external_dcvdd) {
  455. ret = arizona_connect_dcvdd(arizona);
  456. if (ret != 0)
  457. goto err;
  458. }
  459. ret = wm5102_patch(arizona);
  460. if (ret != 0) {
  461. dev_err(arizona->dev, "Failed to apply patch: %d\n",
  462. ret);
  463. goto err;
  464. }
  465. ret = wm5102_apply_hardware_patch(arizona);
  466. if (ret) {
  467. dev_err(arizona->dev,
  468. "Failed to apply hardware patch: %d\n",
  469. ret);
  470. goto err;
  471. }
  472. break;
  473. case WM5110:
  474. case WM8280:
  475. ret = arizona_wait_for_boot(arizona);
  476. if (ret)
  477. goto err;
  478. if (arizona->external_dcvdd) {
  479. ret = arizona_connect_dcvdd(arizona);
  480. if (ret != 0)
  481. goto err;
  482. } else {
  483. /*
  484. * As this is only called for the internal regulator
  485. * (where we know voltage ranges available) it is ok
  486. * to request an exact range.
  487. */
  488. ret = regulator_set_voltage(arizona->dcvdd,
  489. 1200000, 1200000);
  490. if (ret < 0) {
  491. dev_err(arizona->dev,
  492. "Failed to set resume voltage: %d\n",
  493. ret);
  494. goto err;
  495. }
  496. }
  497. ret = wm5110_apply_sleep_patch(arizona);
  498. if (ret) {
  499. dev_err(arizona->dev,
  500. "Failed to re-apply sleep patch: %d\n",
  501. ret);
  502. goto err;
  503. }
  504. break;
  505. default:
  506. ret = arizona_wait_for_boot(arizona);
  507. if (ret != 0)
  508. goto err;
  509. if (arizona->external_dcvdd) {
  510. ret = arizona_connect_dcvdd(arizona);
  511. if (ret != 0)
  512. goto err;
  513. }
  514. break;
  515. }
  516. ret = regcache_sync(arizona->regmap);
  517. if (ret != 0) {
  518. dev_err(arizona->dev, "Failed to restore register cache\n");
  519. goto err;
  520. }
  521. return 0;
  522. err:
  523. regcache_cache_only(arizona->regmap, true);
  524. regulator_disable(arizona->dcvdd);
  525. return ret;
  526. }
  527. static int arizona_runtime_suspend(struct device *dev)
  528. {
  529. struct arizona *arizona = dev_get_drvdata(dev);
  530. int jd_active = 0;
  531. int ret;
  532. dev_dbg(arizona->dev, "Entering AoD mode\n");
  533. switch (arizona->type) {
  534. case WM5110:
  535. case WM8280:
  536. jd_active = arizona_is_jack_det_active(arizona);
  537. if (jd_active < 0)
  538. return jd_active;
  539. if (arizona->external_dcvdd) {
  540. ret = arizona_isolate_dcvdd(arizona);
  541. if (ret != 0)
  542. return ret;
  543. } else {
  544. /*
  545. * As this is only called for the internal regulator
  546. * (where we know voltage ranges available) it is ok
  547. * to request an exact range.
  548. */
  549. ret = regulator_set_voltage(arizona->dcvdd,
  550. 1175000, 1175000);
  551. if (ret < 0) {
  552. dev_err(arizona->dev,
  553. "Failed to set suspend voltage: %d\n",
  554. ret);
  555. return ret;
  556. }
  557. }
  558. break;
  559. case WM5102:
  560. jd_active = arizona_is_jack_det_active(arizona);
  561. if (jd_active < 0)
  562. return jd_active;
  563. if (arizona->external_dcvdd) {
  564. ret = arizona_isolate_dcvdd(arizona);
  565. if (ret != 0)
  566. return ret;
  567. }
  568. if (!jd_active) {
  569. ret = regmap_write(arizona->regmap,
  570. ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0);
  571. if (ret) {
  572. dev_err(arizona->dev,
  573. "Failed to clear write sequencer: %d\n",
  574. ret);
  575. return ret;
  576. }
  577. }
  578. break;
  579. default:
  580. jd_active = arizona_is_jack_det_active(arizona);
  581. if (jd_active < 0)
  582. return jd_active;
  583. if (arizona->external_dcvdd) {
  584. ret = arizona_isolate_dcvdd(arizona);
  585. if (ret != 0)
  586. return ret;
  587. }
  588. break;
  589. }
  590. regcache_cache_only(arizona->regmap, true);
  591. regcache_mark_dirty(arizona->regmap);
  592. regulator_disable(arizona->dcvdd);
  593. /* Allow us to completely power down if no jack detection */
  594. if (!jd_active) {
  595. dev_dbg(arizona->dev, "Fully powering off\n");
  596. arizona->has_fully_powered_off = true;
  597. disable_irq_nosync(arizona->irq);
  598. arizona_enable_reset(arizona);
  599. regulator_bulk_disable(arizona->num_core_supplies,
  600. arizona->core_supplies);
  601. }
  602. return 0;
  603. }
  604. #endif
  605. #ifdef CONFIG_PM_SLEEP
  606. static int arizona_suspend(struct device *dev)
  607. {
  608. struct arizona *arizona = dev_get_drvdata(dev);
  609. dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
  610. disable_irq(arizona->irq);
  611. return 0;
  612. }
  613. static int arizona_suspend_late(struct device *dev)
  614. {
  615. struct arizona *arizona = dev_get_drvdata(dev);
  616. dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
  617. enable_irq(arizona->irq);
  618. return 0;
  619. }
  620. static int arizona_resume_noirq(struct device *dev)
  621. {
  622. struct arizona *arizona = dev_get_drvdata(dev);
  623. dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
  624. disable_irq(arizona->irq);
  625. return 0;
  626. }
  627. static int arizona_resume(struct device *dev)
  628. {
  629. struct arizona *arizona = dev_get_drvdata(dev);
  630. dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
  631. enable_irq(arizona->irq);
  632. return 0;
  633. }
  634. #endif
  635. const struct dev_pm_ops arizona_pm_ops = {
  636. SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
  637. arizona_runtime_resume,
  638. NULL)
  639. SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
  640. #ifdef CONFIG_PM_SLEEP
  641. .suspend_late = arizona_suspend_late,
  642. .resume_noirq = arizona_resume_noirq,
  643. #endif
  644. };
  645. EXPORT_SYMBOL_GPL(arizona_pm_ops);
  646. #ifdef CONFIG_OF
  647. unsigned long arizona_of_get_type(struct device *dev)
  648. {
  649. const struct of_device_id *id = of_match_device(arizona_of_match, dev);
  650. if (id)
  651. return (unsigned long)id->data;
  652. else
  653. return 0;
  654. }
  655. EXPORT_SYMBOL_GPL(arizona_of_get_type);
  656. int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
  657. bool mandatory)
  658. {
  659. int gpio;
  660. gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
  661. if (gpio < 0) {
  662. if (mandatory)
  663. dev_err(arizona->dev,
  664. "Mandatory DT gpio %s missing/malformed: %d\n",
  665. prop, gpio);
  666. gpio = 0;
  667. }
  668. return gpio;
  669. }
  670. EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
  671. static int arizona_of_get_core_pdata(struct arizona *arizona)
  672. {
  673. struct arizona_pdata *pdata = &arizona->pdata;
  674. struct property *prop;
  675. const __be32 *cur;
  676. u32 val;
  677. int ret, i;
  678. int count = 0;
  679. pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
  680. ret = of_property_read_u32_array(arizona->dev->of_node,
  681. "wlf,gpio-defaults",
  682. pdata->gpio_defaults,
  683. ARRAY_SIZE(pdata->gpio_defaults));
  684. if (ret >= 0) {
  685. /*
  686. * All values are literal except out of range values
  687. * which are chip default, translate into platform
  688. * data which uses 0 as chip default and out of range
  689. * as zero.
  690. */
  691. for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
  692. if (pdata->gpio_defaults[i] > 0xffff)
  693. pdata->gpio_defaults[i] = 0;
  694. else if (pdata->gpio_defaults[i] == 0)
  695. pdata->gpio_defaults[i] = 0x10000;
  696. }
  697. } else {
  698. dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
  699. ret);
  700. }
  701. of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
  702. cur, val) {
  703. if (count == ARRAY_SIZE(pdata->inmode))
  704. break;
  705. pdata->inmode[count] = val;
  706. count++;
  707. }
  708. count = 0;
  709. of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
  710. cur, val) {
  711. if (count == ARRAY_SIZE(pdata->dmic_ref))
  712. break;
  713. pdata->dmic_ref[count] = val;
  714. count++;
  715. }
  716. return 0;
  717. }
  718. const struct of_device_id arizona_of_match[] = {
  719. { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
  720. { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
  721. { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
  722. { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
  723. { .compatible = "wlf,wm8998", .data = (void *)WM8998 },
  724. { .compatible = "wlf,wm1814", .data = (void *)WM1814 },
  725. {},
  726. };
  727. EXPORT_SYMBOL_GPL(arizona_of_match);
  728. #else
  729. static inline int arizona_of_get_core_pdata(struct arizona *arizona)
  730. {
  731. return 0;
  732. }
  733. #endif
  734. static const struct mfd_cell early_devs[] = {
  735. { .name = "arizona-ldo1" },
  736. };
  737. static const char * const wm5102_supplies[] = {
  738. "MICVDD",
  739. "DBVDD2",
  740. "DBVDD3",
  741. "CPVDD",
  742. "SPKVDDL",
  743. "SPKVDDR",
  744. };
  745. static const struct mfd_cell wm5102_devs[] = {
  746. { .name = "arizona-micsupp" },
  747. {
  748. .name = "arizona-extcon",
  749. .parent_supplies = wm5102_supplies,
  750. .num_parent_supplies = 1, /* We only need MICVDD */
  751. },
  752. { .name = "arizona-gpio" },
  753. { .name = "arizona-haptics" },
  754. { .name = "arizona-pwm" },
  755. {
  756. .name = "wm5102-codec",
  757. .parent_supplies = wm5102_supplies,
  758. .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
  759. },
  760. };
  761. static const struct mfd_cell wm5110_devs[] = {
  762. { .name = "arizona-micsupp" },
  763. {
  764. .name = "arizona-extcon",
  765. .parent_supplies = wm5102_supplies,
  766. .num_parent_supplies = 1, /* We only need MICVDD */
  767. },
  768. { .name = "arizona-gpio" },
  769. { .name = "arizona-haptics" },
  770. { .name = "arizona-pwm" },
  771. {
  772. .name = "wm5110-codec",
  773. .parent_supplies = wm5102_supplies,
  774. .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
  775. },
  776. };
  777. static const char * const wm8997_supplies[] = {
  778. "MICVDD",
  779. "DBVDD2",
  780. "CPVDD",
  781. "SPKVDD",
  782. };
  783. static const struct mfd_cell wm8997_devs[] = {
  784. { .name = "arizona-micsupp" },
  785. {
  786. .name = "arizona-extcon",
  787. .parent_supplies = wm8997_supplies,
  788. .num_parent_supplies = 1, /* We only need MICVDD */
  789. },
  790. { .name = "arizona-gpio" },
  791. { .name = "arizona-haptics" },
  792. { .name = "arizona-pwm" },
  793. {
  794. .name = "wm8997-codec",
  795. .parent_supplies = wm8997_supplies,
  796. .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
  797. },
  798. };
  799. static const struct mfd_cell wm8998_devs[] = {
  800. {
  801. .name = "arizona-extcon",
  802. .parent_supplies = wm5102_supplies,
  803. .num_parent_supplies = 1, /* We only need MICVDD */
  804. },
  805. { .name = "arizona-gpio" },
  806. { .name = "arizona-haptics" },
  807. { .name = "arizona-pwm" },
  808. {
  809. .name = "wm8998-codec",
  810. .parent_supplies = wm5102_supplies,
  811. .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
  812. },
  813. { .name = "arizona-micsupp" },
  814. };
  815. int arizona_dev_init(struct arizona *arizona)
  816. {
  817. struct device *dev = arizona->dev;
  818. const char *type_name;
  819. unsigned int reg, val, mask;
  820. int (*apply_patch)(struct arizona *) = NULL;
  821. const struct mfd_cell *subdevs = NULL;
  822. int n_subdevs, ret, i;
  823. dev_set_drvdata(arizona->dev, arizona);
  824. mutex_init(&arizona->clk_lock);
  825. if (dev_get_platdata(arizona->dev))
  826. memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
  827. sizeof(arizona->pdata));
  828. else
  829. arizona_of_get_core_pdata(arizona);
  830. regcache_cache_only(arizona->regmap, true);
  831. switch (arizona->type) {
  832. case WM5102:
  833. case WM5110:
  834. case WM8280:
  835. case WM8997:
  836. case WM8998:
  837. case WM1814:
  838. for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
  839. arizona->core_supplies[i].supply
  840. = wm5102_core_supplies[i];
  841. arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
  842. break;
  843. default:
  844. dev_err(arizona->dev, "Unknown device type %d\n",
  845. arizona->type);
  846. return -EINVAL;
  847. }
  848. /* Mark DCVDD as external, LDO1 driver will clear if internal */
  849. arizona->external_dcvdd = true;
  850. ret = mfd_add_devices(arizona->dev, -1, early_devs,
  851. ARRAY_SIZE(early_devs), NULL, 0, NULL);
  852. if (ret != 0) {
  853. dev_err(dev, "Failed to add early children: %d\n", ret);
  854. return ret;
  855. }
  856. ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
  857. arizona->core_supplies);
  858. if (ret != 0) {
  859. dev_err(dev, "Failed to request core supplies: %d\n",
  860. ret);
  861. goto err_early;
  862. }
  863. /**
  864. * Don't use devres here because the only device we have to get
  865. * against is the MFD device and DCVDD will likely be supplied by
  866. * one of its children. Meaning that the regulator will be
  867. * destroyed by the time devres calls regulator put.
  868. */
  869. arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
  870. if (IS_ERR(arizona->dcvdd)) {
  871. ret = PTR_ERR(arizona->dcvdd);
  872. dev_err(dev, "Failed to request DCVDD: %d\n", ret);
  873. goto err_early;
  874. }
  875. if (arizona->pdata.reset) {
  876. /* Start out with /RESET low to put the chip into reset */
  877. ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset,
  878. GPIOF_DIR_OUT | GPIOF_INIT_LOW,
  879. "arizona /RESET");
  880. if (ret != 0) {
  881. dev_err(dev, "Failed to request /RESET: %d\n", ret);
  882. goto err_dcvdd;
  883. }
  884. }
  885. ret = regulator_bulk_enable(arizona->num_core_supplies,
  886. arizona->core_supplies);
  887. if (ret != 0) {
  888. dev_err(dev, "Failed to enable core supplies: %d\n",
  889. ret);
  890. goto err_dcvdd;
  891. }
  892. ret = regulator_enable(arizona->dcvdd);
  893. if (ret != 0) {
  894. dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
  895. goto err_enable;
  896. }
  897. arizona_disable_reset(arizona);
  898. regcache_cache_only(arizona->regmap, false);
  899. /* Verify that this is a chip we know about */
  900. ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
  901. if (ret != 0) {
  902. dev_err(dev, "Failed to read ID register: %d\n", ret);
  903. goto err_reset;
  904. }
  905. switch (reg) {
  906. case 0x5102:
  907. case 0x5110:
  908. case 0x6349:
  909. case 0x8997:
  910. break;
  911. default:
  912. dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
  913. goto err_reset;
  914. }
  915. /* If we have a /RESET GPIO we'll already be reset */
  916. if (!arizona->pdata.reset) {
  917. ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
  918. if (ret != 0) {
  919. dev_err(dev, "Failed to reset device: %d\n", ret);
  920. goto err_reset;
  921. }
  922. msleep(1);
  923. }
  924. /* Ensure device startup is complete */
  925. switch (arizona->type) {
  926. case WM5102:
  927. ret = regmap_read(arizona->regmap,
  928. ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
  929. if (ret) {
  930. dev_err(dev,
  931. "Failed to check write sequencer state: %d\n",
  932. ret);
  933. } else if (val & 0x01) {
  934. ret = wm5102_clear_write_sequencer(arizona);
  935. if (ret)
  936. return ret;
  937. }
  938. break;
  939. default:
  940. break;
  941. }
  942. ret = arizona_wait_for_boot(arizona);
  943. if (ret) {
  944. dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
  945. goto err_reset;
  946. }
  947. /* Read the device ID information & do device specific stuff */
  948. ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
  949. if (ret != 0) {
  950. dev_err(dev, "Failed to read ID register: %d\n", ret);
  951. goto err_reset;
  952. }
  953. ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
  954. &arizona->rev);
  955. if (ret != 0) {
  956. dev_err(dev, "Failed to read revision register: %d\n", ret);
  957. goto err_reset;
  958. }
  959. arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
  960. switch (reg) {
  961. case 0x5102:
  962. if (IS_ENABLED(CONFIG_MFD_WM5102)) {
  963. type_name = "WM5102";
  964. if (arizona->type != WM5102) {
  965. dev_warn(arizona->dev,
  966. "WM5102 registered as %d\n",
  967. arizona->type);
  968. arizona->type = WM5102;
  969. }
  970. apply_patch = wm5102_patch;
  971. arizona->rev &= 0x7;
  972. subdevs = wm5102_devs;
  973. n_subdevs = ARRAY_SIZE(wm5102_devs);
  974. }
  975. break;
  976. case 0x5110:
  977. if (IS_ENABLED(CONFIG_MFD_WM5110)) {
  978. switch (arizona->type) {
  979. case WM5110:
  980. type_name = "WM5110";
  981. break;
  982. case WM8280:
  983. type_name = "WM8280";
  984. break;
  985. default:
  986. type_name = "WM5110";
  987. dev_warn(arizona->dev,
  988. "WM5110 registered as %d\n",
  989. arizona->type);
  990. arizona->type = WM5110;
  991. break;
  992. }
  993. apply_patch = wm5110_patch;
  994. subdevs = wm5110_devs;
  995. n_subdevs = ARRAY_SIZE(wm5110_devs);
  996. }
  997. break;
  998. case 0x8997:
  999. if (IS_ENABLED(CONFIG_MFD_WM8997)) {
  1000. type_name = "WM8997";
  1001. if (arizona->type != WM8997) {
  1002. dev_warn(arizona->dev,
  1003. "WM8997 registered as %d\n",
  1004. arizona->type);
  1005. arizona->type = WM8997;
  1006. }
  1007. apply_patch = wm8997_patch;
  1008. subdevs = wm8997_devs;
  1009. n_subdevs = ARRAY_SIZE(wm8997_devs);
  1010. }
  1011. break;
  1012. case 0x6349:
  1013. if (IS_ENABLED(CONFIG_MFD_WM8998)) {
  1014. switch (arizona->type) {
  1015. case WM8998:
  1016. type_name = "WM8998";
  1017. break;
  1018. case WM1814:
  1019. type_name = "WM1814";
  1020. break;
  1021. default:
  1022. type_name = "WM8998";
  1023. dev_warn(arizona->dev,
  1024. "WM8998 registered as %d\n",
  1025. arizona->type);
  1026. arizona->type = WM8998;
  1027. }
  1028. apply_patch = wm8998_patch;
  1029. subdevs = wm8998_devs;
  1030. n_subdevs = ARRAY_SIZE(wm8998_devs);
  1031. }
  1032. break;
  1033. default:
  1034. dev_err(arizona->dev, "Unknown device ID %x\n", reg);
  1035. goto err_reset;
  1036. }
  1037. if (!subdevs) {
  1038. dev_err(arizona->dev,
  1039. "No kernel support for device ID %x\n", reg);
  1040. goto err_reset;
  1041. }
  1042. dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
  1043. if (apply_patch) {
  1044. ret = apply_patch(arizona);
  1045. if (ret != 0) {
  1046. dev_err(arizona->dev, "Failed to apply patch: %d\n",
  1047. ret);
  1048. goto err_reset;
  1049. }
  1050. switch (arizona->type) {
  1051. case WM5102:
  1052. ret = wm5102_apply_hardware_patch(arizona);
  1053. if (ret) {
  1054. dev_err(arizona->dev,
  1055. "Failed to apply hardware patch: %d\n",
  1056. ret);
  1057. goto err_reset;
  1058. }
  1059. break;
  1060. case WM5110:
  1061. case WM8280:
  1062. ret = wm5110_apply_sleep_patch(arizona);
  1063. if (ret) {
  1064. dev_err(arizona->dev,
  1065. "Failed to apply sleep patch: %d\n",
  1066. ret);
  1067. goto err_reset;
  1068. }
  1069. break;
  1070. default:
  1071. break;
  1072. }
  1073. }
  1074. for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
  1075. if (!arizona->pdata.gpio_defaults[i])
  1076. continue;
  1077. regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
  1078. arizona->pdata.gpio_defaults[i]);
  1079. }
  1080. /* Chip default */
  1081. if (!arizona->pdata.clk32k_src)
  1082. arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
  1083. switch (arizona->pdata.clk32k_src) {
  1084. case ARIZONA_32KZ_MCLK1:
  1085. case ARIZONA_32KZ_MCLK2:
  1086. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  1087. ARIZONA_CLK_32K_SRC_MASK,
  1088. arizona->pdata.clk32k_src - 1);
  1089. arizona_clk32k_enable(arizona);
  1090. break;
  1091. case ARIZONA_32KZ_NONE:
  1092. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  1093. ARIZONA_CLK_32K_SRC_MASK, 2);
  1094. break;
  1095. default:
  1096. dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
  1097. arizona->pdata.clk32k_src);
  1098. ret = -EINVAL;
  1099. goto err_reset;
  1100. }
  1101. for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
  1102. if (!arizona->pdata.micbias[i].mV &&
  1103. !arizona->pdata.micbias[i].bypass)
  1104. continue;
  1105. /* Apply default for bypass mode */
  1106. if (!arizona->pdata.micbias[i].mV)
  1107. arizona->pdata.micbias[i].mV = 2800;
  1108. val = (arizona->pdata.micbias[i].mV - 1500) / 100;
  1109. val <<= ARIZONA_MICB1_LVL_SHIFT;
  1110. if (arizona->pdata.micbias[i].ext_cap)
  1111. val |= ARIZONA_MICB1_EXT_CAP;
  1112. if (arizona->pdata.micbias[i].discharge)
  1113. val |= ARIZONA_MICB1_DISCH;
  1114. if (arizona->pdata.micbias[i].soft_start)
  1115. val |= ARIZONA_MICB1_RATE;
  1116. if (arizona->pdata.micbias[i].bypass)
  1117. val |= ARIZONA_MICB1_BYPASS;
  1118. regmap_update_bits(arizona->regmap,
  1119. ARIZONA_MIC_BIAS_CTRL_1 + i,
  1120. ARIZONA_MICB1_LVL_MASK |
  1121. ARIZONA_MICB1_EXT_CAP |
  1122. ARIZONA_MICB1_DISCH |
  1123. ARIZONA_MICB1_BYPASS |
  1124. ARIZONA_MICB1_RATE, val);
  1125. }
  1126. for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
  1127. /* Default for both is 0 so noop with defaults */
  1128. val = arizona->pdata.dmic_ref[i]
  1129. << ARIZONA_IN1_DMIC_SUP_SHIFT;
  1130. if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC)
  1131. val |= 1 << ARIZONA_IN1_MODE_SHIFT;
  1132. switch (arizona->type) {
  1133. case WM8998:
  1134. case WM1814:
  1135. regmap_update_bits(arizona->regmap,
  1136. ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8),
  1137. ARIZONA_IN1L_SRC_SE_MASK,
  1138. (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
  1139. << ARIZONA_IN1L_SRC_SE_SHIFT);
  1140. regmap_update_bits(arizona->regmap,
  1141. ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8),
  1142. ARIZONA_IN1R_SRC_SE_MASK,
  1143. (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
  1144. << ARIZONA_IN1R_SRC_SE_SHIFT);
  1145. mask = ARIZONA_IN1_DMIC_SUP_MASK |
  1146. ARIZONA_IN1_MODE_MASK;
  1147. break;
  1148. default:
  1149. if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
  1150. val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT;
  1151. mask = ARIZONA_IN1_DMIC_SUP_MASK |
  1152. ARIZONA_IN1_MODE_MASK |
  1153. ARIZONA_IN1_SINGLE_ENDED_MASK;
  1154. break;
  1155. }
  1156. regmap_update_bits(arizona->regmap,
  1157. ARIZONA_IN1L_CONTROL + (i * 8),
  1158. mask, val);
  1159. }
  1160. for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
  1161. /* Default is 0 so noop with defaults */
  1162. if (arizona->pdata.out_mono[i])
  1163. val = ARIZONA_OUT1_MONO;
  1164. else
  1165. val = 0;
  1166. regmap_update_bits(arizona->regmap,
  1167. ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
  1168. ARIZONA_OUT1_MONO, val);
  1169. }
  1170. for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
  1171. if (arizona->pdata.spk_mute[i])
  1172. regmap_update_bits(arizona->regmap,
  1173. ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
  1174. ARIZONA_SPK1_MUTE_ENDIAN_MASK |
  1175. ARIZONA_SPK1_MUTE_SEQ1_MASK,
  1176. arizona->pdata.spk_mute[i]);
  1177. if (arizona->pdata.spk_fmt[i])
  1178. regmap_update_bits(arizona->regmap,
  1179. ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
  1180. ARIZONA_SPK1_FMT_MASK,
  1181. arizona->pdata.spk_fmt[i]);
  1182. }
  1183. pm_runtime_set_active(arizona->dev);
  1184. pm_runtime_enable(arizona->dev);
  1185. /* Set up for interrupts */
  1186. ret = arizona_irq_init(arizona);
  1187. if (ret != 0)
  1188. goto err_reset;
  1189. pm_runtime_set_autosuspend_delay(arizona->dev, 100);
  1190. pm_runtime_use_autosuspend(arizona->dev);
  1191. arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
  1192. arizona_clkgen_err, arizona);
  1193. arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
  1194. arizona_overclocked, arizona);
  1195. arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
  1196. arizona_underclocked, arizona);
  1197. ret = mfd_add_devices(arizona->dev, PLATFORM_DEVID_NONE,
  1198. subdevs, n_subdevs, NULL, 0, NULL);
  1199. if (ret) {
  1200. dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
  1201. goto err_irq;
  1202. }
  1203. return 0;
  1204. err_irq:
  1205. arizona_irq_exit(arizona);
  1206. err_reset:
  1207. arizona_enable_reset(arizona);
  1208. regulator_disable(arizona->dcvdd);
  1209. err_enable:
  1210. regulator_bulk_disable(arizona->num_core_supplies,
  1211. arizona->core_supplies);
  1212. err_dcvdd:
  1213. regulator_put(arizona->dcvdd);
  1214. err_early:
  1215. mfd_remove_devices(dev);
  1216. return ret;
  1217. }
  1218. EXPORT_SYMBOL_GPL(arizona_dev_init);
  1219. int arizona_dev_exit(struct arizona *arizona)
  1220. {
  1221. pm_runtime_disable(arizona->dev);
  1222. regulator_disable(arizona->dcvdd);
  1223. regulator_put(arizona->dcvdd);
  1224. mfd_remove_devices(arizona->dev);
  1225. arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
  1226. arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
  1227. arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
  1228. arizona_irq_exit(arizona);
  1229. arizona_enable_reset(arizona);
  1230. regulator_bulk_disable(arizona->num_core_supplies,
  1231. arizona->core_supplies);
  1232. return 0;
  1233. }
  1234. EXPORT_SYMBOL_GPL(arizona_dev_exit);