menelaus.c 30 KB

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  1. /*
  2. * Copyright (C) 2004 Texas Instruments, Inc.
  3. *
  4. * Some parts based tps65010.c:
  5. * Copyright (C) 2004 Texas Instruments and
  6. * Copyright (C) 2004-2005 David Brownell
  7. *
  8. * Some parts based on tlv320aic24.c:
  9. * Copyright (C) by Kai Svahn <kai.svahn@nokia.com>
  10. *
  11. * Changes for interrupt handling and clean-up by
  12. * Tony Lindgren <tony@atomide.com> and Imre Deak <imre.deak@nokia.com>
  13. * Cleanup and generalized support for voltage setting by
  14. * Juha Yrjola
  15. * Added support for controlling VCORE and regulator sleep states,
  16. * Amit Kucheria <amit.kucheria@nokia.com>
  17. * Copyright (C) 2005, 2006 Nokia Corporation
  18. *
  19. * This program is free software; you can redistribute it and/or modify
  20. * it under the terms of the GNU General Public License as published by
  21. * the Free Software Foundation; either version 2 of the License, or
  22. * (at your option) any later version.
  23. *
  24. * This program is distributed in the hope that it will be useful,
  25. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  27. * GNU General Public License for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License
  30. * along with this program; if not, write to the Free Software
  31. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  32. */
  33. #include <linux/module.h>
  34. #include <linux/i2c.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/sched.h>
  37. #include <linux/mutex.h>
  38. #include <linux/workqueue.h>
  39. #include <linux/delay.h>
  40. #include <linux/rtc.h>
  41. #include <linux/bcd.h>
  42. #include <linux/slab.h>
  43. #include <linux/mfd/menelaus.h>
  44. #include <asm/mach/irq.h>
  45. #include <asm/gpio.h>
  46. #define DRIVER_NAME "menelaus"
  47. #define MENELAUS_I2C_ADDRESS 0x72
  48. #define MENELAUS_REV 0x01
  49. #define MENELAUS_VCORE_CTRL1 0x02
  50. #define MENELAUS_VCORE_CTRL2 0x03
  51. #define MENELAUS_VCORE_CTRL3 0x04
  52. #define MENELAUS_VCORE_CTRL4 0x05
  53. #define MENELAUS_VCORE_CTRL5 0x06
  54. #define MENELAUS_DCDC_CTRL1 0x07
  55. #define MENELAUS_DCDC_CTRL2 0x08
  56. #define MENELAUS_DCDC_CTRL3 0x09
  57. #define MENELAUS_LDO_CTRL1 0x0A
  58. #define MENELAUS_LDO_CTRL2 0x0B
  59. #define MENELAUS_LDO_CTRL3 0x0C
  60. #define MENELAUS_LDO_CTRL4 0x0D
  61. #define MENELAUS_LDO_CTRL5 0x0E
  62. #define MENELAUS_LDO_CTRL6 0x0F
  63. #define MENELAUS_LDO_CTRL7 0x10
  64. #define MENELAUS_LDO_CTRL8 0x11
  65. #define MENELAUS_SLEEP_CTRL1 0x12
  66. #define MENELAUS_SLEEP_CTRL2 0x13
  67. #define MENELAUS_DEVICE_OFF 0x14
  68. #define MENELAUS_OSC_CTRL 0x15
  69. #define MENELAUS_DETECT_CTRL 0x16
  70. #define MENELAUS_INT_MASK1 0x17
  71. #define MENELAUS_INT_MASK2 0x18
  72. #define MENELAUS_INT_STATUS1 0x19
  73. #define MENELAUS_INT_STATUS2 0x1A
  74. #define MENELAUS_INT_ACK1 0x1B
  75. #define MENELAUS_INT_ACK2 0x1C
  76. #define MENELAUS_GPIO_CTRL 0x1D
  77. #define MENELAUS_GPIO_IN 0x1E
  78. #define MENELAUS_GPIO_OUT 0x1F
  79. #define MENELAUS_BBSMS 0x20
  80. #define MENELAUS_RTC_CTRL 0x21
  81. #define MENELAUS_RTC_UPDATE 0x22
  82. #define MENELAUS_RTC_SEC 0x23
  83. #define MENELAUS_RTC_MIN 0x24
  84. #define MENELAUS_RTC_HR 0x25
  85. #define MENELAUS_RTC_DAY 0x26
  86. #define MENELAUS_RTC_MON 0x27
  87. #define MENELAUS_RTC_YR 0x28
  88. #define MENELAUS_RTC_WKDAY 0x29
  89. #define MENELAUS_RTC_AL_SEC 0x2A
  90. #define MENELAUS_RTC_AL_MIN 0x2B
  91. #define MENELAUS_RTC_AL_HR 0x2C
  92. #define MENELAUS_RTC_AL_DAY 0x2D
  93. #define MENELAUS_RTC_AL_MON 0x2E
  94. #define MENELAUS_RTC_AL_YR 0x2F
  95. #define MENELAUS_RTC_COMP_MSB 0x30
  96. #define MENELAUS_RTC_COMP_LSB 0x31
  97. #define MENELAUS_S1_PULL_EN 0x32
  98. #define MENELAUS_S1_PULL_DIR 0x33
  99. #define MENELAUS_S2_PULL_EN 0x34
  100. #define MENELAUS_S2_PULL_DIR 0x35
  101. #define MENELAUS_MCT_CTRL1 0x36
  102. #define MENELAUS_MCT_CTRL2 0x37
  103. #define MENELAUS_MCT_CTRL3 0x38
  104. #define MENELAUS_MCT_PIN_ST 0x39
  105. #define MENELAUS_DEBOUNCE1 0x3A
  106. #define IH_MENELAUS_IRQS 12
  107. #define MENELAUS_MMC_S1CD_IRQ 0 /* MMC slot 1 card change */
  108. #define MENELAUS_MMC_S2CD_IRQ 1 /* MMC slot 2 card change */
  109. #define MENELAUS_MMC_S1D1_IRQ 2 /* MMC DAT1 low in slot 1 */
  110. #define MENELAUS_MMC_S2D1_IRQ 3 /* MMC DAT1 low in slot 2 */
  111. #define MENELAUS_LOWBAT_IRQ 4 /* Low battery */
  112. #define MENELAUS_HOTDIE_IRQ 5 /* Hot die detect */
  113. #define MENELAUS_UVLO_IRQ 6 /* UVLO detect */
  114. #define MENELAUS_TSHUT_IRQ 7 /* Thermal shutdown */
  115. #define MENELAUS_RTCTMR_IRQ 8 /* RTC timer */
  116. #define MENELAUS_RTCALM_IRQ 9 /* RTC alarm */
  117. #define MENELAUS_RTCERR_IRQ 10 /* RTC error */
  118. #define MENELAUS_PSHBTN_IRQ 11 /* Push button */
  119. #define MENELAUS_RESERVED12_IRQ 12 /* Reserved */
  120. #define MENELAUS_RESERVED13_IRQ 13 /* Reserved */
  121. #define MENELAUS_RESERVED14_IRQ 14 /* Reserved */
  122. #define MENELAUS_RESERVED15_IRQ 15 /* Reserved */
  123. /* VCORE_CTRL1 register */
  124. #define VCORE_CTRL1_BYP_COMP (1 << 5)
  125. #define VCORE_CTRL1_HW_NSW (1 << 7)
  126. /* GPIO_CTRL register */
  127. #define GPIO_CTRL_SLOTSELEN (1 << 5)
  128. #define GPIO_CTRL_SLPCTLEN (1 << 6)
  129. #define GPIO1_DIR_INPUT (1 << 0)
  130. #define GPIO2_DIR_INPUT (1 << 1)
  131. #define GPIO3_DIR_INPUT (1 << 2)
  132. /* MCT_CTRL1 register */
  133. #define MCT_CTRL1_S1_CMD_OD (1 << 2)
  134. #define MCT_CTRL1_S2_CMD_OD (1 << 3)
  135. /* MCT_CTRL2 register */
  136. #define MCT_CTRL2_VS2_SEL_D0 (1 << 0)
  137. #define MCT_CTRL2_VS2_SEL_D1 (1 << 1)
  138. #define MCT_CTRL2_S1CD_BUFEN (1 << 4)
  139. #define MCT_CTRL2_S2CD_BUFEN (1 << 5)
  140. #define MCT_CTRL2_S1CD_DBEN (1 << 6)
  141. #define MCT_CTRL2_S2CD_BEN (1 << 7)
  142. /* MCT_CTRL3 register */
  143. #define MCT_CTRL3_SLOT1_EN (1 << 0)
  144. #define MCT_CTRL3_SLOT2_EN (1 << 1)
  145. #define MCT_CTRL3_S1_AUTO_EN (1 << 2)
  146. #define MCT_CTRL3_S2_AUTO_EN (1 << 3)
  147. /* MCT_PIN_ST register */
  148. #define MCT_PIN_ST_S1_CD_ST (1 << 0)
  149. #define MCT_PIN_ST_S2_CD_ST (1 << 1)
  150. static void menelaus_work(struct work_struct *_menelaus);
  151. struct menelaus_chip {
  152. struct mutex lock;
  153. struct i2c_client *client;
  154. struct work_struct work;
  155. #ifdef CONFIG_RTC_DRV_TWL92330
  156. struct rtc_device *rtc;
  157. u8 rtc_control;
  158. unsigned uie:1;
  159. #endif
  160. unsigned vcore_hw_mode:1;
  161. u8 mask1, mask2;
  162. void (*handlers[16])(struct menelaus_chip *);
  163. void (*mmc_callback)(void *data, u8 mask);
  164. void *mmc_callback_data;
  165. };
  166. static struct menelaus_chip *the_menelaus;
  167. static int menelaus_write_reg(int reg, u8 value)
  168. {
  169. int val = i2c_smbus_write_byte_data(the_menelaus->client, reg, value);
  170. if (val < 0) {
  171. pr_err(DRIVER_NAME ": write error");
  172. return val;
  173. }
  174. return 0;
  175. }
  176. static int menelaus_read_reg(int reg)
  177. {
  178. int val = i2c_smbus_read_byte_data(the_menelaus->client, reg);
  179. if (val < 0)
  180. pr_err(DRIVER_NAME ": read error");
  181. return val;
  182. }
  183. static int menelaus_enable_irq(int irq)
  184. {
  185. if (irq > 7) {
  186. irq -= 8;
  187. the_menelaus->mask2 &= ~(1 << irq);
  188. return menelaus_write_reg(MENELAUS_INT_MASK2,
  189. the_menelaus->mask2);
  190. } else {
  191. the_menelaus->mask1 &= ~(1 << irq);
  192. return menelaus_write_reg(MENELAUS_INT_MASK1,
  193. the_menelaus->mask1);
  194. }
  195. }
  196. static int menelaus_disable_irq(int irq)
  197. {
  198. if (irq > 7) {
  199. irq -= 8;
  200. the_menelaus->mask2 |= (1 << irq);
  201. return menelaus_write_reg(MENELAUS_INT_MASK2,
  202. the_menelaus->mask2);
  203. } else {
  204. the_menelaus->mask1 |= (1 << irq);
  205. return menelaus_write_reg(MENELAUS_INT_MASK1,
  206. the_menelaus->mask1);
  207. }
  208. }
  209. static int menelaus_ack_irq(int irq)
  210. {
  211. if (irq > 7)
  212. return menelaus_write_reg(MENELAUS_INT_ACK2, 1 << (irq - 8));
  213. else
  214. return menelaus_write_reg(MENELAUS_INT_ACK1, 1 << irq);
  215. }
  216. /* Adds a handler for an interrupt. Does not run in interrupt context */
  217. static int menelaus_add_irq_work(int irq,
  218. void (*handler)(struct menelaus_chip *))
  219. {
  220. int ret = 0;
  221. mutex_lock(&the_menelaus->lock);
  222. the_menelaus->handlers[irq] = handler;
  223. ret = menelaus_enable_irq(irq);
  224. mutex_unlock(&the_menelaus->lock);
  225. return ret;
  226. }
  227. /* Removes handler for an interrupt */
  228. static int menelaus_remove_irq_work(int irq)
  229. {
  230. int ret = 0;
  231. mutex_lock(&the_menelaus->lock);
  232. ret = menelaus_disable_irq(irq);
  233. the_menelaus->handlers[irq] = NULL;
  234. mutex_unlock(&the_menelaus->lock);
  235. return ret;
  236. }
  237. /*
  238. * Gets scheduled when a card detect interrupt happens. Note that in some cases
  239. * this line is wired to card cover switch rather than the card detect switch
  240. * in each slot. In this case the cards are not seen by menelaus.
  241. * FIXME: Add handling for D1 too
  242. */
  243. static void menelaus_mmc_cd_work(struct menelaus_chip *menelaus_hw)
  244. {
  245. int reg;
  246. unsigned char card_mask = 0;
  247. reg = menelaus_read_reg(MENELAUS_MCT_PIN_ST);
  248. if (reg < 0)
  249. return;
  250. if (!(reg & 0x1))
  251. card_mask |= MCT_PIN_ST_S1_CD_ST;
  252. if (!(reg & 0x2))
  253. card_mask |= MCT_PIN_ST_S2_CD_ST;
  254. if (menelaus_hw->mmc_callback)
  255. menelaus_hw->mmc_callback(menelaus_hw->mmc_callback_data,
  256. card_mask);
  257. }
  258. /*
  259. * Toggles the MMC slots between open-drain and push-pull mode.
  260. */
  261. int menelaus_set_mmc_opendrain(int slot, int enable)
  262. {
  263. int ret, val;
  264. if (slot != 1 && slot != 2)
  265. return -EINVAL;
  266. mutex_lock(&the_menelaus->lock);
  267. ret = menelaus_read_reg(MENELAUS_MCT_CTRL1);
  268. if (ret < 0) {
  269. mutex_unlock(&the_menelaus->lock);
  270. return ret;
  271. }
  272. val = ret;
  273. if (slot == 1) {
  274. if (enable)
  275. val |= MCT_CTRL1_S1_CMD_OD;
  276. else
  277. val &= ~MCT_CTRL1_S1_CMD_OD;
  278. } else {
  279. if (enable)
  280. val |= MCT_CTRL1_S2_CMD_OD;
  281. else
  282. val &= ~MCT_CTRL1_S2_CMD_OD;
  283. }
  284. ret = menelaus_write_reg(MENELAUS_MCT_CTRL1, val);
  285. mutex_unlock(&the_menelaus->lock);
  286. return ret;
  287. }
  288. EXPORT_SYMBOL(menelaus_set_mmc_opendrain);
  289. int menelaus_set_slot_sel(int enable)
  290. {
  291. int ret;
  292. mutex_lock(&the_menelaus->lock);
  293. ret = menelaus_read_reg(MENELAUS_GPIO_CTRL);
  294. if (ret < 0)
  295. goto out;
  296. ret |= GPIO2_DIR_INPUT;
  297. if (enable)
  298. ret |= GPIO_CTRL_SLOTSELEN;
  299. else
  300. ret &= ~GPIO_CTRL_SLOTSELEN;
  301. ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, ret);
  302. out:
  303. mutex_unlock(&the_menelaus->lock);
  304. return ret;
  305. }
  306. EXPORT_SYMBOL(menelaus_set_slot_sel);
  307. int menelaus_set_mmc_slot(int slot, int enable, int power, int cd_en)
  308. {
  309. int ret, val;
  310. if (slot != 1 && slot != 2)
  311. return -EINVAL;
  312. if (power >= 3)
  313. return -EINVAL;
  314. mutex_lock(&the_menelaus->lock);
  315. ret = menelaus_read_reg(MENELAUS_MCT_CTRL2);
  316. if (ret < 0)
  317. goto out;
  318. val = ret;
  319. if (slot == 1) {
  320. if (cd_en)
  321. val |= MCT_CTRL2_S1CD_BUFEN | MCT_CTRL2_S1CD_DBEN;
  322. else
  323. val &= ~(MCT_CTRL2_S1CD_BUFEN | MCT_CTRL2_S1CD_DBEN);
  324. } else {
  325. if (cd_en)
  326. val |= MCT_CTRL2_S2CD_BUFEN | MCT_CTRL2_S2CD_BEN;
  327. else
  328. val &= ~(MCT_CTRL2_S2CD_BUFEN | MCT_CTRL2_S2CD_BEN);
  329. }
  330. ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, val);
  331. if (ret < 0)
  332. goto out;
  333. ret = menelaus_read_reg(MENELAUS_MCT_CTRL3);
  334. if (ret < 0)
  335. goto out;
  336. val = ret;
  337. if (slot == 1) {
  338. if (enable)
  339. val |= MCT_CTRL3_SLOT1_EN;
  340. else
  341. val &= ~MCT_CTRL3_SLOT1_EN;
  342. } else {
  343. int b;
  344. if (enable)
  345. val |= MCT_CTRL3_SLOT2_EN;
  346. else
  347. val &= ~MCT_CTRL3_SLOT2_EN;
  348. b = menelaus_read_reg(MENELAUS_MCT_CTRL2);
  349. b &= ~(MCT_CTRL2_VS2_SEL_D0 | MCT_CTRL2_VS2_SEL_D1);
  350. b |= power;
  351. ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, b);
  352. if (ret < 0)
  353. goto out;
  354. }
  355. /* Disable autonomous shutdown */
  356. val &= ~(MCT_CTRL3_S1_AUTO_EN | MCT_CTRL3_S2_AUTO_EN);
  357. ret = menelaus_write_reg(MENELAUS_MCT_CTRL3, val);
  358. out:
  359. mutex_unlock(&the_menelaus->lock);
  360. return ret;
  361. }
  362. EXPORT_SYMBOL(menelaus_set_mmc_slot);
  363. int menelaus_register_mmc_callback(void (*callback)(void *data, u8 card_mask),
  364. void *data)
  365. {
  366. int ret = 0;
  367. the_menelaus->mmc_callback_data = data;
  368. the_menelaus->mmc_callback = callback;
  369. ret = menelaus_add_irq_work(MENELAUS_MMC_S1CD_IRQ,
  370. menelaus_mmc_cd_work);
  371. if (ret < 0)
  372. return ret;
  373. ret = menelaus_add_irq_work(MENELAUS_MMC_S2CD_IRQ,
  374. menelaus_mmc_cd_work);
  375. if (ret < 0)
  376. return ret;
  377. ret = menelaus_add_irq_work(MENELAUS_MMC_S1D1_IRQ,
  378. menelaus_mmc_cd_work);
  379. if (ret < 0)
  380. return ret;
  381. ret = menelaus_add_irq_work(MENELAUS_MMC_S2D1_IRQ,
  382. menelaus_mmc_cd_work);
  383. return ret;
  384. }
  385. EXPORT_SYMBOL(menelaus_register_mmc_callback);
  386. void menelaus_unregister_mmc_callback(void)
  387. {
  388. menelaus_remove_irq_work(MENELAUS_MMC_S1CD_IRQ);
  389. menelaus_remove_irq_work(MENELAUS_MMC_S2CD_IRQ);
  390. menelaus_remove_irq_work(MENELAUS_MMC_S1D1_IRQ);
  391. menelaus_remove_irq_work(MENELAUS_MMC_S2D1_IRQ);
  392. the_menelaus->mmc_callback = NULL;
  393. the_menelaus->mmc_callback_data = NULL;
  394. }
  395. EXPORT_SYMBOL(menelaus_unregister_mmc_callback);
  396. struct menelaus_vtg {
  397. const char *name;
  398. u8 vtg_reg;
  399. u8 vtg_shift;
  400. u8 vtg_bits;
  401. u8 mode_reg;
  402. };
  403. struct menelaus_vtg_value {
  404. u16 vtg;
  405. u16 val;
  406. };
  407. static int menelaus_set_voltage(const struct menelaus_vtg *vtg, int mV,
  408. int vtg_val, int mode)
  409. {
  410. int val, ret;
  411. struct i2c_client *c = the_menelaus->client;
  412. mutex_lock(&the_menelaus->lock);
  413. ret = menelaus_read_reg(vtg->vtg_reg);
  414. if (ret < 0)
  415. goto out;
  416. val = ret & ~(((1 << vtg->vtg_bits) - 1) << vtg->vtg_shift);
  417. val |= vtg_val << vtg->vtg_shift;
  418. dev_dbg(&c->dev, "Setting voltage '%s'"
  419. "to %d mV (reg 0x%02x, val 0x%02x)\n",
  420. vtg->name, mV, vtg->vtg_reg, val);
  421. ret = menelaus_write_reg(vtg->vtg_reg, val);
  422. if (ret < 0)
  423. goto out;
  424. ret = menelaus_write_reg(vtg->mode_reg, mode);
  425. out:
  426. mutex_unlock(&the_menelaus->lock);
  427. if (ret == 0) {
  428. /* Wait for voltage to stabilize */
  429. msleep(1);
  430. }
  431. return ret;
  432. }
  433. static int menelaus_get_vtg_value(int vtg, const struct menelaus_vtg_value *tbl,
  434. int n)
  435. {
  436. int i;
  437. for (i = 0; i < n; i++, tbl++)
  438. if (tbl->vtg == vtg)
  439. return tbl->val;
  440. return -EINVAL;
  441. }
  442. /*
  443. * Vcore can be programmed in two ways:
  444. * SW-controlled: Required voltage is programmed into VCORE_CTRL1
  445. * HW-controlled: Required range (roof-floor) is programmed into VCORE_CTRL3
  446. * and VCORE_CTRL4
  447. *
  448. * Call correct 'set' function accordingly
  449. */
  450. static const struct menelaus_vtg_value vcore_values[] = {
  451. { 1000, 0 },
  452. { 1025, 1 },
  453. { 1050, 2 },
  454. { 1075, 3 },
  455. { 1100, 4 },
  456. { 1125, 5 },
  457. { 1150, 6 },
  458. { 1175, 7 },
  459. { 1200, 8 },
  460. { 1225, 9 },
  461. { 1250, 10 },
  462. { 1275, 11 },
  463. { 1300, 12 },
  464. { 1325, 13 },
  465. { 1350, 14 },
  466. { 1375, 15 },
  467. { 1400, 16 },
  468. { 1425, 17 },
  469. { 1450, 18 },
  470. };
  471. int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV)
  472. {
  473. int fval, rval, val, ret;
  474. struct i2c_client *c = the_menelaus->client;
  475. rval = menelaus_get_vtg_value(roof_mV, vcore_values,
  476. ARRAY_SIZE(vcore_values));
  477. if (rval < 0)
  478. return -EINVAL;
  479. fval = menelaus_get_vtg_value(floor_mV, vcore_values,
  480. ARRAY_SIZE(vcore_values));
  481. if (fval < 0)
  482. return -EINVAL;
  483. dev_dbg(&c->dev, "Setting VCORE FLOOR to %d mV and ROOF to %d mV\n",
  484. floor_mV, roof_mV);
  485. mutex_lock(&the_menelaus->lock);
  486. ret = menelaus_write_reg(MENELAUS_VCORE_CTRL3, fval);
  487. if (ret < 0)
  488. goto out;
  489. ret = menelaus_write_reg(MENELAUS_VCORE_CTRL4, rval);
  490. if (ret < 0)
  491. goto out;
  492. if (!the_menelaus->vcore_hw_mode) {
  493. val = menelaus_read_reg(MENELAUS_VCORE_CTRL1);
  494. /* HW mode, turn OFF byte comparator */
  495. val |= (VCORE_CTRL1_HW_NSW | VCORE_CTRL1_BYP_COMP);
  496. ret = menelaus_write_reg(MENELAUS_VCORE_CTRL1, val);
  497. the_menelaus->vcore_hw_mode = 1;
  498. }
  499. msleep(1);
  500. out:
  501. mutex_unlock(&the_menelaus->lock);
  502. return ret;
  503. }
  504. static const struct menelaus_vtg vmem_vtg = {
  505. .name = "VMEM",
  506. .vtg_reg = MENELAUS_LDO_CTRL1,
  507. .vtg_shift = 0,
  508. .vtg_bits = 2,
  509. .mode_reg = MENELAUS_LDO_CTRL3,
  510. };
  511. static const struct menelaus_vtg_value vmem_values[] = {
  512. { 1500, 0 },
  513. { 1800, 1 },
  514. { 1900, 2 },
  515. { 2500, 3 },
  516. };
  517. int menelaus_set_vmem(unsigned int mV)
  518. {
  519. int val;
  520. if (mV == 0)
  521. return menelaus_set_voltage(&vmem_vtg, 0, 0, 0);
  522. val = menelaus_get_vtg_value(mV, vmem_values, ARRAY_SIZE(vmem_values));
  523. if (val < 0)
  524. return -EINVAL;
  525. return menelaus_set_voltage(&vmem_vtg, mV, val, 0x02);
  526. }
  527. EXPORT_SYMBOL(menelaus_set_vmem);
  528. static const struct menelaus_vtg vio_vtg = {
  529. .name = "VIO",
  530. .vtg_reg = MENELAUS_LDO_CTRL1,
  531. .vtg_shift = 2,
  532. .vtg_bits = 2,
  533. .mode_reg = MENELAUS_LDO_CTRL4,
  534. };
  535. static const struct menelaus_vtg_value vio_values[] = {
  536. { 1500, 0 },
  537. { 1800, 1 },
  538. { 2500, 2 },
  539. { 2800, 3 },
  540. };
  541. int menelaus_set_vio(unsigned int mV)
  542. {
  543. int val;
  544. if (mV == 0)
  545. return menelaus_set_voltage(&vio_vtg, 0, 0, 0);
  546. val = menelaus_get_vtg_value(mV, vio_values, ARRAY_SIZE(vio_values));
  547. if (val < 0)
  548. return -EINVAL;
  549. return menelaus_set_voltage(&vio_vtg, mV, val, 0x02);
  550. }
  551. EXPORT_SYMBOL(menelaus_set_vio);
  552. static const struct menelaus_vtg_value vdcdc_values[] = {
  553. { 1500, 0 },
  554. { 1800, 1 },
  555. { 2000, 2 },
  556. { 2200, 3 },
  557. { 2400, 4 },
  558. { 2800, 5 },
  559. { 3000, 6 },
  560. { 3300, 7 },
  561. };
  562. static const struct menelaus_vtg vdcdc2_vtg = {
  563. .name = "VDCDC2",
  564. .vtg_reg = MENELAUS_DCDC_CTRL1,
  565. .vtg_shift = 0,
  566. .vtg_bits = 3,
  567. .mode_reg = MENELAUS_DCDC_CTRL2,
  568. };
  569. static const struct menelaus_vtg vdcdc3_vtg = {
  570. .name = "VDCDC3",
  571. .vtg_reg = MENELAUS_DCDC_CTRL1,
  572. .vtg_shift = 3,
  573. .vtg_bits = 3,
  574. .mode_reg = MENELAUS_DCDC_CTRL3,
  575. };
  576. int menelaus_set_vdcdc(int dcdc, unsigned int mV)
  577. {
  578. const struct menelaus_vtg *vtg;
  579. int val;
  580. if (dcdc != 2 && dcdc != 3)
  581. return -EINVAL;
  582. if (dcdc == 2)
  583. vtg = &vdcdc2_vtg;
  584. else
  585. vtg = &vdcdc3_vtg;
  586. if (mV == 0)
  587. return menelaus_set_voltage(vtg, 0, 0, 0);
  588. val = menelaus_get_vtg_value(mV, vdcdc_values,
  589. ARRAY_SIZE(vdcdc_values));
  590. if (val < 0)
  591. return -EINVAL;
  592. return menelaus_set_voltage(vtg, mV, val, 0x03);
  593. }
  594. static const struct menelaus_vtg_value vmmc_values[] = {
  595. { 1850, 0 },
  596. { 2800, 1 },
  597. { 3000, 2 },
  598. { 3100, 3 },
  599. };
  600. static const struct menelaus_vtg vmmc_vtg = {
  601. .name = "VMMC",
  602. .vtg_reg = MENELAUS_LDO_CTRL1,
  603. .vtg_shift = 6,
  604. .vtg_bits = 2,
  605. .mode_reg = MENELAUS_LDO_CTRL7,
  606. };
  607. int menelaus_set_vmmc(unsigned int mV)
  608. {
  609. int val;
  610. if (mV == 0)
  611. return menelaus_set_voltage(&vmmc_vtg, 0, 0, 0);
  612. val = menelaus_get_vtg_value(mV, vmmc_values, ARRAY_SIZE(vmmc_values));
  613. if (val < 0)
  614. return -EINVAL;
  615. return menelaus_set_voltage(&vmmc_vtg, mV, val, 0x02);
  616. }
  617. EXPORT_SYMBOL(menelaus_set_vmmc);
  618. static const struct menelaus_vtg_value vaux_values[] = {
  619. { 1500, 0 },
  620. { 1800, 1 },
  621. { 2500, 2 },
  622. { 2800, 3 },
  623. };
  624. static const struct menelaus_vtg vaux_vtg = {
  625. .name = "VAUX",
  626. .vtg_reg = MENELAUS_LDO_CTRL1,
  627. .vtg_shift = 4,
  628. .vtg_bits = 2,
  629. .mode_reg = MENELAUS_LDO_CTRL6,
  630. };
  631. int menelaus_set_vaux(unsigned int mV)
  632. {
  633. int val;
  634. if (mV == 0)
  635. return menelaus_set_voltage(&vaux_vtg, 0, 0, 0);
  636. val = menelaus_get_vtg_value(mV, vaux_values, ARRAY_SIZE(vaux_values));
  637. if (val < 0)
  638. return -EINVAL;
  639. return menelaus_set_voltage(&vaux_vtg, mV, val, 0x02);
  640. }
  641. EXPORT_SYMBOL(menelaus_set_vaux);
  642. int menelaus_get_slot_pin_states(void)
  643. {
  644. return menelaus_read_reg(MENELAUS_MCT_PIN_ST);
  645. }
  646. EXPORT_SYMBOL(menelaus_get_slot_pin_states);
  647. int menelaus_set_regulator_sleep(int enable, u32 val)
  648. {
  649. int t, ret;
  650. struct i2c_client *c = the_menelaus->client;
  651. mutex_lock(&the_menelaus->lock);
  652. ret = menelaus_write_reg(MENELAUS_SLEEP_CTRL2, val);
  653. if (ret < 0)
  654. goto out;
  655. dev_dbg(&c->dev, "regulator sleep configuration: %02x\n", val);
  656. ret = menelaus_read_reg(MENELAUS_GPIO_CTRL);
  657. if (ret < 0)
  658. goto out;
  659. t = (GPIO_CTRL_SLPCTLEN | GPIO3_DIR_INPUT);
  660. if (enable)
  661. ret |= t;
  662. else
  663. ret &= ~t;
  664. ret = menelaus_write_reg(MENELAUS_GPIO_CTRL, ret);
  665. out:
  666. mutex_unlock(&the_menelaus->lock);
  667. return ret;
  668. }
  669. /*-----------------------------------------------------------------------*/
  670. /* Handles Menelaus interrupts. Does not run in interrupt context */
  671. static void menelaus_work(struct work_struct *_menelaus)
  672. {
  673. struct menelaus_chip *menelaus =
  674. container_of(_menelaus, struct menelaus_chip, work);
  675. void (*handler)(struct menelaus_chip *menelaus);
  676. while (1) {
  677. unsigned isr;
  678. isr = (menelaus_read_reg(MENELAUS_INT_STATUS2)
  679. & ~menelaus->mask2) << 8;
  680. isr |= menelaus_read_reg(MENELAUS_INT_STATUS1)
  681. & ~menelaus->mask1;
  682. if (!isr)
  683. break;
  684. while (isr) {
  685. int irq = fls(isr) - 1;
  686. isr &= ~(1 << irq);
  687. mutex_lock(&menelaus->lock);
  688. menelaus_disable_irq(irq);
  689. menelaus_ack_irq(irq);
  690. handler = menelaus->handlers[irq];
  691. if (handler)
  692. handler(menelaus);
  693. menelaus_enable_irq(irq);
  694. mutex_unlock(&menelaus->lock);
  695. }
  696. }
  697. enable_irq(menelaus->client->irq);
  698. }
  699. /*
  700. * We cannot use I2C in interrupt context, so we just schedule work.
  701. */
  702. static irqreturn_t menelaus_irq(int irq, void *_menelaus)
  703. {
  704. struct menelaus_chip *menelaus = _menelaus;
  705. disable_irq_nosync(irq);
  706. (void)schedule_work(&menelaus->work);
  707. return IRQ_HANDLED;
  708. }
  709. /*-----------------------------------------------------------------------*/
  710. /*
  711. * The RTC needs to be set once, then it runs on backup battery power.
  712. * It supports alarms, including system wake alarms (from some modes);
  713. * and 1/second IRQs if requested.
  714. */
  715. #ifdef CONFIG_RTC_DRV_TWL92330
  716. #define RTC_CTRL_RTC_EN (1 << 0)
  717. #define RTC_CTRL_AL_EN (1 << 1)
  718. #define RTC_CTRL_MODE12 (1 << 2)
  719. #define RTC_CTRL_EVERY_MASK (3 << 3)
  720. #define RTC_CTRL_EVERY_SEC (0 << 3)
  721. #define RTC_CTRL_EVERY_MIN (1 << 3)
  722. #define RTC_CTRL_EVERY_HR (2 << 3)
  723. #define RTC_CTRL_EVERY_DAY (3 << 3)
  724. #define RTC_UPDATE_EVERY 0x08
  725. #define RTC_HR_PM (1 << 7)
  726. static void menelaus_to_time(char *regs, struct rtc_time *t)
  727. {
  728. t->tm_sec = bcd2bin(regs[0]);
  729. t->tm_min = bcd2bin(regs[1]);
  730. if (the_menelaus->rtc_control & RTC_CTRL_MODE12) {
  731. t->tm_hour = bcd2bin(regs[2] & 0x1f) - 1;
  732. if (regs[2] & RTC_HR_PM)
  733. t->tm_hour += 12;
  734. } else
  735. t->tm_hour = bcd2bin(regs[2] & 0x3f);
  736. t->tm_mday = bcd2bin(regs[3]);
  737. t->tm_mon = bcd2bin(regs[4]) - 1;
  738. t->tm_year = bcd2bin(regs[5]) + 100;
  739. }
  740. static int time_to_menelaus(struct rtc_time *t, int regnum)
  741. {
  742. int hour, status;
  743. status = menelaus_write_reg(regnum++, bin2bcd(t->tm_sec));
  744. if (status < 0)
  745. goto fail;
  746. status = menelaus_write_reg(regnum++, bin2bcd(t->tm_min));
  747. if (status < 0)
  748. goto fail;
  749. if (the_menelaus->rtc_control & RTC_CTRL_MODE12) {
  750. hour = t->tm_hour + 1;
  751. if (hour > 12)
  752. hour = RTC_HR_PM | bin2bcd(hour - 12);
  753. else
  754. hour = bin2bcd(hour);
  755. } else
  756. hour = bin2bcd(t->tm_hour);
  757. status = menelaus_write_reg(regnum++, hour);
  758. if (status < 0)
  759. goto fail;
  760. status = menelaus_write_reg(regnum++, bin2bcd(t->tm_mday));
  761. if (status < 0)
  762. goto fail;
  763. status = menelaus_write_reg(regnum++, bin2bcd(t->tm_mon + 1));
  764. if (status < 0)
  765. goto fail;
  766. status = menelaus_write_reg(regnum++, bin2bcd(t->tm_year - 100));
  767. if (status < 0)
  768. goto fail;
  769. return 0;
  770. fail:
  771. dev_err(&the_menelaus->client->dev, "rtc write reg %02x, err %d\n",
  772. --regnum, status);
  773. return status;
  774. }
  775. static int menelaus_read_time(struct device *dev, struct rtc_time *t)
  776. {
  777. struct i2c_msg msg[2];
  778. char regs[7];
  779. int status;
  780. /* block read date and time registers */
  781. regs[0] = MENELAUS_RTC_SEC;
  782. msg[0].addr = MENELAUS_I2C_ADDRESS;
  783. msg[0].flags = 0;
  784. msg[0].len = 1;
  785. msg[0].buf = regs;
  786. msg[1].addr = MENELAUS_I2C_ADDRESS;
  787. msg[1].flags = I2C_M_RD;
  788. msg[1].len = sizeof(regs);
  789. msg[1].buf = regs;
  790. status = i2c_transfer(the_menelaus->client->adapter, msg, 2);
  791. if (status != 2) {
  792. dev_err(dev, "%s error %d\n", "read", status);
  793. return -EIO;
  794. }
  795. menelaus_to_time(regs, t);
  796. t->tm_wday = bcd2bin(regs[6]);
  797. return 0;
  798. }
  799. static int menelaus_set_time(struct device *dev, struct rtc_time *t)
  800. {
  801. int status;
  802. /* write date and time registers */
  803. status = time_to_menelaus(t, MENELAUS_RTC_SEC);
  804. if (status < 0)
  805. return status;
  806. status = menelaus_write_reg(MENELAUS_RTC_WKDAY, bin2bcd(t->tm_wday));
  807. if (status < 0) {
  808. dev_err(&the_menelaus->client->dev, "rtc write reg %02x "
  809. "err %d\n", MENELAUS_RTC_WKDAY, status);
  810. return status;
  811. }
  812. /* now commit the write */
  813. status = menelaus_write_reg(MENELAUS_RTC_UPDATE, RTC_UPDATE_EVERY);
  814. if (status < 0)
  815. dev_err(&the_menelaus->client->dev, "rtc commit time, err %d\n",
  816. status);
  817. return 0;
  818. }
  819. static int menelaus_read_alarm(struct device *dev, struct rtc_wkalrm *w)
  820. {
  821. struct i2c_msg msg[2];
  822. char regs[6];
  823. int status;
  824. /* block read alarm registers */
  825. regs[0] = MENELAUS_RTC_AL_SEC;
  826. msg[0].addr = MENELAUS_I2C_ADDRESS;
  827. msg[0].flags = 0;
  828. msg[0].len = 1;
  829. msg[0].buf = regs;
  830. msg[1].addr = MENELAUS_I2C_ADDRESS;
  831. msg[1].flags = I2C_M_RD;
  832. msg[1].len = sizeof(regs);
  833. msg[1].buf = regs;
  834. status = i2c_transfer(the_menelaus->client->adapter, msg, 2);
  835. if (status != 2) {
  836. dev_err(dev, "%s error %d\n", "alarm read", status);
  837. return -EIO;
  838. }
  839. menelaus_to_time(regs, &w->time);
  840. w->enabled = !!(the_menelaus->rtc_control & RTC_CTRL_AL_EN);
  841. /* NOTE we *could* check if actually pending... */
  842. w->pending = 0;
  843. return 0;
  844. }
  845. static int menelaus_set_alarm(struct device *dev, struct rtc_wkalrm *w)
  846. {
  847. int status;
  848. if (the_menelaus->client->irq <= 0 && w->enabled)
  849. return -ENODEV;
  850. /* clear previous alarm enable */
  851. if (the_menelaus->rtc_control & RTC_CTRL_AL_EN) {
  852. the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN;
  853. status = menelaus_write_reg(MENELAUS_RTC_CTRL,
  854. the_menelaus->rtc_control);
  855. if (status < 0)
  856. return status;
  857. }
  858. /* write alarm registers */
  859. status = time_to_menelaus(&w->time, MENELAUS_RTC_AL_SEC);
  860. if (status < 0)
  861. return status;
  862. /* enable alarm if requested */
  863. if (w->enabled) {
  864. the_menelaus->rtc_control |= RTC_CTRL_AL_EN;
  865. status = menelaus_write_reg(MENELAUS_RTC_CTRL,
  866. the_menelaus->rtc_control);
  867. }
  868. return status;
  869. }
  870. #ifdef CONFIG_RTC_INTF_DEV
  871. static void menelaus_rtc_update_work(struct menelaus_chip *m)
  872. {
  873. /* report 1/sec update */
  874. local_irq_disable();
  875. rtc_update_irq(m->rtc, 1, RTC_IRQF | RTC_UF);
  876. local_irq_enable();
  877. }
  878. static int menelaus_ioctl(struct device *dev, unsigned cmd, unsigned long arg)
  879. {
  880. int status;
  881. if (the_menelaus->client->irq <= 0)
  882. return -ENOIOCTLCMD;
  883. switch (cmd) {
  884. /* alarm IRQ */
  885. case RTC_AIE_ON:
  886. if (the_menelaus->rtc_control & RTC_CTRL_AL_EN)
  887. return 0;
  888. the_menelaus->rtc_control |= RTC_CTRL_AL_EN;
  889. break;
  890. case RTC_AIE_OFF:
  891. if (!(the_menelaus->rtc_control & RTC_CTRL_AL_EN))
  892. return 0;
  893. the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN;
  894. break;
  895. /* 1/second "update" IRQ */
  896. case RTC_UIE_ON:
  897. if (the_menelaus->uie)
  898. return 0;
  899. status = menelaus_remove_irq_work(MENELAUS_RTCTMR_IRQ);
  900. status = menelaus_add_irq_work(MENELAUS_RTCTMR_IRQ,
  901. menelaus_rtc_update_work);
  902. if (status == 0)
  903. the_menelaus->uie = 1;
  904. return status;
  905. case RTC_UIE_OFF:
  906. if (!the_menelaus->uie)
  907. return 0;
  908. status = menelaus_remove_irq_work(MENELAUS_RTCTMR_IRQ);
  909. if (status == 0)
  910. the_menelaus->uie = 0;
  911. return status;
  912. default:
  913. return -ENOIOCTLCMD;
  914. }
  915. return menelaus_write_reg(MENELAUS_RTC_CTRL, the_menelaus->rtc_control);
  916. }
  917. #else
  918. #define menelaus_ioctl NULL
  919. #endif
  920. /* REVISIT no compensation register support ... */
  921. static const struct rtc_class_ops menelaus_rtc_ops = {
  922. .ioctl = menelaus_ioctl,
  923. .read_time = menelaus_read_time,
  924. .set_time = menelaus_set_time,
  925. .read_alarm = menelaus_read_alarm,
  926. .set_alarm = menelaus_set_alarm,
  927. };
  928. static void menelaus_rtc_alarm_work(struct menelaus_chip *m)
  929. {
  930. /* report alarm */
  931. local_irq_disable();
  932. rtc_update_irq(m->rtc, 1, RTC_IRQF | RTC_AF);
  933. local_irq_enable();
  934. /* then disable it; alarms are oneshot */
  935. the_menelaus->rtc_control &= ~RTC_CTRL_AL_EN;
  936. menelaus_write_reg(MENELAUS_RTC_CTRL, the_menelaus->rtc_control);
  937. }
  938. static inline void menelaus_rtc_init(struct menelaus_chip *m)
  939. {
  940. int alarm = (m->client->irq > 0);
  941. /* assume 32KDETEN pin is pulled high */
  942. if (!(menelaus_read_reg(MENELAUS_OSC_CTRL) & 0x80)) {
  943. dev_dbg(&m->client->dev, "no 32k oscillator\n");
  944. return;
  945. }
  946. /* support RTC alarm; it can issue wakeups */
  947. if (alarm) {
  948. if (menelaus_add_irq_work(MENELAUS_RTCALM_IRQ,
  949. menelaus_rtc_alarm_work) < 0) {
  950. dev_err(&m->client->dev, "can't handle RTC alarm\n");
  951. return;
  952. }
  953. device_init_wakeup(&m->client->dev, 1);
  954. }
  955. /* be sure RTC is enabled; allow 1/sec irqs; leave 12hr mode alone */
  956. m->rtc_control = menelaus_read_reg(MENELAUS_RTC_CTRL);
  957. if (!(m->rtc_control & RTC_CTRL_RTC_EN)
  958. || (m->rtc_control & RTC_CTRL_AL_EN)
  959. || (m->rtc_control & RTC_CTRL_EVERY_MASK)) {
  960. if (!(m->rtc_control & RTC_CTRL_RTC_EN)) {
  961. dev_warn(&m->client->dev, "rtc clock needs setting\n");
  962. m->rtc_control |= RTC_CTRL_RTC_EN;
  963. }
  964. m->rtc_control &= ~RTC_CTRL_EVERY_MASK;
  965. m->rtc_control &= ~RTC_CTRL_AL_EN;
  966. menelaus_write_reg(MENELAUS_RTC_CTRL, m->rtc_control);
  967. }
  968. m->rtc = rtc_device_register(DRIVER_NAME,
  969. &m->client->dev,
  970. &menelaus_rtc_ops, THIS_MODULE);
  971. if (IS_ERR(m->rtc)) {
  972. if (alarm) {
  973. menelaus_remove_irq_work(MENELAUS_RTCALM_IRQ);
  974. device_init_wakeup(&m->client->dev, 0);
  975. }
  976. dev_err(&m->client->dev, "can't register RTC: %d\n",
  977. (int) PTR_ERR(m->rtc));
  978. the_menelaus->rtc = NULL;
  979. }
  980. }
  981. #else
  982. static inline void menelaus_rtc_init(struct menelaus_chip *m)
  983. {
  984. /* nothing */
  985. }
  986. #endif
  987. /*-----------------------------------------------------------------------*/
  988. static struct i2c_driver menelaus_i2c_driver;
  989. static int menelaus_probe(struct i2c_client *client,
  990. const struct i2c_device_id *id)
  991. {
  992. struct menelaus_chip *menelaus;
  993. int rev = 0;
  994. int err = 0;
  995. struct menelaus_platform_data *menelaus_pdata =
  996. dev_get_platdata(&client->dev);
  997. if (the_menelaus) {
  998. dev_dbg(&client->dev, "only one %s for now\n",
  999. DRIVER_NAME);
  1000. return -ENODEV;
  1001. }
  1002. menelaus = devm_kzalloc(&client->dev, sizeof(*menelaus), GFP_KERNEL);
  1003. if (!menelaus)
  1004. return -ENOMEM;
  1005. i2c_set_clientdata(client, menelaus);
  1006. the_menelaus = menelaus;
  1007. menelaus->client = client;
  1008. /* If a true probe check the device */
  1009. rev = menelaus_read_reg(MENELAUS_REV);
  1010. if (rev < 0) {
  1011. pr_err(DRIVER_NAME ": device not found");
  1012. return -ENODEV;
  1013. }
  1014. /* Ack and disable all Menelaus interrupts */
  1015. menelaus_write_reg(MENELAUS_INT_ACK1, 0xff);
  1016. menelaus_write_reg(MENELAUS_INT_ACK2, 0xff);
  1017. menelaus_write_reg(MENELAUS_INT_MASK1, 0xff);
  1018. menelaus_write_reg(MENELAUS_INT_MASK2, 0xff);
  1019. menelaus->mask1 = 0xff;
  1020. menelaus->mask2 = 0xff;
  1021. /* Set output buffer strengths */
  1022. menelaus_write_reg(MENELAUS_MCT_CTRL1, 0x73);
  1023. if (client->irq > 0) {
  1024. err = request_irq(client->irq, menelaus_irq, 0,
  1025. DRIVER_NAME, menelaus);
  1026. if (err) {
  1027. dev_dbg(&client->dev, "can't get IRQ %d, err %d\n",
  1028. client->irq, err);
  1029. return err;
  1030. }
  1031. }
  1032. mutex_init(&menelaus->lock);
  1033. INIT_WORK(&menelaus->work, menelaus_work);
  1034. pr_info("Menelaus rev %d.%d\n", rev >> 4, rev & 0x0f);
  1035. err = menelaus_read_reg(MENELAUS_VCORE_CTRL1);
  1036. if (err < 0)
  1037. goto fail;
  1038. if (err & VCORE_CTRL1_HW_NSW)
  1039. menelaus->vcore_hw_mode = 1;
  1040. else
  1041. menelaus->vcore_hw_mode = 0;
  1042. if (menelaus_pdata != NULL && menelaus_pdata->late_init != NULL) {
  1043. err = menelaus_pdata->late_init(&client->dev);
  1044. if (err < 0)
  1045. goto fail;
  1046. }
  1047. menelaus_rtc_init(menelaus);
  1048. return 0;
  1049. fail:
  1050. free_irq(client->irq, menelaus);
  1051. flush_work(&menelaus->work);
  1052. return err;
  1053. }
  1054. static int menelaus_remove(struct i2c_client *client)
  1055. {
  1056. struct menelaus_chip *menelaus = i2c_get_clientdata(client);
  1057. free_irq(client->irq, menelaus);
  1058. flush_work(&menelaus->work);
  1059. the_menelaus = NULL;
  1060. return 0;
  1061. }
  1062. static const struct i2c_device_id menelaus_id[] = {
  1063. { "menelaus", 0 },
  1064. { }
  1065. };
  1066. MODULE_DEVICE_TABLE(i2c, menelaus_id);
  1067. static struct i2c_driver menelaus_i2c_driver = {
  1068. .driver = {
  1069. .name = DRIVER_NAME,
  1070. },
  1071. .probe = menelaus_probe,
  1072. .remove = menelaus_remove,
  1073. .id_table = menelaus_id,
  1074. };
  1075. module_i2c_driver(menelaus_i2c_driver);
  1076. MODULE_AUTHOR("Texas Instruments, Inc. (and others)");
  1077. MODULE_DESCRIPTION("I2C interface for Menelaus.");
  1078. MODULE_LICENSE("GPL");