qcom_rpm.c 22 KB

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  1. /*
  2. * Copyright (c) 2014, Sony Mobile Communications AB.
  3. * Copyright (c) 2013, The Linux Foundation. All rights reserved.
  4. * Author: Bjorn Andersson <bjorn.andersson@sonymobile.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 and
  8. * only version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/module.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/of_platform.h>
  18. #include <linux/io.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/mfd/qcom_rpm.h>
  21. #include <linux/mfd/syscon.h>
  22. #include <linux/regmap.h>
  23. #include <dt-bindings/mfd/qcom-rpm.h>
  24. struct qcom_rpm_resource {
  25. unsigned target_id;
  26. unsigned status_id;
  27. unsigned select_id;
  28. unsigned size;
  29. };
  30. struct qcom_rpm_data {
  31. u32 version;
  32. const struct qcom_rpm_resource *resource_table;
  33. unsigned int n_resources;
  34. unsigned int req_ctx_off;
  35. unsigned int req_sel_off;
  36. unsigned int ack_ctx_off;
  37. unsigned int ack_sel_off;
  38. unsigned int req_sel_size;
  39. unsigned int ack_sel_size;
  40. };
  41. struct qcom_rpm {
  42. struct device *dev;
  43. struct regmap *ipc_regmap;
  44. unsigned ipc_offset;
  45. unsigned ipc_bit;
  46. struct completion ack;
  47. struct mutex lock;
  48. void __iomem *status_regs;
  49. void __iomem *ctrl_regs;
  50. void __iomem *req_regs;
  51. u32 ack_status;
  52. const struct qcom_rpm_data *data;
  53. };
  54. #define RPM_STATUS_REG(rpm, i) ((rpm)->status_regs + (i) * 4)
  55. #define RPM_CTRL_REG(rpm, i) ((rpm)->ctrl_regs + (i) * 4)
  56. #define RPM_REQ_REG(rpm, i) ((rpm)->req_regs + (i) * 4)
  57. #define RPM_REQUEST_TIMEOUT (5 * HZ)
  58. #define RPM_MAX_SEL_SIZE 7
  59. #define RPM_NOTIFICATION BIT(30)
  60. #define RPM_REJECTED BIT(31)
  61. #define RPM_SIGNAL BIT(2)
  62. static const struct qcom_rpm_resource apq8064_rpm_resource_table[] = {
  63. [QCOM_RPM_CXO_CLK] = { 25, 9, 5, 1 },
  64. [QCOM_RPM_PXO_CLK] = { 26, 10, 6, 1 },
  65. [QCOM_RPM_APPS_FABRIC_CLK] = { 27, 11, 8, 1 },
  66. [QCOM_RPM_SYS_FABRIC_CLK] = { 28, 12, 9, 1 },
  67. [QCOM_RPM_MM_FABRIC_CLK] = { 29, 13, 10, 1 },
  68. [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 30, 14, 11, 1 },
  69. [QCOM_RPM_SFPB_CLK] = { 31, 15, 12, 1 },
  70. [QCOM_RPM_CFPB_CLK] = { 32, 16, 13, 1 },
  71. [QCOM_RPM_MMFPB_CLK] = { 33, 17, 14, 1 },
  72. [QCOM_RPM_EBI1_CLK] = { 34, 18, 16, 1 },
  73. [QCOM_RPM_APPS_FABRIC_HALT] = { 35, 19, 18, 1 },
  74. [QCOM_RPM_APPS_FABRIC_MODE] = { 37, 20, 19, 1 },
  75. [QCOM_RPM_APPS_FABRIC_IOCTL] = { 40, 21, 20, 1 },
  76. [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 },
  77. [QCOM_RPM_SYS_FABRIC_HALT] = { 53, 23, 22, 1 },
  78. [QCOM_RPM_SYS_FABRIC_MODE] = { 55, 24, 23, 1 },
  79. [QCOM_RPM_SYS_FABRIC_IOCTL] = { 58, 25, 24, 1 },
  80. [QCOM_RPM_SYS_FABRIC_ARB] = { 59, 26, 25, 30 },
  81. [QCOM_RPM_MM_FABRIC_HALT] = { 89, 27, 26, 1 },
  82. [QCOM_RPM_MM_FABRIC_MODE] = { 91, 28, 27, 1 },
  83. [QCOM_RPM_MM_FABRIC_IOCTL] = { 94, 29, 28, 1 },
  84. [QCOM_RPM_MM_FABRIC_ARB] = { 95, 30, 29, 21 },
  85. [QCOM_RPM_PM8921_SMPS1] = { 116, 31, 30, 2 },
  86. [QCOM_RPM_PM8921_SMPS2] = { 118, 33, 31, 2 },
  87. [QCOM_RPM_PM8921_SMPS3] = { 120, 35, 32, 2 },
  88. [QCOM_RPM_PM8921_SMPS4] = { 122, 37, 33, 2 },
  89. [QCOM_RPM_PM8921_SMPS5] = { 124, 39, 34, 2 },
  90. [QCOM_RPM_PM8921_SMPS6] = { 126, 41, 35, 2 },
  91. [QCOM_RPM_PM8921_SMPS7] = { 128, 43, 36, 2 },
  92. [QCOM_RPM_PM8921_SMPS8] = { 130, 45, 37, 2 },
  93. [QCOM_RPM_PM8921_LDO1] = { 132, 47, 38, 2 },
  94. [QCOM_RPM_PM8921_LDO2] = { 134, 49, 39, 2 },
  95. [QCOM_RPM_PM8921_LDO3] = { 136, 51, 40, 2 },
  96. [QCOM_RPM_PM8921_LDO4] = { 138, 53, 41, 2 },
  97. [QCOM_RPM_PM8921_LDO5] = { 140, 55, 42, 2 },
  98. [QCOM_RPM_PM8921_LDO6] = { 142, 57, 43, 2 },
  99. [QCOM_RPM_PM8921_LDO7] = { 144, 59, 44, 2 },
  100. [QCOM_RPM_PM8921_LDO8] = { 146, 61, 45, 2 },
  101. [QCOM_RPM_PM8921_LDO9] = { 148, 63, 46, 2 },
  102. [QCOM_RPM_PM8921_LDO10] = { 150, 65, 47, 2 },
  103. [QCOM_RPM_PM8921_LDO11] = { 152, 67, 48, 2 },
  104. [QCOM_RPM_PM8921_LDO12] = { 154, 69, 49, 2 },
  105. [QCOM_RPM_PM8921_LDO13] = { 156, 71, 50, 2 },
  106. [QCOM_RPM_PM8921_LDO14] = { 158, 73, 51, 2 },
  107. [QCOM_RPM_PM8921_LDO15] = { 160, 75, 52, 2 },
  108. [QCOM_RPM_PM8921_LDO16] = { 162, 77, 53, 2 },
  109. [QCOM_RPM_PM8921_LDO17] = { 164, 79, 54, 2 },
  110. [QCOM_RPM_PM8921_LDO18] = { 166, 81, 55, 2 },
  111. [QCOM_RPM_PM8921_LDO19] = { 168, 83, 56, 2 },
  112. [QCOM_RPM_PM8921_LDO20] = { 170, 85, 57, 2 },
  113. [QCOM_RPM_PM8921_LDO21] = { 172, 87, 58, 2 },
  114. [QCOM_RPM_PM8921_LDO22] = { 174, 89, 59, 2 },
  115. [QCOM_RPM_PM8921_LDO23] = { 176, 91, 60, 2 },
  116. [QCOM_RPM_PM8921_LDO24] = { 178, 93, 61, 2 },
  117. [QCOM_RPM_PM8921_LDO25] = { 180, 95, 62, 2 },
  118. [QCOM_RPM_PM8921_LDO26] = { 182, 97, 63, 2 },
  119. [QCOM_RPM_PM8921_LDO27] = { 184, 99, 64, 2 },
  120. [QCOM_RPM_PM8921_LDO28] = { 186, 101, 65, 2 },
  121. [QCOM_RPM_PM8921_LDO29] = { 188, 103, 66, 2 },
  122. [QCOM_RPM_PM8921_CLK1] = { 190, 105, 67, 2 },
  123. [QCOM_RPM_PM8921_CLK2] = { 192, 107, 68, 2 },
  124. [QCOM_RPM_PM8921_LVS1] = { 194, 109, 69, 1 },
  125. [QCOM_RPM_PM8921_LVS2] = { 195, 110, 70, 1 },
  126. [QCOM_RPM_PM8921_LVS3] = { 196, 111, 71, 1 },
  127. [QCOM_RPM_PM8921_LVS4] = { 197, 112, 72, 1 },
  128. [QCOM_RPM_PM8921_LVS5] = { 198, 113, 73, 1 },
  129. [QCOM_RPM_PM8921_LVS6] = { 199, 114, 74, 1 },
  130. [QCOM_RPM_PM8921_LVS7] = { 200, 115, 75, 1 },
  131. [QCOM_RPM_PM8821_SMPS1] = { 201, 116, 76, 2 },
  132. [QCOM_RPM_PM8821_SMPS2] = { 203, 118, 77, 2 },
  133. [QCOM_RPM_PM8821_LDO1] = { 205, 120, 78, 2 },
  134. [QCOM_RPM_PM8921_NCP] = { 207, 122, 80, 2 },
  135. [QCOM_RPM_CXO_BUFFERS] = { 209, 124, 81, 1 },
  136. [QCOM_RPM_USB_OTG_SWITCH] = { 210, 125, 82, 1 },
  137. [QCOM_RPM_HDMI_SWITCH] = { 211, 126, 83, 1 },
  138. [QCOM_RPM_DDR_DMM] = { 212, 127, 84, 2 },
  139. [QCOM_RPM_QDSS_CLK] = { 214, ~0, 7, 1 },
  140. [QCOM_RPM_VDDMIN_GPIO] = { 215, 131, 89, 1 },
  141. };
  142. static const struct qcom_rpm_data apq8064_template = {
  143. .version = 3,
  144. .resource_table = apq8064_rpm_resource_table,
  145. .n_resources = ARRAY_SIZE(apq8064_rpm_resource_table),
  146. .req_ctx_off = 3,
  147. .req_sel_off = 11,
  148. .ack_ctx_off = 15,
  149. .ack_sel_off = 23,
  150. .req_sel_size = 4,
  151. .ack_sel_size = 7,
  152. };
  153. static const struct qcom_rpm_resource msm8660_rpm_resource_table[] = {
  154. [QCOM_RPM_CXO_CLK] = { 32, 12, 5, 1 },
  155. [QCOM_RPM_PXO_CLK] = { 33, 13, 6, 1 },
  156. [QCOM_RPM_PLL_4] = { 34, 14, 7, 1 },
  157. [QCOM_RPM_APPS_FABRIC_CLK] = { 35, 15, 8, 1 },
  158. [QCOM_RPM_SYS_FABRIC_CLK] = { 36, 16, 9, 1 },
  159. [QCOM_RPM_MM_FABRIC_CLK] = { 37, 17, 10, 1 },
  160. [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 38, 18, 11, 1 },
  161. [QCOM_RPM_SFPB_CLK] = { 39, 19, 12, 1 },
  162. [QCOM_RPM_CFPB_CLK] = { 40, 20, 13, 1 },
  163. [QCOM_RPM_MMFPB_CLK] = { 41, 21, 14, 1 },
  164. [QCOM_RPM_SMI_CLK] = { 42, 22, 15, 1 },
  165. [QCOM_RPM_EBI1_CLK] = { 43, 23, 16, 1 },
  166. [QCOM_RPM_APPS_L2_CACHE_CTL] = { 44, 24, 17, 1 },
  167. [QCOM_RPM_APPS_FABRIC_HALT] = { 45, 25, 18, 2 },
  168. [QCOM_RPM_APPS_FABRIC_MODE] = { 47, 26, 19, 3 },
  169. [QCOM_RPM_APPS_FABRIC_ARB] = { 51, 28, 21, 6 },
  170. [QCOM_RPM_SYS_FABRIC_HALT] = { 63, 29, 22, 2 },
  171. [QCOM_RPM_SYS_FABRIC_MODE] = { 65, 30, 23, 3 },
  172. [QCOM_RPM_SYS_FABRIC_ARB] = { 69, 32, 25, 22 },
  173. [QCOM_RPM_MM_FABRIC_HALT] = { 105, 33, 26, 2 },
  174. [QCOM_RPM_MM_FABRIC_MODE] = { 107, 34, 27, 3 },
  175. [QCOM_RPM_MM_FABRIC_ARB] = { 111, 36, 29, 23 },
  176. [QCOM_RPM_PM8901_SMPS0] = { 134, 37, 30, 2 },
  177. [QCOM_RPM_PM8901_SMPS1] = { 136, 39, 31, 2 },
  178. [QCOM_RPM_PM8901_SMPS2] = { 138, 41, 32, 2 },
  179. [QCOM_RPM_PM8901_SMPS3] = { 140, 43, 33, 2 },
  180. [QCOM_RPM_PM8901_SMPS4] = { 142, 45, 34, 2 },
  181. [QCOM_RPM_PM8901_LDO0] = { 144, 47, 35, 2 },
  182. [QCOM_RPM_PM8901_LDO1] = { 146, 49, 36, 2 },
  183. [QCOM_RPM_PM8901_LDO2] = { 148, 51, 37, 2 },
  184. [QCOM_RPM_PM8901_LDO3] = { 150, 53, 38, 2 },
  185. [QCOM_RPM_PM8901_LDO4] = { 152, 55, 39, 2 },
  186. [QCOM_RPM_PM8901_LDO5] = { 154, 57, 40, 2 },
  187. [QCOM_RPM_PM8901_LDO6] = { 156, 59, 41, 2 },
  188. [QCOM_RPM_PM8901_LVS0] = { 158, 61, 42, 1 },
  189. [QCOM_RPM_PM8901_LVS1] = { 159, 62, 43, 1 },
  190. [QCOM_RPM_PM8901_LVS2] = { 160, 63, 44, 1 },
  191. [QCOM_RPM_PM8901_LVS3] = { 161, 64, 45, 1 },
  192. [QCOM_RPM_PM8901_MVS] = { 162, 65, 46, 1 },
  193. [QCOM_RPM_PM8058_SMPS0] = { 163, 66, 47, 2 },
  194. [QCOM_RPM_PM8058_SMPS1] = { 165, 68, 48, 2 },
  195. [QCOM_RPM_PM8058_SMPS2] = { 167, 70, 49, 2 },
  196. [QCOM_RPM_PM8058_SMPS3] = { 169, 72, 50, 2 },
  197. [QCOM_RPM_PM8058_SMPS4] = { 171, 74, 51, 2 },
  198. [QCOM_RPM_PM8058_LDO0] = { 173, 76, 52, 2 },
  199. [QCOM_RPM_PM8058_LDO1] = { 175, 78, 53, 2 },
  200. [QCOM_RPM_PM8058_LDO2] = { 177, 80, 54, 2 },
  201. [QCOM_RPM_PM8058_LDO3] = { 179, 82, 55, 2 },
  202. [QCOM_RPM_PM8058_LDO4] = { 181, 84, 56, 2 },
  203. [QCOM_RPM_PM8058_LDO5] = { 183, 86, 57, 2 },
  204. [QCOM_RPM_PM8058_LDO6] = { 185, 88, 58, 2 },
  205. [QCOM_RPM_PM8058_LDO7] = { 187, 90, 59, 2 },
  206. [QCOM_RPM_PM8058_LDO8] = { 189, 92, 60, 2 },
  207. [QCOM_RPM_PM8058_LDO9] = { 191, 94, 61, 2 },
  208. [QCOM_RPM_PM8058_LDO10] = { 193, 96, 62, 2 },
  209. [QCOM_RPM_PM8058_LDO11] = { 195, 98, 63, 2 },
  210. [QCOM_RPM_PM8058_LDO12] = { 197, 100, 64, 2 },
  211. [QCOM_RPM_PM8058_LDO13] = { 199, 102, 65, 2 },
  212. [QCOM_RPM_PM8058_LDO14] = { 201, 104, 66, 2 },
  213. [QCOM_RPM_PM8058_LDO15] = { 203, 106, 67, 2 },
  214. [QCOM_RPM_PM8058_LDO16] = { 205, 108, 68, 2 },
  215. [QCOM_RPM_PM8058_LDO17] = { 207, 110, 69, 2 },
  216. [QCOM_RPM_PM8058_LDO18] = { 209, 112, 70, 2 },
  217. [QCOM_RPM_PM8058_LDO19] = { 211, 114, 71, 2 },
  218. [QCOM_RPM_PM8058_LDO20] = { 213, 116, 72, 2 },
  219. [QCOM_RPM_PM8058_LDO21] = { 215, 118, 73, 2 },
  220. [QCOM_RPM_PM8058_LDO22] = { 217, 120, 74, 2 },
  221. [QCOM_RPM_PM8058_LDO23] = { 219, 122, 75, 2 },
  222. [QCOM_RPM_PM8058_LDO24] = { 221, 124, 76, 2 },
  223. [QCOM_RPM_PM8058_LDO25] = { 223, 126, 77, 2 },
  224. [QCOM_RPM_PM8058_LVS0] = { 225, 128, 78, 1 },
  225. [QCOM_RPM_PM8058_LVS1] = { 226, 129, 79, 1 },
  226. [QCOM_RPM_PM8058_NCP] = { 227, 130, 80, 2 },
  227. [QCOM_RPM_CXO_BUFFERS] = { 229, 132, 81, 1 },
  228. };
  229. static const struct qcom_rpm_data msm8660_template = {
  230. .version = 2,
  231. .resource_table = msm8660_rpm_resource_table,
  232. .n_resources = ARRAY_SIZE(msm8660_rpm_resource_table),
  233. .req_ctx_off = 3,
  234. .req_sel_off = 11,
  235. .ack_ctx_off = 19,
  236. .ack_sel_off = 27,
  237. .req_sel_size = 7,
  238. .ack_sel_size = 7,
  239. };
  240. static const struct qcom_rpm_resource msm8960_rpm_resource_table[] = {
  241. [QCOM_RPM_CXO_CLK] = { 25, 9, 5, 1 },
  242. [QCOM_RPM_PXO_CLK] = { 26, 10, 6, 1 },
  243. [QCOM_RPM_APPS_FABRIC_CLK] = { 27, 11, 8, 1 },
  244. [QCOM_RPM_SYS_FABRIC_CLK] = { 28, 12, 9, 1 },
  245. [QCOM_RPM_MM_FABRIC_CLK] = { 29, 13, 10, 1 },
  246. [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 30, 14, 11, 1 },
  247. [QCOM_RPM_SFPB_CLK] = { 31, 15, 12, 1 },
  248. [QCOM_RPM_CFPB_CLK] = { 32, 16, 13, 1 },
  249. [QCOM_RPM_MMFPB_CLK] = { 33, 17, 14, 1 },
  250. [QCOM_RPM_EBI1_CLK] = { 34, 18, 16, 1 },
  251. [QCOM_RPM_APPS_FABRIC_HALT] = { 35, 19, 18, 1 },
  252. [QCOM_RPM_APPS_FABRIC_MODE] = { 37, 20, 19, 1 },
  253. [QCOM_RPM_APPS_FABRIC_IOCTL] = { 40, 21, 20, 1 },
  254. [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 },
  255. [QCOM_RPM_SYS_FABRIC_HALT] = { 53, 23, 22, 1 },
  256. [QCOM_RPM_SYS_FABRIC_MODE] = { 55, 24, 23, 1 },
  257. [QCOM_RPM_SYS_FABRIC_IOCTL] = { 58, 25, 24, 1 },
  258. [QCOM_RPM_SYS_FABRIC_ARB] = { 59, 26, 25, 29 },
  259. [QCOM_RPM_MM_FABRIC_HALT] = { 88, 27, 26, 1 },
  260. [QCOM_RPM_MM_FABRIC_MODE] = { 90, 28, 27, 1 },
  261. [QCOM_RPM_MM_FABRIC_IOCTL] = { 93, 29, 28, 1 },
  262. [QCOM_RPM_MM_FABRIC_ARB] = { 94, 30, 29, 23 },
  263. [QCOM_RPM_PM8921_SMPS1] = { 117, 31, 30, 2 },
  264. [QCOM_RPM_PM8921_SMPS2] = { 119, 33, 31, 2 },
  265. [QCOM_RPM_PM8921_SMPS3] = { 121, 35, 32, 2 },
  266. [QCOM_RPM_PM8921_SMPS4] = { 123, 37, 33, 2 },
  267. [QCOM_RPM_PM8921_SMPS5] = { 125, 39, 34, 2 },
  268. [QCOM_RPM_PM8921_SMPS6] = { 127, 41, 35, 2 },
  269. [QCOM_RPM_PM8921_SMPS7] = { 129, 43, 36, 2 },
  270. [QCOM_RPM_PM8921_SMPS8] = { 131, 45, 37, 2 },
  271. [QCOM_RPM_PM8921_LDO1] = { 133, 47, 38, 2 },
  272. [QCOM_RPM_PM8921_LDO2] = { 135, 49, 39, 2 },
  273. [QCOM_RPM_PM8921_LDO3] = { 137, 51, 40, 2 },
  274. [QCOM_RPM_PM8921_LDO4] = { 139, 53, 41, 2 },
  275. [QCOM_RPM_PM8921_LDO5] = { 141, 55, 42, 2 },
  276. [QCOM_RPM_PM8921_LDO6] = { 143, 57, 43, 2 },
  277. [QCOM_RPM_PM8921_LDO7] = { 145, 59, 44, 2 },
  278. [QCOM_RPM_PM8921_LDO8] = { 147, 61, 45, 2 },
  279. [QCOM_RPM_PM8921_LDO9] = { 149, 63, 46, 2 },
  280. [QCOM_RPM_PM8921_LDO10] = { 151, 65, 47, 2 },
  281. [QCOM_RPM_PM8921_LDO11] = { 153, 67, 48, 2 },
  282. [QCOM_RPM_PM8921_LDO12] = { 155, 69, 49, 2 },
  283. [QCOM_RPM_PM8921_LDO13] = { 157, 71, 50, 2 },
  284. [QCOM_RPM_PM8921_LDO14] = { 159, 73, 51, 2 },
  285. [QCOM_RPM_PM8921_LDO15] = { 161, 75, 52, 2 },
  286. [QCOM_RPM_PM8921_LDO16] = { 163, 77, 53, 2 },
  287. [QCOM_RPM_PM8921_LDO17] = { 165, 79, 54, 2 },
  288. [QCOM_RPM_PM8921_LDO18] = { 167, 81, 55, 2 },
  289. [QCOM_RPM_PM8921_LDO19] = { 169, 83, 56, 2 },
  290. [QCOM_RPM_PM8921_LDO20] = { 171, 85, 57, 2 },
  291. [QCOM_RPM_PM8921_LDO21] = { 173, 87, 58, 2 },
  292. [QCOM_RPM_PM8921_LDO22] = { 175, 89, 59, 2 },
  293. [QCOM_RPM_PM8921_LDO23] = { 177, 91, 60, 2 },
  294. [QCOM_RPM_PM8921_LDO24] = { 179, 93, 61, 2 },
  295. [QCOM_RPM_PM8921_LDO25] = { 181, 95, 62, 2 },
  296. [QCOM_RPM_PM8921_LDO26] = { 183, 97, 63, 2 },
  297. [QCOM_RPM_PM8921_LDO27] = { 185, 99, 64, 2 },
  298. [QCOM_RPM_PM8921_LDO28] = { 187, 101, 65, 2 },
  299. [QCOM_RPM_PM8921_LDO29] = { 189, 103, 66, 2 },
  300. [QCOM_RPM_PM8921_CLK1] = { 191, 105, 67, 2 },
  301. [QCOM_RPM_PM8921_CLK2] = { 193, 107, 68, 2 },
  302. [QCOM_RPM_PM8921_LVS1] = { 195, 109, 69, 1 },
  303. [QCOM_RPM_PM8921_LVS2] = { 196, 110, 70, 1 },
  304. [QCOM_RPM_PM8921_LVS3] = { 197, 111, 71, 1 },
  305. [QCOM_RPM_PM8921_LVS4] = { 198, 112, 72, 1 },
  306. [QCOM_RPM_PM8921_LVS5] = { 199, 113, 73, 1 },
  307. [QCOM_RPM_PM8921_LVS6] = { 200, 114, 74, 1 },
  308. [QCOM_RPM_PM8921_LVS7] = { 201, 115, 75, 1 },
  309. [QCOM_RPM_PM8921_NCP] = { 202, 116, 80, 2 },
  310. [QCOM_RPM_CXO_BUFFERS] = { 204, 118, 81, 1 },
  311. [QCOM_RPM_USB_OTG_SWITCH] = { 205, 119, 82, 1 },
  312. [QCOM_RPM_HDMI_SWITCH] = { 206, 120, 83, 1 },
  313. [QCOM_RPM_DDR_DMM] = { 207, 121, 84, 2 },
  314. };
  315. static const struct qcom_rpm_data msm8960_template = {
  316. .version = 3,
  317. .resource_table = msm8960_rpm_resource_table,
  318. .n_resources = ARRAY_SIZE(msm8960_rpm_resource_table),
  319. .req_ctx_off = 3,
  320. .req_sel_off = 11,
  321. .ack_ctx_off = 15,
  322. .ack_sel_off = 23,
  323. .req_sel_size = 4,
  324. .ack_sel_size = 7,
  325. };
  326. static const struct qcom_rpm_resource ipq806x_rpm_resource_table[] = {
  327. [QCOM_RPM_CXO_CLK] = { 25, 9, 5, 1 },
  328. [QCOM_RPM_PXO_CLK] = { 26, 10, 6, 1 },
  329. [QCOM_RPM_APPS_FABRIC_CLK] = { 27, 11, 8, 1 },
  330. [QCOM_RPM_SYS_FABRIC_CLK] = { 28, 12, 9, 1 },
  331. [QCOM_RPM_NSS_FABRIC_0_CLK] = { 29, 13, 10, 1 },
  332. [QCOM_RPM_DAYTONA_FABRIC_CLK] = { 30, 14, 11, 1 },
  333. [QCOM_RPM_SFPB_CLK] = { 31, 15, 12, 1 },
  334. [QCOM_RPM_CFPB_CLK] = { 32, 16, 13, 1 },
  335. [QCOM_RPM_NSS_FABRIC_1_CLK] = { 33, 17, 14, 1 },
  336. [QCOM_RPM_EBI1_CLK] = { 34, 18, 16, 1 },
  337. [QCOM_RPM_APPS_FABRIC_HALT] = { 35, 19, 18, 2 },
  338. [QCOM_RPM_APPS_FABRIC_MODE] = { 37, 20, 19, 3 },
  339. [QCOM_RPM_APPS_FABRIC_IOCTL] = { 40, 21, 20, 1 },
  340. [QCOM_RPM_APPS_FABRIC_ARB] = { 41, 22, 21, 12 },
  341. [QCOM_RPM_SYS_FABRIC_HALT] = { 53, 23, 22, 2 },
  342. [QCOM_RPM_SYS_FABRIC_MODE] = { 55, 24, 23, 3 },
  343. [QCOM_RPM_SYS_FABRIC_IOCTL] = { 58, 25, 24, 1 },
  344. [QCOM_RPM_SYS_FABRIC_ARB] = { 59, 26, 25, 30 },
  345. [QCOM_RPM_MM_FABRIC_HALT] = { 89, 27, 26, 2 },
  346. [QCOM_RPM_MM_FABRIC_MODE] = { 91, 28, 27, 3 },
  347. [QCOM_RPM_MM_FABRIC_IOCTL] = { 94, 29, 28, 1 },
  348. [QCOM_RPM_MM_FABRIC_ARB] = { 95, 30, 29, 2 },
  349. [QCOM_RPM_CXO_BUFFERS] = { 209, 33, 31, 1 },
  350. [QCOM_RPM_USB_OTG_SWITCH] = { 210, 34, 32, 1 },
  351. [QCOM_RPM_HDMI_SWITCH] = { 211, 35, 33, 1 },
  352. [QCOM_RPM_DDR_DMM] = { 212, 36, 34, 2 },
  353. [QCOM_RPM_VDDMIN_GPIO] = { 215, 40, 39, 1 },
  354. [QCOM_RPM_SMB208_S1a] = { 216, 41, 90, 2 },
  355. [QCOM_RPM_SMB208_S1b] = { 218, 43, 91, 2 },
  356. [QCOM_RPM_SMB208_S2a] = { 220, 45, 92, 2 },
  357. [QCOM_RPM_SMB208_S2b] = { 222, 47, 93, 2 },
  358. };
  359. static const struct qcom_rpm_data ipq806x_template = {
  360. .version = 3,
  361. .resource_table = ipq806x_rpm_resource_table,
  362. .n_resources = ARRAY_SIZE(ipq806x_rpm_resource_table),
  363. .req_ctx_off = 3,
  364. .req_sel_off = 11,
  365. .ack_ctx_off = 15,
  366. .ack_sel_off = 23,
  367. .req_sel_size = 4,
  368. .ack_sel_size = 7,
  369. };
  370. static const struct of_device_id qcom_rpm_of_match[] = {
  371. { .compatible = "qcom,rpm-apq8064", .data = &apq8064_template },
  372. { .compatible = "qcom,rpm-msm8660", .data = &msm8660_template },
  373. { .compatible = "qcom,rpm-msm8960", .data = &msm8960_template },
  374. { .compatible = "qcom,rpm-ipq8064", .data = &ipq806x_template },
  375. { }
  376. };
  377. MODULE_DEVICE_TABLE(of, qcom_rpm_of_match);
  378. int qcom_rpm_write(struct qcom_rpm *rpm,
  379. int state,
  380. int resource,
  381. u32 *buf, size_t count)
  382. {
  383. const struct qcom_rpm_resource *res;
  384. const struct qcom_rpm_data *data = rpm->data;
  385. u32 sel_mask[RPM_MAX_SEL_SIZE] = { 0 };
  386. int left;
  387. int ret = 0;
  388. int i;
  389. if (WARN_ON(resource < 0 || resource >= data->n_resources))
  390. return -EINVAL;
  391. res = &data->resource_table[resource];
  392. if (WARN_ON(res->size != count))
  393. return -EINVAL;
  394. mutex_lock(&rpm->lock);
  395. for (i = 0; i < res->size; i++)
  396. writel_relaxed(buf[i], RPM_REQ_REG(rpm, res->target_id + i));
  397. bitmap_set((unsigned long *)sel_mask, res->select_id, 1);
  398. for (i = 0; i < rpm->data->req_sel_size; i++) {
  399. writel_relaxed(sel_mask[i],
  400. RPM_CTRL_REG(rpm, rpm->data->req_sel_off + i));
  401. }
  402. writel_relaxed(BIT(state), RPM_CTRL_REG(rpm, rpm->data->req_ctx_off));
  403. reinit_completion(&rpm->ack);
  404. regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
  405. left = wait_for_completion_timeout(&rpm->ack, RPM_REQUEST_TIMEOUT);
  406. if (!left)
  407. ret = -ETIMEDOUT;
  408. else if (rpm->ack_status & RPM_REJECTED)
  409. ret = -EIO;
  410. mutex_unlock(&rpm->lock);
  411. return ret;
  412. }
  413. EXPORT_SYMBOL(qcom_rpm_write);
  414. static irqreturn_t qcom_rpm_ack_interrupt(int irq, void *dev)
  415. {
  416. struct qcom_rpm *rpm = dev;
  417. u32 ack;
  418. int i;
  419. ack = readl_relaxed(RPM_CTRL_REG(rpm, rpm->data->ack_ctx_off));
  420. for (i = 0; i < rpm->data->ack_sel_size; i++)
  421. writel_relaxed(0,
  422. RPM_CTRL_REG(rpm, rpm->data->ack_sel_off + i));
  423. writel(0, RPM_CTRL_REG(rpm, rpm->data->ack_ctx_off));
  424. if (ack & RPM_NOTIFICATION) {
  425. dev_warn(rpm->dev, "ignoring notification!\n");
  426. } else {
  427. rpm->ack_status = ack;
  428. complete(&rpm->ack);
  429. }
  430. return IRQ_HANDLED;
  431. }
  432. static irqreturn_t qcom_rpm_err_interrupt(int irq, void *dev)
  433. {
  434. struct qcom_rpm *rpm = dev;
  435. regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
  436. dev_err(rpm->dev, "RPM triggered fatal error\n");
  437. return IRQ_HANDLED;
  438. }
  439. static irqreturn_t qcom_rpm_wakeup_interrupt(int irq, void *dev)
  440. {
  441. return IRQ_HANDLED;
  442. }
  443. static int qcom_rpm_probe(struct platform_device *pdev)
  444. {
  445. const struct of_device_id *match;
  446. struct device_node *syscon_np;
  447. struct resource *res;
  448. struct qcom_rpm *rpm;
  449. u32 fw_version[3];
  450. int irq_wakeup;
  451. int irq_ack;
  452. int irq_err;
  453. int ret;
  454. rpm = devm_kzalloc(&pdev->dev, sizeof(*rpm), GFP_KERNEL);
  455. if (!rpm)
  456. return -ENOMEM;
  457. rpm->dev = &pdev->dev;
  458. mutex_init(&rpm->lock);
  459. init_completion(&rpm->ack);
  460. irq_ack = platform_get_irq_byname(pdev, "ack");
  461. if (irq_ack < 0) {
  462. dev_err(&pdev->dev, "required ack interrupt missing\n");
  463. return irq_ack;
  464. }
  465. irq_err = platform_get_irq_byname(pdev, "err");
  466. if (irq_err < 0) {
  467. dev_err(&pdev->dev, "required err interrupt missing\n");
  468. return irq_err;
  469. }
  470. irq_wakeup = platform_get_irq_byname(pdev, "wakeup");
  471. if (irq_wakeup < 0) {
  472. dev_err(&pdev->dev, "required wakeup interrupt missing\n");
  473. return irq_wakeup;
  474. }
  475. match = of_match_device(qcom_rpm_of_match, &pdev->dev);
  476. rpm->data = match->data;
  477. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  478. rpm->status_regs = devm_ioremap_resource(&pdev->dev, res);
  479. if (IS_ERR(rpm->status_regs))
  480. return PTR_ERR(rpm->status_regs);
  481. rpm->ctrl_regs = rpm->status_regs + 0x400;
  482. rpm->req_regs = rpm->status_regs + 0x600;
  483. syscon_np = of_parse_phandle(pdev->dev.of_node, "qcom,ipc", 0);
  484. if (!syscon_np) {
  485. dev_err(&pdev->dev, "no qcom,ipc node\n");
  486. return -ENODEV;
  487. }
  488. rpm->ipc_regmap = syscon_node_to_regmap(syscon_np);
  489. if (IS_ERR(rpm->ipc_regmap))
  490. return PTR_ERR(rpm->ipc_regmap);
  491. ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 1,
  492. &rpm->ipc_offset);
  493. if (ret < 0) {
  494. dev_err(&pdev->dev, "no offset in qcom,ipc\n");
  495. return -EINVAL;
  496. }
  497. ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 2,
  498. &rpm->ipc_bit);
  499. if (ret < 0) {
  500. dev_err(&pdev->dev, "no bit in qcom,ipc\n");
  501. return -EINVAL;
  502. }
  503. dev_set_drvdata(&pdev->dev, rpm);
  504. fw_version[0] = readl(RPM_STATUS_REG(rpm, 0));
  505. fw_version[1] = readl(RPM_STATUS_REG(rpm, 1));
  506. fw_version[2] = readl(RPM_STATUS_REG(rpm, 2));
  507. if (fw_version[0] != rpm->data->version) {
  508. dev_err(&pdev->dev,
  509. "RPM version %u.%u.%u incompatible with driver version %u",
  510. fw_version[0],
  511. fw_version[1],
  512. fw_version[2],
  513. rpm->data->version);
  514. return -EFAULT;
  515. }
  516. writel(fw_version[0], RPM_CTRL_REG(rpm, 0));
  517. writel(fw_version[1], RPM_CTRL_REG(rpm, 1));
  518. writel(fw_version[2], RPM_CTRL_REG(rpm, 2));
  519. dev_info(&pdev->dev, "RPM firmware %u.%u.%u\n", fw_version[0],
  520. fw_version[1],
  521. fw_version[2]);
  522. ret = devm_request_irq(&pdev->dev,
  523. irq_ack,
  524. qcom_rpm_ack_interrupt,
  525. IRQF_TRIGGER_RISING,
  526. "qcom_rpm_ack",
  527. rpm);
  528. if (ret) {
  529. dev_err(&pdev->dev, "failed to request ack interrupt\n");
  530. return ret;
  531. }
  532. ret = irq_set_irq_wake(irq_ack, 1);
  533. if (ret)
  534. dev_warn(&pdev->dev, "failed to mark ack irq as wakeup\n");
  535. ret = devm_request_irq(&pdev->dev,
  536. irq_err,
  537. qcom_rpm_err_interrupt,
  538. IRQF_TRIGGER_RISING,
  539. "qcom_rpm_err",
  540. rpm);
  541. if (ret) {
  542. dev_err(&pdev->dev, "failed to request err interrupt\n");
  543. return ret;
  544. }
  545. ret = devm_request_irq(&pdev->dev,
  546. irq_wakeup,
  547. qcom_rpm_wakeup_interrupt,
  548. IRQF_TRIGGER_RISING,
  549. "qcom_rpm_wakeup",
  550. rpm);
  551. if (ret) {
  552. dev_err(&pdev->dev, "failed to request wakeup interrupt\n");
  553. return ret;
  554. }
  555. ret = irq_set_irq_wake(irq_wakeup, 1);
  556. if (ret)
  557. dev_warn(&pdev->dev, "failed to mark wakeup irq as wakeup\n");
  558. return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
  559. }
  560. static int qcom_rpm_remove(struct platform_device *pdev)
  561. {
  562. of_platform_depopulate(&pdev->dev);
  563. return 0;
  564. }
  565. static struct platform_driver qcom_rpm_driver = {
  566. .probe = qcom_rpm_probe,
  567. .remove = qcom_rpm_remove,
  568. .driver = {
  569. .name = "qcom_rpm",
  570. .of_match_table = qcom_rpm_of_match,
  571. },
  572. };
  573. static int __init qcom_rpm_init(void)
  574. {
  575. return platform_driver_register(&qcom_rpm_driver);
  576. }
  577. arch_initcall(qcom_rpm_init);
  578. static void __exit qcom_rpm_exit(void)
  579. {
  580. platform_driver_unregister(&qcom_rpm_driver);
  581. }
  582. module_exit(qcom_rpm_exit)
  583. MODULE_DESCRIPTION("Qualcomm Resource Power Manager driver");
  584. MODULE_LICENSE("GPL v2");
  585. MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");