stw481x.c 6.7 KB

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  1. /*
  2. * Core driver for STw4810/STw4811
  3. *
  4. * Copyright (C) 2013 ST-Ericsson SA
  5. * Written on behalf of Linaro for ST-Ericsson
  6. *
  7. * Author: Linus Walleij <linus.walleij@linaro.org>
  8. *
  9. * License terms: GNU General Public License (GPL) version 2
  10. */
  11. #include <linux/err.h>
  12. #include <linux/i2c.h>
  13. #include <linux/init.h>
  14. #include <linux/mfd/core.h>
  15. #include <linux/mfd/stw481x.h>
  16. #include <linux/module.h>
  17. #include <linux/regmap.h>
  18. #include <linux/spinlock.h>
  19. #include <linux/slab.h>
  20. /*
  21. * This driver can only access the non-USB portions of STw4811, the register
  22. * range 0x00-0x10 dealing with USB is bound to the two special I2C pins used
  23. * for USB control.
  24. */
  25. /* Registers inside the power control address space */
  26. #define STW_PC_VCORE_SEL 0x05U
  27. #define STW_PC_VAUX_SEL 0x06U
  28. #define STW_PC_VPLL_SEL 0x07U
  29. /**
  30. * stw481x_get_pctl_reg() - get a power control register
  31. * @stw481x: handle to the stw481x chip
  32. * @reg: power control register to fetch
  33. *
  34. * The power control registers is a set of one-time-programmable registers
  35. * in its own register space, accessed by writing addess bits to these
  36. * two registers: bits 7,6,5 of PCTL_REG_LO corresponds to the 3 LSBs of
  37. * the address and bits 8,9 of PCTL_REG_HI corresponds to the 2 MSBs of
  38. * the address, forming an address space of 5 bits, i.e. 32 registers
  39. * 0x00 ... 0x1f can be obtained.
  40. */
  41. static int stw481x_get_pctl_reg(struct stw481x *stw481x, u8 reg)
  42. {
  43. u8 msb = (reg >> 3) & 0x03;
  44. u8 lsb = (reg << 5) & 0xe0;
  45. unsigned int val;
  46. u8 vrfy;
  47. int ret;
  48. ret = regmap_write(stw481x->map, STW_PCTL_REG_HI, msb);
  49. if (ret)
  50. return ret;
  51. ret = regmap_write(stw481x->map, STW_PCTL_REG_LO, lsb);
  52. if (ret)
  53. return ret;
  54. ret = regmap_read(stw481x->map, STW_PCTL_REG_HI, &val);
  55. if (ret)
  56. return ret;
  57. vrfy = (val & 0x03) << 3;
  58. ret = regmap_read(stw481x->map, STW_PCTL_REG_LO, &val);
  59. if (ret)
  60. return ret;
  61. vrfy |= ((val >> 5) & 0x07);
  62. if (vrfy != reg)
  63. return -EIO;
  64. return (val >> 1) & 0x0f;
  65. }
  66. static int stw481x_startup(struct stw481x *stw481x)
  67. {
  68. /* Voltages multiplied by 100 */
  69. u8 vcore_val[] = { 100, 105, 110, 115, 120, 122, 124, 126, 128,
  70. 130, 132, 134, 136, 138, 140, 145 };
  71. u8 vpll_val[] = { 105, 120, 130, 180 };
  72. u8 vaux_val[] = { 15, 18, 25, 28 };
  73. u8 vcore;
  74. u8 vcore_slp;
  75. u8 vpll;
  76. u8 vaux;
  77. bool vaux_en;
  78. bool it_warn;
  79. int ret;
  80. unsigned int val;
  81. ret = regmap_read(stw481x->map, STW_CONF1, &val);
  82. if (ret)
  83. return ret;
  84. vaux_en = !!(val & STW_CONF1_PDN_VAUX);
  85. it_warn = !!(val & STW_CONF1_IT_WARN);
  86. dev_info(&stw481x->client->dev, "voltages %s\n",
  87. (val & STW_CONF1_V_MONITORING) ? "OK" : "LOW");
  88. dev_info(&stw481x->client->dev, "MMC level shifter %s\n",
  89. (val & STW_CONF1_MMC_LS_STATUS) ? "high impedance" : "ON");
  90. dev_info(&stw481x->client->dev, "VMMC: %s\n",
  91. (val & STW_CONF1_PDN_VMMC) ? "ON" : "disabled");
  92. dev_info(&stw481x->client->dev, "STw481x power control registers:\n");
  93. ret = stw481x_get_pctl_reg(stw481x, STW_PC_VCORE_SEL);
  94. if (ret < 0)
  95. return ret;
  96. vcore = ret & 0x0f;
  97. ret = stw481x_get_pctl_reg(stw481x, STW_PC_VAUX_SEL);
  98. if (ret < 0)
  99. return ret;
  100. vaux = (ret >> 2) & 3;
  101. vpll = (ret >> 4) & 1; /* Save bit 4 */
  102. ret = stw481x_get_pctl_reg(stw481x, STW_PC_VPLL_SEL);
  103. if (ret < 0)
  104. return ret;
  105. vpll |= (ret >> 1) & 2;
  106. dev_info(&stw481x->client->dev, "VCORE: %u.%uV %s\n",
  107. vcore_val[vcore] / 100, vcore_val[vcore] % 100,
  108. (ret & 4) ? "ON" : "OFF");
  109. dev_info(&stw481x->client->dev, "VPLL: %u.%uV %s\n",
  110. vpll_val[vpll] / 100, vpll_val[vpll] % 100,
  111. (ret & 0x10) ? "ON" : "OFF");
  112. dev_info(&stw481x->client->dev, "VAUX: %u.%uV %s\n",
  113. vaux_val[vaux] / 10, vaux_val[vaux] % 10,
  114. vaux_en ? "ON" : "OFF");
  115. ret = regmap_read(stw481x->map, STW_CONF2, &val);
  116. if (ret)
  117. return ret;
  118. dev_info(&stw481x->client->dev, "TWARN: %s threshold, %s\n",
  119. it_warn ? "below" : "above",
  120. (val & STW_CONF2_MASK_TWARN) ?
  121. "enabled" : "mask through VDDOK");
  122. dev_info(&stw481x->client->dev, "VMMC: %s\n",
  123. (val & STW_CONF2_VMMC_EXT) ? "internal" : "external");
  124. dev_info(&stw481x->client->dev, "IT WAKE UP: %s\n",
  125. (val & STW_CONF2_MASK_IT_WAKE_UP) ? "enabled" : "masked");
  126. dev_info(&stw481x->client->dev, "GPO1: %s\n",
  127. (val & STW_CONF2_GPO1) ? "low" : "high impedance");
  128. dev_info(&stw481x->client->dev, "GPO2: %s\n",
  129. (val & STW_CONF2_GPO2) ? "low" : "high impedance");
  130. ret = regmap_read(stw481x->map, STW_VCORE_SLEEP, &val);
  131. if (ret)
  132. return ret;
  133. vcore_slp = val & 0x0f;
  134. dev_info(&stw481x->client->dev, "VCORE SLEEP: %u.%uV\n",
  135. vcore_val[vcore_slp] / 100, vcore_val[vcore_slp] % 100);
  136. return 0;
  137. }
  138. /*
  139. * MFD cells - we have one cell which is selected operation
  140. * mode, and we always have a GPIO cell.
  141. */
  142. static struct mfd_cell stw481x_cells[] = {
  143. {
  144. .of_compatible = "st,stw481x-vmmc",
  145. .name = "stw481x-vmmc-regulator",
  146. .id = -1,
  147. },
  148. };
  149. static const struct regmap_config stw481x_regmap_config = {
  150. .reg_bits = 8,
  151. .val_bits = 8,
  152. };
  153. static int stw481x_probe(struct i2c_client *client,
  154. const struct i2c_device_id *id)
  155. {
  156. struct stw481x *stw481x;
  157. int ret;
  158. int i;
  159. stw481x = devm_kzalloc(&client->dev, sizeof(*stw481x), GFP_KERNEL);
  160. if (!stw481x)
  161. return -ENOMEM;
  162. i2c_set_clientdata(client, stw481x);
  163. stw481x->client = client;
  164. stw481x->map = devm_regmap_init_i2c(client, &stw481x_regmap_config);
  165. if (IS_ERR(stw481x->map)) {
  166. ret = PTR_ERR(stw481x->map);
  167. dev_err(&client->dev, "Failed to allocate register map: %d\n",
  168. ret);
  169. return ret;
  170. }
  171. ret = stw481x_startup(stw481x);
  172. if (ret) {
  173. dev_err(&client->dev, "chip initialization failed\n");
  174. return ret;
  175. }
  176. /* Set up and register the platform devices. */
  177. for (i = 0; i < ARRAY_SIZE(stw481x_cells); i++) {
  178. /* One state holder for all drivers, this is simple */
  179. stw481x_cells[i].platform_data = stw481x;
  180. stw481x_cells[i].pdata_size = sizeof(*stw481x);
  181. }
  182. ret = mfd_add_devices(&client->dev, 0, stw481x_cells,
  183. ARRAY_SIZE(stw481x_cells), NULL, 0, NULL);
  184. if (ret)
  185. return ret;
  186. dev_info(&client->dev, "initialized STw481x device\n");
  187. return ret;
  188. }
  189. static int stw481x_remove(struct i2c_client *client)
  190. {
  191. mfd_remove_devices(&client->dev);
  192. return 0;
  193. }
  194. /*
  195. * This ID table is completely unused, as this is a pure
  196. * device-tree probed driver, but it has to be here due to
  197. * the structure of the I2C core.
  198. */
  199. static const struct i2c_device_id stw481x_id[] = {
  200. { "stw481x", 0 },
  201. { },
  202. };
  203. MODULE_DEVICE_TABLE(i2c, stw481x_id);
  204. static const struct of_device_id stw481x_match[] = {
  205. { .compatible = "st,stw4810", },
  206. { .compatible = "st,stw4811", },
  207. { },
  208. };
  209. MODULE_DEVICE_TABLE(of, stw481x_match);
  210. static struct i2c_driver stw481x_driver = {
  211. .driver = {
  212. .name = "stw481x",
  213. .of_match_table = stw481x_match,
  214. },
  215. .probe = stw481x_probe,
  216. .remove = stw481x_remove,
  217. .id_table = stw481x_id,
  218. };
  219. module_i2c_driver(stw481x_driver);
  220. MODULE_AUTHOR("Linus Walleij");
  221. MODULE_DESCRIPTION("STw481x PMIC driver");
  222. MODULE_LICENSE("GPL v2");