twl6040.c 20 KB

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  1. /*
  2. * MFD driver for TWL6040 audio device
  3. *
  4. * Authors: Misael Lopez Cruz <misael.lopez@ti.com>
  5. * Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
  6. * Peter Ujfalusi <peter.ujfalusi@ti.com>
  7. *
  8. * Copyright: (C) 2011 Texas Instruments, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  22. * 02110-1301 USA
  23. *
  24. */
  25. #include <linux/module.h>
  26. #include <linux/types.h>
  27. #include <linux/slab.h>
  28. #include <linux/kernel.h>
  29. #include <linux/err.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/of.h>
  32. #include <linux/of_irq.h>
  33. #include <linux/of_gpio.h>
  34. #include <linux/of_platform.h>
  35. #include <linux/gpio.h>
  36. #include <linux/delay.h>
  37. #include <linux/i2c.h>
  38. #include <linux/regmap.h>
  39. #include <linux/mfd/core.h>
  40. #include <linux/mfd/twl6040.h>
  41. #include <linux/regulator/consumer.h>
  42. #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
  43. #define TWL6040_NUM_SUPPLIES (2)
  44. static const struct reg_default twl6040_defaults[] = {
  45. { 0x01, 0x4B }, /* REG_ASICID (ro) */
  46. { 0x02, 0x00 }, /* REG_ASICREV (ro) */
  47. { 0x03, 0x00 }, /* REG_INTID */
  48. { 0x04, 0x00 }, /* REG_INTMR */
  49. { 0x05, 0x00 }, /* REG_NCPCTRL */
  50. { 0x06, 0x00 }, /* REG_LDOCTL */
  51. { 0x07, 0x60 }, /* REG_HPPLLCTL */
  52. { 0x08, 0x00 }, /* REG_LPPLLCTL */
  53. { 0x09, 0x4A }, /* REG_LPPLLDIV */
  54. { 0x0A, 0x00 }, /* REG_AMICBCTL */
  55. { 0x0B, 0x00 }, /* REG_DMICBCTL */
  56. { 0x0C, 0x00 }, /* REG_MICLCTL */
  57. { 0x0D, 0x00 }, /* REG_MICRCTL */
  58. { 0x0E, 0x00 }, /* REG_MICGAIN */
  59. { 0x0F, 0x1B }, /* REG_LINEGAIN */
  60. { 0x10, 0x00 }, /* REG_HSLCTL */
  61. { 0x11, 0x00 }, /* REG_HSRCTL */
  62. { 0x12, 0x00 }, /* REG_HSGAIN */
  63. { 0x13, 0x00 }, /* REG_EARCTL */
  64. { 0x14, 0x00 }, /* REG_HFLCTL */
  65. { 0x15, 0x00 }, /* REG_HFLGAIN */
  66. { 0x16, 0x00 }, /* REG_HFRCTL */
  67. { 0x17, 0x00 }, /* REG_HFRGAIN */
  68. { 0x18, 0x00 }, /* REG_VIBCTLL */
  69. { 0x19, 0x00 }, /* REG_VIBDATL */
  70. { 0x1A, 0x00 }, /* REG_VIBCTLR */
  71. { 0x1B, 0x00 }, /* REG_VIBDATR */
  72. { 0x1C, 0x00 }, /* REG_HKCTL1 */
  73. { 0x1D, 0x00 }, /* REG_HKCTL2 */
  74. { 0x1E, 0x00 }, /* REG_GPOCTL */
  75. { 0x1F, 0x00 }, /* REG_ALB */
  76. { 0x20, 0x00 }, /* REG_DLB */
  77. /* 0x28, REG_TRIM1 */
  78. /* 0x29, REG_TRIM2 */
  79. /* 0x2A, REG_TRIM3 */
  80. /* 0x2B, REG_HSOTRIM */
  81. /* 0x2C, REG_HFOTRIM */
  82. { 0x2D, 0x08 }, /* REG_ACCCTL */
  83. { 0x2E, 0x00 }, /* REG_STATUS (ro) */
  84. };
  85. static struct reg_sequence twl6040_patch[] = {
  86. /*
  87. * Select I2C bus access to dual access registers
  88. * Interrupt register is cleared on read
  89. * Select fast mode for i2c (400KHz)
  90. */
  91. { TWL6040_REG_ACCCTL,
  92. TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) },
  93. };
  94. static bool twl6040_has_vibra(struct device_node *parent)
  95. {
  96. struct device_node *node;
  97. node = of_get_child_by_name(parent, "vibra");
  98. if (node) {
  99. of_node_put(node);
  100. return true;
  101. }
  102. return false;
  103. }
  104. int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)
  105. {
  106. int ret;
  107. unsigned int val;
  108. ret = regmap_read(twl6040->regmap, reg, &val);
  109. if (ret < 0)
  110. return ret;
  111. return val;
  112. }
  113. EXPORT_SYMBOL(twl6040_reg_read);
  114. int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val)
  115. {
  116. int ret;
  117. ret = regmap_write(twl6040->regmap, reg, val);
  118. return ret;
  119. }
  120. EXPORT_SYMBOL(twl6040_reg_write);
  121. int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
  122. {
  123. return regmap_update_bits(twl6040->regmap, reg, mask, mask);
  124. }
  125. EXPORT_SYMBOL(twl6040_set_bits);
  126. int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
  127. {
  128. return regmap_update_bits(twl6040->regmap, reg, mask, 0);
  129. }
  130. EXPORT_SYMBOL(twl6040_clear_bits);
  131. /* twl6040 codec manual power-up sequence */
  132. static int twl6040_power_up_manual(struct twl6040 *twl6040)
  133. {
  134. u8 ldoctl, ncpctl, lppllctl;
  135. int ret;
  136. /* enable high-side LDO, reference system and internal oscillator */
  137. ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA;
  138. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  139. if (ret)
  140. return ret;
  141. usleep_range(10000, 10500);
  142. /* enable negative charge pump */
  143. ncpctl = TWL6040_NCPENA;
  144. ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  145. if (ret)
  146. goto ncp_err;
  147. usleep_range(1000, 1500);
  148. /* enable low-side LDO */
  149. ldoctl |= TWL6040_LSLDOENA;
  150. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  151. if (ret)
  152. goto lsldo_err;
  153. usleep_range(1000, 1500);
  154. /* enable low-power PLL */
  155. lppllctl = TWL6040_LPLLENA;
  156. ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  157. if (ret)
  158. goto lppll_err;
  159. usleep_range(5000, 5500);
  160. /* disable internal oscillator */
  161. ldoctl &= ~TWL6040_OSCENA;
  162. ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  163. if (ret)
  164. goto osc_err;
  165. return 0;
  166. osc_err:
  167. lppllctl &= ~TWL6040_LPLLENA;
  168. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  169. lppll_err:
  170. ldoctl &= ~TWL6040_LSLDOENA;
  171. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  172. lsldo_err:
  173. ncpctl &= ~TWL6040_NCPENA;
  174. twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  175. ncp_err:
  176. ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
  177. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  178. dev_err(twl6040->dev, "manual power-up failed\n");
  179. return ret;
  180. }
  181. /* twl6040 manual power-down sequence */
  182. static void twl6040_power_down_manual(struct twl6040 *twl6040)
  183. {
  184. u8 ncpctl, ldoctl, lppllctl;
  185. ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL);
  186. ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL);
  187. lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
  188. /* enable internal oscillator */
  189. ldoctl |= TWL6040_OSCENA;
  190. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  191. usleep_range(1000, 1500);
  192. /* disable low-power PLL */
  193. lppllctl &= ~TWL6040_LPLLENA;
  194. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
  195. /* disable low-side LDO */
  196. ldoctl &= ~TWL6040_LSLDOENA;
  197. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  198. /* disable negative charge pump */
  199. ncpctl &= ~TWL6040_NCPENA;
  200. twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
  201. /* disable high-side LDO, reference system and internal oscillator */
  202. ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
  203. twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
  204. }
  205. static irqreturn_t twl6040_readyint_handler(int irq, void *data)
  206. {
  207. struct twl6040 *twl6040 = data;
  208. complete(&twl6040->ready);
  209. return IRQ_HANDLED;
  210. }
  211. static irqreturn_t twl6040_thint_handler(int irq, void *data)
  212. {
  213. struct twl6040 *twl6040 = data;
  214. u8 status;
  215. status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
  216. if (status & TWL6040_TSHUTDET) {
  217. dev_warn(twl6040->dev, "Thermal shutdown, powering-off");
  218. twl6040_power(twl6040, 0);
  219. } else {
  220. dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on");
  221. twl6040_power(twl6040, 1);
  222. }
  223. return IRQ_HANDLED;
  224. }
  225. static int twl6040_power_up_automatic(struct twl6040 *twl6040)
  226. {
  227. int time_left;
  228. gpio_set_value(twl6040->audpwron, 1);
  229. time_left = wait_for_completion_timeout(&twl6040->ready,
  230. msecs_to_jiffies(144));
  231. if (!time_left) {
  232. u8 intid;
  233. dev_warn(twl6040->dev, "timeout waiting for READYINT\n");
  234. intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
  235. if (!(intid & TWL6040_READYINT)) {
  236. dev_err(twl6040->dev, "automatic power-up failed\n");
  237. gpio_set_value(twl6040->audpwron, 0);
  238. return -ETIMEDOUT;
  239. }
  240. }
  241. return 0;
  242. }
  243. int twl6040_power(struct twl6040 *twl6040, int on)
  244. {
  245. int ret = 0;
  246. mutex_lock(&twl6040->mutex);
  247. if (on) {
  248. /* already powered-up */
  249. if (twl6040->power_count++)
  250. goto out;
  251. clk_prepare_enable(twl6040->clk32k);
  252. /* Allow writes to the chip */
  253. regcache_cache_only(twl6040->regmap, false);
  254. if (gpio_is_valid(twl6040->audpwron)) {
  255. /* use automatic power-up sequence */
  256. ret = twl6040_power_up_automatic(twl6040);
  257. if (ret) {
  258. twl6040->power_count = 0;
  259. goto out;
  260. }
  261. } else {
  262. /* use manual power-up sequence */
  263. ret = twl6040_power_up_manual(twl6040);
  264. if (ret) {
  265. twl6040->power_count = 0;
  266. goto out;
  267. }
  268. }
  269. /* Sync with the HW */
  270. regcache_sync(twl6040->regmap);
  271. /* Default PLL configuration after power up */
  272. twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
  273. twl6040->sysclk = 19200000;
  274. twl6040->mclk = 32768;
  275. } else {
  276. /* already powered-down */
  277. if (!twl6040->power_count) {
  278. dev_err(twl6040->dev,
  279. "device is already powered-off\n");
  280. ret = -EPERM;
  281. goto out;
  282. }
  283. if (--twl6040->power_count)
  284. goto out;
  285. if (gpio_is_valid(twl6040->audpwron)) {
  286. /* use AUDPWRON line */
  287. gpio_set_value(twl6040->audpwron, 0);
  288. /* power-down sequence latency */
  289. usleep_range(500, 700);
  290. } else {
  291. /* use manual power-down sequence */
  292. twl6040_power_down_manual(twl6040);
  293. }
  294. /* Set regmap to cache only and mark it as dirty */
  295. regcache_cache_only(twl6040->regmap, true);
  296. regcache_mark_dirty(twl6040->regmap);
  297. twl6040->sysclk = 0;
  298. twl6040->mclk = 0;
  299. clk_disable_unprepare(twl6040->clk32k);
  300. }
  301. out:
  302. mutex_unlock(&twl6040->mutex);
  303. return ret;
  304. }
  305. EXPORT_SYMBOL(twl6040_power);
  306. int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
  307. unsigned int freq_in, unsigned int freq_out)
  308. {
  309. u8 hppllctl, lppllctl;
  310. int ret = 0;
  311. mutex_lock(&twl6040->mutex);
  312. hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
  313. lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
  314. /* Force full reconfiguration when switching between PLL */
  315. if (pll_id != twl6040->pll) {
  316. twl6040->sysclk = 0;
  317. twl6040->mclk = 0;
  318. }
  319. switch (pll_id) {
  320. case TWL6040_SYSCLK_SEL_LPPLL:
  321. /* low-power PLL divider */
  322. /* Change the sysclk configuration only if it has been canged */
  323. if (twl6040->sysclk != freq_out) {
  324. switch (freq_out) {
  325. case 17640000:
  326. lppllctl |= TWL6040_LPLLFIN;
  327. break;
  328. case 19200000:
  329. lppllctl &= ~TWL6040_LPLLFIN;
  330. break;
  331. default:
  332. dev_err(twl6040->dev,
  333. "freq_out %d not supported\n",
  334. freq_out);
  335. ret = -EINVAL;
  336. goto pll_out;
  337. }
  338. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  339. lppllctl);
  340. }
  341. /* The PLL in use has not been change, we can exit */
  342. if (twl6040->pll == pll_id)
  343. break;
  344. switch (freq_in) {
  345. case 32768:
  346. lppllctl |= TWL6040_LPLLENA;
  347. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  348. lppllctl);
  349. mdelay(5);
  350. lppllctl &= ~TWL6040_HPLLSEL;
  351. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  352. lppllctl);
  353. hppllctl &= ~TWL6040_HPLLENA;
  354. twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
  355. hppllctl);
  356. break;
  357. default:
  358. dev_err(twl6040->dev,
  359. "freq_in %d not supported\n", freq_in);
  360. ret = -EINVAL;
  361. goto pll_out;
  362. }
  363. break;
  364. case TWL6040_SYSCLK_SEL_HPPLL:
  365. /* high-performance PLL can provide only 19.2 MHz */
  366. if (freq_out != 19200000) {
  367. dev_err(twl6040->dev,
  368. "freq_out %d not supported\n", freq_out);
  369. ret = -EINVAL;
  370. goto pll_out;
  371. }
  372. if (twl6040->mclk != freq_in) {
  373. hppllctl &= ~TWL6040_MCLK_MSK;
  374. switch (freq_in) {
  375. case 12000000:
  376. /* PLL enabled, active mode */
  377. hppllctl |= TWL6040_MCLK_12000KHZ |
  378. TWL6040_HPLLENA;
  379. break;
  380. case 19200000:
  381. /* PLL enabled, bypass mode */
  382. hppllctl |= TWL6040_MCLK_19200KHZ |
  383. TWL6040_HPLLBP | TWL6040_HPLLENA;
  384. break;
  385. case 26000000:
  386. /* PLL enabled, active mode */
  387. hppllctl |= TWL6040_MCLK_26000KHZ |
  388. TWL6040_HPLLENA;
  389. break;
  390. case 38400000:
  391. /* PLL enabled, bypass mode */
  392. hppllctl |= TWL6040_MCLK_38400KHZ |
  393. TWL6040_HPLLBP | TWL6040_HPLLENA;
  394. break;
  395. default:
  396. dev_err(twl6040->dev,
  397. "freq_in %d not supported\n", freq_in);
  398. ret = -EINVAL;
  399. goto pll_out;
  400. }
  401. /*
  402. * enable clock slicer to ensure input waveform is
  403. * square
  404. */
  405. hppllctl |= TWL6040_HPLLSQRENA;
  406. twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
  407. hppllctl);
  408. usleep_range(500, 700);
  409. lppllctl |= TWL6040_HPLLSEL;
  410. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  411. lppllctl);
  412. lppllctl &= ~TWL6040_LPLLENA;
  413. twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
  414. lppllctl);
  415. }
  416. break;
  417. default:
  418. dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
  419. ret = -EINVAL;
  420. goto pll_out;
  421. }
  422. twl6040->sysclk = freq_out;
  423. twl6040->mclk = freq_in;
  424. twl6040->pll = pll_id;
  425. pll_out:
  426. mutex_unlock(&twl6040->mutex);
  427. return ret;
  428. }
  429. EXPORT_SYMBOL(twl6040_set_pll);
  430. int twl6040_get_pll(struct twl6040 *twl6040)
  431. {
  432. if (twl6040->power_count)
  433. return twl6040->pll;
  434. else
  435. return -ENODEV;
  436. }
  437. EXPORT_SYMBOL(twl6040_get_pll);
  438. unsigned int twl6040_get_sysclk(struct twl6040 *twl6040)
  439. {
  440. return twl6040->sysclk;
  441. }
  442. EXPORT_SYMBOL(twl6040_get_sysclk);
  443. /* Get the combined status of the vibra control register */
  444. int twl6040_get_vibralr_status(struct twl6040 *twl6040)
  445. {
  446. unsigned int reg;
  447. int ret;
  448. u8 status;
  449. ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, &reg);
  450. if (ret != 0)
  451. return ret;
  452. status = reg;
  453. ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, &reg);
  454. if (ret != 0)
  455. return ret;
  456. status |= reg;
  457. status &= (TWL6040_VIBENA | TWL6040_VIBSEL);
  458. return status;
  459. }
  460. EXPORT_SYMBOL(twl6040_get_vibralr_status);
  461. static struct resource twl6040_vibra_rsrc[] = {
  462. {
  463. .flags = IORESOURCE_IRQ,
  464. },
  465. };
  466. static struct resource twl6040_codec_rsrc[] = {
  467. {
  468. .flags = IORESOURCE_IRQ,
  469. },
  470. };
  471. static bool twl6040_readable_reg(struct device *dev, unsigned int reg)
  472. {
  473. /* Register 0 is not readable */
  474. if (!reg)
  475. return false;
  476. return true;
  477. }
  478. static bool twl6040_volatile_reg(struct device *dev, unsigned int reg)
  479. {
  480. switch (reg) {
  481. case TWL6040_REG_ASICID:
  482. case TWL6040_REG_ASICREV:
  483. case TWL6040_REG_INTID:
  484. case TWL6040_REG_LPPLLCTL:
  485. case TWL6040_REG_HPPLLCTL:
  486. case TWL6040_REG_STATUS:
  487. return true;
  488. default:
  489. return false;
  490. }
  491. }
  492. static bool twl6040_writeable_reg(struct device *dev, unsigned int reg)
  493. {
  494. switch (reg) {
  495. case TWL6040_REG_ASICID:
  496. case TWL6040_REG_ASICREV:
  497. case TWL6040_REG_STATUS:
  498. return false;
  499. default:
  500. return true;
  501. }
  502. }
  503. static const struct regmap_config twl6040_regmap_config = {
  504. .reg_bits = 8,
  505. .val_bits = 8,
  506. .reg_defaults = twl6040_defaults,
  507. .num_reg_defaults = ARRAY_SIZE(twl6040_defaults),
  508. .max_register = TWL6040_REG_STATUS, /* 0x2e */
  509. .readable_reg = twl6040_readable_reg,
  510. .volatile_reg = twl6040_volatile_reg,
  511. .writeable_reg = twl6040_writeable_reg,
  512. .cache_type = REGCACHE_RBTREE,
  513. };
  514. static const struct regmap_irq twl6040_irqs[] = {
  515. { .reg_offset = 0, .mask = TWL6040_THINT, },
  516. { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, },
  517. { .reg_offset = 0, .mask = TWL6040_HOOKINT, },
  518. { .reg_offset = 0, .mask = TWL6040_HFINT, },
  519. { .reg_offset = 0, .mask = TWL6040_VIBINT, },
  520. { .reg_offset = 0, .mask = TWL6040_READYINT, },
  521. };
  522. static struct regmap_irq_chip twl6040_irq_chip = {
  523. .name = "twl6040",
  524. .irqs = twl6040_irqs,
  525. .num_irqs = ARRAY_SIZE(twl6040_irqs),
  526. .num_regs = 1,
  527. .status_base = TWL6040_REG_INTID,
  528. .mask_base = TWL6040_REG_INTMR,
  529. };
  530. static int twl6040_probe(struct i2c_client *client,
  531. const struct i2c_device_id *id)
  532. {
  533. struct device_node *node = client->dev.of_node;
  534. struct twl6040 *twl6040;
  535. struct mfd_cell *cell = NULL;
  536. int irq, ret, children = 0;
  537. if (!node) {
  538. dev_err(&client->dev, "of node is missing\n");
  539. return -EINVAL;
  540. }
  541. /* In order to operate correctly we need valid interrupt config */
  542. if (!client->irq) {
  543. dev_err(&client->dev, "Invalid IRQ configuration\n");
  544. return -EINVAL;
  545. }
  546. twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040),
  547. GFP_KERNEL);
  548. if (!twl6040)
  549. return -ENOMEM;
  550. twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config);
  551. if (IS_ERR(twl6040->regmap))
  552. return PTR_ERR(twl6040->regmap);
  553. i2c_set_clientdata(client, twl6040);
  554. twl6040->clk32k = devm_clk_get(&client->dev, "clk32k");
  555. if (IS_ERR(twl6040->clk32k)) {
  556. if (PTR_ERR(twl6040->clk32k) == -EPROBE_DEFER)
  557. return -EPROBE_DEFER;
  558. dev_info(&client->dev, "clk32k is not handled\n");
  559. twl6040->clk32k = NULL;
  560. }
  561. twl6040->supplies[0].supply = "vio";
  562. twl6040->supplies[1].supply = "v2v1";
  563. ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
  564. twl6040->supplies);
  565. if (ret != 0) {
  566. dev_err(&client->dev, "Failed to get supplies: %d\n", ret);
  567. return ret;
  568. }
  569. ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
  570. if (ret != 0) {
  571. dev_err(&client->dev, "Failed to enable supplies: %d\n", ret);
  572. return ret;
  573. }
  574. twl6040->dev = &client->dev;
  575. twl6040->irq = client->irq;
  576. mutex_init(&twl6040->mutex);
  577. init_completion(&twl6040->ready);
  578. regmap_register_patch(twl6040->regmap, twl6040_patch,
  579. ARRAY_SIZE(twl6040_patch));
  580. twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);
  581. if (twl6040->rev < 0) {
  582. dev_err(&client->dev, "Failed to read revision register: %d\n",
  583. twl6040->rev);
  584. ret = twl6040->rev;
  585. goto gpio_err;
  586. }
  587. /* ERRATA: Automatic power-up is not possible in ES1.0 */
  588. if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0)
  589. twl6040->audpwron = of_get_named_gpio(node,
  590. "ti,audpwron-gpio", 0);
  591. else
  592. twl6040->audpwron = -EINVAL;
  593. if (gpio_is_valid(twl6040->audpwron)) {
  594. ret = devm_gpio_request_one(&client->dev, twl6040->audpwron,
  595. GPIOF_OUT_INIT_LOW, "audpwron");
  596. if (ret)
  597. goto gpio_err;
  598. /* Clear any pending interrupt */
  599. twl6040_reg_read(twl6040, TWL6040_REG_INTID);
  600. }
  601. ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT,
  602. 0, &twl6040_irq_chip, &twl6040->irq_data);
  603. if (ret < 0)
  604. goto gpio_err;
  605. twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
  606. TWL6040_IRQ_READY);
  607. twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
  608. TWL6040_IRQ_TH);
  609. ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL,
  610. twl6040_readyint_handler, IRQF_ONESHOT,
  611. "twl6040_irq_ready", twl6040);
  612. if (ret) {
  613. dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret);
  614. goto readyirq_err;
  615. }
  616. ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL,
  617. twl6040_thint_handler, IRQF_ONESHOT,
  618. "twl6040_irq_th", twl6040);
  619. if (ret) {
  620. dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret);
  621. goto readyirq_err;
  622. }
  623. /*
  624. * The main functionality of twl6040 to provide audio on OMAP4+ systems.
  625. * We can add the ASoC codec child whenever this driver has been loaded.
  626. */
  627. irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG);
  628. cell = &twl6040->cells[children];
  629. cell->name = "twl6040-codec";
  630. twl6040_codec_rsrc[0].start = irq;
  631. twl6040_codec_rsrc[0].end = irq;
  632. cell->resources = twl6040_codec_rsrc;
  633. cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc);
  634. children++;
  635. /* Vibra input driver support */
  636. if (twl6040_has_vibra(node)) {
  637. irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB);
  638. cell = &twl6040->cells[children];
  639. cell->name = "twl6040-vibra";
  640. twl6040_vibra_rsrc[0].start = irq;
  641. twl6040_vibra_rsrc[0].end = irq;
  642. cell->resources = twl6040_vibra_rsrc;
  643. cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);
  644. children++;
  645. }
  646. /* GPO support */
  647. cell = &twl6040->cells[children];
  648. cell->name = "twl6040-gpo";
  649. children++;
  650. /* The chip is powered down so mark regmap to cache only and dirty */
  651. regcache_cache_only(twl6040->regmap, true);
  652. regcache_mark_dirty(twl6040->regmap);
  653. ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children,
  654. NULL, 0, NULL);
  655. if (ret)
  656. goto readyirq_err;
  657. return 0;
  658. readyirq_err:
  659. regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
  660. gpio_err:
  661. regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
  662. return ret;
  663. }
  664. static int twl6040_remove(struct i2c_client *client)
  665. {
  666. struct twl6040 *twl6040 = i2c_get_clientdata(client);
  667. if (twl6040->power_count)
  668. twl6040_power(twl6040, 0);
  669. regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
  670. mfd_remove_devices(&client->dev);
  671. regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
  672. return 0;
  673. }
  674. static const struct i2c_device_id twl6040_i2c_id[] = {
  675. { "twl6040", 0, },
  676. { "twl6041", 0, },
  677. { },
  678. };
  679. MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id);
  680. static struct i2c_driver twl6040_driver = {
  681. .driver = {
  682. .name = "twl6040",
  683. },
  684. .probe = twl6040_probe,
  685. .remove = twl6040_remove,
  686. .id_table = twl6040_i2c_id,
  687. };
  688. module_i2c_driver(twl6040_driver);
  689. MODULE_DESCRIPTION("TWL6040 MFD");
  690. MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
  691. MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
  692. MODULE_LICENSE("GPL");