pci-me.c 12 KB

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  1. /*
  2. *
  3. * Intel Management Engine Interface (Intel MEI) Linux driver
  4. * Copyright (c) 2003-2012, Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. */
  16. #include <linux/module.h>
  17. #include <linux/moduleparam.h>
  18. #include <linux/kernel.h>
  19. #include <linux/device.h>
  20. #include <linux/fs.h>
  21. #include <linux/errno.h>
  22. #include <linux/types.h>
  23. #include <linux/fcntl.h>
  24. #include <linux/pci.h>
  25. #include <linux/poll.h>
  26. #include <linux/ioctl.h>
  27. #include <linux/cdev.h>
  28. #include <linux/sched.h>
  29. #include <linux/uuid.h>
  30. #include <linux/compat.h>
  31. #include <linux/jiffies.h>
  32. #include <linux/interrupt.h>
  33. #include <linux/pm_runtime.h>
  34. #include <linux/mei.h>
  35. #include "mei_dev.h"
  36. #include "client.h"
  37. #include "hw-me-regs.h"
  38. #include "hw-me.h"
  39. /* mei_pci_tbl - PCI Device ID Table */
  40. static const struct pci_device_id mei_me_pci_tbl[] = {
  41. {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, mei_me_legacy_cfg)},
  42. {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, mei_me_legacy_cfg)},
  43. {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, mei_me_legacy_cfg)},
  44. {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, mei_me_legacy_cfg)},
  45. {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, mei_me_legacy_cfg)},
  46. {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, mei_me_legacy_cfg)},
  47. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, mei_me_legacy_cfg)},
  48. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, mei_me_legacy_cfg)},
  49. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, mei_me_legacy_cfg)},
  50. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, mei_me_legacy_cfg)},
  51. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, mei_me_legacy_cfg)},
  52. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, mei_me_legacy_cfg)},
  53. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, mei_me_legacy_cfg)},
  54. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, mei_me_legacy_cfg)},
  55. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, mei_me_legacy_cfg)},
  56. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, mei_me_legacy_cfg)},
  57. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, mei_me_legacy_cfg)},
  58. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, mei_me_legacy_cfg)},
  59. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, mei_me_legacy_cfg)},
  60. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, mei_me_legacy_cfg)},
  61. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, mei_me_ich_cfg)},
  62. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, mei_me_ich_cfg)},
  63. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, mei_me_ich_cfg)},
  64. {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, mei_me_ich_cfg)},
  65. {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, mei_me_pch_cfg)},
  66. {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, mei_me_pch_cfg)},
  67. {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, mei_me_pch_cpt_pbg_cfg)},
  68. {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, mei_me_pch_cpt_pbg_cfg)},
  69. {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)},
  70. {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)},
  71. {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)},
  72. {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_pch8_sps_cfg)},
  73. {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_pch8_sps_cfg)},
  74. {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch8_cfg)},
  75. {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_pch8_sps_cfg)},
  76. {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch8_cfg)},
  77. {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch8_cfg)},
  78. {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)},
  79. {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)},
  80. {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_sps_cfg)},
  81. {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_sps_cfg)},
  82. {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, mei_me_pch8_cfg)},
  83. {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, mei_me_pch8_cfg)},
  84. {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, mei_me_pch8_cfg)},
  85. {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, mei_me_pch8_cfg)},
  86. {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, mei_me_pch8_cfg)},
  87. /* required last entry */
  88. {0, }
  89. };
  90. MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
  91. #ifdef CONFIG_PM
  92. static inline void mei_me_set_pm_domain(struct mei_device *dev);
  93. static inline void mei_me_unset_pm_domain(struct mei_device *dev);
  94. #else
  95. static inline void mei_me_set_pm_domain(struct mei_device *dev) {}
  96. static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
  97. #endif /* CONFIG_PM */
  98. /**
  99. * mei_me_quirk_probe - probe for devices that doesn't valid ME interface
  100. *
  101. * @pdev: PCI device structure
  102. * @cfg: per generation config
  103. *
  104. * Return: true if ME Interface is valid, false otherwise
  105. */
  106. static bool mei_me_quirk_probe(struct pci_dev *pdev,
  107. const struct mei_cfg *cfg)
  108. {
  109. if (cfg->quirk_probe && cfg->quirk_probe(pdev)) {
  110. dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
  111. return false;
  112. }
  113. return true;
  114. }
  115. /**
  116. * mei_me_probe - Device Initialization Routine
  117. *
  118. * @pdev: PCI device structure
  119. * @ent: entry in kcs_pci_tbl
  120. *
  121. * Return: 0 on success, <0 on failure.
  122. */
  123. static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  124. {
  125. const struct mei_cfg *cfg = (struct mei_cfg *)(ent->driver_data);
  126. struct mei_device *dev;
  127. struct mei_me_hw *hw;
  128. unsigned int irqflags;
  129. int err;
  130. if (!mei_me_quirk_probe(pdev, cfg))
  131. return -ENODEV;
  132. /* enable pci dev */
  133. err = pci_enable_device(pdev);
  134. if (err) {
  135. dev_err(&pdev->dev, "failed to enable pci device.\n");
  136. goto end;
  137. }
  138. /* set PCI host mastering */
  139. pci_set_master(pdev);
  140. /* pci request regions for mei driver */
  141. err = pci_request_regions(pdev, KBUILD_MODNAME);
  142. if (err) {
  143. dev_err(&pdev->dev, "failed to get pci regions.\n");
  144. goto disable_device;
  145. }
  146. if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
  147. dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
  148. err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
  149. if (err)
  150. err = dma_set_coherent_mask(&pdev->dev,
  151. DMA_BIT_MASK(32));
  152. }
  153. if (err) {
  154. dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
  155. goto release_regions;
  156. }
  157. /* allocates and initializes the mei dev structure */
  158. dev = mei_me_dev_init(pdev, cfg);
  159. if (!dev) {
  160. err = -ENOMEM;
  161. goto release_regions;
  162. }
  163. hw = to_me_hw(dev);
  164. /* mapping IO device memory */
  165. hw->mem_addr = pci_iomap(pdev, 0, 0);
  166. if (!hw->mem_addr) {
  167. dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
  168. err = -ENOMEM;
  169. goto free_device;
  170. }
  171. pci_enable_msi(pdev);
  172. /* request and enable interrupt */
  173. irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
  174. err = request_threaded_irq(pdev->irq,
  175. mei_me_irq_quick_handler,
  176. mei_me_irq_thread_handler,
  177. irqflags, KBUILD_MODNAME, dev);
  178. if (err) {
  179. dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
  180. pdev->irq);
  181. goto disable_msi;
  182. }
  183. if (mei_start(dev)) {
  184. dev_err(&pdev->dev, "init hw failure.\n");
  185. err = -ENODEV;
  186. goto release_irq;
  187. }
  188. pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT);
  189. pm_runtime_use_autosuspend(&pdev->dev);
  190. err = mei_register(dev, &pdev->dev);
  191. if (err)
  192. goto release_irq;
  193. pci_set_drvdata(pdev, dev);
  194. schedule_delayed_work(&dev->timer_work, HZ);
  195. /*
  196. * For not wake-able HW runtime pm framework
  197. * can't be used on pci device level.
  198. * Use domain runtime pm callbacks instead.
  199. */
  200. if (!pci_dev_run_wake(pdev))
  201. mei_me_set_pm_domain(dev);
  202. if (mei_pg_is_enabled(dev)) {
  203. pm_runtime_put_noidle(&pdev->dev);
  204. if (hw->d0i3_supported)
  205. pm_runtime_allow(&pdev->dev);
  206. }
  207. dev_dbg(&pdev->dev, "initialization successful.\n");
  208. return 0;
  209. release_irq:
  210. mei_cancel_work(dev);
  211. mei_disable_interrupts(dev);
  212. free_irq(pdev->irq, dev);
  213. disable_msi:
  214. pci_disable_msi(pdev);
  215. pci_iounmap(pdev, hw->mem_addr);
  216. free_device:
  217. kfree(dev);
  218. release_regions:
  219. pci_release_regions(pdev);
  220. disable_device:
  221. pci_disable_device(pdev);
  222. end:
  223. dev_err(&pdev->dev, "initialization failed.\n");
  224. return err;
  225. }
  226. /**
  227. * mei_me_remove - Device Removal Routine
  228. *
  229. * @pdev: PCI device structure
  230. *
  231. * mei_remove is called by the PCI subsystem to alert the driver
  232. * that it should release a PCI device.
  233. */
  234. static void mei_me_remove(struct pci_dev *pdev)
  235. {
  236. struct mei_device *dev;
  237. struct mei_me_hw *hw;
  238. dev = pci_get_drvdata(pdev);
  239. if (!dev)
  240. return;
  241. if (mei_pg_is_enabled(dev))
  242. pm_runtime_get_noresume(&pdev->dev);
  243. hw = to_me_hw(dev);
  244. dev_dbg(&pdev->dev, "stop\n");
  245. mei_stop(dev);
  246. if (!pci_dev_run_wake(pdev))
  247. mei_me_unset_pm_domain(dev);
  248. /* disable interrupts */
  249. mei_disable_interrupts(dev);
  250. free_irq(pdev->irq, dev);
  251. pci_disable_msi(pdev);
  252. if (hw->mem_addr)
  253. pci_iounmap(pdev, hw->mem_addr);
  254. mei_deregister(dev);
  255. kfree(dev);
  256. pci_release_regions(pdev);
  257. pci_disable_device(pdev);
  258. }
  259. #ifdef CONFIG_PM_SLEEP
  260. static int mei_me_pci_suspend(struct device *device)
  261. {
  262. struct pci_dev *pdev = to_pci_dev(device);
  263. struct mei_device *dev = pci_get_drvdata(pdev);
  264. if (!dev)
  265. return -ENODEV;
  266. dev_dbg(&pdev->dev, "suspend\n");
  267. mei_stop(dev);
  268. mei_disable_interrupts(dev);
  269. free_irq(pdev->irq, dev);
  270. pci_disable_msi(pdev);
  271. return 0;
  272. }
  273. static int mei_me_pci_resume(struct device *device)
  274. {
  275. struct pci_dev *pdev = to_pci_dev(device);
  276. struct mei_device *dev;
  277. unsigned int irqflags;
  278. int err;
  279. dev = pci_get_drvdata(pdev);
  280. if (!dev)
  281. return -ENODEV;
  282. pci_enable_msi(pdev);
  283. irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
  284. /* request and enable interrupt */
  285. err = request_threaded_irq(pdev->irq,
  286. mei_me_irq_quick_handler,
  287. mei_me_irq_thread_handler,
  288. irqflags, KBUILD_MODNAME, dev);
  289. if (err) {
  290. dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
  291. pdev->irq);
  292. return err;
  293. }
  294. err = mei_restart(dev);
  295. if (err)
  296. return err;
  297. /* Start timer if stopped in suspend */
  298. schedule_delayed_work(&dev->timer_work, HZ);
  299. return 0;
  300. }
  301. #endif /* CONFIG_PM_SLEEP */
  302. #ifdef CONFIG_PM
  303. static int mei_me_pm_runtime_idle(struct device *device)
  304. {
  305. struct pci_dev *pdev = to_pci_dev(device);
  306. struct mei_device *dev;
  307. dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n");
  308. dev = pci_get_drvdata(pdev);
  309. if (!dev)
  310. return -ENODEV;
  311. if (mei_write_is_idle(dev))
  312. pm_runtime_autosuspend(device);
  313. return -EBUSY;
  314. }
  315. static int mei_me_pm_runtime_suspend(struct device *device)
  316. {
  317. struct pci_dev *pdev = to_pci_dev(device);
  318. struct mei_device *dev;
  319. int ret;
  320. dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n");
  321. dev = pci_get_drvdata(pdev);
  322. if (!dev)
  323. return -ENODEV;
  324. mutex_lock(&dev->device_lock);
  325. if (mei_write_is_idle(dev))
  326. ret = mei_me_pg_enter_sync(dev);
  327. else
  328. ret = -EAGAIN;
  329. mutex_unlock(&dev->device_lock);
  330. dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret);
  331. return ret;
  332. }
  333. static int mei_me_pm_runtime_resume(struct device *device)
  334. {
  335. struct pci_dev *pdev = to_pci_dev(device);
  336. struct mei_device *dev;
  337. int ret;
  338. dev_dbg(&pdev->dev, "rpm: me: runtime resume\n");
  339. dev = pci_get_drvdata(pdev);
  340. if (!dev)
  341. return -ENODEV;
  342. mutex_lock(&dev->device_lock);
  343. ret = mei_me_pg_exit_sync(dev);
  344. mutex_unlock(&dev->device_lock);
  345. dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret);
  346. return ret;
  347. }
  348. /**
  349. * mei_me_set_pm_domain - fill and set pm domain structure for device
  350. *
  351. * @dev: mei_device
  352. */
  353. static inline void mei_me_set_pm_domain(struct mei_device *dev)
  354. {
  355. struct pci_dev *pdev = to_pci_dev(dev->dev);
  356. if (pdev->dev.bus && pdev->dev.bus->pm) {
  357. dev->pg_domain.ops = *pdev->dev.bus->pm;
  358. dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend;
  359. dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume;
  360. dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle;
  361. pdev->dev.pm_domain = &dev->pg_domain;
  362. }
  363. }
  364. /**
  365. * mei_me_unset_pm_domain - clean pm domain structure for device
  366. *
  367. * @dev: mei_device
  368. */
  369. static inline void mei_me_unset_pm_domain(struct mei_device *dev)
  370. {
  371. /* stop using pm callbacks if any */
  372. dev->dev->pm_domain = NULL;
  373. }
  374. static const struct dev_pm_ops mei_me_pm_ops = {
  375. SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend,
  376. mei_me_pci_resume)
  377. SET_RUNTIME_PM_OPS(
  378. mei_me_pm_runtime_suspend,
  379. mei_me_pm_runtime_resume,
  380. mei_me_pm_runtime_idle)
  381. };
  382. #define MEI_ME_PM_OPS (&mei_me_pm_ops)
  383. #else
  384. #define MEI_ME_PM_OPS NULL
  385. #endif /* CONFIG_PM */
  386. /*
  387. * PCI driver structure
  388. */
  389. static struct pci_driver mei_me_driver = {
  390. .name = KBUILD_MODNAME,
  391. .id_table = mei_me_pci_tbl,
  392. .probe = mei_me_probe,
  393. .remove = mei_me_remove,
  394. .shutdown = mei_me_remove,
  395. .driver.pm = MEI_ME_PM_OPS,
  396. };
  397. module_pci_driver(mei_me_driver);
  398. MODULE_AUTHOR("Intel Corporation");
  399. MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
  400. MODULE_LICENSE("GPL v2");