gpmi-nand.c 60 KB

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  1. /*
  2. * Freescale GPMI NAND Flash Driver
  3. *
  4. * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
  5. * Copyright (C) 2008 Embedded Alley Solutions, Inc.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  20. */
  21. #include <linux/clk.h>
  22. #include <linux/slab.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/module.h>
  25. #include <linux/mtd/partitions.h>
  26. #include <linux/of.h>
  27. #include <linux/of_device.h>
  28. #include <linux/of_mtd.h>
  29. #include "gpmi-nand.h"
  30. #include "bch-regs.h"
  31. /* Resource names for the GPMI NAND driver. */
  32. #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
  33. #define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "bch"
  34. #define GPMI_NAND_BCH_INTERRUPT_RES_NAME "bch"
  35. /* add our owner bbt descriptor */
  36. static uint8_t scan_ff_pattern[] = { 0xff };
  37. static struct nand_bbt_descr gpmi_bbt_descr = {
  38. .options = 0,
  39. .offs = 0,
  40. .len = 1,
  41. .pattern = scan_ff_pattern
  42. };
  43. /*
  44. * We may change the layout if we can get the ECC info from the datasheet,
  45. * else we will use all the (page + OOB).
  46. */
  47. static struct nand_ecclayout gpmi_hw_ecclayout = {
  48. .eccbytes = 0,
  49. .eccpos = { 0, },
  50. .oobfree = { {.offset = 0, .length = 0} }
  51. };
  52. static const struct gpmi_devdata gpmi_devdata_imx23 = {
  53. .type = IS_MX23,
  54. .bch_max_ecc_strength = 20,
  55. .max_chain_delay = 16,
  56. };
  57. static const struct gpmi_devdata gpmi_devdata_imx28 = {
  58. .type = IS_MX28,
  59. .bch_max_ecc_strength = 20,
  60. .max_chain_delay = 16,
  61. };
  62. static const struct gpmi_devdata gpmi_devdata_imx6q = {
  63. .type = IS_MX6Q,
  64. .bch_max_ecc_strength = 40,
  65. .max_chain_delay = 12,
  66. };
  67. static const struct gpmi_devdata gpmi_devdata_imx6sx = {
  68. .type = IS_MX6SX,
  69. .bch_max_ecc_strength = 62,
  70. .max_chain_delay = 12,
  71. };
  72. static irqreturn_t bch_irq(int irq, void *cookie)
  73. {
  74. struct gpmi_nand_data *this = cookie;
  75. gpmi_clear_bch(this);
  76. complete(&this->bch_done);
  77. return IRQ_HANDLED;
  78. }
  79. /*
  80. * Calculate the ECC strength by hand:
  81. * E : The ECC strength.
  82. * G : the length of Galois Field.
  83. * N : The chunk count of per page.
  84. * O : the oobsize of the NAND chip.
  85. * M : the metasize of per page.
  86. *
  87. * The formula is :
  88. * E * G * N
  89. * ------------ <= (O - M)
  90. * 8
  91. *
  92. * So, we get E by:
  93. * (O - M) * 8
  94. * E <= -------------
  95. * G * N
  96. */
  97. static inline int get_ecc_strength(struct gpmi_nand_data *this)
  98. {
  99. struct bch_geometry *geo = &this->bch_geometry;
  100. struct mtd_info *mtd = &this->mtd;
  101. int ecc_strength;
  102. ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8)
  103. / (geo->gf_len * geo->ecc_chunk_count);
  104. /* We need the minor even number. */
  105. return round_down(ecc_strength, 2);
  106. }
  107. static inline bool gpmi_check_ecc(struct gpmi_nand_data *this)
  108. {
  109. struct bch_geometry *geo = &this->bch_geometry;
  110. /* Do the sanity check. */
  111. if (GPMI_IS_MX23(this) || GPMI_IS_MX28(this)) {
  112. /* The mx23/mx28 only support the GF13. */
  113. if (geo->gf_len == 14)
  114. return false;
  115. }
  116. return geo->ecc_strength <= this->devdata->bch_max_ecc_strength;
  117. }
  118. /*
  119. * If we can get the ECC information from the nand chip, we do not
  120. * need to calculate them ourselves.
  121. *
  122. * We may have available oob space in this case.
  123. */
  124. static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this)
  125. {
  126. struct bch_geometry *geo = &this->bch_geometry;
  127. struct mtd_info *mtd = &this->mtd;
  128. struct nand_chip *chip = mtd->priv;
  129. struct nand_oobfree *of = gpmi_hw_ecclayout.oobfree;
  130. unsigned int block_mark_bit_offset;
  131. if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
  132. return false;
  133. switch (chip->ecc_step_ds) {
  134. case SZ_512:
  135. geo->gf_len = 13;
  136. break;
  137. case SZ_1K:
  138. geo->gf_len = 14;
  139. break;
  140. default:
  141. dev_err(this->dev,
  142. "unsupported nand chip. ecc bits : %d, ecc size : %d\n",
  143. chip->ecc_strength_ds, chip->ecc_step_ds);
  144. return false;
  145. }
  146. geo->ecc_chunk_size = chip->ecc_step_ds;
  147. geo->ecc_strength = round_up(chip->ecc_strength_ds, 2);
  148. if (!gpmi_check_ecc(this))
  149. return false;
  150. /* Keep the C >= O */
  151. if (geo->ecc_chunk_size < mtd->oobsize) {
  152. dev_err(this->dev,
  153. "unsupported nand chip. ecc size: %d, oob size : %d\n",
  154. chip->ecc_step_ds, mtd->oobsize);
  155. return false;
  156. }
  157. /* The default value, see comment in the legacy_set_geometry(). */
  158. geo->metadata_size = 10;
  159. geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
  160. /*
  161. * Now, the NAND chip with 2K page(data chunk is 512byte) shows below:
  162. *
  163. * | P |
  164. * |<----------------------------------------------------->|
  165. * | |
  166. * | (Block Mark) |
  167. * | P' | | | |
  168. * |<-------------------------------------------->| D | | O' |
  169. * | |<---->| |<--->|
  170. * V V V V V
  171. * +---+----------+-+----------+-+----------+-+----------+-+-----+
  172. * | M | data |E| data |E| data |E| data |E| |
  173. * +---+----------+-+----------+-+----------+-+----------+-+-----+
  174. * ^ ^
  175. * | O |
  176. * |<------------>|
  177. * | |
  178. *
  179. * P : the page size for BCH module.
  180. * E : The ECC strength.
  181. * G : the length of Galois Field.
  182. * N : The chunk count of per page.
  183. * M : the metasize of per page.
  184. * C : the ecc chunk size, aka the "data" above.
  185. * P': the nand chip's page size.
  186. * O : the nand chip's oob size.
  187. * O': the free oob.
  188. *
  189. * The formula for P is :
  190. *
  191. * E * G * N
  192. * P = ------------ + P' + M
  193. * 8
  194. *
  195. * The position of block mark moves forward in the ECC-based view
  196. * of page, and the delta is:
  197. *
  198. * E * G * (N - 1)
  199. * D = (---------------- + M)
  200. * 8
  201. *
  202. * Please see the comment in legacy_set_geometry().
  203. * With the condition C >= O , we still can get same result.
  204. * So the bit position of the physical block mark within the ECC-based
  205. * view of the page is :
  206. * (P' - D) * 8
  207. */
  208. geo->page_size = mtd->writesize + geo->metadata_size +
  209. (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8;
  210. /* The available oob size we have. */
  211. if (geo->page_size < mtd->writesize + mtd->oobsize) {
  212. of->offset = geo->page_size - mtd->writesize;
  213. of->length = mtd->oobsize - of->offset;
  214. }
  215. geo->payload_size = mtd->writesize;
  216. geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4);
  217. geo->auxiliary_size = ALIGN(geo->metadata_size, 4)
  218. + ALIGN(geo->ecc_chunk_count, 4);
  219. if (!this->swap_block_mark)
  220. return true;
  221. /* For bit swap. */
  222. block_mark_bit_offset = mtd->writesize * 8 -
  223. (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
  224. + geo->metadata_size * 8);
  225. geo->block_mark_byte_offset = block_mark_bit_offset / 8;
  226. geo->block_mark_bit_offset = block_mark_bit_offset % 8;
  227. return true;
  228. }
  229. static int legacy_set_geometry(struct gpmi_nand_data *this)
  230. {
  231. struct bch_geometry *geo = &this->bch_geometry;
  232. struct mtd_info *mtd = &this->mtd;
  233. unsigned int metadata_size;
  234. unsigned int status_size;
  235. unsigned int block_mark_bit_offset;
  236. /*
  237. * The size of the metadata can be changed, though we set it to 10
  238. * bytes now. But it can't be too large, because we have to save
  239. * enough space for BCH.
  240. */
  241. geo->metadata_size = 10;
  242. /* The default for the length of Galois Field. */
  243. geo->gf_len = 13;
  244. /* The default for chunk size. */
  245. geo->ecc_chunk_size = 512;
  246. while (geo->ecc_chunk_size < mtd->oobsize) {
  247. geo->ecc_chunk_size *= 2; /* keep C >= O */
  248. geo->gf_len = 14;
  249. }
  250. geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
  251. /* We use the same ECC strength for all chunks. */
  252. geo->ecc_strength = get_ecc_strength(this);
  253. if (!gpmi_check_ecc(this)) {
  254. dev_err(this->dev,
  255. "required ecc strength of the NAND chip: %d is not supported by the GPMI controller (%d)\n",
  256. geo->ecc_strength,
  257. this->devdata->bch_max_ecc_strength);
  258. return -EINVAL;
  259. }
  260. geo->page_size = mtd->writesize + mtd->oobsize;
  261. geo->payload_size = mtd->writesize;
  262. /*
  263. * The auxiliary buffer contains the metadata and the ECC status. The
  264. * metadata is padded to the nearest 32-bit boundary. The ECC status
  265. * contains one byte for every ECC chunk, and is also padded to the
  266. * nearest 32-bit boundary.
  267. */
  268. metadata_size = ALIGN(geo->metadata_size, 4);
  269. status_size = ALIGN(geo->ecc_chunk_count, 4);
  270. geo->auxiliary_size = metadata_size + status_size;
  271. geo->auxiliary_status_offset = metadata_size;
  272. if (!this->swap_block_mark)
  273. return 0;
  274. /*
  275. * We need to compute the byte and bit offsets of
  276. * the physical block mark within the ECC-based view of the page.
  277. *
  278. * NAND chip with 2K page shows below:
  279. * (Block Mark)
  280. * | |
  281. * | D |
  282. * |<---->|
  283. * V V
  284. * +---+----------+-+----------+-+----------+-+----------+-+
  285. * | M | data |E| data |E| data |E| data |E|
  286. * +---+----------+-+----------+-+----------+-+----------+-+
  287. *
  288. * The position of block mark moves forward in the ECC-based view
  289. * of page, and the delta is:
  290. *
  291. * E * G * (N - 1)
  292. * D = (---------------- + M)
  293. * 8
  294. *
  295. * With the formula to compute the ECC strength, and the condition
  296. * : C >= O (C is the ecc chunk size)
  297. *
  298. * It's easy to deduce to the following result:
  299. *
  300. * E * G (O - M) C - M C - M
  301. * ----------- <= ------- <= -------- < ---------
  302. * 8 N N (N - 1)
  303. *
  304. * So, we get:
  305. *
  306. * E * G * (N - 1)
  307. * D = (---------------- + M) < C
  308. * 8
  309. *
  310. * The above inequality means the position of block mark
  311. * within the ECC-based view of the page is still in the data chunk,
  312. * and it's NOT in the ECC bits of the chunk.
  313. *
  314. * Use the following to compute the bit position of the
  315. * physical block mark within the ECC-based view of the page:
  316. * (page_size - D) * 8
  317. *
  318. * --Huang Shijie
  319. */
  320. block_mark_bit_offset = mtd->writesize * 8 -
  321. (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
  322. + geo->metadata_size * 8);
  323. geo->block_mark_byte_offset = block_mark_bit_offset / 8;
  324. geo->block_mark_bit_offset = block_mark_bit_offset % 8;
  325. return 0;
  326. }
  327. int common_nfc_set_geometry(struct gpmi_nand_data *this)
  328. {
  329. if (of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc")
  330. && set_geometry_by_ecc_info(this))
  331. return 0;
  332. return legacy_set_geometry(this);
  333. }
  334. struct dma_chan *get_dma_chan(struct gpmi_nand_data *this)
  335. {
  336. /* We use the DMA channel 0 to access all the nand chips. */
  337. return this->dma_chans[0];
  338. }
  339. /* Can we use the upper's buffer directly for DMA? */
  340. void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr)
  341. {
  342. struct scatterlist *sgl = &this->data_sgl;
  343. int ret;
  344. /* first try to map the upper buffer directly */
  345. if (virt_addr_valid(this->upper_buf) &&
  346. !object_is_on_stack(this->upper_buf)) {
  347. sg_init_one(sgl, this->upper_buf, this->upper_len);
  348. ret = dma_map_sg(this->dev, sgl, 1, dr);
  349. if (ret == 0)
  350. goto map_fail;
  351. this->direct_dma_map_ok = true;
  352. return;
  353. }
  354. map_fail:
  355. /* We have to use our own DMA buffer. */
  356. sg_init_one(sgl, this->data_buffer_dma, this->upper_len);
  357. if (dr == DMA_TO_DEVICE)
  358. memcpy(this->data_buffer_dma, this->upper_buf, this->upper_len);
  359. dma_map_sg(this->dev, sgl, 1, dr);
  360. this->direct_dma_map_ok = false;
  361. }
  362. /* This will be called after the DMA operation is finished. */
  363. static void dma_irq_callback(void *param)
  364. {
  365. struct gpmi_nand_data *this = param;
  366. struct completion *dma_c = &this->dma_done;
  367. switch (this->dma_type) {
  368. case DMA_FOR_COMMAND:
  369. dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE);
  370. break;
  371. case DMA_FOR_READ_DATA:
  372. dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE);
  373. if (this->direct_dma_map_ok == false)
  374. memcpy(this->upper_buf, this->data_buffer_dma,
  375. this->upper_len);
  376. break;
  377. case DMA_FOR_WRITE_DATA:
  378. dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE);
  379. break;
  380. case DMA_FOR_READ_ECC_PAGE:
  381. case DMA_FOR_WRITE_ECC_PAGE:
  382. /* We have to wait the BCH interrupt to finish. */
  383. break;
  384. default:
  385. dev_err(this->dev, "in wrong DMA operation.\n");
  386. }
  387. complete(dma_c);
  388. }
  389. int start_dma_without_bch_irq(struct gpmi_nand_data *this,
  390. struct dma_async_tx_descriptor *desc)
  391. {
  392. struct completion *dma_c = &this->dma_done;
  393. unsigned long timeout;
  394. init_completion(dma_c);
  395. desc->callback = dma_irq_callback;
  396. desc->callback_param = this;
  397. dmaengine_submit(desc);
  398. dma_async_issue_pending(get_dma_chan(this));
  399. /* Wait for the interrupt from the DMA block. */
  400. timeout = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000));
  401. if (!timeout) {
  402. dev_err(this->dev, "DMA timeout, last DMA :%d\n",
  403. this->last_dma_type);
  404. gpmi_dump_info(this);
  405. return -ETIMEDOUT;
  406. }
  407. return 0;
  408. }
  409. /*
  410. * This function is used in BCH reading or BCH writing pages.
  411. * It will wait for the BCH interrupt as long as ONE second.
  412. * Actually, we must wait for two interrupts :
  413. * [1] firstly the DMA interrupt and
  414. * [2] secondly the BCH interrupt.
  415. */
  416. int start_dma_with_bch_irq(struct gpmi_nand_data *this,
  417. struct dma_async_tx_descriptor *desc)
  418. {
  419. struct completion *bch_c = &this->bch_done;
  420. unsigned long timeout;
  421. /* Prepare to receive an interrupt from the BCH block. */
  422. init_completion(bch_c);
  423. /* start the DMA */
  424. start_dma_without_bch_irq(this, desc);
  425. /* Wait for the interrupt from the BCH block. */
  426. timeout = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000));
  427. if (!timeout) {
  428. dev_err(this->dev, "BCH timeout, last DMA :%d\n",
  429. this->last_dma_type);
  430. gpmi_dump_info(this);
  431. return -ETIMEDOUT;
  432. }
  433. return 0;
  434. }
  435. static int acquire_register_block(struct gpmi_nand_data *this,
  436. const char *res_name)
  437. {
  438. struct platform_device *pdev = this->pdev;
  439. struct resources *res = &this->resources;
  440. struct resource *r;
  441. void __iomem *p;
  442. r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
  443. p = devm_ioremap_resource(&pdev->dev, r);
  444. if (IS_ERR(p))
  445. return PTR_ERR(p);
  446. if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME))
  447. res->gpmi_regs = p;
  448. else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME))
  449. res->bch_regs = p;
  450. else
  451. dev_err(this->dev, "unknown resource name : %s\n", res_name);
  452. return 0;
  453. }
  454. static int acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h)
  455. {
  456. struct platform_device *pdev = this->pdev;
  457. const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME;
  458. struct resource *r;
  459. int err;
  460. r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
  461. if (!r) {
  462. dev_err(this->dev, "Can't get resource for %s\n", res_name);
  463. return -ENODEV;
  464. }
  465. err = devm_request_irq(this->dev, r->start, irq_h, 0, res_name, this);
  466. if (err)
  467. dev_err(this->dev, "error requesting BCH IRQ\n");
  468. return err;
  469. }
  470. static void release_dma_channels(struct gpmi_nand_data *this)
  471. {
  472. unsigned int i;
  473. for (i = 0; i < DMA_CHANS; i++)
  474. if (this->dma_chans[i]) {
  475. dma_release_channel(this->dma_chans[i]);
  476. this->dma_chans[i] = NULL;
  477. }
  478. }
  479. static int acquire_dma_channels(struct gpmi_nand_data *this)
  480. {
  481. struct platform_device *pdev = this->pdev;
  482. struct dma_chan *dma_chan;
  483. /* request dma channel */
  484. dma_chan = dma_request_slave_channel(&pdev->dev, "rx-tx");
  485. if (!dma_chan) {
  486. dev_err(this->dev, "Failed to request DMA channel.\n");
  487. goto acquire_err;
  488. }
  489. this->dma_chans[0] = dma_chan;
  490. return 0;
  491. acquire_err:
  492. release_dma_channels(this);
  493. return -EINVAL;
  494. }
  495. static char *extra_clks_for_mx6q[GPMI_CLK_MAX] = {
  496. "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch",
  497. };
  498. static int gpmi_get_clks(struct gpmi_nand_data *this)
  499. {
  500. struct resources *r = &this->resources;
  501. char **extra_clks = NULL;
  502. struct clk *clk;
  503. int err, i;
  504. /* The main clock is stored in the first. */
  505. r->clock[0] = devm_clk_get(this->dev, "gpmi_io");
  506. if (IS_ERR(r->clock[0])) {
  507. err = PTR_ERR(r->clock[0]);
  508. goto err_clock;
  509. }
  510. /* Get extra clocks */
  511. if (GPMI_IS_MX6(this))
  512. extra_clks = extra_clks_for_mx6q;
  513. if (!extra_clks)
  514. return 0;
  515. for (i = 1; i < GPMI_CLK_MAX; i++) {
  516. if (extra_clks[i - 1] == NULL)
  517. break;
  518. clk = devm_clk_get(this->dev, extra_clks[i - 1]);
  519. if (IS_ERR(clk)) {
  520. err = PTR_ERR(clk);
  521. goto err_clock;
  522. }
  523. r->clock[i] = clk;
  524. }
  525. if (GPMI_IS_MX6(this))
  526. /*
  527. * Set the default value for the gpmi clock.
  528. *
  529. * If you want to use the ONFI nand which is in the
  530. * Synchronous Mode, you should change the clock as you need.
  531. */
  532. clk_set_rate(r->clock[0], 22000000);
  533. return 0;
  534. err_clock:
  535. dev_dbg(this->dev, "failed in finding the clocks.\n");
  536. return err;
  537. }
  538. static int acquire_resources(struct gpmi_nand_data *this)
  539. {
  540. int ret;
  541. ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME);
  542. if (ret)
  543. goto exit_regs;
  544. ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME);
  545. if (ret)
  546. goto exit_regs;
  547. ret = acquire_bch_irq(this, bch_irq);
  548. if (ret)
  549. goto exit_regs;
  550. ret = acquire_dma_channels(this);
  551. if (ret)
  552. goto exit_regs;
  553. ret = gpmi_get_clks(this);
  554. if (ret)
  555. goto exit_clock;
  556. return 0;
  557. exit_clock:
  558. release_dma_channels(this);
  559. exit_regs:
  560. return ret;
  561. }
  562. static void release_resources(struct gpmi_nand_data *this)
  563. {
  564. release_dma_channels(this);
  565. }
  566. static int init_hardware(struct gpmi_nand_data *this)
  567. {
  568. int ret;
  569. /*
  570. * This structure contains the "safe" GPMI timing that should succeed
  571. * with any NAND Flash device
  572. * (although, with less-than-optimal performance).
  573. */
  574. struct nand_timing safe_timing = {
  575. .data_setup_in_ns = 80,
  576. .data_hold_in_ns = 60,
  577. .address_setup_in_ns = 25,
  578. .gpmi_sample_delay_in_ns = 6,
  579. .tREA_in_ns = -1,
  580. .tRLOH_in_ns = -1,
  581. .tRHOH_in_ns = -1,
  582. };
  583. /* Initialize the hardwares. */
  584. ret = gpmi_init(this);
  585. if (ret)
  586. return ret;
  587. this->timing = safe_timing;
  588. return 0;
  589. }
  590. static int read_page_prepare(struct gpmi_nand_data *this,
  591. void *destination, unsigned length,
  592. void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
  593. void **use_virt, dma_addr_t *use_phys)
  594. {
  595. struct device *dev = this->dev;
  596. if (virt_addr_valid(destination)) {
  597. dma_addr_t dest_phys;
  598. dest_phys = dma_map_single(dev, destination,
  599. length, DMA_FROM_DEVICE);
  600. if (dma_mapping_error(dev, dest_phys)) {
  601. if (alt_size < length) {
  602. dev_err(dev, "Alternate buffer is too small\n");
  603. return -ENOMEM;
  604. }
  605. goto map_failed;
  606. }
  607. *use_virt = destination;
  608. *use_phys = dest_phys;
  609. this->direct_dma_map_ok = true;
  610. return 0;
  611. }
  612. map_failed:
  613. *use_virt = alt_virt;
  614. *use_phys = alt_phys;
  615. this->direct_dma_map_ok = false;
  616. return 0;
  617. }
  618. static inline void read_page_end(struct gpmi_nand_data *this,
  619. void *destination, unsigned length,
  620. void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
  621. void *used_virt, dma_addr_t used_phys)
  622. {
  623. if (this->direct_dma_map_ok)
  624. dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE);
  625. }
  626. static inline void read_page_swap_end(struct gpmi_nand_data *this,
  627. void *destination, unsigned length,
  628. void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
  629. void *used_virt, dma_addr_t used_phys)
  630. {
  631. if (!this->direct_dma_map_ok)
  632. memcpy(destination, alt_virt, length);
  633. }
  634. static int send_page_prepare(struct gpmi_nand_data *this,
  635. const void *source, unsigned length,
  636. void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
  637. const void **use_virt, dma_addr_t *use_phys)
  638. {
  639. struct device *dev = this->dev;
  640. if (virt_addr_valid(source)) {
  641. dma_addr_t source_phys;
  642. source_phys = dma_map_single(dev, (void *)source, length,
  643. DMA_TO_DEVICE);
  644. if (dma_mapping_error(dev, source_phys)) {
  645. if (alt_size < length) {
  646. dev_err(dev, "Alternate buffer is too small\n");
  647. return -ENOMEM;
  648. }
  649. goto map_failed;
  650. }
  651. *use_virt = source;
  652. *use_phys = source_phys;
  653. return 0;
  654. }
  655. map_failed:
  656. /*
  657. * Copy the content of the source buffer into the alternate
  658. * buffer and set up the return values accordingly.
  659. */
  660. memcpy(alt_virt, source, length);
  661. *use_virt = alt_virt;
  662. *use_phys = alt_phys;
  663. return 0;
  664. }
  665. static void send_page_end(struct gpmi_nand_data *this,
  666. const void *source, unsigned length,
  667. void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
  668. const void *used_virt, dma_addr_t used_phys)
  669. {
  670. struct device *dev = this->dev;
  671. if (used_virt == source)
  672. dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE);
  673. }
  674. static void gpmi_free_dma_buffer(struct gpmi_nand_data *this)
  675. {
  676. struct device *dev = this->dev;
  677. if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt))
  678. dma_free_coherent(dev, this->page_buffer_size,
  679. this->page_buffer_virt,
  680. this->page_buffer_phys);
  681. kfree(this->cmd_buffer);
  682. kfree(this->data_buffer_dma);
  683. kfree(this->raw_buffer);
  684. this->cmd_buffer = NULL;
  685. this->data_buffer_dma = NULL;
  686. this->page_buffer_virt = NULL;
  687. this->page_buffer_size = 0;
  688. }
  689. /* Allocate the DMA buffers */
  690. static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
  691. {
  692. struct bch_geometry *geo = &this->bch_geometry;
  693. struct device *dev = this->dev;
  694. struct mtd_info *mtd = &this->mtd;
  695. /* [1] Allocate a command buffer. PAGE_SIZE is enough. */
  696. this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL);
  697. if (this->cmd_buffer == NULL)
  698. goto error_alloc;
  699. /*
  700. * [2] Allocate a read/write data buffer.
  701. * The gpmi_alloc_dma_buffer can be called twice.
  702. * We allocate a PAGE_SIZE length buffer if gpmi_alloc_dma_buffer
  703. * is called before the nand_scan_ident; and we allocate a buffer
  704. * of the real NAND page size when the gpmi_alloc_dma_buffer is
  705. * called after the nand_scan_ident.
  706. */
  707. this->data_buffer_dma = kzalloc(mtd->writesize ?: PAGE_SIZE,
  708. GFP_DMA | GFP_KERNEL);
  709. if (this->data_buffer_dma == NULL)
  710. goto error_alloc;
  711. /*
  712. * [3] Allocate the page buffer.
  713. *
  714. * Both the payload buffer and the auxiliary buffer must appear on
  715. * 32-bit boundaries. We presume the size of the payload buffer is a
  716. * power of two and is much larger than four, which guarantees the
  717. * auxiliary buffer will appear on a 32-bit boundary.
  718. */
  719. this->page_buffer_size = geo->payload_size + geo->auxiliary_size;
  720. this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size,
  721. &this->page_buffer_phys, GFP_DMA);
  722. if (!this->page_buffer_virt)
  723. goto error_alloc;
  724. this->raw_buffer = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL);
  725. if (!this->raw_buffer)
  726. goto error_alloc;
  727. /* Slice up the page buffer. */
  728. this->payload_virt = this->page_buffer_virt;
  729. this->payload_phys = this->page_buffer_phys;
  730. this->auxiliary_virt = this->payload_virt + geo->payload_size;
  731. this->auxiliary_phys = this->payload_phys + geo->payload_size;
  732. return 0;
  733. error_alloc:
  734. gpmi_free_dma_buffer(this);
  735. return -ENOMEM;
  736. }
  737. static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl)
  738. {
  739. struct nand_chip *chip = mtd->priv;
  740. struct gpmi_nand_data *this = chip->priv;
  741. int ret;
  742. /*
  743. * Every operation begins with a command byte and a series of zero or
  744. * more address bytes. These are distinguished by either the Address
  745. * Latch Enable (ALE) or Command Latch Enable (CLE) signals being
  746. * asserted. When MTD is ready to execute the command, it will deassert
  747. * both latch enables.
  748. *
  749. * Rather than run a separate DMA operation for every single byte, we
  750. * queue them up and run a single DMA operation for the entire series
  751. * of command and data bytes. NAND_CMD_NONE means the END of the queue.
  752. */
  753. if ((ctrl & (NAND_ALE | NAND_CLE))) {
  754. if (data != NAND_CMD_NONE)
  755. this->cmd_buffer[this->command_length++] = data;
  756. return;
  757. }
  758. if (!this->command_length)
  759. return;
  760. ret = gpmi_send_command(this);
  761. if (ret)
  762. dev_err(this->dev, "Chip: %u, Error %d\n",
  763. this->current_chip, ret);
  764. this->command_length = 0;
  765. }
  766. static int gpmi_dev_ready(struct mtd_info *mtd)
  767. {
  768. struct nand_chip *chip = mtd->priv;
  769. struct gpmi_nand_data *this = chip->priv;
  770. return gpmi_is_ready(this, this->current_chip);
  771. }
  772. static void gpmi_select_chip(struct mtd_info *mtd, int chipnr)
  773. {
  774. struct nand_chip *chip = mtd->priv;
  775. struct gpmi_nand_data *this = chip->priv;
  776. if ((this->current_chip < 0) && (chipnr >= 0))
  777. gpmi_begin(this);
  778. else if ((this->current_chip >= 0) && (chipnr < 0))
  779. gpmi_end(this);
  780. this->current_chip = chipnr;
  781. }
  782. static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
  783. {
  784. struct nand_chip *chip = mtd->priv;
  785. struct gpmi_nand_data *this = chip->priv;
  786. dev_dbg(this->dev, "len is %d\n", len);
  787. this->upper_buf = buf;
  788. this->upper_len = len;
  789. gpmi_read_data(this);
  790. }
  791. static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
  792. {
  793. struct nand_chip *chip = mtd->priv;
  794. struct gpmi_nand_data *this = chip->priv;
  795. dev_dbg(this->dev, "len is %d\n", len);
  796. this->upper_buf = (uint8_t *)buf;
  797. this->upper_len = len;
  798. gpmi_send_data(this);
  799. }
  800. static uint8_t gpmi_read_byte(struct mtd_info *mtd)
  801. {
  802. struct nand_chip *chip = mtd->priv;
  803. struct gpmi_nand_data *this = chip->priv;
  804. uint8_t *buf = this->data_buffer_dma;
  805. gpmi_read_buf(mtd, buf, 1);
  806. return buf[0];
  807. }
  808. /*
  809. * Handles block mark swapping.
  810. * It can be called in swapping the block mark, or swapping it back,
  811. * because the the operations are the same.
  812. */
  813. static void block_mark_swapping(struct gpmi_nand_data *this,
  814. void *payload, void *auxiliary)
  815. {
  816. struct bch_geometry *nfc_geo = &this->bch_geometry;
  817. unsigned char *p;
  818. unsigned char *a;
  819. unsigned int bit;
  820. unsigned char mask;
  821. unsigned char from_data;
  822. unsigned char from_oob;
  823. if (!this->swap_block_mark)
  824. return;
  825. /*
  826. * If control arrives here, we're swapping. Make some convenience
  827. * variables.
  828. */
  829. bit = nfc_geo->block_mark_bit_offset;
  830. p = payload + nfc_geo->block_mark_byte_offset;
  831. a = auxiliary;
  832. /*
  833. * Get the byte from the data area that overlays the block mark. Since
  834. * the ECC engine applies its own view to the bits in the page, the
  835. * physical block mark won't (in general) appear on a byte boundary in
  836. * the data.
  837. */
  838. from_data = (p[0] >> bit) | (p[1] << (8 - bit));
  839. /* Get the byte from the OOB. */
  840. from_oob = a[0];
  841. /* Swap them. */
  842. a[0] = from_data;
  843. mask = (0x1 << bit) - 1;
  844. p[0] = (p[0] & mask) | (from_oob << bit);
  845. mask = ~0 << bit;
  846. p[1] = (p[1] & mask) | (from_oob >> (8 - bit));
  847. }
  848. static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
  849. uint8_t *buf, int oob_required, int page)
  850. {
  851. struct gpmi_nand_data *this = chip->priv;
  852. struct bch_geometry *nfc_geo = &this->bch_geometry;
  853. void *payload_virt;
  854. dma_addr_t payload_phys;
  855. void *auxiliary_virt;
  856. dma_addr_t auxiliary_phys;
  857. unsigned int i;
  858. unsigned char *status;
  859. unsigned int max_bitflips = 0;
  860. int ret;
  861. dev_dbg(this->dev, "page number is : %d\n", page);
  862. ret = read_page_prepare(this, buf, nfc_geo->payload_size,
  863. this->payload_virt, this->payload_phys,
  864. nfc_geo->payload_size,
  865. &payload_virt, &payload_phys);
  866. if (ret) {
  867. dev_err(this->dev, "Inadequate DMA buffer\n");
  868. ret = -ENOMEM;
  869. return ret;
  870. }
  871. auxiliary_virt = this->auxiliary_virt;
  872. auxiliary_phys = this->auxiliary_phys;
  873. /* go! */
  874. ret = gpmi_read_page(this, payload_phys, auxiliary_phys);
  875. read_page_end(this, buf, nfc_geo->payload_size,
  876. this->payload_virt, this->payload_phys,
  877. nfc_geo->payload_size,
  878. payload_virt, payload_phys);
  879. if (ret) {
  880. dev_err(this->dev, "Error in ECC-based read: %d\n", ret);
  881. return ret;
  882. }
  883. /* Loop over status bytes, accumulating ECC status. */
  884. status = auxiliary_virt + nfc_geo->auxiliary_status_offset;
  885. read_page_swap_end(this, buf, nfc_geo->payload_size,
  886. this->payload_virt, this->payload_phys,
  887. nfc_geo->payload_size,
  888. payload_virt, payload_phys);
  889. for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) {
  890. if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED))
  891. continue;
  892. if (*status == STATUS_UNCORRECTABLE) {
  893. int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
  894. u8 *eccbuf = this->raw_buffer;
  895. int offset, bitoffset;
  896. int eccbytes;
  897. int flips;
  898. /* Read ECC bytes into our internal raw_buffer */
  899. offset = nfc_geo->metadata_size * 8;
  900. offset += ((8 * nfc_geo->ecc_chunk_size) + eccbits) * (i + 1);
  901. offset -= eccbits;
  902. bitoffset = offset % 8;
  903. eccbytes = DIV_ROUND_UP(offset + eccbits, 8);
  904. offset /= 8;
  905. eccbytes -= offset;
  906. chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset, -1);
  907. chip->read_buf(mtd, eccbuf, eccbytes);
  908. /*
  909. * ECC data are not byte aligned and we may have
  910. * in-band data in the first and last byte of
  911. * eccbuf. Set non-eccbits to one so that
  912. * nand_check_erased_ecc_chunk() does not count them
  913. * as bitflips.
  914. */
  915. if (bitoffset)
  916. eccbuf[0] |= GENMASK(bitoffset - 1, 0);
  917. bitoffset = (bitoffset + eccbits) % 8;
  918. if (bitoffset)
  919. eccbuf[eccbytes - 1] |= GENMASK(7, bitoffset);
  920. /*
  921. * The ECC hardware has an uncorrectable ECC status
  922. * code in case we have bitflips in an erased page. As
  923. * nothing was written into this subpage the ECC is
  924. * obviously wrong and we can not trust it. We assume
  925. * at this point that we are reading an erased page and
  926. * try to correct the bitflips in buffer up to
  927. * ecc_strength bitflips. If this is a page with random
  928. * data, we exceed this number of bitflips and have a
  929. * ECC failure. Otherwise we use the corrected buffer.
  930. */
  931. if (i == 0) {
  932. /* The first block includes metadata */
  933. flips = nand_check_erased_ecc_chunk(
  934. buf + i * nfc_geo->ecc_chunk_size,
  935. nfc_geo->ecc_chunk_size,
  936. eccbuf, eccbytes,
  937. auxiliary_virt,
  938. nfc_geo->metadata_size,
  939. nfc_geo->ecc_strength);
  940. } else {
  941. flips = nand_check_erased_ecc_chunk(
  942. buf + i * nfc_geo->ecc_chunk_size,
  943. nfc_geo->ecc_chunk_size,
  944. eccbuf, eccbytes,
  945. NULL, 0,
  946. nfc_geo->ecc_strength);
  947. }
  948. if (flips > 0) {
  949. max_bitflips = max_t(unsigned int, max_bitflips,
  950. flips);
  951. mtd->ecc_stats.corrected += flips;
  952. continue;
  953. }
  954. mtd->ecc_stats.failed++;
  955. continue;
  956. }
  957. mtd->ecc_stats.corrected += *status;
  958. max_bitflips = max_t(unsigned int, max_bitflips, *status);
  959. }
  960. /* handle the block mark swapping */
  961. block_mark_swapping(this, buf, auxiliary_virt);
  962. if (oob_required) {
  963. /*
  964. * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob()
  965. * for details about our policy for delivering the OOB.
  966. *
  967. * We fill the caller's buffer with set bits, and then copy the
  968. * block mark to th caller's buffer. Note that, if block mark
  969. * swapping was necessary, it has already been done, so we can
  970. * rely on the first byte of the auxiliary buffer to contain
  971. * the block mark.
  972. */
  973. memset(chip->oob_poi, ~0, mtd->oobsize);
  974. chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0];
  975. }
  976. return max_bitflips;
  977. }
  978. /* Fake a virtual small page for the subpage read */
  979. static int gpmi_ecc_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
  980. uint32_t offs, uint32_t len, uint8_t *buf, int page)
  981. {
  982. struct gpmi_nand_data *this = chip->priv;
  983. void __iomem *bch_regs = this->resources.bch_regs;
  984. struct bch_geometry old_geo = this->bch_geometry;
  985. struct bch_geometry *geo = &this->bch_geometry;
  986. int size = chip->ecc.size; /* ECC chunk size */
  987. int meta, n, page_size;
  988. u32 r1_old, r2_old, r1_new, r2_new;
  989. unsigned int max_bitflips;
  990. int first, last, marker_pos;
  991. int ecc_parity_size;
  992. int col = 0;
  993. int old_swap_block_mark = this->swap_block_mark;
  994. /* The size of ECC parity */
  995. ecc_parity_size = geo->gf_len * geo->ecc_strength / 8;
  996. /* Align it with the chunk size */
  997. first = offs / size;
  998. last = (offs + len - 1) / size;
  999. if (this->swap_block_mark) {
  1000. /*
  1001. * Find the chunk which contains the Block Marker.
  1002. * If this chunk is in the range of [first, last],
  1003. * we have to read out the whole page.
  1004. * Why? since we had swapped the data at the position of Block
  1005. * Marker to the metadata which is bound with the chunk 0.
  1006. */
  1007. marker_pos = geo->block_mark_byte_offset / size;
  1008. if (last >= marker_pos && first <= marker_pos) {
  1009. dev_dbg(this->dev,
  1010. "page:%d, first:%d, last:%d, marker at:%d\n",
  1011. page, first, last, marker_pos);
  1012. return gpmi_ecc_read_page(mtd, chip, buf, 0, page);
  1013. }
  1014. }
  1015. meta = geo->metadata_size;
  1016. if (first) {
  1017. col = meta + (size + ecc_parity_size) * first;
  1018. chip->cmdfunc(mtd, NAND_CMD_RNDOUT, col, -1);
  1019. meta = 0;
  1020. buf = buf + first * size;
  1021. }
  1022. /* Save the old environment */
  1023. r1_old = r1_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT0);
  1024. r2_old = r2_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT1);
  1025. /* change the BCH registers and bch_geometry{} */
  1026. n = last - first + 1;
  1027. page_size = meta + (size + ecc_parity_size) * n;
  1028. r1_new &= ~(BM_BCH_FLASH0LAYOUT0_NBLOCKS |
  1029. BM_BCH_FLASH0LAYOUT0_META_SIZE);
  1030. r1_new |= BF_BCH_FLASH0LAYOUT0_NBLOCKS(n - 1)
  1031. | BF_BCH_FLASH0LAYOUT0_META_SIZE(meta);
  1032. writel(r1_new, bch_regs + HW_BCH_FLASH0LAYOUT0);
  1033. r2_new &= ~BM_BCH_FLASH0LAYOUT1_PAGE_SIZE;
  1034. r2_new |= BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size);
  1035. writel(r2_new, bch_regs + HW_BCH_FLASH0LAYOUT1);
  1036. geo->ecc_chunk_count = n;
  1037. geo->payload_size = n * size;
  1038. geo->page_size = page_size;
  1039. geo->auxiliary_status_offset = ALIGN(meta, 4);
  1040. dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n",
  1041. page, offs, len, col, first, n, page_size);
  1042. /* Read the subpage now */
  1043. this->swap_block_mark = false;
  1044. max_bitflips = gpmi_ecc_read_page(mtd, chip, buf, 0, page);
  1045. /* Restore */
  1046. writel(r1_old, bch_regs + HW_BCH_FLASH0LAYOUT0);
  1047. writel(r2_old, bch_regs + HW_BCH_FLASH0LAYOUT1);
  1048. this->bch_geometry = old_geo;
  1049. this->swap_block_mark = old_swap_block_mark;
  1050. return max_bitflips;
  1051. }
  1052. static int gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
  1053. const uint8_t *buf, int oob_required, int page)
  1054. {
  1055. struct gpmi_nand_data *this = chip->priv;
  1056. struct bch_geometry *nfc_geo = &this->bch_geometry;
  1057. const void *payload_virt;
  1058. dma_addr_t payload_phys;
  1059. const void *auxiliary_virt;
  1060. dma_addr_t auxiliary_phys;
  1061. int ret;
  1062. dev_dbg(this->dev, "ecc write page.\n");
  1063. if (this->swap_block_mark) {
  1064. /*
  1065. * If control arrives here, we're doing block mark swapping.
  1066. * Since we can't modify the caller's buffers, we must copy them
  1067. * into our own.
  1068. */
  1069. memcpy(this->payload_virt, buf, mtd->writesize);
  1070. payload_virt = this->payload_virt;
  1071. payload_phys = this->payload_phys;
  1072. memcpy(this->auxiliary_virt, chip->oob_poi,
  1073. nfc_geo->auxiliary_size);
  1074. auxiliary_virt = this->auxiliary_virt;
  1075. auxiliary_phys = this->auxiliary_phys;
  1076. /* Handle block mark swapping. */
  1077. block_mark_swapping(this,
  1078. (void *)payload_virt, (void *)auxiliary_virt);
  1079. } else {
  1080. /*
  1081. * If control arrives here, we're not doing block mark swapping,
  1082. * so we can to try and use the caller's buffers.
  1083. */
  1084. ret = send_page_prepare(this,
  1085. buf, mtd->writesize,
  1086. this->payload_virt, this->payload_phys,
  1087. nfc_geo->payload_size,
  1088. &payload_virt, &payload_phys);
  1089. if (ret) {
  1090. dev_err(this->dev, "Inadequate payload DMA buffer\n");
  1091. return 0;
  1092. }
  1093. ret = send_page_prepare(this,
  1094. chip->oob_poi, mtd->oobsize,
  1095. this->auxiliary_virt, this->auxiliary_phys,
  1096. nfc_geo->auxiliary_size,
  1097. &auxiliary_virt, &auxiliary_phys);
  1098. if (ret) {
  1099. dev_err(this->dev, "Inadequate auxiliary DMA buffer\n");
  1100. goto exit_auxiliary;
  1101. }
  1102. }
  1103. /* Ask the NFC. */
  1104. ret = gpmi_send_page(this, payload_phys, auxiliary_phys);
  1105. if (ret)
  1106. dev_err(this->dev, "Error in ECC-based write: %d\n", ret);
  1107. if (!this->swap_block_mark) {
  1108. send_page_end(this, chip->oob_poi, mtd->oobsize,
  1109. this->auxiliary_virt, this->auxiliary_phys,
  1110. nfc_geo->auxiliary_size,
  1111. auxiliary_virt, auxiliary_phys);
  1112. exit_auxiliary:
  1113. send_page_end(this, buf, mtd->writesize,
  1114. this->payload_virt, this->payload_phys,
  1115. nfc_geo->payload_size,
  1116. payload_virt, payload_phys);
  1117. }
  1118. return 0;
  1119. }
  1120. /*
  1121. * There are several places in this driver where we have to handle the OOB and
  1122. * block marks. This is the function where things are the most complicated, so
  1123. * this is where we try to explain it all. All the other places refer back to
  1124. * here.
  1125. *
  1126. * These are the rules, in order of decreasing importance:
  1127. *
  1128. * 1) Nothing the caller does can be allowed to imperil the block mark.
  1129. *
  1130. * 2) In read operations, the first byte of the OOB we return must reflect the
  1131. * true state of the block mark, no matter where that block mark appears in
  1132. * the physical page.
  1133. *
  1134. * 3) ECC-based read operations return an OOB full of set bits (since we never
  1135. * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
  1136. * return).
  1137. *
  1138. * 4) "Raw" read operations return a direct view of the physical bytes in the
  1139. * page, using the conventional definition of which bytes are data and which
  1140. * are OOB. This gives the caller a way to see the actual, physical bytes
  1141. * in the page, without the distortions applied by our ECC engine.
  1142. *
  1143. *
  1144. * What we do for this specific read operation depends on two questions:
  1145. *
  1146. * 1) Are we doing a "raw" read, or an ECC-based read?
  1147. *
  1148. * 2) Are we using block mark swapping or transcription?
  1149. *
  1150. * There are four cases, illustrated by the following Karnaugh map:
  1151. *
  1152. * | Raw | ECC-based |
  1153. * -------------+-------------------------+-------------------------+
  1154. * | Read the conventional | |
  1155. * | OOB at the end of the | |
  1156. * Swapping | page and return it. It | |
  1157. * | contains exactly what | |
  1158. * | we want. | Read the block mark and |
  1159. * -------------+-------------------------+ return it in a buffer |
  1160. * | Read the conventional | full of set bits. |
  1161. * | OOB at the end of the | |
  1162. * | page and also the block | |
  1163. * Transcribing | mark in the metadata. | |
  1164. * | Copy the block mark | |
  1165. * | into the first byte of | |
  1166. * | the OOB. | |
  1167. * -------------+-------------------------+-------------------------+
  1168. *
  1169. * Note that we break rule #4 in the Transcribing/Raw case because we're not
  1170. * giving an accurate view of the actual, physical bytes in the page (we're
  1171. * overwriting the block mark). That's OK because it's more important to follow
  1172. * rule #2.
  1173. *
  1174. * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
  1175. * easy. When reading a page, for example, the NAND Flash MTD code calls our
  1176. * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an
  1177. * ECC-based or raw view of the page is implicit in which function it calls
  1178. * (there is a similar pair of ECC-based/raw functions for writing).
  1179. */
  1180. static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
  1181. int page)
  1182. {
  1183. struct gpmi_nand_data *this = chip->priv;
  1184. dev_dbg(this->dev, "page number is %d\n", page);
  1185. /* clear the OOB buffer */
  1186. memset(chip->oob_poi, ~0, mtd->oobsize);
  1187. /* Read out the conventional OOB. */
  1188. chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
  1189. chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
  1190. /*
  1191. * Now, we want to make sure the block mark is correct. In the
  1192. * non-transcribing case (!GPMI_IS_MX23()), we already have it.
  1193. * Otherwise, we need to explicitly read it.
  1194. */
  1195. if (GPMI_IS_MX23(this)) {
  1196. /* Read the block mark into the first byte of the OOB buffer. */
  1197. chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
  1198. chip->oob_poi[0] = chip->read_byte(mtd);
  1199. }
  1200. return 0;
  1201. }
  1202. static int
  1203. gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
  1204. {
  1205. struct nand_oobfree *of = mtd->ecclayout->oobfree;
  1206. int status = 0;
  1207. /* Do we have available oob area? */
  1208. if (!of->length)
  1209. return -EPERM;
  1210. if (!nand_is_slc(chip))
  1211. return -EPERM;
  1212. chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize + of->offset, page);
  1213. chip->write_buf(mtd, chip->oob_poi + of->offset, of->length);
  1214. chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
  1215. status = chip->waitfunc(mtd, chip);
  1216. return status & NAND_STATUS_FAIL ? -EIO : 0;
  1217. }
  1218. /*
  1219. * This function reads a NAND page without involving the ECC engine (no HW
  1220. * ECC correction).
  1221. * The tricky part in the GPMI/BCH controller is that it stores ECC bits
  1222. * inline (interleaved with payload DATA), and do not align data chunk on
  1223. * byte boundaries.
  1224. * We thus need to take care moving the payload data and ECC bits stored in the
  1225. * page into the provided buffers, which is why we're using gpmi_copy_bits.
  1226. *
  1227. * See set_geometry_by_ecc_info inline comments to have a full description
  1228. * of the layout used by the GPMI controller.
  1229. */
  1230. static int gpmi_ecc_read_page_raw(struct mtd_info *mtd,
  1231. struct nand_chip *chip, uint8_t *buf,
  1232. int oob_required, int page)
  1233. {
  1234. struct gpmi_nand_data *this = chip->priv;
  1235. struct bch_geometry *nfc_geo = &this->bch_geometry;
  1236. int eccsize = nfc_geo->ecc_chunk_size;
  1237. int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
  1238. u8 *tmp_buf = this->raw_buffer;
  1239. size_t src_bit_off;
  1240. size_t oob_bit_off;
  1241. size_t oob_byte_off;
  1242. uint8_t *oob = chip->oob_poi;
  1243. int step;
  1244. chip->read_buf(mtd, tmp_buf,
  1245. mtd->writesize + mtd->oobsize);
  1246. /*
  1247. * If required, swap the bad block marker and the data stored in the
  1248. * metadata section, so that we don't wrongly consider a block as bad.
  1249. *
  1250. * See the layout description for a detailed explanation on why this
  1251. * is needed.
  1252. */
  1253. if (this->swap_block_mark) {
  1254. u8 swap = tmp_buf[0];
  1255. tmp_buf[0] = tmp_buf[mtd->writesize];
  1256. tmp_buf[mtd->writesize] = swap;
  1257. }
  1258. /*
  1259. * Copy the metadata section into the oob buffer (this section is
  1260. * guaranteed to be aligned on a byte boundary).
  1261. */
  1262. if (oob_required)
  1263. memcpy(oob, tmp_buf, nfc_geo->metadata_size);
  1264. oob_bit_off = nfc_geo->metadata_size * 8;
  1265. src_bit_off = oob_bit_off;
  1266. /* Extract interleaved payload data and ECC bits */
  1267. for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
  1268. if (buf)
  1269. gpmi_copy_bits(buf, step * eccsize * 8,
  1270. tmp_buf, src_bit_off,
  1271. eccsize * 8);
  1272. src_bit_off += eccsize * 8;
  1273. /* Align last ECC block to align a byte boundary */
  1274. if (step == nfc_geo->ecc_chunk_count - 1 &&
  1275. (oob_bit_off + eccbits) % 8)
  1276. eccbits += 8 - ((oob_bit_off + eccbits) % 8);
  1277. if (oob_required)
  1278. gpmi_copy_bits(oob, oob_bit_off,
  1279. tmp_buf, src_bit_off,
  1280. eccbits);
  1281. src_bit_off += eccbits;
  1282. oob_bit_off += eccbits;
  1283. }
  1284. if (oob_required) {
  1285. oob_byte_off = oob_bit_off / 8;
  1286. if (oob_byte_off < mtd->oobsize)
  1287. memcpy(oob + oob_byte_off,
  1288. tmp_buf + mtd->writesize + oob_byte_off,
  1289. mtd->oobsize - oob_byte_off);
  1290. }
  1291. return 0;
  1292. }
  1293. /*
  1294. * This function writes a NAND page without involving the ECC engine (no HW
  1295. * ECC generation).
  1296. * The tricky part in the GPMI/BCH controller is that it stores ECC bits
  1297. * inline (interleaved with payload DATA), and do not align data chunk on
  1298. * byte boundaries.
  1299. * We thus need to take care moving the OOB area at the right place in the
  1300. * final page, which is why we're using gpmi_copy_bits.
  1301. *
  1302. * See set_geometry_by_ecc_info inline comments to have a full description
  1303. * of the layout used by the GPMI controller.
  1304. */
  1305. static int gpmi_ecc_write_page_raw(struct mtd_info *mtd,
  1306. struct nand_chip *chip,
  1307. const uint8_t *buf,
  1308. int oob_required, int page)
  1309. {
  1310. struct gpmi_nand_data *this = chip->priv;
  1311. struct bch_geometry *nfc_geo = &this->bch_geometry;
  1312. int eccsize = nfc_geo->ecc_chunk_size;
  1313. int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
  1314. u8 *tmp_buf = this->raw_buffer;
  1315. uint8_t *oob = chip->oob_poi;
  1316. size_t dst_bit_off;
  1317. size_t oob_bit_off;
  1318. size_t oob_byte_off;
  1319. int step;
  1320. /*
  1321. * Initialize all bits to 1 in case we don't have a buffer for the
  1322. * payload or oob data in order to leave unspecified bits of data
  1323. * to their initial state.
  1324. */
  1325. if (!buf || !oob_required)
  1326. memset(tmp_buf, 0xff, mtd->writesize + mtd->oobsize);
  1327. /*
  1328. * First copy the metadata section (stored in oob buffer) at the
  1329. * beginning of the page, as imposed by the GPMI layout.
  1330. */
  1331. memcpy(tmp_buf, oob, nfc_geo->metadata_size);
  1332. oob_bit_off = nfc_geo->metadata_size * 8;
  1333. dst_bit_off = oob_bit_off;
  1334. /* Interleave payload data and ECC bits */
  1335. for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
  1336. if (buf)
  1337. gpmi_copy_bits(tmp_buf, dst_bit_off,
  1338. buf, step * eccsize * 8, eccsize * 8);
  1339. dst_bit_off += eccsize * 8;
  1340. /* Align last ECC block to align a byte boundary */
  1341. if (step == nfc_geo->ecc_chunk_count - 1 &&
  1342. (oob_bit_off + eccbits) % 8)
  1343. eccbits += 8 - ((oob_bit_off + eccbits) % 8);
  1344. if (oob_required)
  1345. gpmi_copy_bits(tmp_buf, dst_bit_off,
  1346. oob, oob_bit_off, eccbits);
  1347. dst_bit_off += eccbits;
  1348. oob_bit_off += eccbits;
  1349. }
  1350. oob_byte_off = oob_bit_off / 8;
  1351. if (oob_required && oob_byte_off < mtd->oobsize)
  1352. memcpy(tmp_buf + mtd->writesize + oob_byte_off,
  1353. oob + oob_byte_off, mtd->oobsize - oob_byte_off);
  1354. /*
  1355. * If required, swap the bad block marker and the first byte of the
  1356. * metadata section, so that we don't modify the bad block marker.
  1357. *
  1358. * See the layout description for a detailed explanation on why this
  1359. * is needed.
  1360. */
  1361. if (this->swap_block_mark) {
  1362. u8 swap = tmp_buf[0];
  1363. tmp_buf[0] = tmp_buf[mtd->writesize];
  1364. tmp_buf[mtd->writesize] = swap;
  1365. }
  1366. chip->write_buf(mtd, tmp_buf, mtd->writesize + mtd->oobsize);
  1367. return 0;
  1368. }
  1369. static int gpmi_ecc_read_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
  1370. int page)
  1371. {
  1372. chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
  1373. return gpmi_ecc_read_page_raw(mtd, chip, NULL, 1, page);
  1374. }
  1375. static int gpmi_ecc_write_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
  1376. int page)
  1377. {
  1378. chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0, page);
  1379. return gpmi_ecc_write_page_raw(mtd, chip, NULL, 1, page);
  1380. }
  1381. static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
  1382. {
  1383. struct nand_chip *chip = mtd->priv;
  1384. struct gpmi_nand_data *this = chip->priv;
  1385. int ret = 0;
  1386. uint8_t *block_mark;
  1387. int column, page, status, chipnr;
  1388. chipnr = (int)(ofs >> chip->chip_shift);
  1389. chip->select_chip(mtd, chipnr);
  1390. column = !GPMI_IS_MX23(this) ? mtd->writesize : 0;
  1391. /* Write the block mark. */
  1392. block_mark = this->data_buffer_dma;
  1393. block_mark[0] = 0; /* bad block marker */
  1394. /* Shift to get page */
  1395. page = (int)(ofs >> chip->page_shift);
  1396. chip->cmdfunc(mtd, NAND_CMD_SEQIN, column, page);
  1397. chip->write_buf(mtd, block_mark, 1);
  1398. chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
  1399. status = chip->waitfunc(mtd, chip);
  1400. if (status & NAND_STATUS_FAIL)
  1401. ret = -EIO;
  1402. chip->select_chip(mtd, -1);
  1403. return ret;
  1404. }
  1405. static int nand_boot_set_geometry(struct gpmi_nand_data *this)
  1406. {
  1407. struct boot_rom_geometry *geometry = &this->rom_geometry;
  1408. /*
  1409. * Set the boot block stride size.
  1410. *
  1411. * In principle, we should be reading this from the OTP bits, since
  1412. * that's where the ROM is going to get it. In fact, we don't have any
  1413. * way to read the OTP bits, so we go with the default and hope for the
  1414. * best.
  1415. */
  1416. geometry->stride_size_in_pages = 64;
  1417. /*
  1418. * Set the search area stride exponent.
  1419. *
  1420. * In principle, we should be reading this from the OTP bits, since
  1421. * that's where the ROM is going to get it. In fact, we don't have any
  1422. * way to read the OTP bits, so we go with the default and hope for the
  1423. * best.
  1424. */
  1425. geometry->search_area_stride_exponent = 2;
  1426. return 0;
  1427. }
  1428. static const char *fingerprint = "STMP";
  1429. static int mx23_check_transcription_stamp(struct gpmi_nand_data *this)
  1430. {
  1431. struct boot_rom_geometry *rom_geo = &this->rom_geometry;
  1432. struct device *dev = this->dev;
  1433. struct mtd_info *mtd = &this->mtd;
  1434. struct nand_chip *chip = &this->nand;
  1435. unsigned int search_area_size_in_strides;
  1436. unsigned int stride;
  1437. unsigned int page;
  1438. uint8_t *buffer = chip->buffers->databuf;
  1439. int saved_chip_number;
  1440. int found_an_ncb_fingerprint = false;
  1441. /* Compute the number of strides in a search area. */
  1442. search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
  1443. saved_chip_number = this->current_chip;
  1444. chip->select_chip(mtd, 0);
  1445. /*
  1446. * Loop through the first search area, looking for the NCB fingerprint.
  1447. */
  1448. dev_dbg(dev, "Scanning for an NCB fingerprint...\n");
  1449. for (stride = 0; stride < search_area_size_in_strides; stride++) {
  1450. /* Compute the page addresses. */
  1451. page = stride * rom_geo->stride_size_in_pages;
  1452. dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page);
  1453. /*
  1454. * Read the NCB fingerprint. The fingerprint is four bytes long
  1455. * and starts in the 12th byte of the page.
  1456. */
  1457. chip->cmdfunc(mtd, NAND_CMD_READ0, 12, page);
  1458. chip->read_buf(mtd, buffer, strlen(fingerprint));
  1459. /* Look for the fingerprint. */
  1460. if (!memcmp(buffer, fingerprint, strlen(fingerprint))) {
  1461. found_an_ncb_fingerprint = true;
  1462. break;
  1463. }
  1464. }
  1465. chip->select_chip(mtd, saved_chip_number);
  1466. if (found_an_ncb_fingerprint)
  1467. dev_dbg(dev, "\tFound a fingerprint\n");
  1468. else
  1469. dev_dbg(dev, "\tNo fingerprint found\n");
  1470. return found_an_ncb_fingerprint;
  1471. }
  1472. /* Writes a transcription stamp. */
  1473. static int mx23_write_transcription_stamp(struct gpmi_nand_data *this)
  1474. {
  1475. struct device *dev = this->dev;
  1476. struct boot_rom_geometry *rom_geo = &this->rom_geometry;
  1477. struct mtd_info *mtd = &this->mtd;
  1478. struct nand_chip *chip = &this->nand;
  1479. unsigned int block_size_in_pages;
  1480. unsigned int search_area_size_in_strides;
  1481. unsigned int search_area_size_in_pages;
  1482. unsigned int search_area_size_in_blocks;
  1483. unsigned int block;
  1484. unsigned int stride;
  1485. unsigned int page;
  1486. uint8_t *buffer = chip->buffers->databuf;
  1487. int saved_chip_number;
  1488. int status;
  1489. /* Compute the search area geometry. */
  1490. block_size_in_pages = mtd->erasesize / mtd->writesize;
  1491. search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
  1492. search_area_size_in_pages = search_area_size_in_strides *
  1493. rom_geo->stride_size_in_pages;
  1494. search_area_size_in_blocks =
  1495. (search_area_size_in_pages + (block_size_in_pages - 1)) /
  1496. block_size_in_pages;
  1497. dev_dbg(dev, "Search Area Geometry :\n");
  1498. dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks);
  1499. dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides);
  1500. dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages);
  1501. /* Select chip 0. */
  1502. saved_chip_number = this->current_chip;
  1503. chip->select_chip(mtd, 0);
  1504. /* Loop over blocks in the first search area, erasing them. */
  1505. dev_dbg(dev, "Erasing the search area...\n");
  1506. for (block = 0; block < search_area_size_in_blocks; block++) {
  1507. /* Compute the page address. */
  1508. page = block * block_size_in_pages;
  1509. /* Erase this block. */
  1510. dev_dbg(dev, "\tErasing block 0x%x\n", block);
  1511. chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
  1512. chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
  1513. /* Wait for the erase to finish. */
  1514. status = chip->waitfunc(mtd, chip);
  1515. if (status & NAND_STATUS_FAIL)
  1516. dev_err(dev, "[%s] Erase failed.\n", __func__);
  1517. }
  1518. /* Write the NCB fingerprint into the page buffer. */
  1519. memset(buffer, ~0, mtd->writesize);
  1520. memcpy(buffer + 12, fingerprint, strlen(fingerprint));
  1521. /* Loop through the first search area, writing NCB fingerprints. */
  1522. dev_dbg(dev, "Writing NCB fingerprints...\n");
  1523. for (stride = 0; stride < search_area_size_in_strides; stride++) {
  1524. /* Compute the page addresses. */
  1525. page = stride * rom_geo->stride_size_in_pages;
  1526. /* Write the first page of the current stride. */
  1527. dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page);
  1528. chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
  1529. chip->ecc.write_page_raw(mtd, chip, buffer, 0, page);
  1530. chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
  1531. /* Wait for the write to finish. */
  1532. status = chip->waitfunc(mtd, chip);
  1533. if (status & NAND_STATUS_FAIL)
  1534. dev_err(dev, "[%s] Write failed.\n", __func__);
  1535. }
  1536. /* Deselect chip 0. */
  1537. chip->select_chip(mtd, saved_chip_number);
  1538. return 0;
  1539. }
  1540. static int mx23_boot_init(struct gpmi_nand_data *this)
  1541. {
  1542. struct device *dev = this->dev;
  1543. struct nand_chip *chip = &this->nand;
  1544. struct mtd_info *mtd = &this->mtd;
  1545. unsigned int block_count;
  1546. unsigned int block;
  1547. int chipnr;
  1548. int page;
  1549. loff_t byte;
  1550. uint8_t block_mark;
  1551. int ret = 0;
  1552. /*
  1553. * If control arrives here, we can't use block mark swapping, which
  1554. * means we're forced to use transcription. First, scan for the
  1555. * transcription stamp. If we find it, then we don't have to do
  1556. * anything -- the block marks are already transcribed.
  1557. */
  1558. if (mx23_check_transcription_stamp(this))
  1559. return 0;
  1560. /*
  1561. * If control arrives here, we couldn't find a transcription stamp, so
  1562. * so we presume the block marks are in the conventional location.
  1563. */
  1564. dev_dbg(dev, "Transcribing bad block marks...\n");
  1565. /* Compute the number of blocks in the entire medium. */
  1566. block_count = chip->chipsize >> chip->phys_erase_shift;
  1567. /*
  1568. * Loop over all the blocks in the medium, transcribing block marks as
  1569. * we go.
  1570. */
  1571. for (block = 0; block < block_count; block++) {
  1572. /*
  1573. * Compute the chip, page and byte addresses for this block's
  1574. * conventional mark.
  1575. */
  1576. chipnr = block >> (chip->chip_shift - chip->phys_erase_shift);
  1577. page = block << (chip->phys_erase_shift - chip->page_shift);
  1578. byte = block << chip->phys_erase_shift;
  1579. /* Send the command to read the conventional block mark. */
  1580. chip->select_chip(mtd, chipnr);
  1581. chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
  1582. block_mark = chip->read_byte(mtd);
  1583. chip->select_chip(mtd, -1);
  1584. /*
  1585. * Check if the block is marked bad. If so, we need to mark it
  1586. * again, but this time the result will be a mark in the
  1587. * location where we transcribe block marks.
  1588. */
  1589. if (block_mark != 0xff) {
  1590. dev_dbg(dev, "Transcribing mark in block %u\n", block);
  1591. ret = chip->block_markbad(mtd, byte);
  1592. if (ret)
  1593. dev_err(dev,
  1594. "Failed to mark block bad with ret %d\n",
  1595. ret);
  1596. }
  1597. }
  1598. /* Write the stamp that indicates we've transcribed the block marks. */
  1599. mx23_write_transcription_stamp(this);
  1600. return 0;
  1601. }
  1602. static int nand_boot_init(struct gpmi_nand_data *this)
  1603. {
  1604. nand_boot_set_geometry(this);
  1605. /* This is ROM arch-specific initilization before the BBT scanning. */
  1606. if (GPMI_IS_MX23(this))
  1607. return mx23_boot_init(this);
  1608. return 0;
  1609. }
  1610. static int gpmi_set_geometry(struct gpmi_nand_data *this)
  1611. {
  1612. int ret;
  1613. /* Free the temporary DMA memory for reading ID. */
  1614. gpmi_free_dma_buffer(this);
  1615. /* Set up the NFC geometry which is used by BCH. */
  1616. ret = bch_set_geometry(this);
  1617. if (ret) {
  1618. dev_err(this->dev, "Error setting BCH geometry : %d\n", ret);
  1619. return ret;
  1620. }
  1621. /* Alloc the new DMA buffers according to the pagesize and oobsize */
  1622. return gpmi_alloc_dma_buffer(this);
  1623. }
  1624. static void gpmi_nand_exit(struct gpmi_nand_data *this)
  1625. {
  1626. nand_release(&this->mtd);
  1627. gpmi_free_dma_buffer(this);
  1628. }
  1629. static int gpmi_init_last(struct gpmi_nand_data *this)
  1630. {
  1631. struct mtd_info *mtd = &this->mtd;
  1632. struct nand_chip *chip = mtd->priv;
  1633. struct nand_ecc_ctrl *ecc = &chip->ecc;
  1634. struct bch_geometry *bch_geo = &this->bch_geometry;
  1635. int ret;
  1636. /* Set up the medium geometry */
  1637. ret = gpmi_set_geometry(this);
  1638. if (ret)
  1639. return ret;
  1640. /* Init the nand_ecc_ctrl{} */
  1641. ecc->read_page = gpmi_ecc_read_page;
  1642. ecc->write_page = gpmi_ecc_write_page;
  1643. ecc->read_oob = gpmi_ecc_read_oob;
  1644. ecc->write_oob = gpmi_ecc_write_oob;
  1645. ecc->read_page_raw = gpmi_ecc_read_page_raw;
  1646. ecc->write_page_raw = gpmi_ecc_write_page_raw;
  1647. ecc->read_oob_raw = gpmi_ecc_read_oob_raw;
  1648. ecc->write_oob_raw = gpmi_ecc_write_oob_raw;
  1649. ecc->mode = NAND_ECC_HW;
  1650. ecc->size = bch_geo->ecc_chunk_size;
  1651. ecc->strength = bch_geo->ecc_strength;
  1652. ecc->layout = &gpmi_hw_ecclayout;
  1653. /*
  1654. * We only enable the subpage read when:
  1655. * (1) the chip is imx6, and
  1656. * (2) the size of the ECC parity is byte aligned.
  1657. */
  1658. if (GPMI_IS_MX6(this) &&
  1659. ((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) {
  1660. ecc->read_subpage = gpmi_ecc_read_subpage;
  1661. chip->options |= NAND_SUBPAGE_READ;
  1662. }
  1663. /*
  1664. * Can we enable the extra features? such as EDO or Sync mode.
  1665. *
  1666. * We do not check the return value now. That's means if we fail in
  1667. * enable the extra features, we still can run in the normal way.
  1668. */
  1669. gpmi_extra_init(this);
  1670. return 0;
  1671. }
  1672. static int gpmi_nand_init(struct gpmi_nand_data *this)
  1673. {
  1674. struct mtd_info *mtd = &this->mtd;
  1675. struct nand_chip *chip = &this->nand;
  1676. struct mtd_part_parser_data ppdata = {};
  1677. int ret;
  1678. /* init current chip */
  1679. this->current_chip = -1;
  1680. /* init the MTD data structures */
  1681. mtd->priv = chip;
  1682. mtd->name = "gpmi-nand";
  1683. mtd->dev.parent = this->dev;
  1684. /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */
  1685. chip->priv = this;
  1686. chip->select_chip = gpmi_select_chip;
  1687. chip->cmd_ctrl = gpmi_cmd_ctrl;
  1688. chip->dev_ready = gpmi_dev_ready;
  1689. chip->read_byte = gpmi_read_byte;
  1690. chip->read_buf = gpmi_read_buf;
  1691. chip->write_buf = gpmi_write_buf;
  1692. chip->badblock_pattern = &gpmi_bbt_descr;
  1693. chip->block_markbad = gpmi_block_markbad;
  1694. chip->options |= NAND_NO_SUBPAGE_WRITE;
  1695. /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */
  1696. this->swap_block_mark = !GPMI_IS_MX23(this);
  1697. if (of_get_nand_on_flash_bbt(this->dev->of_node)) {
  1698. chip->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
  1699. if (of_property_read_bool(this->dev->of_node,
  1700. "fsl,no-blockmark-swap"))
  1701. this->swap_block_mark = false;
  1702. }
  1703. dev_dbg(this->dev, "Blockmark swapping %sabled\n",
  1704. this->swap_block_mark ? "en" : "dis");
  1705. /*
  1706. * Allocate a temporary DMA buffer for reading ID in the
  1707. * nand_scan_ident().
  1708. */
  1709. this->bch_geometry.payload_size = 1024;
  1710. this->bch_geometry.auxiliary_size = 128;
  1711. ret = gpmi_alloc_dma_buffer(this);
  1712. if (ret)
  1713. goto err_out;
  1714. ret = nand_scan_ident(mtd, GPMI_IS_MX6(this) ? 2 : 1, NULL);
  1715. if (ret)
  1716. goto err_out;
  1717. ret = gpmi_init_last(this);
  1718. if (ret)
  1719. goto err_out;
  1720. chip->options |= NAND_SKIP_BBTSCAN;
  1721. ret = nand_scan_tail(mtd);
  1722. if (ret)
  1723. goto err_out;
  1724. ret = nand_boot_init(this);
  1725. if (ret)
  1726. goto err_out;
  1727. ret = chip->scan_bbt(mtd);
  1728. if (ret)
  1729. goto err_out;
  1730. ppdata.of_node = this->pdev->dev.of_node;
  1731. ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
  1732. if (ret)
  1733. goto err_out;
  1734. return 0;
  1735. err_out:
  1736. gpmi_nand_exit(this);
  1737. return ret;
  1738. }
  1739. static const struct of_device_id gpmi_nand_id_table[] = {
  1740. {
  1741. .compatible = "fsl,imx23-gpmi-nand",
  1742. .data = &gpmi_devdata_imx23,
  1743. }, {
  1744. .compatible = "fsl,imx28-gpmi-nand",
  1745. .data = &gpmi_devdata_imx28,
  1746. }, {
  1747. .compatible = "fsl,imx6q-gpmi-nand",
  1748. .data = &gpmi_devdata_imx6q,
  1749. }, {
  1750. .compatible = "fsl,imx6sx-gpmi-nand",
  1751. .data = &gpmi_devdata_imx6sx,
  1752. }, {}
  1753. };
  1754. MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);
  1755. static int gpmi_nand_probe(struct platform_device *pdev)
  1756. {
  1757. struct gpmi_nand_data *this;
  1758. const struct of_device_id *of_id;
  1759. int ret;
  1760. this = devm_kzalloc(&pdev->dev, sizeof(*this), GFP_KERNEL);
  1761. if (!this)
  1762. return -ENOMEM;
  1763. of_id = of_match_device(gpmi_nand_id_table, &pdev->dev);
  1764. if (of_id) {
  1765. this->devdata = of_id->data;
  1766. } else {
  1767. dev_err(&pdev->dev, "Failed to find the right device id.\n");
  1768. return -ENODEV;
  1769. }
  1770. platform_set_drvdata(pdev, this);
  1771. this->pdev = pdev;
  1772. this->dev = &pdev->dev;
  1773. ret = acquire_resources(this);
  1774. if (ret)
  1775. goto exit_acquire_resources;
  1776. ret = init_hardware(this);
  1777. if (ret)
  1778. goto exit_nfc_init;
  1779. ret = gpmi_nand_init(this);
  1780. if (ret)
  1781. goto exit_nfc_init;
  1782. dev_info(this->dev, "driver registered.\n");
  1783. return 0;
  1784. exit_nfc_init:
  1785. release_resources(this);
  1786. exit_acquire_resources:
  1787. return ret;
  1788. }
  1789. static int gpmi_nand_remove(struct platform_device *pdev)
  1790. {
  1791. struct gpmi_nand_data *this = platform_get_drvdata(pdev);
  1792. gpmi_nand_exit(this);
  1793. release_resources(this);
  1794. return 0;
  1795. }
  1796. static struct platform_driver gpmi_nand_driver = {
  1797. .driver = {
  1798. .name = "gpmi-nand",
  1799. .of_match_table = gpmi_nand_id_table,
  1800. },
  1801. .probe = gpmi_nand_probe,
  1802. .remove = gpmi_nand_remove,
  1803. };
  1804. module_platform_driver(gpmi_nand_driver);
  1805. MODULE_AUTHOR("Freescale Semiconductor, Inc.");
  1806. MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver");
  1807. MODULE_LICENSE("GPL");