peak_pci.c 20 KB

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  1. /*
  2. * Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com>
  3. * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com>
  4. *
  5. * Derived from the PCAN project file driver/src/pcan_pci.c:
  6. *
  7. * Copyright (C) 2001-2006 PEAK System-Technik GmbH
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the version 2 of the GNU General Public License
  11. * as published by the Free Software Foundation
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/netdevice.h>
  22. #include <linux/delay.h>
  23. #include <linux/pci.h>
  24. #include <linux/io.h>
  25. #include <linux/i2c.h>
  26. #include <linux/i2c-algo-bit.h>
  27. #include <linux/can.h>
  28. #include <linux/can/dev.h>
  29. #include "sja1000.h"
  30. MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>");
  31. MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI family cards");
  32. MODULE_SUPPORTED_DEVICE("PEAK PCAN PCI/PCIe/PCIeC miniPCI CAN cards");
  33. MODULE_SUPPORTED_DEVICE("PEAK PCAN miniPCIe/cPCI PC/104+ PCI/104e CAN Cards");
  34. MODULE_LICENSE("GPL v2");
  35. #define DRV_NAME "peak_pci"
  36. struct peak_pciec_card;
  37. struct peak_pci_chan {
  38. void __iomem *cfg_base; /* Common for all channels */
  39. struct net_device *prev_dev; /* Chain of network devices */
  40. u16 icr_mask; /* Interrupt mask for fast ack */
  41. struct peak_pciec_card *pciec_card; /* only for PCIeC LEDs */
  42. };
  43. #define PEAK_PCI_CAN_CLOCK (16000000 / 2)
  44. #define PEAK_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
  45. #define PEAK_PCI_OCR OCR_TX0_PUSHPULL
  46. /*
  47. * Important PITA registers
  48. */
  49. #define PITA_ICR 0x00 /* Interrupt control register */
  50. #define PITA_GPIOICR 0x18 /* GPIO interface control register */
  51. #define PITA_MISC 0x1C /* Miscellaneous register */
  52. #define PEAK_PCI_CFG_SIZE 0x1000 /* Size of the config PCI bar */
  53. #define PEAK_PCI_CHAN_SIZE 0x0400 /* Size used by the channel */
  54. #define PEAK_PCI_VENDOR_ID 0x001C /* The PCI device and vendor IDs */
  55. #define PEAK_PCI_DEVICE_ID 0x0001 /* for PCI/PCIe slot cards */
  56. #define PEAK_PCIEC_DEVICE_ID 0x0002 /* for ExpressCard slot cards */
  57. #define PEAK_PCIE_DEVICE_ID 0x0003 /* for nextgen PCIe slot cards */
  58. #define PEAK_CPCI_DEVICE_ID 0x0004 /* for nextgen cPCI slot cards */
  59. #define PEAK_MPCI_DEVICE_ID 0x0005 /* for nextgen miniPCI slot cards */
  60. #define PEAK_PC_104P_DEVICE_ID 0x0006 /* PCAN-PC/104+ cards */
  61. #define PEAK_PCI_104E_DEVICE_ID 0x0007 /* PCAN-PCI/104 Express cards */
  62. #define PEAK_MPCIE_DEVICE_ID 0x0008 /* The miniPCIe slot cards */
  63. #define PEAK_PCIE_OEM_ID 0x0009 /* PCAN-PCI Express OEM */
  64. #define PEAK_PCIEC34_DEVICE_ID 0x000A /* PCAN-PCI Express 34 (one channel) */
  65. #define PEAK_PCI_CHAN_MAX 4
  66. static const u16 peak_pci_icr_masks[PEAK_PCI_CHAN_MAX] = {
  67. 0x02, 0x01, 0x40, 0x80
  68. };
  69. static const struct pci_device_id peak_pci_tbl[] = {
  70. {PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  71. {PEAK_PCI_VENDOR_ID, PEAK_PCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  72. {PEAK_PCI_VENDOR_ID, PEAK_MPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  73. {PEAK_PCI_VENDOR_ID, PEAK_MPCIE_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  74. {PEAK_PCI_VENDOR_ID, PEAK_PC_104P_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  75. {PEAK_PCI_VENDOR_ID, PEAK_PCI_104E_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  76. {PEAK_PCI_VENDOR_ID, PEAK_CPCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  77. {PEAK_PCI_VENDOR_ID, PEAK_PCIE_OEM_ID, PCI_ANY_ID, PCI_ANY_ID,},
  78. #ifdef CONFIG_CAN_PEAK_PCIEC
  79. {PEAK_PCI_VENDOR_ID, PEAK_PCIEC_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  80. {PEAK_PCI_VENDOR_ID, PEAK_PCIEC34_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
  81. #endif
  82. {0,}
  83. };
  84. MODULE_DEVICE_TABLE(pci, peak_pci_tbl);
  85. #ifdef CONFIG_CAN_PEAK_PCIEC
  86. /*
  87. * PCAN-ExpressCard needs I2C bit-banging configuration option.
  88. */
  89. /* GPIOICR byte access offsets */
  90. #define PITA_GPOUT 0x18 /* GPx output value */
  91. #define PITA_GPIN 0x19 /* GPx input value */
  92. #define PITA_GPOEN 0x1A /* configure GPx as ouput pin */
  93. /* I2C GP bits */
  94. #define PITA_GPIN_SCL 0x01 /* Serial Clock Line */
  95. #define PITA_GPIN_SDA 0x04 /* Serial DAta line */
  96. #define PCA9553_1_SLAVEADDR (0xC4 >> 1)
  97. /* PCA9553 LS0 fields values */
  98. enum {
  99. PCA9553_LOW,
  100. PCA9553_HIGHZ,
  101. PCA9553_PWM0,
  102. PCA9553_PWM1
  103. };
  104. /* LEDs control */
  105. #define PCA9553_ON PCA9553_LOW
  106. #define PCA9553_OFF PCA9553_HIGHZ
  107. #define PCA9553_SLOW PCA9553_PWM0
  108. #define PCA9553_FAST PCA9553_PWM1
  109. #define PCA9553_LED(c) (1 << (c))
  110. #define PCA9553_LED_STATE(s, c) ((s) << ((c) << 1))
  111. #define PCA9553_LED_ON(c) PCA9553_LED_STATE(PCA9553_ON, c)
  112. #define PCA9553_LED_OFF(c) PCA9553_LED_STATE(PCA9553_OFF, c)
  113. #define PCA9553_LED_SLOW(c) PCA9553_LED_STATE(PCA9553_SLOW, c)
  114. #define PCA9553_LED_FAST(c) PCA9553_LED_STATE(PCA9553_FAST, c)
  115. #define PCA9553_LED_MASK(c) PCA9553_LED_STATE(0x03, c)
  116. #define PCA9553_LED_OFF_ALL (PCA9553_LED_OFF(0) | PCA9553_LED_OFF(1))
  117. #define PCA9553_LS0_INIT 0x40 /* initial value (!= from 0x00) */
  118. struct peak_pciec_chan {
  119. struct net_device *netdev;
  120. unsigned long prev_rx_bytes;
  121. unsigned long prev_tx_bytes;
  122. };
  123. struct peak_pciec_card {
  124. void __iomem *cfg_base; /* Common for all channels */
  125. void __iomem *reg_base; /* first channel base address */
  126. u8 led_cache; /* leds state cache */
  127. /* PCIExpressCard i2c data */
  128. struct i2c_algo_bit_data i2c_bit;
  129. struct i2c_adapter led_chip;
  130. struct delayed_work led_work; /* led delayed work */
  131. int chan_count;
  132. struct peak_pciec_chan channel[PEAK_PCI_CHAN_MAX];
  133. };
  134. /* "normal" pci register write callback is overloaded for leds control */
  135. static void peak_pci_write_reg(const struct sja1000_priv *priv,
  136. int port, u8 val);
  137. static inline void pita_set_scl_highz(struct peak_pciec_card *card)
  138. {
  139. u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SCL;
  140. writeb(gp_outen, card->cfg_base + PITA_GPOEN);
  141. }
  142. static inline void pita_set_sda_highz(struct peak_pciec_card *card)
  143. {
  144. u8 gp_outen = readb(card->cfg_base + PITA_GPOEN) & ~PITA_GPIN_SDA;
  145. writeb(gp_outen, card->cfg_base + PITA_GPOEN);
  146. }
  147. static void peak_pciec_init_pita_gpio(struct peak_pciec_card *card)
  148. {
  149. /* raise SCL & SDA GPIOs to high-Z */
  150. pita_set_scl_highz(card);
  151. pita_set_sda_highz(card);
  152. }
  153. static void pita_setsda(void *data, int state)
  154. {
  155. struct peak_pciec_card *card = (struct peak_pciec_card *)data;
  156. u8 gp_out, gp_outen;
  157. /* set output sda always to 0 */
  158. gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SDA;
  159. writeb(gp_out, card->cfg_base + PITA_GPOUT);
  160. /* control output sda with GPOEN */
  161. gp_outen = readb(card->cfg_base + PITA_GPOEN);
  162. if (state)
  163. gp_outen &= ~PITA_GPIN_SDA;
  164. else
  165. gp_outen |= PITA_GPIN_SDA;
  166. writeb(gp_outen, card->cfg_base + PITA_GPOEN);
  167. }
  168. static void pita_setscl(void *data, int state)
  169. {
  170. struct peak_pciec_card *card = (struct peak_pciec_card *)data;
  171. u8 gp_out, gp_outen;
  172. /* set output scl always to 0 */
  173. gp_out = readb(card->cfg_base + PITA_GPOUT) & ~PITA_GPIN_SCL;
  174. writeb(gp_out, card->cfg_base + PITA_GPOUT);
  175. /* control output scl with GPOEN */
  176. gp_outen = readb(card->cfg_base + PITA_GPOEN);
  177. if (state)
  178. gp_outen &= ~PITA_GPIN_SCL;
  179. else
  180. gp_outen |= PITA_GPIN_SCL;
  181. writeb(gp_outen, card->cfg_base + PITA_GPOEN);
  182. }
  183. static int pita_getsda(void *data)
  184. {
  185. struct peak_pciec_card *card = (struct peak_pciec_card *)data;
  186. /* set tristate */
  187. pita_set_sda_highz(card);
  188. return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SDA) ? 1 : 0;
  189. }
  190. static int pita_getscl(void *data)
  191. {
  192. struct peak_pciec_card *card = (struct peak_pciec_card *)data;
  193. /* set tristate */
  194. pita_set_scl_highz(card);
  195. return (readb(card->cfg_base + PITA_GPIN) & PITA_GPIN_SCL) ? 1 : 0;
  196. }
  197. /*
  198. * write commands to the LED chip though the I2C-bus of the PCAN-PCIeC
  199. */
  200. static int peak_pciec_write_pca9553(struct peak_pciec_card *card,
  201. u8 offset, u8 data)
  202. {
  203. u8 buffer[2] = {
  204. offset,
  205. data
  206. };
  207. struct i2c_msg msg = {
  208. .addr = PCA9553_1_SLAVEADDR,
  209. .len = 2,
  210. .buf = buffer,
  211. };
  212. int ret;
  213. /* cache led mask */
  214. if ((offset == 5) && (data == card->led_cache))
  215. return 0;
  216. ret = i2c_transfer(&card->led_chip, &msg, 1);
  217. if (ret < 0)
  218. return ret;
  219. if (offset == 5)
  220. card->led_cache = data;
  221. return 0;
  222. }
  223. /*
  224. * delayed work callback used to control the LEDs
  225. */
  226. static void peak_pciec_led_work(struct work_struct *work)
  227. {
  228. struct peak_pciec_card *card =
  229. container_of(work, struct peak_pciec_card, led_work.work);
  230. struct net_device *netdev;
  231. u8 new_led = card->led_cache;
  232. int i, up_count = 0;
  233. /* first check what is to do */
  234. for (i = 0; i < card->chan_count; i++) {
  235. /* default is: not configured */
  236. new_led &= ~PCA9553_LED_MASK(i);
  237. new_led |= PCA9553_LED_ON(i);
  238. netdev = card->channel[i].netdev;
  239. if (!netdev || !(netdev->flags & IFF_UP))
  240. continue;
  241. up_count++;
  242. /* no activity (but configured) */
  243. new_led &= ~PCA9553_LED_MASK(i);
  244. new_led |= PCA9553_LED_SLOW(i);
  245. /* if bytes counters changed, set fast blinking led */
  246. if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) {
  247. card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes;
  248. new_led &= ~PCA9553_LED_MASK(i);
  249. new_led |= PCA9553_LED_FAST(i);
  250. }
  251. if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) {
  252. card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes;
  253. new_led &= ~PCA9553_LED_MASK(i);
  254. new_led |= PCA9553_LED_FAST(i);
  255. }
  256. }
  257. /* check if LS0 settings changed, only update i2c if so */
  258. peak_pciec_write_pca9553(card, 5, new_led);
  259. /* restart timer (except if no more configured channels) */
  260. if (up_count)
  261. schedule_delayed_work(&card->led_work, HZ);
  262. }
  263. /*
  264. * set LEDs blinking state
  265. */
  266. static void peak_pciec_set_leds(struct peak_pciec_card *card, u8 led_mask, u8 s)
  267. {
  268. u8 new_led = card->led_cache;
  269. int i;
  270. /* first check what is to do */
  271. for (i = 0; i < card->chan_count; i++)
  272. if (led_mask & PCA9553_LED(i)) {
  273. new_led &= ~PCA9553_LED_MASK(i);
  274. new_led |= PCA9553_LED_STATE(s, i);
  275. }
  276. /* check if LS0 settings changed, only update i2c if so */
  277. peak_pciec_write_pca9553(card, 5, new_led);
  278. }
  279. /*
  280. * start one second delayed work to control LEDs
  281. */
  282. static void peak_pciec_start_led_work(struct peak_pciec_card *card)
  283. {
  284. schedule_delayed_work(&card->led_work, HZ);
  285. }
  286. /*
  287. * stop LEDs delayed work
  288. */
  289. static void peak_pciec_stop_led_work(struct peak_pciec_card *card)
  290. {
  291. cancel_delayed_work_sync(&card->led_work);
  292. }
  293. /*
  294. * initialize the PCA9553 4-bit I2C-bus LED chip
  295. */
  296. static int peak_pciec_init_leds(struct peak_pciec_card *card)
  297. {
  298. int err;
  299. /* prescaler for frequency 0: "SLOW" = 1 Hz = "44" */
  300. err = peak_pciec_write_pca9553(card, 1, 44 / 1);
  301. if (err)
  302. return err;
  303. /* duty cycle 0: 50% */
  304. err = peak_pciec_write_pca9553(card, 2, 0x80);
  305. if (err)
  306. return err;
  307. /* prescaler for frequency 1: "FAST" = 5 Hz */
  308. err = peak_pciec_write_pca9553(card, 3, 44 / 5);
  309. if (err)
  310. return err;
  311. /* duty cycle 1: 50% */
  312. err = peak_pciec_write_pca9553(card, 4, 0x80);
  313. if (err)
  314. return err;
  315. /* switch LEDs to initial state */
  316. return peak_pciec_write_pca9553(card, 5, PCA9553_LS0_INIT);
  317. }
  318. /*
  319. * restore LEDs state to off peak_pciec_leds_exit
  320. */
  321. static void peak_pciec_leds_exit(struct peak_pciec_card *card)
  322. {
  323. /* switch LEDs to off */
  324. peak_pciec_write_pca9553(card, 5, PCA9553_LED_OFF_ALL);
  325. }
  326. /*
  327. * normal write sja1000 register method overloaded to catch when controller
  328. * is started or stopped, to control leds
  329. */
  330. static void peak_pciec_write_reg(const struct sja1000_priv *priv,
  331. int port, u8 val)
  332. {
  333. struct peak_pci_chan *chan = priv->priv;
  334. struct peak_pciec_card *card = chan->pciec_card;
  335. int c = (priv->reg_base - card->reg_base) / PEAK_PCI_CHAN_SIZE;
  336. /* sja1000 register changes control the leds state */
  337. if (port == SJA1000_MOD)
  338. switch (val) {
  339. case MOD_RM:
  340. /* Reset Mode: set led on */
  341. peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_ON);
  342. break;
  343. case 0x00:
  344. /* Normal Mode: led slow blinking and start led timer */
  345. peak_pciec_set_leds(card, PCA9553_LED(c), PCA9553_SLOW);
  346. peak_pciec_start_led_work(card);
  347. break;
  348. default:
  349. break;
  350. }
  351. /* call base function */
  352. peak_pci_write_reg(priv, port, val);
  353. }
  354. static struct i2c_algo_bit_data peak_pciec_i2c_bit_ops = {
  355. .setsda = pita_setsda,
  356. .setscl = pita_setscl,
  357. .getsda = pita_getsda,
  358. .getscl = pita_getscl,
  359. .udelay = 10,
  360. .timeout = HZ,
  361. };
  362. static int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)
  363. {
  364. struct sja1000_priv *priv = netdev_priv(dev);
  365. struct peak_pci_chan *chan = priv->priv;
  366. struct peak_pciec_card *card;
  367. int err;
  368. /* copy i2c object address from 1st channel */
  369. if (chan->prev_dev) {
  370. struct sja1000_priv *prev_priv = netdev_priv(chan->prev_dev);
  371. struct peak_pci_chan *prev_chan = prev_priv->priv;
  372. card = prev_chan->pciec_card;
  373. if (!card)
  374. return -ENODEV;
  375. /* channel is the first one: do the init part */
  376. } else {
  377. /* create the bit banging I2C adapter structure */
  378. card = kzalloc(sizeof(struct peak_pciec_card), GFP_KERNEL);
  379. if (!card)
  380. return -ENOMEM;
  381. card->cfg_base = chan->cfg_base;
  382. card->reg_base = priv->reg_base;
  383. card->led_chip.owner = THIS_MODULE;
  384. card->led_chip.dev.parent = &pdev->dev;
  385. card->led_chip.algo_data = &card->i2c_bit;
  386. strncpy(card->led_chip.name, "peak_i2c",
  387. sizeof(card->led_chip.name));
  388. card->i2c_bit = peak_pciec_i2c_bit_ops;
  389. card->i2c_bit.udelay = 10;
  390. card->i2c_bit.timeout = HZ;
  391. card->i2c_bit.data = card;
  392. peak_pciec_init_pita_gpio(card);
  393. err = i2c_bit_add_bus(&card->led_chip);
  394. if (err) {
  395. dev_err(&pdev->dev, "i2c init failed\n");
  396. goto pciec_init_err_1;
  397. }
  398. err = peak_pciec_init_leds(card);
  399. if (err) {
  400. dev_err(&pdev->dev, "leds hardware init failed\n");
  401. goto pciec_init_err_2;
  402. }
  403. INIT_DELAYED_WORK(&card->led_work, peak_pciec_led_work);
  404. /* PCAN-ExpressCard needs its own callback for leds */
  405. priv->write_reg = peak_pciec_write_reg;
  406. }
  407. chan->pciec_card = card;
  408. card->channel[card->chan_count++].netdev = dev;
  409. return 0;
  410. pciec_init_err_2:
  411. i2c_del_adapter(&card->led_chip);
  412. pciec_init_err_1:
  413. peak_pciec_init_pita_gpio(card);
  414. kfree(card);
  415. return err;
  416. }
  417. static void peak_pciec_remove(struct peak_pciec_card *card)
  418. {
  419. peak_pciec_stop_led_work(card);
  420. peak_pciec_leds_exit(card);
  421. i2c_del_adapter(&card->led_chip);
  422. peak_pciec_init_pita_gpio(card);
  423. kfree(card);
  424. }
  425. #else /* CONFIG_CAN_PEAK_PCIEC */
  426. /*
  427. * Placebo functions when PCAN-ExpressCard support is not selected
  428. */
  429. static inline int peak_pciec_probe(struct pci_dev *pdev, struct net_device *dev)
  430. {
  431. return -ENODEV;
  432. }
  433. static inline void peak_pciec_remove(struct peak_pciec_card *card)
  434. {
  435. }
  436. #endif /* CONFIG_CAN_PEAK_PCIEC */
  437. static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port)
  438. {
  439. return readb(priv->reg_base + (port << 2));
  440. }
  441. static void peak_pci_write_reg(const struct sja1000_priv *priv,
  442. int port, u8 val)
  443. {
  444. writeb(val, priv->reg_base + (port << 2));
  445. }
  446. static void peak_pci_post_irq(const struct sja1000_priv *priv)
  447. {
  448. struct peak_pci_chan *chan = priv->priv;
  449. u16 icr;
  450. /* Select and clear in PITA stored interrupt */
  451. icr = readw(chan->cfg_base + PITA_ICR);
  452. if (icr & chan->icr_mask)
  453. writew(chan->icr_mask, chan->cfg_base + PITA_ICR);
  454. }
  455. static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  456. {
  457. struct sja1000_priv *priv;
  458. struct peak_pci_chan *chan;
  459. struct net_device *dev, *prev_dev;
  460. void __iomem *cfg_base, *reg_base;
  461. u16 sub_sys_id, icr;
  462. int i, err, channels;
  463. err = pci_enable_device(pdev);
  464. if (err)
  465. return err;
  466. err = pci_request_regions(pdev, DRV_NAME);
  467. if (err)
  468. goto failure_disable_pci;
  469. err = pci_read_config_word(pdev, 0x2e, &sub_sys_id);
  470. if (err)
  471. goto failure_release_regions;
  472. dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n",
  473. pdev->vendor, pdev->device, sub_sys_id);
  474. err = pci_write_config_word(pdev, 0x44, 0);
  475. if (err)
  476. goto failure_release_regions;
  477. if (sub_sys_id >= 12)
  478. channels = 4;
  479. else if (sub_sys_id >= 10)
  480. channels = 3;
  481. else if (sub_sys_id >= 4)
  482. channels = 2;
  483. else
  484. channels = 1;
  485. cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE);
  486. if (!cfg_base) {
  487. dev_err(&pdev->dev, "failed to map PCI resource #0\n");
  488. err = -ENOMEM;
  489. goto failure_release_regions;
  490. }
  491. reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels);
  492. if (!reg_base) {
  493. dev_err(&pdev->dev, "failed to map PCI resource #1\n");
  494. err = -ENOMEM;
  495. goto failure_unmap_cfg_base;
  496. }
  497. /* Set GPIO control register */
  498. writew(0x0005, cfg_base + PITA_GPIOICR + 2);
  499. /* Enable all channels of this card */
  500. writeb(0x00, cfg_base + PITA_GPIOICR);
  501. /* Toggle reset */
  502. writeb(0x05, cfg_base + PITA_MISC + 3);
  503. mdelay(5);
  504. /* Leave parport mux mode */
  505. writeb(0x04, cfg_base + PITA_MISC + 3);
  506. icr = readw(cfg_base + PITA_ICR + 2);
  507. for (i = 0; i < channels; i++) {
  508. dev = alloc_sja1000dev(sizeof(struct peak_pci_chan));
  509. if (!dev) {
  510. err = -ENOMEM;
  511. goto failure_remove_channels;
  512. }
  513. priv = netdev_priv(dev);
  514. chan = priv->priv;
  515. chan->cfg_base = cfg_base;
  516. priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE;
  517. priv->read_reg = peak_pci_read_reg;
  518. priv->write_reg = peak_pci_write_reg;
  519. priv->post_irq = peak_pci_post_irq;
  520. priv->can.clock.freq = PEAK_PCI_CAN_CLOCK;
  521. priv->ocr = PEAK_PCI_OCR;
  522. priv->cdr = PEAK_PCI_CDR;
  523. /* Neither a slave nor a single device distributes the clock */
  524. if (channels == 1 || i > 0)
  525. priv->cdr |= CDR_CLK_OFF;
  526. /* Setup interrupt handling */
  527. priv->irq_flags = IRQF_SHARED;
  528. dev->irq = pdev->irq;
  529. chan->icr_mask = peak_pci_icr_masks[i];
  530. icr |= chan->icr_mask;
  531. SET_NETDEV_DEV(dev, &pdev->dev);
  532. dev->dev_id = i;
  533. /* Create chain of SJA1000 devices */
  534. chan->prev_dev = pci_get_drvdata(pdev);
  535. pci_set_drvdata(pdev, dev);
  536. /*
  537. * PCAN-ExpressCard needs some additional i2c init.
  538. * This must be done *before* register_sja1000dev() but
  539. * *after* devices linkage
  540. */
  541. if (pdev->device == PEAK_PCIEC_DEVICE_ID ||
  542. pdev->device == PEAK_PCIEC34_DEVICE_ID) {
  543. err = peak_pciec_probe(pdev, dev);
  544. if (err) {
  545. dev_err(&pdev->dev,
  546. "failed to probe device (err %d)\n",
  547. err);
  548. goto failure_free_dev;
  549. }
  550. }
  551. err = register_sja1000dev(dev);
  552. if (err) {
  553. dev_err(&pdev->dev, "failed to register device\n");
  554. goto failure_free_dev;
  555. }
  556. dev_info(&pdev->dev,
  557. "%s at reg_base=0x%p cfg_base=0x%p irq=%d\n",
  558. dev->name, priv->reg_base, chan->cfg_base, dev->irq);
  559. }
  560. /* Enable interrupts */
  561. writew(icr, cfg_base + PITA_ICR + 2);
  562. return 0;
  563. failure_free_dev:
  564. pci_set_drvdata(pdev, chan->prev_dev);
  565. free_sja1000dev(dev);
  566. failure_remove_channels:
  567. /* Disable interrupts */
  568. writew(0x0, cfg_base + PITA_ICR + 2);
  569. chan = NULL;
  570. for (dev = pci_get_drvdata(pdev); dev; dev = prev_dev) {
  571. priv = netdev_priv(dev);
  572. chan = priv->priv;
  573. prev_dev = chan->prev_dev;
  574. unregister_sja1000dev(dev);
  575. free_sja1000dev(dev);
  576. }
  577. /* free any PCIeC resources too */
  578. if (chan && chan->pciec_card)
  579. peak_pciec_remove(chan->pciec_card);
  580. pci_iounmap(pdev, reg_base);
  581. failure_unmap_cfg_base:
  582. pci_iounmap(pdev, cfg_base);
  583. failure_release_regions:
  584. pci_release_regions(pdev);
  585. failure_disable_pci:
  586. pci_disable_device(pdev);
  587. return err;
  588. }
  589. static void peak_pci_remove(struct pci_dev *pdev)
  590. {
  591. struct net_device *dev = pci_get_drvdata(pdev); /* Last device */
  592. struct sja1000_priv *priv = netdev_priv(dev);
  593. struct peak_pci_chan *chan = priv->priv;
  594. void __iomem *cfg_base = chan->cfg_base;
  595. void __iomem *reg_base = priv->reg_base;
  596. /* Disable interrupts */
  597. writew(0x0, cfg_base + PITA_ICR + 2);
  598. /* Loop over all registered devices */
  599. while (1) {
  600. struct net_device *prev_dev = chan->prev_dev;
  601. dev_info(&pdev->dev, "removing device %s\n", dev->name);
  602. unregister_sja1000dev(dev);
  603. free_sja1000dev(dev);
  604. dev = prev_dev;
  605. if (!dev) {
  606. /* do that only for first channel */
  607. if (chan->pciec_card)
  608. peak_pciec_remove(chan->pciec_card);
  609. break;
  610. }
  611. priv = netdev_priv(dev);
  612. chan = priv->priv;
  613. }
  614. pci_iounmap(pdev, reg_base);
  615. pci_iounmap(pdev, cfg_base);
  616. pci_release_regions(pdev);
  617. pci_disable_device(pdev);
  618. }
  619. static struct pci_driver peak_pci_driver = {
  620. .name = DRV_NAME,
  621. .id_table = peak_pci_tbl,
  622. .probe = peak_pci_probe,
  623. .remove = peak_pci_remove,
  624. };
  625. module_pci_driver(peak_pci_driver);