sja1000_isa.c 8.2 KB

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  1. /*
  2. * Copyright (C) 2009 Wolfgang Grandegger <wg@grandegger.com>
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the version 2 of the GNU General Public License
  6. * as published by the Free Software Foundation
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program; if not, see <http://www.gnu.org/licenses/>.
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/netdevice.h>
  21. #include <linux/delay.h>
  22. #include <linux/irq.h>
  23. #include <linux/io.h>
  24. #include <linux/can/dev.h>
  25. #include <linux/can/platform/sja1000.h>
  26. #include "sja1000.h"
  27. #define DRV_NAME "sja1000_isa"
  28. #define MAXDEV 8
  29. MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
  30. MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the ISA bus");
  31. MODULE_LICENSE("GPL v2");
  32. #define CLK_DEFAULT 16000000 /* 16 MHz */
  33. #define CDR_DEFAULT (CDR_CBP | CDR_CLK_OFF)
  34. #define OCR_DEFAULT OCR_TX0_PUSHPULL
  35. static unsigned long port[MAXDEV];
  36. static unsigned long mem[MAXDEV];
  37. static int irq[MAXDEV];
  38. static int clk[MAXDEV];
  39. static unsigned char cdr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
  40. static unsigned char ocr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff};
  41. static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1};
  42. static spinlock_t indirect_lock[MAXDEV]; /* lock for indirect access mode */
  43. module_param_array(port, ulong, NULL, S_IRUGO);
  44. MODULE_PARM_DESC(port, "I/O port number");
  45. module_param_array(mem, ulong, NULL, S_IRUGO);
  46. MODULE_PARM_DESC(mem, "I/O memory address");
  47. module_param_array(indirect, int, NULL, S_IRUGO);
  48. MODULE_PARM_DESC(indirect, "Indirect access via address and data port");
  49. module_param_array(irq, int, NULL, S_IRUGO);
  50. MODULE_PARM_DESC(irq, "IRQ number");
  51. module_param_array(clk, int, NULL, S_IRUGO);
  52. MODULE_PARM_DESC(clk, "External oscillator clock frequency "
  53. "(default=16000000 [16 MHz])");
  54. module_param_array(cdr, byte, NULL, S_IRUGO);
  55. MODULE_PARM_DESC(cdr, "Clock divider register "
  56. "(default=0x48 [CDR_CBP | CDR_CLK_OFF])");
  57. module_param_array(ocr, byte, NULL, S_IRUGO);
  58. MODULE_PARM_DESC(ocr, "Output control register "
  59. "(default=0x18 [OCR_TX0_PUSHPULL])");
  60. #define SJA1000_IOSIZE 0x20
  61. #define SJA1000_IOSIZE_INDIRECT 0x02
  62. static struct platform_device *sja1000_isa_devs[MAXDEV];
  63. static u8 sja1000_isa_mem_read_reg(const struct sja1000_priv *priv, int reg)
  64. {
  65. return readb(priv->reg_base + reg);
  66. }
  67. static void sja1000_isa_mem_write_reg(const struct sja1000_priv *priv,
  68. int reg, u8 val)
  69. {
  70. writeb(val, priv->reg_base + reg);
  71. }
  72. static u8 sja1000_isa_port_read_reg(const struct sja1000_priv *priv, int reg)
  73. {
  74. return inb((unsigned long)priv->reg_base + reg);
  75. }
  76. static void sja1000_isa_port_write_reg(const struct sja1000_priv *priv,
  77. int reg, u8 val)
  78. {
  79. outb(val, (unsigned long)priv->reg_base + reg);
  80. }
  81. static u8 sja1000_isa_port_read_reg_indirect(const struct sja1000_priv *priv,
  82. int reg)
  83. {
  84. unsigned long flags, base = (unsigned long)priv->reg_base;
  85. u8 readval;
  86. spin_lock_irqsave(&indirect_lock[priv->dev->dev_id], flags);
  87. outb(reg, base);
  88. readval = inb(base + 1);
  89. spin_unlock_irqrestore(&indirect_lock[priv->dev->dev_id], flags);
  90. return readval;
  91. }
  92. static void sja1000_isa_port_write_reg_indirect(const struct sja1000_priv *priv,
  93. int reg, u8 val)
  94. {
  95. unsigned long flags, base = (unsigned long)priv->reg_base;
  96. spin_lock_irqsave(&indirect_lock[priv->dev->dev_id], flags);
  97. outb(reg, base);
  98. outb(val, base + 1);
  99. spin_unlock_irqrestore(&indirect_lock[priv->dev->dev_id], flags);
  100. }
  101. static int sja1000_isa_probe(struct platform_device *pdev)
  102. {
  103. struct net_device *dev;
  104. struct sja1000_priv *priv;
  105. void __iomem *base = NULL;
  106. int iosize = SJA1000_IOSIZE;
  107. int idx = pdev->id;
  108. int err;
  109. dev_dbg(&pdev->dev, "probing idx=%d: port=%#lx, mem=%#lx, irq=%d\n",
  110. idx, port[idx], mem[idx], irq[idx]);
  111. if (mem[idx]) {
  112. if (!request_mem_region(mem[idx], iosize, DRV_NAME)) {
  113. err = -EBUSY;
  114. goto exit;
  115. }
  116. base = ioremap_nocache(mem[idx], iosize);
  117. if (!base) {
  118. err = -ENOMEM;
  119. goto exit_release;
  120. }
  121. } else {
  122. if (indirect[idx] > 0 ||
  123. (indirect[idx] == -1 && indirect[0] > 0))
  124. iosize = SJA1000_IOSIZE_INDIRECT;
  125. if (!request_region(port[idx], iosize, DRV_NAME)) {
  126. err = -EBUSY;
  127. goto exit;
  128. }
  129. }
  130. dev = alloc_sja1000dev(0);
  131. if (!dev) {
  132. err = -ENOMEM;
  133. goto exit_unmap;
  134. }
  135. priv = netdev_priv(dev);
  136. dev->irq = irq[idx];
  137. priv->irq_flags = IRQF_SHARED;
  138. if (mem[idx]) {
  139. priv->reg_base = base;
  140. dev->base_addr = mem[idx];
  141. priv->read_reg = sja1000_isa_mem_read_reg;
  142. priv->write_reg = sja1000_isa_mem_write_reg;
  143. } else {
  144. priv->reg_base = (void __iomem *)port[idx];
  145. dev->base_addr = port[idx];
  146. if (iosize == SJA1000_IOSIZE_INDIRECT) {
  147. priv->read_reg = sja1000_isa_port_read_reg_indirect;
  148. priv->write_reg = sja1000_isa_port_write_reg_indirect;
  149. spin_lock_init(&indirect_lock[idx]);
  150. } else {
  151. priv->read_reg = sja1000_isa_port_read_reg;
  152. priv->write_reg = sja1000_isa_port_write_reg;
  153. }
  154. }
  155. if (clk[idx])
  156. priv->can.clock.freq = clk[idx] / 2;
  157. else if (clk[0])
  158. priv->can.clock.freq = clk[0] / 2;
  159. else
  160. priv->can.clock.freq = CLK_DEFAULT / 2;
  161. if (ocr[idx] != 0xff)
  162. priv->ocr = ocr[idx];
  163. else if (ocr[0] != 0xff)
  164. priv->ocr = ocr[0];
  165. else
  166. priv->ocr = OCR_DEFAULT;
  167. if (cdr[idx] != 0xff)
  168. priv->cdr = cdr[idx];
  169. else if (cdr[0] != 0xff)
  170. priv->cdr = cdr[0];
  171. else
  172. priv->cdr = CDR_DEFAULT;
  173. platform_set_drvdata(pdev, dev);
  174. SET_NETDEV_DEV(dev, &pdev->dev);
  175. dev->dev_id = idx;
  176. err = register_sja1000dev(dev);
  177. if (err) {
  178. dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
  179. DRV_NAME, err);
  180. goto exit_unmap;
  181. }
  182. dev_info(&pdev->dev, "%s device registered (reg_base=0x%p, irq=%d)\n",
  183. DRV_NAME, priv->reg_base, dev->irq);
  184. return 0;
  185. exit_unmap:
  186. if (mem[idx])
  187. iounmap(base);
  188. exit_release:
  189. if (mem[idx])
  190. release_mem_region(mem[idx], iosize);
  191. else
  192. release_region(port[idx], iosize);
  193. exit:
  194. return err;
  195. }
  196. static int sja1000_isa_remove(struct platform_device *pdev)
  197. {
  198. struct net_device *dev = platform_get_drvdata(pdev);
  199. struct sja1000_priv *priv = netdev_priv(dev);
  200. int idx = pdev->id;
  201. unregister_sja1000dev(dev);
  202. if (mem[idx]) {
  203. iounmap(priv->reg_base);
  204. release_mem_region(mem[idx], SJA1000_IOSIZE);
  205. } else {
  206. if (priv->read_reg == sja1000_isa_port_read_reg_indirect)
  207. release_region(port[idx], SJA1000_IOSIZE_INDIRECT);
  208. else
  209. release_region(port[idx], SJA1000_IOSIZE);
  210. }
  211. free_sja1000dev(dev);
  212. return 0;
  213. }
  214. static struct platform_driver sja1000_isa_driver = {
  215. .probe = sja1000_isa_probe,
  216. .remove = sja1000_isa_remove,
  217. .driver = {
  218. .name = DRV_NAME,
  219. },
  220. };
  221. static int __init sja1000_isa_init(void)
  222. {
  223. int idx, err;
  224. for (idx = 0; idx < MAXDEV; idx++) {
  225. if ((port[idx] || mem[idx]) && irq[idx]) {
  226. sja1000_isa_devs[idx] =
  227. platform_device_alloc(DRV_NAME, idx);
  228. if (!sja1000_isa_devs[idx]) {
  229. err = -ENOMEM;
  230. goto exit_free_devices;
  231. }
  232. err = platform_device_add(sja1000_isa_devs[idx]);
  233. if (err) {
  234. platform_device_put(sja1000_isa_devs[idx]);
  235. goto exit_free_devices;
  236. }
  237. pr_debug("%s: platform device %d: port=%#lx, mem=%#lx, "
  238. "irq=%d\n",
  239. DRV_NAME, idx, port[idx], mem[idx], irq[idx]);
  240. } else if (idx == 0 || port[idx] || mem[idx]) {
  241. pr_err("%s: insufficient parameters supplied\n",
  242. DRV_NAME);
  243. err = -EINVAL;
  244. goto exit_free_devices;
  245. }
  246. }
  247. err = platform_driver_register(&sja1000_isa_driver);
  248. if (err)
  249. goto exit_free_devices;
  250. pr_info("Legacy %s driver for max. %d devices registered\n",
  251. DRV_NAME, MAXDEV);
  252. return 0;
  253. exit_free_devices:
  254. while (--idx >= 0) {
  255. if (sja1000_isa_devs[idx])
  256. platform_device_unregister(sja1000_isa_devs[idx]);
  257. }
  258. return err;
  259. }
  260. static void __exit sja1000_isa_exit(void)
  261. {
  262. int idx;
  263. platform_driver_unregister(&sja1000_isa_driver);
  264. for (idx = 0; idx < MAXDEV; idx++) {
  265. if (sja1000_isa_devs[idx])
  266. platform_device_unregister(sja1000_isa_devs[idx]);
  267. }
  268. }
  269. module_init(sja1000_isa_init);
  270. module_exit(sja1000_isa_exit);