eth_v10.c 48 KB

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  1. /*
  2. * e100net.c: A network driver for the ETRAX 100LX network controller.
  3. *
  4. * Copyright (c) 1998-2002 Axis Communications AB.
  5. *
  6. * The outline of this driver comes from skeleton.c.
  7. *
  8. */
  9. #include <linux/module.h>
  10. #include <linux/kernel.h>
  11. #include <linux/delay.h>
  12. #include <linux/types.h>
  13. #include <linux/fcntl.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/ptrace.h>
  16. #include <linux/ioport.h>
  17. #include <linux/in.h>
  18. #include <linux/string.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/errno.h>
  21. #include <linux/init.h>
  22. #include <linux/bitops.h>
  23. #include <linux/if.h>
  24. #include <linux/mii.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <linux/skbuff.h>
  28. #include <linux/ethtool.h>
  29. #include <arch/svinto.h>/* DMA and register descriptions */
  30. #include <asm/io.h> /* CRIS_LED_* I/O functions */
  31. #include <asm/irq.h>
  32. #include <asm/dma.h>
  33. #include <asm/ethernet.h>
  34. #include <asm/cache.h>
  35. #include <arch/io_interface_mux.h>
  36. //#define ETHDEBUG
  37. #define D(x)
  38. /*
  39. * The name of the card. Is used for messages and in the requests for
  40. * io regions, irqs and dma channels
  41. */
  42. static const char* cardname = "ETRAX 100LX built-in ethernet controller";
  43. /* A default ethernet address. Highlevel SW will set the real one later */
  44. static struct sockaddr default_mac = {
  45. 0,
  46. { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 }
  47. };
  48. /* Information that need to be kept for each board. */
  49. struct net_local {
  50. struct mii_if_info mii_if;
  51. /* Tx control lock. This protects the transmit buffer ring
  52. * state along with the "tx full" state of the driver. This
  53. * means all netif_queue flow control actions are protected
  54. * by this lock as well.
  55. */
  56. spinlock_t lock;
  57. spinlock_t led_lock; /* Protect LED state */
  58. spinlock_t transceiver_lock; /* Protect transceiver state. */
  59. };
  60. typedef struct etrax_eth_descr
  61. {
  62. etrax_dma_descr descr;
  63. struct sk_buff* skb;
  64. } etrax_eth_descr;
  65. /* Some transceivers requires special handling */
  66. struct transceiver_ops
  67. {
  68. unsigned int oui;
  69. void (*check_speed)(struct net_device* dev);
  70. void (*check_duplex)(struct net_device* dev);
  71. };
  72. /* Duplex settings */
  73. enum duplex
  74. {
  75. half,
  76. full,
  77. autoneg
  78. };
  79. /* Dma descriptors etc. */
  80. #define MAX_MEDIA_DATA_SIZE 1522
  81. #define MIN_PACKET_LEN 46
  82. #define ETHER_HEAD_LEN 14
  83. /*
  84. ** MDIO constants.
  85. */
  86. #define MDIO_START 0x1
  87. #define MDIO_READ 0x2
  88. #define MDIO_WRITE 0x1
  89. #define MDIO_PREAMBLE 0xfffffffful
  90. /* Broadcom specific */
  91. #define MDIO_AUX_CTRL_STATUS_REG 0x18
  92. #define MDIO_BC_FULL_DUPLEX_IND 0x1
  93. #define MDIO_BC_SPEED 0x2
  94. /* TDK specific */
  95. #define MDIO_TDK_DIAGNOSTIC_REG 18
  96. #define MDIO_TDK_DIAGNOSTIC_RATE 0x400
  97. #define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
  98. /*Intel LXT972A specific*/
  99. #define MDIO_INT_STATUS_REG_2 0x0011
  100. #define MDIO_INT_FULL_DUPLEX_IND (1 << 9)
  101. #define MDIO_INT_SPEED (1 << 14)
  102. /* Network flash constants */
  103. #define NET_FLASH_TIME (HZ/50) /* 20 ms */
  104. #define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
  105. #define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */
  106. #define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 s */
  107. #define NO_NETWORK_ACTIVITY 0
  108. #define NETWORK_ACTIVITY 1
  109. #define NBR_OF_RX_DESC 32
  110. #define NBR_OF_TX_DESC 16
  111. /* Large packets are sent directly to upper layers while small packets are */
  112. /* copied (to reduce memory waste). The following constant decides the breakpoint */
  113. #define RX_COPYBREAK 256
  114. /* Due to a chip bug we need to flush the cache when descriptors are returned */
  115. /* to the DMA. To decrease performance impact we return descriptors in chunks. */
  116. /* The following constant determines the number of descriptors to return. */
  117. #define RX_QUEUE_THRESHOLD NBR_OF_RX_DESC/2
  118. #define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
  119. /* Define some macros to access ETRAX 100 registers */
  120. #define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
  121. IO_FIELD_(reg##_, field##_, val)
  122. #define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
  123. IO_STATE_(reg##_, field##_, _##val)
  124. static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to
  125. to be processed */
  126. static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */
  127. static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));
  128. static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */
  129. static etrax_eth_descr* myLastTxDesc; /* End of send queue */
  130. static etrax_eth_descr* myNextTxDesc; /* Next descriptor to use */
  131. static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));
  132. static unsigned int network_rec_config_shadow = 0;
  133. static unsigned int network_tr_ctrl_shadow = 0;
  134. /* Network speed indication. */
  135. static DEFINE_TIMER(speed_timer, NULL, 0, 0);
  136. static DEFINE_TIMER(clear_led_timer, NULL, 0, 0);
  137. static int current_speed; /* Speed read from transceiver */
  138. static int current_speed_selection; /* Speed selected by user */
  139. static unsigned long led_next_time;
  140. static int led_active;
  141. static int rx_queue_len;
  142. /* Duplex */
  143. static DEFINE_TIMER(duplex_timer, NULL, 0, 0);
  144. static int full_duplex;
  145. static enum duplex current_duplex;
  146. /* Index to functions, as function prototypes. */
  147. static int etrax_ethernet_init(void);
  148. static int e100_open(struct net_device *dev);
  149. static int e100_set_mac_address(struct net_device *dev, void *addr);
  150. static int e100_send_packet(struct sk_buff *skb, struct net_device *dev);
  151. static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id);
  152. static irqreturn_t e100nw_interrupt(int irq, void *dev_id);
  153. static void e100_rx(struct net_device *dev);
  154. static int e100_close(struct net_device *dev);
  155. static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
  156. static int e100_set_config(struct net_device* dev, struct ifmap* map);
  157. static void e100_tx_timeout(struct net_device *dev);
  158. static struct net_device_stats *e100_get_stats(struct net_device *dev);
  159. static void set_multicast_list(struct net_device *dev);
  160. static void e100_hardware_send_packet(struct net_local* np, char *buf, int length);
  161. static void update_rx_stats(struct net_device_stats *);
  162. static void update_tx_stats(struct net_device_stats *);
  163. static int e100_probe_transceiver(struct net_device* dev);
  164. static void e100_check_speed(unsigned long priv);
  165. static void e100_set_speed(struct net_device* dev, unsigned long speed);
  166. static void e100_check_duplex(unsigned long priv);
  167. static void e100_set_duplex(struct net_device* dev, enum duplex);
  168. static void e100_negotiate(struct net_device* dev);
  169. static int e100_get_mdio_reg(struct net_device *dev, int phy_id, int location);
  170. static void e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value);
  171. static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd);
  172. static void e100_send_mdio_bit(unsigned char bit);
  173. static unsigned char e100_receive_mdio_bit(void);
  174. static void e100_reset_transceiver(struct net_device* net);
  175. static void e100_clear_network_leds(unsigned long dummy);
  176. static void e100_set_network_leds(int active);
  177. static const struct ethtool_ops e100_ethtool_ops;
  178. #if defined(CONFIG_ETRAX_NO_PHY)
  179. static void dummy_check_speed(struct net_device* dev);
  180. static void dummy_check_duplex(struct net_device* dev);
  181. #else
  182. static void broadcom_check_speed(struct net_device* dev);
  183. static void broadcom_check_duplex(struct net_device* dev);
  184. static void tdk_check_speed(struct net_device* dev);
  185. static void tdk_check_duplex(struct net_device* dev);
  186. static void intel_check_speed(struct net_device* dev);
  187. static void intel_check_duplex(struct net_device* dev);
  188. static void generic_check_speed(struct net_device* dev);
  189. static void generic_check_duplex(struct net_device* dev);
  190. #endif
  191. #ifdef CONFIG_NET_POLL_CONTROLLER
  192. static void e100_netpoll(struct net_device* dev);
  193. #endif
  194. static int autoneg_normal = 1;
  195. struct transceiver_ops transceivers[] =
  196. {
  197. #if defined(CONFIG_ETRAX_NO_PHY)
  198. {0x0000, dummy_check_speed, dummy_check_duplex} /* Dummy */
  199. #else
  200. {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */
  201. {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */
  202. {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */
  203. {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
  204. {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */
  205. #endif
  206. };
  207. struct transceiver_ops* transceiver = &transceivers[0];
  208. static const struct net_device_ops e100_netdev_ops = {
  209. .ndo_open = e100_open,
  210. .ndo_stop = e100_close,
  211. .ndo_start_xmit = e100_send_packet,
  212. .ndo_tx_timeout = e100_tx_timeout,
  213. .ndo_get_stats = e100_get_stats,
  214. .ndo_set_rx_mode = set_multicast_list,
  215. .ndo_do_ioctl = e100_ioctl,
  216. .ndo_set_mac_address = e100_set_mac_address,
  217. .ndo_validate_addr = eth_validate_addr,
  218. .ndo_change_mtu = eth_change_mtu,
  219. .ndo_set_config = e100_set_config,
  220. #ifdef CONFIG_NET_POLL_CONTROLLER
  221. .ndo_poll_controller = e100_netpoll,
  222. #endif
  223. };
  224. #define tx_done(dev) (*R_DMA_CH0_CMD == 0)
  225. /*
  226. * Check for a network adaptor of this type, and return '0' if one exists.
  227. * If dev->base_addr == 0, probe all likely locations.
  228. * If dev->base_addr == 1, always return failure.
  229. * If dev->base_addr == 2, allocate space for the device and return success
  230. * (detachable devices only).
  231. */
  232. static int __init
  233. etrax_ethernet_init(void)
  234. {
  235. struct net_device *dev;
  236. struct net_local* np;
  237. int i, err;
  238. printk(KERN_INFO
  239. "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 1998-2007 Axis Communications AB\n");
  240. if (cris_request_io_interface(if_eth, cardname)) {
  241. printk(KERN_CRIT "etrax_ethernet_init failed to get IO interface\n");
  242. return -EBUSY;
  243. }
  244. dev = alloc_etherdev(sizeof(struct net_local));
  245. if (!dev)
  246. return -ENOMEM;
  247. np = netdev_priv(dev);
  248. /* we do our own locking */
  249. dev->features |= NETIF_F_LLTX;
  250. dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
  251. /* now setup our etrax specific stuff */
  252. dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */
  253. dev->dma = NETWORK_RX_DMA_NBR;
  254. /* fill in our handlers so the network layer can talk to us in the future */
  255. dev->ethtool_ops = &e100_ethtool_ops;
  256. dev->netdev_ops = &e100_netdev_ops;
  257. spin_lock_init(&np->lock);
  258. spin_lock_init(&np->led_lock);
  259. spin_lock_init(&np->transceiver_lock);
  260. /* Initialise the list of Etrax DMA-descriptors */
  261. /* Initialise receive descriptors */
  262. for (i = 0; i < NBR_OF_RX_DESC; i++) {
  263. /* Allocate two extra cachelines to make sure that buffer used
  264. * by DMA does not share cacheline with any other data (to
  265. * avoid cache bug)
  266. */
  267. RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
  268. if (!RxDescList[i].skb)
  269. return -ENOMEM;
  270. RxDescList[i].descr.ctrl = 0;
  271. RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE;
  272. RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]);
  273. RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data));
  274. RxDescList[i].descr.status = 0;
  275. RxDescList[i].descr.hw_len = 0;
  276. prepare_rx_descriptor(&RxDescList[i].descr);
  277. }
  278. RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl = d_eol;
  279. RxDescList[NBR_OF_RX_DESC - 1].descr.next = virt_to_phys(&RxDescList[0]);
  280. rx_queue_len = 0;
  281. /* Initialize transmit descriptors */
  282. for (i = 0; i < NBR_OF_TX_DESC; i++) {
  283. TxDescList[i].descr.ctrl = 0;
  284. TxDescList[i].descr.sw_len = 0;
  285. TxDescList[i].descr.next = virt_to_phys(&TxDescList[i + 1].descr);
  286. TxDescList[i].descr.buf = 0;
  287. TxDescList[i].descr.status = 0;
  288. TxDescList[i].descr.hw_len = 0;
  289. TxDescList[i].skb = 0;
  290. }
  291. TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl = d_eol;
  292. TxDescList[NBR_OF_TX_DESC - 1].descr.next = virt_to_phys(&TxDescList[0].descr);
  293. /* Initialise initial pointers */
  294. myNextRxDesc = &RxDescList[0];
  295. myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
  296. myFirstTxDesc = &TxDescList[0];
  297. myNextTxDesc = &TxDescList[0];
  298. myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1];
  299. /* Register device */
  300. err = register_netdev(dev);
  301. if (err) {
  302. free_netdev(dev);
  303. return err;
  304. }
  305. /* set the default MAC address */
  306. e100_set_mac_address(dev, &default_mac);
  307. /* Initialize speed indicator stuff. */
  308. current_speed = 10;
  309. current_speed_selection = 0; /* Auto */
  310. speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
  311. speed_timer.data = (unsigned long)dev;
  312. speed_timer.function = e100_check_speed;
  313. clear_led_timer.function = e100_clear_network_leds;
  314. clear_led_timer.data = (unsigned long)dev;
  315. full_duplex = 0;
  316. current_duplex = autoneg;
  317. duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
  318. duplex_timer.data = (unsigned long)dev;
  319. duplex_timer.function = e100_check_duplex;
  320. /* Initialize mii interface */
  321. np->mii_if.phy_id_mask = 0x1f;
  322. np->mii_if.reg_num_mask = 0x1f;
  323. np->mii_if.dev = dev;
  324. np->mii_if.mdio_read = e100_get_mdio_reg;
  325. np->mii_if.mdio_write = e100_set_mdio_reg;
  326. /* Initialize group address registers to make sure that no */
  327. /* unwanted addresses are matched */
  328. *R_NETWORK_GA_0 = 0x00000000;
  329. *R_NETWORK_GA_1 = 0x00000000;
  330. /* Initialize next time the led can flash */
  331. led_next_time = jiffies;
  332. return 0;
  333. }
  334. /* set MAC address of the interface. called from the core after a
  335. * SIOCSIFADDR ioctl, and from the bootup above.
  336. */
  337. static int
  338. e100_set_mac_address(struct net_device *dev, void *p)
  339. {
  340. struct net_local *np = netdev_priv(dev);
  341. struct sockaddr *addr = p;
  342. spin_lock(&np->lock); /* preemption protection */
  343. /* remember it */
  344. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  345. /* Write it to the hardware.
  346. * Note the way the address is wrapped:
  347. * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
  348. * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8);
  349. */
  350. *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
  351. (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
  352. *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
  353. *R_NETWORK_SA_2 = 0;
  354. /* show it in the log as well */
  355. printk(KERN_INFO "%s: changed MAC to %pM\n", dev->name, dev->dev_addr);
  356. spin_unlock(&np->lock);
  357. return 0;
  358. }
  359. /*
  360. * Open/initialize the board. This is called (in the current kernel)
  361. * sometime after booting when the 'ifconfig' program is run.
  362. *
  363. * This routine should set everything up anew at each open, even
  364. * registers that "should" only need to be set once at boot, so that
  365. * there is non-reboot way to recover if something goes wrong.
  366. */
  367. static int
  368. e100_open(struct net_device *dev)
  369. {
  370. unsigned long flags;
  371. /* enable the MDIO output pin */
  372. *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable);
  373. *R_IRQ_MASK0_CLR =
  374. IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
  375. IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
  376. IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
  377. /* clear dma0 and 1 eop and descr irq masks */
  378. *R_IRQ_MASK2_CLR =
  379. IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
  380. IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
  381. IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
  382. IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
  383. /* Reset and wait for the DMA channels */
  384. RESET_DMA(NETWORK_TX_DMA_NBR);
  385. RESET_DMA(NETWORK_RX_DMA_NBR);
  386. WAIT_DMA(NETWORK_TX_DMA_NBR);
  387. WAIT_DMA(NETWORK_RX_DMA_NBR);
  388. /* Initialise the etrax network controller */
  389. /* allocate the irq corresponding to the receiving DMA */
  390. if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt, 0, cardname,
  391. (void *)dev)) {
  392. goto grace_exit0;
  393. }
  394. /* allocate the irq corresponding to the transmitting DMA */
  395. if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,
  396. cardname, (void *)dev)) {
  397. goto grace_exit1;
  398. }
  399. /* allocate the irq corresponding to the network errors etc */
  400. if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
  401. cardname, (void *)dev)) {
  402. goto grace_exit2;
  403. }
  404. /*
  405. * Always allocate the DMA channels after the IRQ,
  406. * and clean up on failure.
  407. */
  408. if (cris_request_dma(NETWORK_TX_DMA_NBR,
  409. cardname,
  410. DMA_VERBOSE_ON_ERROR,
  411. dma_eth)) {
  412. goto grace_exit3;
  413. }
  414. if (cris_request_dma(NETWORK_RX_DMA_NBR,
  415. cardname,
  416. DMA_VERBOSE_ON_ERROR,
  417. dma_eth)) {
  418. goto grace_exit4;
  419. }
  420. /* give the HW an idea of what MAC address we want */
  421. *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
  422. (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
  423. *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
  424. *R_NETWORK_SA_2 = 0;
  425. #if 0
  426. /* use promiscuous mode for testing */
  427. *R_NETWORK_GA_0 = 0xffffffff;
  428. *R_NETWORK_GA_1 = 0xffffffff;
  429. *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */
  430. #else
  431. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, max_size, size1522);
  432. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);
  433. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);
  434. SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
  435. *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
  436. #endif
  437. *R_NETWORK_GEN_CONFIG =
  438. IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
  439. IO_STATE(R_NETWORK_GEN_CONFIG, enable, on);
  440. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
  441. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none);
  442. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont);
  443. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable);
  444. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable);
  445. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable);
  446. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);
  447. *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
  448. local_irq_save(flags);
  449. /* enable the irq's for ethernet DMA */
  450. *R_IRQ_MASK2_SET =
  451. IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
  452. IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
  453. *R_IRQ_MASK0_SET =
  454. IO_STATE(R_IRQ_MASK0_SET, overrun, set) |
  455. IO_STATE(R_IRQ_MASK0_SET, underrun, set) |
  456. IO_STATE(R_IRQ_MASK0_SET, excessive_col, set);
  457. /* make sure the irqs are cleared */
  458. *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
  459. *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
  460. /* make sure the rec and transmit error counters are cleared */
  461. (void)*R_REC_COUNTERS; /* dummy read */
  462. (void)*R_TR_COUNTERS; /* dummy read */
  463. /* start the receiving DMA channel so we can receive packets from now on */
  464. *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc);
  465. *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);
  466. /* Set up transmit DMA channel so it can be restarted later */
  467. *R_DMA_CH0_FIRST = 0;
  468. *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
  469. netif_start_queue(dev);
  470. local_irq_restore(flags);
  471. /* Probe for transceiver */
  472. if (e100_probe_transceiver(dev))
  473. goto grace_exit5;
  474. /* Start duplex/speed timers */
  475. add_timer(&speed_timer);
  476. add_timer(&duplex_timer);
  477. /* We are now ready to accept transmit requeusts from
  478. * the queueing layer of the networking.
  479. */
  480. netif_carrier_on(dev);
  481. return 0;
  482. grace_exit5:
  483. cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
  484. grace_exit4:
  485. cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
  486. grace_exit3:
  487. free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
  488. grace_exit2:
  489. free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
  490. grace_exit1:
  491. free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
  492. grace_exit0:
  493. return -EAGAIN;
  494. }
  495. #if defined(CONFIG_ETRAX_NO_PHY)
  496. static void
  497. dummy_check_speed(struct net_device* dev)
  498. {
  499. current_speed = 100;
  500. }
  501. #else
  502. static void
  503. generic_check_speed(struct net_device* dev)
  504. {
  505. unsigned long data;
  506. struct net_local *np = netdev_priv(dev);
  507. data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
  508. if ((data & ADVERTISE_100FULL) ||
  509. (data & ADVERTISE_100HALF))
  510. current_speed = 100;
  511. else
  512. current_speed = 10;
  513. }
  514. static void
  515. tdk_check_speed(struct net_device* dev)
  516. {
  517. unsigned long data;
  518. struct net_local *np = netdev_priv(dev);
  519. data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  520. MDIO_TDK_DIAGNOSTIC_REG);
  521. current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);
  522. }
  523. static void
  524. broadcom_check_speed(struct net_device* dev)
  525. {
  526. unsigned long data;
  527. struct net_local *np = netdev_priv(dev);
  528. data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  529. MDIO_AUX_CTRL_STATUS_REG);
  530. current_speed = (data & MDIO_BC_SPEED ? 100 : 10);
  531. }
  532. static void
  533. intel_check_speed(struct net_device* dev)
  534. {
  535. unsigned long data;
  536. struct net_local *np = netdev_priv(dev);
  537. data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  538. MDIO_INT_STATUS_REG_2);
  539. current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
  540. }
  541. #endif
  542. static void
  543. e100_check_speed(unsigned long priv)
  544. {
  545. struct net_device* dev = (struct net_device*)priv;
  546. struct net_local *np = netdev_priv(dev);
  547. static int led_initiated = 0;
  548. unsigned long data;
  549. int old_speed = current_speed;
  550. spin_lock(&np->transceiver_lock);
  551. data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR);
  552. if (!(data & BMSR_LSTATUS)) {
  553. current_speed = 0;
  554. } else {
  555. transceiver->check_speed(dev);
  556. }
  557. spin_lock(&np->led_lock);
  558. if ((old_speed != current_speed) || !led_initiated) {
  559. led_initiated = 1;
  560. e100_set_network_leds(NO_NETWORK_ACTIVITY);
  561. if (current_speed)
  562. netif_carrier_on(dev);
  563. else
  564. netif_carrier_off(dev);
  565. }
  566. spin_unlock(&np->led_lock);
  567. /* Reinitialize the timer. */
  568. speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
  569. add_timer(&speed_timer);
  570. spin_unlock(&np->transceiver_lock);
  571. }
  572. static void
  573. e100_negotiate(struct net_device* dev)
  574. {
  575. struct net_local *np = netdev_priv(dev);
  576. unsigned short data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  577. MII_ADVERTISE);
  578. /* Discard old speed and duplex settings */
  579. data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL |
  580. ADVERTISE_10HALF | ADVERTISE_10FULL);
  581. switch (current_speed_selection) {
  582. case 10:
  583. if (current_duplex == full)
  584. data |= ADVERTISE_10FULL;
  585. else if (current_duplex == half)
  586. data |= ADVERTISE_10HALF;
  587. else
  588. data |= ADVERTISE_10HALF | ADVERTISE_10FULL;
  589. break;
  590. case 100:
  591. if (current_duplex == full)
  592. data |= ADVERTISE_100FULL;
  593. else if (current_duplex == half)
  594. data |= ADVERTISE_100HALF;
  595. else
  596. data |= ADVERTISE_100HALF | ADVERTISE_100FULL;
  597. break;
  598. case 0: /* Auto */
  599. if (current_duplex == full)
  600. data |= ADVERTISE_100FULL | ADVERTISE_10FULL;
  601. else if (current_duplex == half)
  602. data |= ADVERTISE_100HALF | ADVERTISE_10HALF;
  603. else
  604. data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
  605. ADVERTISE_100HALF | ADVERTISE_100FULL;
  606. break;
  607. default: /* assume autoneg speed and duplex */
  608. data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
  609. ADVERTISE_100HALF | ADVERTISE_100FULL;
  610. break;
  611. }
  612. e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE, data);
  613. data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
  614. if (autoneg_normal) {
  615. /* Renegotiate with link partner */
  616. data |= BMCR_ANENABLE | BMCR_ANRESTART;
  617. } else {
  618. /* Don't negotiate speed or duplex */
  619. data &= ~(BMCR_ANENABLE | BMCR_ANRESTART);
  620. /* Set speed and duplex static */
  621. if (current_speed_selection == 10)
  622. data &= ~BMCR_SPEED100;
  623. else
  624. data |= BMCR_SPEED100;
  625. if (current_duplex != full)
  626. data &= ~BMCR_FULLDPLX;
  627. else
  628. data |= BMCR_FULLDPLX;
  629. }
  630. e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR, data);
  631. }
  632. static void
  633. e100_set_speed(struct net_device* dev, unsigned long speed)
  634. {
  635. struct net_local *np = netdev_priv(dev);
  636. spin_lock(&np->transceiver_lock);
  637. if (speed != current_speed_selection) {
  638. current_speed_selection = speed;
  639. e100_negotiate(dev);
  640. }
  641. spin_unlock(&np->transceiver_lock);
  642. }
  643. static void
  644. e100_check_duplex(unsigned long priv)
  645. {
  646. struct net_device *dev = (struct net_device *)priv;
  647. struct net_local *np = netdev_priv(dev);
  648. int old_duplex;
  649. spin_lock(&np->transceiver_lock);
  650. old_duplex = full_duplex;
  651. transceiver->check_duplex(dev);
  652. if (old_duplex != full_duplex) {
  653. /* Duplex changed */
  654. SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
  655. *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
  656. }
  657. /* Reinitialize the timer. */
  658. duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
  659. add_timer(&duplex_timer);
  660. np->mii_if.full_duplex = full_duplex;
  661. spin_unlock(&np->transceiver_lock);
  662. }
  663. #if defined(CONFIG_ETRAX_NO_PHY)
  664. static void
  665. dummy_check_duplex(struct net_device* dev)
  666. {
  667. full_duplex = 1;
  668. }
  669. #else
  670. static void
  671. generic_check_duplex(struct net_device* dev)
  672. {
  673. unsigned long data;
  674. struct net_local *np = netdev_priv(dev);
  675. data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
  676. if ((data & ADVERTISE_10FULL) ||
  677. (data & ADVERTISE_100FULL))
  678. full_duplex = 1;
  679. else
  680. full_duplex = 0;
  681. }
  682. static void
  683. tdk_check_duplex(struct net_device* dev)
  684. {
  685. unsigned long data;
  686. struct net_local *np = netdev_priv(dev);
  687. data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  688. MDIO_TDK_DIAGNOSTIC_REG);
  689. full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
  690. }
  691. static void
  692. broadcom_check_duplex(struct net_device* dev)
  693. {
  694. unsigned long data;
  695. struct net_local *np = netdev_priv(dev);
  696. data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  697. MDIO_AUX_CTRL_STATUS_REG);
  698. full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
  699. }
  700. static void
  701. intel_check_duplex(struct net_device* dev)
  702. {
  703. unsigned long data;
  704. struct net_local *np = netdev_priv(dev);
  705. data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  706. MDIO_INT_STATUS_REG_2);
  707. full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
  708. }
  709. #endif
  710. static void
  711. e100_set_duplex(struct net_device* dev, enum duplex new_duplex)
  712. {
  713. struct net_local *np = netdev_priv(dev);
  714. spin_lock(&np->transceiver_lock);
  715. if (new_duplex != current_duplex) {
  716. current_duplex = new_duplex;
  717. e100_negotiate(dev);
  718. }
  719. spin_unlock(&np->transceiver_lock);
  720. }
  721. static int
  722. e100_probe_transceiver(struct net_device* dev)
  723. {
  724. int ret = 0;
  725. #if !defined(CONFIG_ETRAX_NO_PHY)
  726. unsigned int phyid_high;
  727. unsigned int phyid_low;
  728. unsigned int oui;
  729. struct transceiver_ops* ops = NULL;
  730. struct net_local *np = netdev_priv(dev);
  731. spin_lock(&np->transceiver_lock);
  732. /* Probe MDIO physical address */
  733. for (np->mii_if.phy_id = 0; np->mii_if.phy_id <= 31;
  734. np->mii_if.phy_id++) {
  735. if (e100_get_mdio_reg(dev,
  736. np->mii_if.phy_id, MII_BMSR) != 0xffff)
  737. break;
  738. }
  739. if (np->mii_if.phy_id == 32) {
  740. ret = -ENODEV;
  741. goto out;
  742. }
  743. /* Get manufacturer */
  744. phyid_high = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID1);
  745. phyid_low = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID2);
  746. oui = (phyid_high << 6) | (phyid_low >> 10);
  747. for (ops = &transceivers[0]; ops->oui; ops++) {
  748. if (ops->oui == oui)
  749. break;
  750. }
  751. transceiver = ops;
  752. out:
  753. spin_unlock(&np->transceiver_lock);
  754. #endif
  755. return ret;
  756. }
  757. static int
  758. e100_get_mdio_reg(struct net_device *dev, int phy_id, int location)
  759. {
  760. unsigned short cmd; /* Data to be sent on MDIO port */
  761. int data; /* Data read from MDIO */
  762. int bitCounter;
  763. /* Start of frame, OP Code, Physical Address, Register Address */
  764. cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (phy_id << 7) |
  765. (location << 2);
  766. e100_send_mdio_cmd(cmd, 0);
  767. data = 0;
  768. /* Data... */
  769. for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
  770. data |= (e100_receive_mdio_bit() << bitCounter);
  771. }
  772. return data;
  773. }
  774. static void
  775. e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value)
  776. {
  777. int bitCounter;
  778. unsigned short cmd;
  779. cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (phy_id << 7) |
  780. (location << 2);
  781. e100_send_mdio_cmd(cmd, 1);
  782. /* Data... */
  783. for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
  784. e100_send_mdio_bit(GET_BIT(bitCounter, value));
  785. }
  786. }
  787. static void
  788. e100_send_mdio_cmd(unsigned short cmd, int write_cmd)
  789. {
  790. int bitCounter;
  791. unsigned char data = 0x2;
  792. /* Preamble */
  793. for (bitCounter = 31; bitCounter>= 0; bitCounter--)
  794. e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE));
  795. for (bitCounter = 15; bitCounter >= 2; bitCounter--)
  796. e100_send_mdio_bit(GET_BIT(bitCounter, cmd));
  797. /* Turnaround */
  798. for (bitCounter = 1; bitCounter >= 0 ; bitCounter--)
  799. if (write_cmd)
  800. e100_send_mdio_bit(GET_BIT(bitCounter, data));
  801. else
  802. e100_receive_mdio_bit();
  803. }
  804. static void
  805. e100_send_mdio_bit(unsigned char bit)
  806. {
  807. *R_NETWORK_MGM_CTRL =
  808. IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
  809. IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
  810. udelay(1);
  811. *R_NETWORK_MGM_CTRL =
  812. IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
  813. IO_MASK(R_NETWORK_MGM_CTRL, mdck) |
  814. IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
  815. udelay(1);
  816. }
  817. static unsigned char
  818. e100_receive_mdio_bit(void)
  819. {
  820. unsigned char bit;
  821. *R_NETWORK_MGM_CTRL = 0;
  822. bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
  823. udelay(1);
  824. *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck);
  825. udelay(1);
  826. return bit;
  827. }
  828. static void
  829. e100_reset_transceiver(struct net_device* dev)
  830. {
  831. struct net_local *np = netdev_priv(dev);
  832. unsigned short cmd;
  833. unsigned short data;
  834. int bitCounter;
  835. data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
  836. cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (np->mii_if.phy_id << 7) | (MII_BMCR << 2);
  837. e100_send_mdio_cmd(cmd, 1);
  838. data |= 0x8000;
  839. for (bitCounter = 15; bitCounter >= 0 ; bitCounter--) {
  840. e100_send_mdio_bit(GET_BIT(bitCounter, data));
  841. }
  842. }
  843. /* Called by upper layers if they decide it took too long to complete
  844. * sending a packet - we need to reset and stuff.
  845. */
  846. static void
  847. e100_tx_timeout(struct net_device *dev)
  848. {
  849. struct net_local *np = netdev_priv(dev);
  850. unsigned long flags;
  851. spin_lock_irqsave(&np->lock, flags);
  852. printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name,
  853. tx_done(dev) ? "IRQ problem" : "network cable problem");
  854. /* remember we got an error */
  855. dev->stats.tx_errors++;
  856. /* reset the TX DMA in case it has hung on something */
  857. RESET_DMA(NETWORK_TX_DMA_NBR);
  858. WAIT_DMA(NETWORK_TX_DMA_NBR);
  859. /* Reset the transceiver. */
  860. e100_reset_transceiver(dev);
  861. /* and get rid of the packets that never got an interrupt */
  862. while (myFirstTxDesc != myNextTxDesc) {
  863. dev_kfree_skb(myFirstTxDesc->skb);
  864. myFirstTxDesc->skb = 0;
  865. myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
  866. }
  867. /* Set up transmit DMA channel so it can be restarted later */
  868. *R_DMA_CH0_FIRST = 0;
  869. *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
  870. /* tell the upper layers we're ok again */
  871. netif_wake_queue(dev);
  872. spin_unlock_irqrestore(&np->lock, flags);
  873. }
  874. /* This will only be invoked if the driver is _not_ in XOFF state.
  875. * What this means is that we need not check it, and that this
  876. * invariant will hold if we make sure that the netif_*_queue()
  877. * calls are done at the proper times.
  878. */
  879. static int
  880. e100_send_packet(struct sk_buff *skb, struct net_device *dev)
  881. {
  882. struct net_local *np = netdev_priv(dev);
  883. unsigned char *buf = skb->data;
  884. unsigned long flags;
  885. #ifdef ETHDEBUG
  886. printk("send packet len %d\n", length);
  887. #endif
  888. spin_lock_irqsave(&np->lock, flags); /* protect from tx_interrupt and ourself */
  889. myNextTxDesc->skb = skb;
  890. dev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
  891. e100_hardware_send_packet(np, buf, skb->len);
  892. myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next);
  893. /* Stop queue if full */
  894. if (myNextTxDesc == myFirstTxDesc) {
  895. netif_stop_queue(dev);
  896. }
  897. spin_unlock_irqrestore(&np->lock, flags);
  898. return NETDEV_TX_OK;
  899. }
  900. /*
  901. * The typical workload of the driver:
  902. * Handle the network interface interrupts.
  903. */
  904. static irqreturn_t
  905. e100rxtx_interrupt(int irq, void *dev_id)
  906. {
  907. struct net_device *dev = (struct net_device *)dev_id;
  908. unsigned long irqbits;
  909. /*
  910. * Note that both rx and tx interrupts are blocked at this point,
  911. * regardless of which got us here.
  912. */
  913. irqbits = *R_IRQ_MASK2_RD;
  914. /* Handle received packets */
  915. if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
  916. /* acknowledge the eop interrupt */
  917. *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
  918. /* check if one or more complete packets were indeed received */
  919. while ((*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) &&
  920. (myNextRxDesc != myLastRxDesc)) {
  921. /* Take out the buffer and give it to the OS, then
  922. * allocate a new buffer to put a packet in.
  923. */
  924. e100_rx(dev);
  925. dev->stats.rx_packets++;
  926. /* restart/continue on the channel, for safety */
  927. *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
  928. /* clear dma channel 1 eop/descr irq bits */
  929. *R_DMA_CH1_CLR_INTR =
  930. IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) |
  931. IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do);
  932. /* now, we might have gotten another packet
  933. so we have to loop back and check if so */
  934. }
  935. }
  936. /* Report any packets that have been sent */
  937. while (virt_to_phys(myFirstTxDesc) != *R_DMA_CH0_FIRST &&
  938. (netif_queue_stopped(dev) || myFirstTxDesc != myNextTxDesc)) {
  939. dev->stats.tx_bytes += myFirstTxDesc->skb->len;
  940. dev->stats.tx_packets++;
  941. /* dma is ready with the transmission of the data in tx_skb, so now
  942. we can release the skb memory */
  943. dev_kfree_skb_irq(myFirstTxDesc->skb);
  944. myFirstTxDesc->skb = 0;
  945. myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
  946. /* Wake up queue. */
  947. netif_wake_queue(dev);
  948. }
  949. if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
  950. /* acknowledge the eop interrupt. */
  951. *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
  952. }
  953. return IRQ_HANDLED;
  954. }
  955. static irqreturn_t
  956. e100nw_interrupt(int irq, void *dev_id)
  957. {
  958. struct net_device *dev = (struct net_device *)dev_id;
  959. unsigned long irqbits = *R_IRQ_MASK0_RD;
  960. /* check for underrun irq */
  961. if (irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) {
  962. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
  963. *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
  964. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
  965. dev->stats.tx_errors++;
  966. D(printk("ethernet receiver underrun!\n"));
  967. }
  968. /* check for overrun irq */
  969. if (irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) {
  970. update_rx_stats(&dev->stats); /* this will ack the irq */
  971. D(printk("ethernet receiver overrun!\n"));
  972. }
  973. /* check for excessive collision irq */
  974. if (irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) {
  975. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
  976. *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
  977. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
  978. dev->stats.tx_errors++;
  979. D(printk("ethernet excessive collisions!\n"));
  980. }
  981. return IRQ_HANDLED;
  982. }
  983. /* We have a good packet(s), get it/them out of the buffers. */
  984. static void
  985. e100_rx(struct net_device *dev)
  986. {
  987. struct sk_buff *skb;
  988. int length = 0;
  989. struct net_local *np = netdev_priv(dev);
  990. unsigned char *skb_data_ptr;
  991. #ifdef ETHDEBUG
  992. int i;
  993. #endif
  994. etrax_eth_descr *prevRxDesc; /* The descriptor right before myNextRxDesc */
  995. spin_lock(&np->led_lock);
  996. if (!led_active && time_after(jiffies, led_next_time)) {
  997. /* light the network leds depending on the current speed. */
  998. e100_set_network_leds(NETWORK_ACTIVITY);
  999. /* Set the earliest time we may clear the LED */
  1000. led_next_time = jiffies + NET_FLASH_TIME;
  1001. led_active = 1;
  1002. mod_timer(&clear_led_timer, jiffies + HZ/10);
  1003. }
  1004. spin_unlock(&np->led_lock);
  1005. length = myNextRxDesc->descr.hw_len - 4;
  1006. dev->stats.rx_bytes += length;
  1007. #ifdef ETHDEBUG
  1008. printk("Got a packet of length %d:\n", length);
  1009. /* dump the first bytes in the packet */
  1010. skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc->descr.buf);
  1011. for (i = 0; i < 8; i++) {
  1012. printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8,
  1013. skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3],
  1014. skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]);
  1015. skb_data_ptr += 8;
  1016. }
  1017. #endif
  1018. if (length < RX_COPYBREAK) {
  1019. /* Small packet, copy data */
  1020. skb = dev_alloc_skb(length - ETHER_HEAD_LEN);
  1021. if (!skb) {
  1022. dev->stats.rx_errors++;
  1023. printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
  1024. goto update_nextrxdesc;
  1025. }
  1026. skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
  1027. skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */
  1028. #ifdef ETHDEBUG
  1029. printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n",
  1030. skb->head, skb->data, skb_tail_pointer(skb),
  1031. skb_end_pointer(skb));
  1032. printk("copying packet to 0x%x.\n", skb_data_ptr);
  1033. #endif
  1034. memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc->descr.buf), length);
  1035. }
  1036. else {
  1037. /* Large packet, send directly to upper layers and allocate new
  1038. * memory (aligned to cache line boundary to avoid bug).
  1039. * Before sending the skb to upper layers we must make sure
  1040. * that skb->data points to the aligned start of the packet.
  1041. */
  1042. int align;
  1043. struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
  1044. if (!new_skb) {
  1045. dev->stats.rx_errors++;
  1046. printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
  1047. goto update_nextrxdesc;
  1048. }
  1049. skb = myNextRxDesc->skb;
  1050. align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data;
  1051. skb_put(skb, length + align);
  1052. skb_pull(skb, align); /* Remove alignment bytes */
  1053. myNextRxDesc->skb = new_skb;
  1054. myNextRxDesc->descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc->skb->data));
  1055. }
  1056. skb->protocol = eth_type_trans(skb, dev);
  1057. /* Send the packet to the upper layers */
  1058. netif_rx(skb);
  1059. update_nextrxdesc:
  1060. /* Prepare for next packet */
  1061. myNextRxDesc->descr.status = 0;
  1062. prevRxDesc = myNextRxDesc;
  1063. myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next);
  1064. rx_queue_len++;
  1065. /* Check if descriptors should be returned */
  1066. if (rx_queue_len == RX_QUEUE_THRESHOLD) {
  1067. flush_etrax_cache();
  1068. prevRxDesc->descr.ctrl |= d_eol;
  1069. myLastRxDesc->descr.ctrl &= ~d_eol;
  1070. myLastRxDesc = prevRxDesc;
  1071. rx_queue_len = 0;
  1072. }
  1073. }
  1074. /* The inverse routine to net_open(). */
  1075. static int
  1076. e100_close(struct net_device *dev)
  1077. {
  1078. printk(KERN_INFO "Closing %s.\n", dev->name);
  1079. netif_stop_queue(dev);
  1080. *R_IRQ_MASK0_CLR =
  1081. IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
  1082. IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
  1083. IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
  1084. *R_IRQ_MASK2_CLR =
  1085. IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
  1086. IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
  1087. IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
  1088. IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
  1089. /* Stop the receiver and the transmitter */
  1090. RESET_DMA(NETWORK_TX_DMA_NBR);
  1091. RESET_DMA(NETWORK_RX_DMA_NBR);
  1092. /* Flush the Tx and disable Rx here. */
  1093. free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
  1094. free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
  1095. free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
  1096. cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
  1097. cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
  1098. /* Update the statistics here. */
  1099. update_rx_stats(&dev->stats);
  1100. update_tx_stats(&dev->stats);
  1101. /* Stop speed/duplex timers */
  1102. del_timer(&speed_timer);
  1103. del_timer(&duplex_timer);
  1104. return 0;
  1105. }
  1106. static int
  1107. e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1108. {
  1109. struct mii_ioctl_data *data = if_mii(ifr);
  1110. struct net_local *np = netdev_priv(dev);
  1111. int rc = 0;
  1112. int old_autoneg;
  1113. spin_lock(&np->lock); /* Preempt protection */
  1114. switch (cmd) {
  1115. /* The ioctls below should be considered obsolete but are */
  1116. /* still present for compatibility with old scripts/apps */
  1117. case SET_ETH_SPEED_10: /* 10 Mbps */
  1118. e100_set_speed(dev, 10);
  1119. break;
  1120. case SET_ETH_SPEED_100: /* 100 Mbps */
  1121. e100_set_speed(dev, 100);
  1122. break;
  1123. case SET_ETH_SPEED_AUTO: /* Auto-negotiate speed */
  1124. e100_set_speed(dev, 0);
  1125. break;
  1126. case SET_ETH_DUPLEX_HALF: /* Half duplex */
  1127. e100_set_duplex(dev, half);
  1128. break;
  1129. case SET_ETH_DUPLEX_FULL: /* Full duplex */
  1130. e100_set_duplex(dev, full);
  1131. break;
  1132. case SET_ETH_DUPLEX_AUTO: /* Auto-negotiate duplex */
  1133. e100_set_duplex(dev, autoneg);
  1134. break;
  1135. case SET_ETH_AUTONEG:
  1136. old_autoneg = autoneg_normal;
  1137. autoneg_normal = *(int*)data;
  1138. if (autoneg_normal != old_autoneg)
  1139. e100_negotiate(dev);
  1140. break;
  1141. default:
  1142. rc = generic_mii_ioctl(&np->mii_if, if_mii(ifr),
  1143. cmd, NULL);
  1144. break;
  1145. }
  1146. spin_unlock(&np->lock);
  1147. return rc;
  1148. }
  1149. static int e100_get_settings(struct net_device *dev,
  1150. struct ethtool_cmd *cmd)
  1151. {
  1152. struct net_local *np = netdev_priv(dev);
  1153. int err;
  1154. spin_lock_irq(&np->lock);
  1155. err = mii_ethtool_gset(&np->mii_if, cmd);
  1156. spin_unlock_irq(&np->lock);
  1157. /* The PHY may support 1000baseT, but the Etrax100 does not. */
  1158. cmd->supported &= ~(SUPPORTED_1000baseT_Half
  1159. | SUPPORTED_1000baseT_Full);
  1160. return err;
  1161. }
  1162. static int e100_set_settings(struct net_device *dev,
  1163. struct ethtool_cmd *ecmd)
  1164. {
  1165. if (ecmd->autoneg == AUTONEG_ENABLE) {
  1166. e100_set_duplex(dev, autoneg);
  1167. e100_set_speed(dev, 0);
  1168. } else {
  1169. e100_set_duplex(dev, ecmd->duplex == DUPLEX_HALF ? half : full);
  1170. e100_set_speed(dev, ecmd->speed == SPEED_10 ? 10: 100);
  1171. }
  1172. return 0;
  1173. }
  1174. static void e100_get_drvinfo(struct net_device *dev,
  1175. struct ethtool_drvinfo *info)
  1176. {
  1177. strlcpy(info->driver, "ETRAX 100LX", sizeof(info->driver));
  1178. strlcpy(info->version, "$Revision: 1.31 $", sizeof(info->version));
  1179. strlcpy(info->fw_version, "N/A", sizeof(info->fw_version));
  1180. strlcpy(info->bus_info, "N/A", sizeof(info->bus_info));
  1181. }
  1182. static int e100_nway_reset(struct net_device *dev)
  1183. {
  1184. if (current_duplex == autoneg && current_speed_selection == 0)
  1185. e100_negotiate(dev);
  1186. return 0;
  1187. }
  1188. static const struct ethtool_ops e100_ethtool_ops = {
  1189. .get_settings = e100_get_settings,
  1190. .set_settings = e100_set_settings,
  1191. .get_drvinfo = e100_get_drvinfo,
  1192. .nway_reset = e100_nway_reset,
  1193. .get_link = ethtool_op_get_link,
  1194. };
  1195. static int
  1196. e100_set_config(struct net_device *dev, struct ifmap *map)
  1197. {
  1198. struct net_local *np = netdev_priv(dev);
  1199. spin_lock(&np->lock); /* Preempt protection */
  1200. switch(map->port) {
  1201. case IF_PORT_UNKNOWN:
  1202. /* Use autoneg */
  1203. e100_set_speed(dev, 0);
  1204. e100_set_duplex(dev, autoneg);
  1205. break;
  1206. case IF_PORT_10BASET:
  1207. e100_set_speed(dev, 10);
  1208. e100_set_duplex(dev, autoneg);
  1209. break;
  1210. case IF_PORT_100BASET:
  1211. case IF_PORT_100BASETX:
  1212. e100_set_speed(dev, 100);
  1213. e100_set_duplex(dev, autoneg);
  1214. break;
  1215. case IF_PORT_100BASEFX:
  1216. case IF_PORT_10BASE2:
  1217. case IF_PORT_AUI:
  1218. spin_unlock(&np->lock);
  1219. return -EOPNOTSUPP;
  1220. default:
  1221. printk(KERN_ERR "%s: Invalid media selected", dev->name);
  1222. spin_unlock(&np->lock);
  1223. return -EINVAL;
  1224. }
  1225. spin_unlock(&np->lock);
  1226. return 0;
  1227. }
  1228. static void
  1229. update_rx_stats(struct net_device_stats *es)
  1230. {
  1231. unsigned long r = *R_REC_COUNTERS;
  1232. /* update stats relevant to reception errors */
  1233. es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
  1234. es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
  1235. es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r);
  1236. es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r);
  1237. }
  1238. static void
  1239. update_tx_stats(struct net_device_stats *es)
  1240. {
  1241. unsigned long r = *R_TR_COUNTERS;
  1242. /* update stats relevant to transmission errors */
  1243. es->collisions +=
  1244. IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
  1245. IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
  1246. }
  1247. /*
  1248. * Get the current statistics.
  1249. * This may be called with the card open or closed.
  1250. */
  1251. static struct net_device_stats *
  1252. e100_get_stats(struct net_device *dev)
  1253. {
  1254. struct net_local *lp = netdev_priv(dev);
  1255. unsigned long flags;
  1256. spin_lock_irqsave(&lp->lock, flags);
  1257. update_rx_stats(&dev->stats);
  1258. update_tx_stats(&dev->stats);
  1259. spin_unlock_irqrestore(&lp->lock, flags);
  1260. return &dev->stats;
  1261. }
  1262. /*
  1263. * Set or clear the multicast filter for this adaptor.
  1264. * num_addrs == -1 Promiscuous mode, receive all packets
  1265. * num_addrs == 0 Normal mode, clear multicast list
  1266. * num_addrs > 0 Multicast mode, receive normal and MC packets,
  1267. * and do best-effort filtering.
  1268. */
  1269. static void
  1270. set_multicast_list(struct net_device *dev)
  1271. {
  1272. struct net_local *lp = netdev_priv(dev);
  1273. int num_addr = netdev_mc_count(dev);
  1274. unsigned long int lo_bits;
  1275. unsigned long int hi_bits;
  1276. spin_lock(&lp->lock);
  1277. if (dev->flags & IFF_PROMISC) {
  1278. /* promiscuous mode */
  1279. lo_bits = 0xfffffffful;
  1280. hi_bits = 0xfffffffful;
  1281. /* Enable individual receive */
  1282. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive);
  1283. *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
  1284. } else if (dev->flags & IFF_ALLMULTI) {
  1285. /* enable all multicasts */
  1286. lo_bits = 0xfffffffful;
  1287. hi_bits = 0xfffffffful;
  1288. /* Disable individual receive */
  1289. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
  1290. *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
  1291. } else if (num_addr == 0) {
  1292. /* Normal, clear the mc list */
  1293. lo_bits = 0x00000000ul;
  1294. hi_bits = 0x00000000ul;
  1295. /* Disable individual receive */
  1296. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
  1297. *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
  1298. } else {
  1299. /* MC mode, receive normal and MC packets */
  1300. char hash_ix;
  1301. struct netdev_hw_addr *ha;
  1302. char *baddr;
  1303. lo_bits = 0x00000000ul;
  1304. hi_bits = 0x00000000ul;
  1305. netdev_for_each_mc_addr(ha, dev) {
  1306. /* Calculate the hash index for the GA registers */
  1307. hash_ix = 0;
  1308. baddr = ha->addr;
  1309. hash_ix ^= (*baddr) & 0x3f;
  1310. hash_ix ^= ((*baddr) >> 6) & 0x03;
  1311. ++baddr;
  1312. hash_ix ^= ((*baddr) << 2) & 0x03c;
  1313. hash_ix ^= ((*baddr) >> 4) & 0xf;
  1314. ++baddr;
  1315. hash_ix ^= ((*baddr) << 4) & 0x30;
  1316. hash_ix ^= ((*baddr) >> 2) & 0x3f;
  1317. ++baddr;
  1318. hash_ix ^= (*baddr) & 0x3f;
  1319. hash_ix ^= ((*baddr) >> 6) & 0x03;
  1320. ++baddr;
  1321. hash_ix ^= ((*baddr) << 2) & 0x03c;
  1322. hash_ix ^= ((*baddr) >> 4) & 0xf;
  1323. ++baddr;
  1324. hash_ix ^= ((*baddr) << 4) & 0x30;
  1325. hash_ix ^= ((*baddr) >> 2) & 0x3f;
  1326. hash_ix &= 0x3f;
  1327. if (hash_ix >= 32) {
  1328. hi_bits |= (1 << (hash_ix-32));
  1329. } else {
  1330. lo_bits |= (1 << hash_ix);
  1331. }
  1332. }
  1333. /* Disable individual receive */
  1334. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
  1335. *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
  1336. }
  1337. *R_NETWORK_GA_0 = lo_bits;
  1338. *R_NETWORK_GA_1 = hi_bits;
  1339. spin_unlock(&lp->lock);
  1340. }
  1341. void
  1342. e100_hardware_send_packet(struct net_local *np, char *buf, int length)
  1343. {
  1344. D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
  1345. spin_lock(&np->led_lock);
  1346. if (!led_active && time_after(jiffies, led_next_time)) {
  1347. /* light the network leds depending on the current speed. */
  1348. e100_set_network_leds(NETWORK_ACTIVITY);
  1349. /* Set the earliest time we may clear the LED */
  1350. led_next_time = jiffies + NET_FLASH_TIME;
  1351. led_active = 1;
  1352. mod_timer(&clear_led_timer, jiffies + HZ/10);
  1353. }
  1354. spin_unlock(&np->led_lock);
  1355. /* configure the tx dma descriptor */
  1356. myNextTxDesc->descr.sw_len = length;
  1357. myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait;
  1358. myNextTxDesc->descr.buf = virt_to_phys(buf);
  1359. /* Move end of list */
  1360. myLastTxDesc->descr.ctrl &= ~d_eol;
  1361. myLastTxDesc = myNextTxDesc;
  1362. /* Restart DMA channel */
  1363. *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);
  1364. }
  1365. static void
  1366. e100_clear_network_leds(unsigned long dummy)
  1367. {
  1368. struct net_device *dev = (struct net_device *)dummy;
  1369. struct net_local *np = netdev_priv(dev);
  1370. spin_lock(&np->led_lock);
  1371. if (led_active && time_after(jiffies, led_next_time)) {
  1372. e100_set_network_leds(NO_NETWORK_ACTIVITY);
  1373. /* Set the earliest time we may set the LED */
  1374. led_next_time = jiffies + NET_FLASH_PAUSE;
  1375. led_active = 0;
  1376. }
  1377. spin_unlock(&np->led_lock);
  1378. }
  1379. static void
  1380. e100_set_network_leds(int active)
  1381. {
  1382. #if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
  1383. int light_leds = (active == NO_NETWORK_ACTIVITY);
  1384. #elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
  1385. int light_leds = (active == NETWORK_ACTIVITY);
  1386. #else
  1387. #error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
  1388. #endif
  1389. if (!current_speed) {
  1390. /* Make LED red, link is down */
  1391. CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
  1392. } else if (light_leds) {
  1393. if (current_speed == 10) {
  1394. CRIS_LED_NETWORK_SET(CRIS_LED_ORANGE);
  1395. } else {
  1396. CRIS_LED_NETWORK_SET(CRIS_LED_GREEN);
  1397. }
  1398. } else {
  1399. CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
  1400. }
  1401. }
  1402. #ifdef CONFIG_NET_POLL_CONTROLLER
  1403. static void
  1404. e100_netpoll(struct net_device* netdev)
  1405. {
  1406. e100rxtx_interrupt(NETWORK_DMA_TX_IRQ_NBR, netdev);
  1407. }
  1408. #endif
  1409. static int
  1410. etrax_init_module(void)
  1411. {
  1412. return etrax_ethernet_init();
  1413. }
  1414. static int __init
  1415. e100_boot_setup(char* str)
  1416. {
  1417. struct sockaddr sa = {0};
  1418. int i;
  1419. /* Parse the colon separated Ethernet station address */
  1420. for (i = 0; i < ETH_ALEN; i++) {
  1421. unsigned int tmp;
  1422. if (sscanf(str + 3*i, "%2x", &tmp) != 1) {
  1423. printk(KERN_WARNING "Malformed station address");
  1424. return 0;
  1425. }
  1426. sa.sa_data[i] = (char)tmp;
  1427. }
  1428. default_mac = sa;
  1429. return 1;
  1430. }
  1431. __setup("etrax100_eth=", e100_boot_setup);
  1432. module_init(etrax_init_module);