bnx2x_mfw_req.h 6.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170
  1. /* bnx2x_mfw_req.h: Qlogic Everest network driver.
  2. *
  3. * Copyright (c) 2012-2013 Broadcom Corporation
  4. * Copyright (c) 2014 QLogic Corporation
  5. * All rights reserved
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation.
  10. */
  11. #ifndef BNX2X_MFW_REQ_H
  12. #define BNX2X_MFW_REQ_H
  13. #define PORT_0 0
  14. #define PORT_1 1
  15. #define PORT_MAX 2
  16. #define NVM_PATH_MAX 2
  17. /* FCoE capabilities required from the driver */
  18. struct fcoe_capabilities {
  19. u32 capability1;
  20. /* Maximum number of I/Os per connection */
  21. #define FCOE_IOS_PER_CONNECTION_MASK 0x0000ffff
  22. #define FCOE_IOS_PER_CONNECTION_SHIFT 0
  23. /* Maximum number of Logins per port */
  24. #define FCOE_LOGINS_PER_PORT_MASK 0xffff0000
  25. #define FCOE_LOGINS_PER_PORT_SHIFT 16
  26. u32 capability2;
  27. /* Maximum number of exchanges */
  28. #define FCOE_NUMBER_OF_EXCHANGES_MASK 0x0000ffff
  29. #define FCOE_NUMBER_OF_EXCHANGES_SHIFT 0
  30. /* Maximum NPIV WWN per port */
  31. #define FCOE_NPIV_WWN_PER_PORT_MASK 0xffff0000
  32. #define FCOE_NPIV_WWN_PER_PORT_SHIFT 16
  33. u32 capability3;
  34. /* Maximum number of targets supported */
  35. #define FCOE_TARGETS_SUPPORTED_MASK 0x0000ffff
  36. #define FCOE_TARGETS_SUPPORTED_SHIFT 0
  37. /* Maximum number of outstanding commands across all connections */
  38. #define FCOE_OUTSTANDING_COMMANDS_MASK 0xffff0000
  39. #define FCOE_OUTSTANDING_COMMANDS_SHIFT 16
  40. u32 capability4;
  41. #define FCOE_CAPABILITY4_STATEFUL 0x00000001
  42. #define FCOE_CAPABILITY4_STATELESS 0x00000002
  43. #define FCOE_CAPABILITY4_CAPABILITIES_REPORTED_VALID 0x00000004
  44. };
  45. struct glob_ncsi_oem_data {
  46. u32 driver_version;
  47. u32 unused[3];
  48. struct fcoe_capabilities fcoe_features[NVM_PATH_MAX][PORT_MAX];
  49. };
  50. /* current drv_info version */
  51. #define DRV_INFO_CUR_VER 2
  52. /* drv_info op codes supported */
  53. enum drv_info_opcode {
  54. ETH_STATS_OPCODE,
  55. FCOE_STATS_OPCODE,
  56. ISCSI_STATS_OPCODE
  57. };
  58. #define ETH_STAT_INFO_VERSION_LEN 12
  59. /* Per PCI Function Ethernet Statistics required from the driver */
  60. struct eth_stats_info {
  61. /* Function's Driver Version. padded to 12 */
  62. u8 version[ETH_STAT_INFO_VERSION_LEN];
  63. /* Locally Admin Addr. BigEndian EIU48. Actual size is 6 bytes */
  64. u8 mac_local[8];
  65. u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */
  66. u8 mac_add2[8]; /* Additional Programmed MAC Addr 2. */
  67. u32 mtu_size; /* MTU Size. Note : Negotiated MTU */
  68. u32 feature_flags; /* Feature_Flags. */
  69. #define FEATURE_ETH_CHKSUM_OFFLOAD_MASK 0x01
  70. #define FEATURE_ETH_LSO_MASK 0x02
  71. #define FEATURE_ETH_BOOTMODE_MASK 0x1C
  72. #define FEATURE_ETH_BOOTMODE_SHIFT 2
  73. #define FEATURE_ETH_BOOTMODE_NONE (0x0 << 2)
  74. #define FEATURE_ETH_BOOTMODE_PXE (0x1 << 2)
  75. #define FEATURE_ETH_BOOTMODE_ISCSI (0x2 << 2)
  76. #define FEATURE_ETH_BOOTMODE_FCOE (0x3 << 2)
  77. #define FEATURE_ETH_TOE_MASK 0x20
  78. u32 lso_max_size; /* LSO MaxOffloadSize. */
  79. u32 lso_min_seg_cnt; /* LSO MinSegmentCount. */
  80. /* Num Offloaded Connections TCP_IPv4. */
  81. u32 ipv4_ofld_cnt;
  82. /* Num Offloaded Connections TCP_IPv6. */
  83. u32 ipv6_ofld_cnt;
  84. u32 promiscuous_mode; /* Promiscuous Mode. non-zero true */
  85. u32 txq_size; /* TX Descriptors Queue Size */
  86. u32 rxq_size; /* RX Descriptors Queue Size */
  87. /* TX Descriptor Queue Avg Depth. % Avg Queue Depth since last poll */
  88. u32 txq_avg_depth;
  89. /* RX Descriptors Queue Avg Depth. % Avg Queue Depth since last poll */
  90. u32 rxq_avg_depth;
  91. /* IOV_Offload. 0=none; 1=MultiQueue, 2=VEB 3= VEPA*/
  92. u32 iov_offload;
  93. /* Number of NetQueue/VMQ Config'd. */
  94. u32 netq_cnt;
  95. u32 vf_cnt; /* Num VF assigned to this PF. */
  96. };
  97. /* Per PCI Function FCOE Statistics required from the driver */
  98. struct fcoe_stats_info {
  99. u8 version[12]; /* Function's Driver Version. */
  100. u8 mac_local[8]; /* Locally Admin Addr. */
  101. u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */
  102. u8 mac_add2[8]; /* Additional Programmed MAC Addr 2. */
  103. /* QoS Priority (per 802.1p). 0-7255 */
  104. u32 qos_priority;
  105. u32 txq_size; /* FCoE TX Descriptors Queue Size. */
  106. u32 rxq_size; /* FCoE RX Descriptors Queue Size. */
  107. /* FCoE TX Descriptor Queue Avg Depth. */
  108. u32 txq_avg_depth;
  109. /* FCoE RX Descriptors Queue Avg Depth. */
  110. u32 rxq_avg_depth;
  111. u32 rx_frames_lo; /* FCoE RX Frames received. */
  112. u32 rx_frames_hi; /* FCoE RX Frames received. */
  113. u32 rx_bytes_lo; /* FCoE RX Bytes received. */
  114. u32 rx_bytes_hi; /* FCoE RX Bytes received. */
  115. u32 tx_frames_lo; /* FCoE TX Frames sent. */
  116. u32 tx_frames_hi; /* FCoE TX Frames sent. */
  117. u32 tx_bytes_lo; /* FCoE TX Bytes sent. */
  118. u32 tx_bytes_hi; /* FCoE TX Bytes sent. */
  119. };
  120. /* Per PCI Function iSCSI Statistics required from the driver*/
  121. struct iscsi_stats_info {
  122. u8 version[12]; /* Function's Driver Version. */
  123. u8 mac_local[8]; /* Locally Admin iSCSI MAC Addr. */
  124. u8 mac_add1[8]; /* Additional Programmed MAC Addr 1. */
  125. /* QoS Priority (per 802.1p). 0-7255 */
  126. u32 qos_priority;
  127. u8 initiator_name[64]; /* iSCSI Boot Initiator Node name. */
  128. u8 ww_port_name[64]; /* iSCSI World wide port name */
  129. u8 boot_target_name[64];/* iSCSI Boot Target Name. */
  130. u8 boot_target_ip[16]; /* iSCSI Boot Target IP. */
  131. u32 boot_target_portal; /* iSCSI Boot Target Portal. */
  132. u8 boot_init_ip[16]; /* iSCSI Boot Initiator IP Address. */
  133. u32 max_frame_size; /* Max Frame Size. bytes */
  134. u32 txq_size; /* PDU TX Descriptors Queue Size. */
  135. u32 rxq_size; /* PDU RX Descriptors Queue Size. */
  136. u32 txq_avg_depth; /* PDU TX Descriptor Queue Avg Depth. */
  137. u32 rxq_avg_depth; /* PDU RX Descriptors Queue Avg Depth. */
  138. u32 rx_pdus_lo; /* iSCSI PDUs received. */
  139. u32 rx_pdus_hi; /* iSCSI PDUs received. */
  140. u32 rx_bytes_lo; /* iSCSI RX Bytes received. */
  141. u32 rx_bytes_hi; /* iSCSI RX Bytes received. */
  142. u32 tx_pdus_lo; /* iSCSI PDUs sent. */
  143. u32 tx_pdus_hi; /* iSCSI PDUs sent. */
  144. u32 tx_bytes_lo; /* iSCSI PDU TX Bytes sent. */
  145. u32 tx_bytes_hi; /* iSCSI PDU TX Bytes sent. */
  146. u32 pcp_prior_map_tbl; /* C-PCP to S-PCP Priority MapTable.
  147. * 9 nibbles, the position of each nibble
  148. * represents the C-PCP value, the value
  149. * of the nibble = S-PCP value.
  150. */
  151. };
  152. union drv_info_to_mcp {
  153. struct eth_stats_info ether_stat;
  154. struct fcoe_stats_info fcoe_stat;
  155. struct iscsi_stats_info iscsi_stat;
  156. };
  157. #endif /* BNX2X_MFW_REQ_H */