nicvf_main.c 40 KB

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  1. /*
  2. * Copyright (C) 2015 Cavium, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of version 2 of the GNU General Public License
  6. * as published by the Free Software Foundation.
  7. */
  8. #include <linux/module.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/pci.h>
  11. #include <linux/netdevice.h>
  12. #include <linux/if_vlan.h>
  13. #include <linux/etherdevice.h>
  14. #include <linux/ethtool.h>
  15. #include <linux/log2.h>
  16. #include <linux/prefetch.h>
  17. #include <linux/irq.h>
  18. #include "nic_reg.h"
  19. #include "nic.h"
  20. #include "nicvf_queues.h"
  21. #include "thunder_bgx.h"
  22. #define DRV_NAME "thunder-nicvf"
  23. #define DRV_VERSION "1.0"
  24. /* Supported devices */
  25. static const struct pci_device_id nicvf_id_table[] = {
  26. { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
  27. PCI_DEVICE_ID_THUNDER_NIC_VF,
  28. PCI_VENDOR_ID_CAVIUM, 0xA134) },
  29. { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
  30. PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF,
  31. PCI_VENDOR_ID_CAVIUM, 0xA11E) },
  32. { 0, } /* end of table */
  33. };
  34. MODULE_AUTHOR("Sunil Goutham");
  35. MODULE_DESCRIPTION("Cavium Thunder NIC Virtual Function Driver");
  36. MODULE_LICENSE("GPL v2");
  37. MODULE_VERSION(DRV_VERSION);
  38. MODULE_DEVICE_TABLE(pci, nicvf_id_table);
  39. static int debug = 0x00;
  40. module_param(debug, int, 0644);
  41. MODULE_PARM_DESC(debug, "Debug message level bitmap");
  42. static int cpi_alg = CPI_ALG_NONE;
  43. module_param(cpi_alg, int, S_IRUGO);
  44. MODULE_PARM_DESC(cpi_alg,
  45. "PFC algorithm (0=none, 1=VLAN, 2=VLAN16, 3=IP Diffserv)");
  46. static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx)
  47. {
  48. if (nic->sqs_mode)
  49. return qidx + ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS);
  50. else
  51. return qidx;
  52. }
  53. static inline void nicvf_set_rx_frame_cnt(struct nicvf *nic,
  54. struct sk_buff *skb)
  55. {
  56. if (skb->len <= 64)
  57. nic->drv_stats.rx_frames_64++;
  58. else if (skb->len <= 127)
  59. nic->drv_stats.rx_frames_127++;
  60. else if (skb->len <= 255)
  61. nic->drv_stats.rx_frames_255++;
  62. else if (skb->len <= 511)
  63. nic->drv_stats.rx_frames_511++;
  64. else if (skb->len <= 1023)
  65. nic->drv_stats.rx_frames_1023++;
  66. else if (skb->len <= 1518)
  67. nic->drv_stats.rx_frames_1518++;
  68. else
  69. nic->drv_stats.rx_frames_jumbo++;
  70. }
  71. /* The Cavium ThunderX network controller can *only* be found in SoCs
  72. * containing the ThunderX ARM64 CPU implementation. All accesses to the device
  73. * registers on this platform are implicitly strongly ordered with respect
  74. * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use
  75. * with no memory barriers in this driver. The readq()/writeq() functions add
  76. * explicit ordering operation which in this case are redundant, and only
  77. * add overhead.
  78. */
  79. /* Register read/write APIs */
  80. void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val)
  81. {
  82. writeq_relaxed(val, nic->reg_base + offset);
  83. }
  84. u64 nicvf_reg_read(struct nicvf *nic, u64 offset)
  85. {
  86. return readq_relaxed(nic->reg_base + offset);
  87. }
  88. void nicvf_queue_reg_write(struct nicvf *nic, u64 offset,
  89. u64 qidx, u64 val)
  90. {
  91. void __iomem *addr = nic->reg_base + offset;
  92. writeq_relaxed(val, addr + (qidx << NIC_Q_NUM_SHIFT));
  93. }
  94. u64 nicvf_queue_reg_read(struct nicvf *nic, u64 offset, u64 qidx)
  95. {
  96. void __iomem *addr = nic->reg_base + offset;
  97. return readq_relaxed(addr + (qidx << NIC_Q_NUM_SHIFT));
  98. }
  99. /* VF -> PF mailbox communication */
  100. static void nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx)
  101. {
  102. u64 *msg = (u64 *)mbx;
  103. nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]);
  104. nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]);
  105. }
  106. int nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx)
  107. {
  108. int timeout = NIC_MBOX_MSG_TIMEOUT;
  109. int sleep = 10;
  110. nic->pf_acked = false;
  111. nic->pf_nacked = false;
  112. nicvf_write_to_mbx(nic, mbx);
  113. /* Wait for previous message to be acked, timeout 2sec */
  114. while (!nic->pf_acked) {
  115. if (nic->pf_nacked)
  116. return -EINVAL;
  117. msleep(sleep);
  118. if (nic->pf_acked)
  119. break;
  120. timeout -= sleep;
  121. if (!timeout) {
  122. netdev_err(nic->netdev,
  123. "PF didn't ack to mbox msg %d from VF%d\n",
  124. (mbx->msg.msg & 0xFF), nic->vf_id);
  125. return -EBUSY;
  126. }
  127. }
  128. return 0;
  129. }
  130. /* Checks if VF is able to comminicate with PF
  131. * and also gets the VNIC number this VF is associated to.
  132. */
  133. static int nicvf_check_pf_ready(struct nicvf *nic)
  134. {
  135. union nic_mbx mbx = {};
  136. mbx.msg.msg = NIC_MBOX_MSG_READY;
  137. if (nicvf_send_msg_to_pf(nic, &mbx)) {
  138. netdev_err(nic->netdev,
  139. "PF didn't respond to READY msg\n");
  140. return 0;
  141. }
  142. return 1;
  143. }
  144. static void nicvf_read_bgx_stats(struct nicvf *nic, struct bgx_stats_msg *bgx)
  145. {
  146. if (bgx->rx)
  147. nic->bgx_stats.rx_stats[bgx->idx] = bgx->stats;
  148. else
  149. nic->bgx_stats.tx_stats[bgx->idx] = bgx->stats;
  150. }
  151. static void nicvf_handle_mbx_intr(struct nicvf *nic)
  152. {
  153. union nic_mbx mbx = {};
  154. u64 *mbx_data;
  155. u64 mbx_addr;
  156. int i;
  157. mbx_addr = NIC_VF_PF_MAILBOX_0_1;
  158. mbx_data = (u64 *)&mbx;
  159. for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) {
  160. *mbx_data = nicvf_reg_read(nic, mbx_addr);
  161. mbx_data++;
  162. mbx_addr += sizeof(u64);
  163. }
  164. netdev_dbg(nic->netdev, "Mbox message: msg: 0x%x\n", mbx.msg.msg);
  165. switch (mbx.msg.msg) {
  166. case NIC_MBOX_MSG_READY:
  167. nic->pf_acked = true;
  168. nic->vf_id = mbx.nic_cfg.vf_id & 0x7F;
  169. nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F;
  170. nic->node = mbx.nic_cfg.node_id;
  171. if (!nic->set_mac_pending)
  172. ether_addr_copy(nic->netdev->dev_addr,
  173. mbx.nic_cfg.mac_addr);
  174. nic->sqs_mode = mbx.nic_cfg.sqs_mode;
  175. nic->loopback_supported = mbx.nic_cfg.loopback_supported;
  176. nic->link_up = false;
  177. nic->duplex = 0;
  178. nic->speed = 0;
  179. break;
  180. case NIC_MBOX_MSG_ACK:
  181. nic->pf_acked = true;
  182. break;
  183. case NIC_MBOX_MSG_NACK:
  184. nic->pf_nacked = true;
  185. break;
  186. case NIC_MBOX_MSG_RSS_SIZE:
  187. nic->rss_info.rss_size = mbx.rss_size.ind_tbl_size;
  188. nic->pf_acked = true;
  189. break;
  190. case NIC_MBOX_MSG_BGX_STATS:
  191. nicvf_read_bgx_stats(nic, &mbx.bgx_stats);
  192. nic->pf_acked = true;
  193. break;
  194. case NIC_MBOX_MSG_BGX_LINK_CHANGE:
  195. nic->pf_acked = true;
  196. nic->link_up = mbx.link_status.link_up;
  197. nic->duplex = mbx.link_status.duplex;
  198. nic->speed = mbx.link_status.speed;
  199. if (nic->link_up) {
  200. netdev_info(nic->netdev, "%s: Link is Up %d Mbps %s\n",
  201. nic->netdev->name, nic->speed,
  202. nic->duplex == DUPLEX_FULL ?
  203. "Full duplex" : "Half duplex");
  204. netif_carrier_on(nic->netdev);
  205. netif_tx_start_all_queues(nic->netdev);
  206. } else {
  207. netdev_info(nic->netdev, "%s: Link is Down\n",
  208. nic->netdev->name);
  209. netif_carrier_off(nic->netdev);
  210. netif_tx_stop_all_queues(nic->netdev);
  211. }
  212. break;
  213. case NIC_MBOX_MSG_ALLOC_SQS:
  214. nic->sqs_count = mbx.sqs_alloc.qs_count;
  215. nic->pf_acked = true;
  216. break;
  217. case NIC_MBOX_MSG_SNICVF_PTR:
  218. /* Primary VF: make note of secondary VF's pointer
  219. * to be used while packet transmission.
  220. */
  221. nic->snicvf[mbx.nicvf.sqs_id] =
  222. (struct nicvf *)mbx.nicvf.nicvf;
  223. nic->pf_acked = true;
  224. break;
  225. case NIC_MBOX_MSG_PNICVF_PTR:
  226. /* Secondary VF/Qset: make note of primary VF's pointer
  227. * to be used while packet reception, to handover packet
  228. * to primary VF's netdev.
  229. */
  230. nic->pnicvf = (struct nicvf *)mbx.nicvf.nicvf;
  231. nic->pf_acked = true;
  232. break;
  233. default:
  234. netdev_err(nic->netdev,
  235. "Invalid message from PF, msg 0x%x\n", mbx.msg.msg);
  236. break;
  237. }
  238. nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0);
  239. }
  240. static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct net_device *netdev)
  241. {
  242. union nic_mbx mbx = {};
  243. mbx.mac.msg = NIC_MBOX_MSG_SET_MAC;
  244. mbx.mac.vf_id = nic->vf_id;
  245. ether_addr_copy(mbx.mac.mac_addr, netdev->dev_addr);
  246. return nicvf_send_msg_to_pf(nic, &mbx);
  247. }
  248. static void nicvf_config_cpi(struct nicvf *nic)
  249. {
  250. union nic_mbx mbx = {};
  251. mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG;
  252. mbx.cpi_cfg.vf_id = nic->vf_id;
  253. mbx.cpi_cfg.cpi_alg = nic->cpi_alg;
  254. mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt;
  255. nicvf_send_msg_to_pf(nic, &mbx);
  256. }
  257. static void nicvf_get_rss_size(struct nicvf *nic)
  258. {
  259. union nic_mbx mbx = {};
  260. mbx.rss_size.msg = NIC_MBOX_MSG_RSS_SIZE;
  261. mbx.rss_size.vf_id = nic->vf_id;
  262. nicvf_send_msg_to_pf(nic, &mbx);
  263. }
  264. void nicvf_config_rss(struct nicvf *nic)
  265. {
  266. union nic_mbx mbx = {};
  267. struct nicvf_rss_info *rss = &nic->rss_info;
  268. int ind_tbl_len = rss->rss_size;
  269. int i, nextq = 0;
  270. mbx.rss_cfg.vf_id = nic->vf_id;
  271. mbx.rss_cfg.hash_bits = rss->hash_bits;
  272. while (ind_tbl_len) {
  273. mbx.rss_cfg.tbl_offset = nextq;
  274. mbx.rss_cfg.tbl_len = min(ind_tbl_len,
  275. RSS_IND_TBL_LEN_PER_MBX_MSG);
  276. mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ?
  277. NIC_MBOX_MSG_RSS_CFG_CONT : NIC_MBOX_MSG_RSS_CFG;
  278. for (i = 0; i < mbx.rss_cfg.tbl_len; i++)
  279. mbx.rss_cfg.ind_tbl[i] = rss->ind_tbl[nextq++];
  280. nicvf_send_msg_to_pf(nic, &mbx);
  281. ind_tbl_len -= mbx.rss_cfg.tbl_len;
  282. }
  283. }
  284. void nicvf_set_rss_key(struct nicvf *nic)
  285. {
  286. struct nicvf_rss_info *rss = &nic->rss_info;
  287. u64 key_addr = NIC_VNIC_RSS_KEY_0_4;
  288. int idx;
  289. for (idx = 0; idx < RSS_HASH_KEY_SIZE; idx++) {
  290. nicvf_reg_write(nic, key_addr, rss->key[idx]);
  291. key_addr += sizeof(u64);
  292. }
  293. }
  294. static int nicvf_rss_init(struct nicvf *nic)
  295. {
  296. struct nicvf_rss_info *rss = &nic->rss_info;
  297. int idx;
  298. nicvf_get_rss_size(nic);
  299. if (cpi_alg != CPI_ALG_NONE) {
  300. rss->enable = false;
  301. rss->hash_bits = 0;
  302. return 0;
  303. }
  304. rss->enable = true;
  305. /* Using the HW reset value for now */
  306. rss->key[0] = 0xFEED0BADFEED0BADULL;
  307. rss->key[1] = 0xFEED0BADFEED0BADULL;
  308. rss->key[2] = 0xFEED0BADFEED0BADULL;
  309. rss->key[3] = 0xFEED0BADFEED0BADULL;
  310. rss->key[4] = 0xFEED0BADFEED0BADULL;
  311. nicvf_set_rss_key(nic);
  312. rss->cfg = RSS_IP_HASH_ENA | RSS_TCP_HASH_ENA | RSS_UDP_HASH_ENA;
  313. nicvf_reg_write(nic, NIC_VNIC_RSS_CFG, rss->cfg);
  314. rss->hash_bits = ilog2(rounddown_pow_of_two(rss->rss_size));
  315. for (idx = 0; idx < rss->rss_size; idx++)
  316. rss->ind_tbl[idx] = ethtool_rxfh_indir_default(idx,
  317. nic->rx_queues);
  318. nicvf_config_rss(nic);
  319. return 1;
  320. }
  321. /* Request PF to allocate additional Qsets */
  322. static void nicvf_request_sqs(struct nicvf *nic)
  323. {
  324. union nic_mbx mbx = {};
  325. int sqs;
  326. int sqs_count = nic->sqs_count;
  327. int rx_queues = 0, tx_queues = 0;
  328. /* Only primary VF should request */
  329. if (nic->sqs_mode || !nic->sqs_count)
  330. return;
  331. mbx.sqs_alloc.msg = NIC_MBOX_MSG_ALLOC_SQS;
  332. mbx.sqs_alloc.vf_id = nic->vf_id;
  333. mbx.sqs_alloc.qs_count = nic->sqs_count;
  334. if (nicvf_send_msg_to_pf(nic, &mbx)) {
  335. /* No response from PF */
  336. nic->sqs_count = 0;
  337. return;
  338. }
  339. /* Return if no Secondary Qsets available */
  340. if (!nic->sqs_count)
  341. return;
  342. if (nic->rx_queues > MAX_RCV_QUEUES_PER_QS)
  343. rx_queues = nic->rx_queues - MAX_RCV_QUEUES_PER_QS;
  344. if (nic->tx_queues > MAX_SND_QUEUES_PER_QS)
  345. tx_queues = nic->tx_queues - MAX_SND_QUEUES_PER_QS;
  346. /* Set no of Rx/Tx queues in each of the SQsets */
  347. for (sqs = 0; sqs < nic->sqs_count; sqs++) {
  348. mbx.nicvf.msg = NIC_MBOX_MSG_SNICVF_PTR;
  349. mbx.nicvf.vf_id = nic->vf_id;
  350. mbx.nicvf.sqs_id = sqs;
  351. nicvf_send_msg_to_pf(nic, &mbx);
  352. nic->snicvf[sqs]->sqs_id = sqs;
  353. if (rx_queues > MAX_RCV_QUEUES_PER_QS) {
  354. nic->snicvf[sqs]->qs->rq_cnt = MAX_RCV_QUEUES_PER_QS;
  355. rx_queues -= MAX_RCV_QUEUES_PER_QS;
  356. } else {
  357. nic->snicvf[sqs]->qs->rq_cnt = rx_queues;
  358. rx_queues = 0;
  359. }
  360. if (tx_queues > MAX_SND_QUEUES_PER_QS) {
  361. nic->snicvf[sqs]->qs->sq_cnt = MAX_SND_QUEUES_PER_QS;
  362. tx_queues -= MAX_SND_QUEUES_PER_QS;
  363. } else {
  364. nic->snicvf[sqs]->qs->sq_cnt = tx_queues;
  365. tx_queues = 0;
  366. }
  367. nic->snicvf[sqs]->qs->cq_cnt =
  368. max(nic->snicvf[sqs]->qs->rq_cnt, nic->snicvf[sqs]->qs->sq_cnt);
  369. /* Initialize secondary Qset's queues and its interrupts */
  370. nicvf_open(nic->snicvf[sqs]->netdev);
  371. }
  372. /* Update stack with actual Rx/Tx queue count allocated */
  373. if (sqs_count != nic->sqs_count)
  374. nicvf_set_real_num_queues(nic->netdev,
  375. nic->tx_queues, nic->rx_queues);
  376. }
  377. /* Send this Qset's nicvf pointer to PF.
  378. * PF inturn sends primary VF's nicvf struct to secondary Qsets/VFs
  379. * so that packets received by these Qsets can use primary VF's netdev
  380. */
  381. static void nicvf_send_vf_struct(struct nicvf *nic)
  382. {
  383. union nic_mbx mbx = {};
  384. mbx.nicvf.msg = NIC_MBOX_MSG_NICVF_PTR;
  385. mbx.nicvf.sqs_mode = nic->sqs_mode;
  386. mbx.nicvf.nicvf = (u64)nic;
  387. nicvf_send_msg_to_pf(nic, &mbx);
  388. }
  389. static void nicvf_get_primary_vf_struct(struct nicvf *nic)
  390. {
  391. union nic_mbx mbx = {};
  392. mbx.nicvf.msg = NIC_MBOX_MSG_PNICVF_PTR;
  393. nicvf_send_msg_to_pf(nic, &mbx);
  394. }
  395. int nicvf_set_real_num_queues(struct net_device *netdev,
  396. int tx_queues, int rx_queues)
  397. {
  398. int err = 0;
  399. err = netif_set_real_num_tx_queues(netdev, tx_queues);
  400. if (err) {
  401. netdev_err(netdev,
  402. "Failed to set no of Tx queues: %d\n", tx_queues);
  403. return err;
  404. }
  405. err = netif_set_real_num_rx_queues(netdev, rx_queues);
  406. if (err)
  407. netdev_err(netdev,
  408. "Failed to set no of Rx queues: %d\n", rx_queues);
  409. return err;
  410. }
  411. static int nicvf_init_resources(struct nicvf *nic)
  412. {
  413. int err;
  414. union nic_mbx mbx = {};
  415. mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE;
  416. /* Enable Qset */
  417. nicvf_qset_config(nic, true);
  418. /* Initialize queues and HW for data transfer */
  419. err = nicvf_config_data_transfer(nic, true);
  420. if (err) {
  421. netdev_err(nic->netdev,
  422. "Failed to alloc/config VF's QSet resources\n");
  423. return err;
  424. }
  425. /* Send VF config done msg to PF */
  426. nicvf_write_to_mbx(nic, &mbx);
  427. return 0;
  428. }
  429. static void nicvf_snd_pkt_handler(struct net_device *netdev,
  430. struct cmp_queue *cq,
  431. struct cqe_send_t *cqe_tx, int cqe_type)
  432. {
  433. struct sk_buff *skb = NULL;
  434. struct nicvf *nic = netdev_priv(netdev);
  435. struct snd_queue *sq;
  436. struct sq_hdr_subdesc *hdr;
  437. sq = &nic->qs->sq[cqe_tx->sq_idx];
  438. hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, cqe_tx->sqe_ptr);
  439. if (hdr->subdesc_type != SQ_DESC_TYPE_HEADER)
  440. return;
  441. netdev_dbg(nic->netdev,
  442. "%s Qset #%d SQ #%d SQ ptr #%d subdesc count %d\n",
  443. __func__, cqe_tx->sq_qs, cqe_tx->sq_idx,
  444. cqe_tx->sqe_ptr, hdr->subdesc_cnt);
  445. nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1);
  446. nicvf_check_cqe_tx_errs(nic, cq, cqe_tx);
  447. skb = (struct sk_buff *)sq->skbuff[cqe_tx->sqe_ptr];
  448. /* For TSO offloaded packets only one head SKB needs to be freed */
  449. if (skb) {
  450. prefetch(skb);
  451. dev_consume_skb_any(skb);
  452. sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL;
  453. }
  454. }
  455. static inline void nicvf_set_rxhash(struct net_device *netdev,
  456. struct cqe_rx_t *cqe_rx,
  457. struct sk_buff *skb)
  458. {
  459. u8 hash_type;
  460. u32 hash;
  461. if (!(netdev->features & NETIF_F_RXHASH))
  462. return;
  463. switch (cqe_rx->rss_alg) {
  464. case RSS_ALG_TCP_IP:
  465. case RSS_ALG_UDP_IP:
  466. hash_type = PKT_HASH_TYPE_L4;
  467. hash = cqe_rx->rss_tag;
  468. break;
  469. case RSS_ALG_IP:
  470. hash_type = PKT_HASH_TYPE_L3;
  471. hash = cqe_rx->rss_tag;
  472. break;
  473. default:
  474. hash_type = PKT_HASH_TYPE_NONE;
  475. hash = 0;
  476. }
  477. skb_set_hash(skb, hash, hash_type);
  478. }
  479. static void nicvf_rcv_pkt_handler(struct net_device *netdev,
  480. struct napi_struct *napi,
  481. struct cqe_rx_t *cqe_rx)
  482. {
  483. struct sk_buff *skb;
  484. struct nicvf *nic = netdev_priv(netdev);
  485. int err = 0;
  486. int rq_idx;
  487. rq_idx = nicvf_netdev_qidx(nic, cqe_rx->rq_idx);
  488. if (nic->sqs_mode) {
  489. /* Use primary VF's 'nicvf' struct */
  490. nic = nic->pnicvf;
  491. netdev = nic->netdev;
  492. }
  493. /* Check for errors */
  494. err = nicvf_check_cqe_rx_errs(nic, cqe_rx);
  495. if (err && !cqe_rx->rb_cnt)
  496. return;
  497. skb = nicvf_get_rcv_skb(nic, cqe_rx);
  498. if (!skb) {
  499. netdev_dbg(nic->netdev, "Packet not received\n");
  500. return;
  501. }
  502. if (netif_msg_pktdata(nic)) {
  503. netdev_info(nic->netdev, "%s: skb 0x%p, len=%d\n", netdev->name,
  504. skb, skb->len);
  505. print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
  506. skb->data, skb->len, true);
  507. }
  508. /* If error packet, drop it here */
  509. if (err) {
  510. dev_kfree_skb_any(skb);
  511. return;
  512. }
  513. nicvf_set_rx_frame_cnt(nic, skb);
  514. nicvf_set_rxhash(netdev, cqe_rx, skb);
  515. skb_record_rx_queue(skb, rq_idx);
  516. if (netdev->hw_features & NETIF_F_RXCSUM) {
  517. /* HW by default verifies TCP/UDP/SCTP checksums */
  518. skb->ip_summed = CHECKSUM_UNNECESSARY;
  519. } else {
  520. skb_checksum_none_assert(skb);
  521. }
  522. skb->protocol = eth_type_trans(skb, netdev);
  523. /* Check for stripped VLAN */
  524. if (cqe_rx->vlan_found && cqe_rx->vlan_stripped)
  525. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
  526. ntohs((__force __be16)cqe_rx->vlan_tci));
  527. if (napi && (netdev->features & NETIF_F_GRO))
  528. napi_gro_receive(napi, skb);
  529. else
  530. netif_receive_skb(skb);
  531. }
  532. static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx,
  533. struct napi_struct *napi, int budget)
  534. {
  535. int processed_cqe, work_done = 0, tx_done = 0;
  536. int cqe_count, cqe_head;
  537. struct nicvf *nic = netdev_priv(netdev);
  538. struct queue_set *qs = nic->qs;
  539. struct cmp_queue *cq = &qs->cq[cq_idx];
  540. struct cqe_rx_t *cq_desc;
  541. struct netdev_queue *txq;
  542. spin_lock_bh(&cq->lock);
  543. loop:
  544. processed_cqe = 0;
  545. /* Get no of valid CQ entries to process */
  546. cqe_count = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, cq_idx);
  547. cqe_count &= CQ_CQE_COUNT;
  548. if (!cqe_count)
  549. goto done;
  550. /* Get head of the valid CQ entries */
  551. cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9;
  552. cqe_head &= 0xFFFF;
  553. netdev_dbg(nic->netdev, "%s CQ%d cqe_count %d cqe_head %d\n",
  554. __func__, cq_idx, cqe_count, cqe_head);
  555. while (processed_cqe < cqe_count) {
  556. /* Get the CQ descriptor */
  557. cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head);
  558. cqe_head++;
  559. cqe_head &= (cq->dmem.q_len - 1);
  560. /* Initiate prefetch for next descriptor */
  561. prefetch((struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head));
  562. if ((work_done >= budget) && napi &&
  563. (cq_desc->cqe_type != CQE_TYPE_SEND)) {
  564. break;
  565. }
  566. netdev_dbg(nic->netdev, "CQ%d cq_desc->cqe_type %d\n",
  567. cq_idx, cq_desc->cqe_type);
  568. switch (cq_desc->cqe_type) {
  569. case CQE_TYPE_RX:
  570. nicvf_rcv_pkt_handler(netdev, napi, cq_desc);
  571. work_done++;
  572. break;
  573. case CQE_TYPE_SEND:
  574. nicvf_snd_pkt_handler(netdev, cq,
  575. (void *)cq_desc, CQE_TYPE_SEND);
  576. tx_done++;
  577. break;
  578. case CQE_TYPE_INVALID:
  579. case CQE_TYPE_RX_SPLIT:
  580. case CQE_TYPE_RX_TCP:
  581. case CQE_TYPE_SEND_PTP:
  582. /* Ignore for now */
  583. break;
  584. }
  585. processed_cqe++;
  586. }
  587. netdev_dbg(nic->netdev,
  588. "%s CQ%d processed_cqe %d work_done %d budget %d\n",
  589. __func__, cq_idx, processed_cqe, work_done, budget);
  590. /* Ring doorbell to inform H/W to reuse processed CQEs */
  591. nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR,
  592. cq_idx, processed_cqe);
  593. if ((work_done < budget) && napi)
  594. goto loop;
  595. done:
  596. /* Wakeup TXQ if its stopped earlier due to SQ full */
  597. if (tx_done) {
  598. netdev = nic->pnicvf->netdev;
  599. txq = netdev_get_tx_queue(netdev,
  600. nicvf_netdev_qidx(nic, cq_idx));
  601. nic = nic->pnicvf;
  602. if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) {
  603. netif_tx_start_queue(txq);
  604. nic->drv_stats.txq_wake++;
  605. if (netif_msg_tx_err(nic))
  606. netdev_warn(netdev,
  607. "%s: Transmit queue wakeup SQ%d\n",
  608. netdev->name, cq_idx);
  609. }
  610. }
  611. spin_unlock_bh(&cq->lock);
  612. return work_done;
  613. }
  614. static int nicvf_poll(struct napi_struct *napi, int budget)
  615. {
  616. u64 cq_head;
  617. int work_done = 0;
  618. struct net_device *netdev = napi->dev;
  619. struct nicvf *nic = netdev_priv(netdev);
  620. struct nicvf_cq_poll *cq;
  621. cq = container_of(napi, struct nicvf_cq_poll, napi);
  622. work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget);
  623. if (work_done < budget) {
  624. /* Slow packet rate, exit polling */
  625. napi_complete(napi);
  626. /* Re-enable interrupts */
  627. cq_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD,
  628. cq->cq_idx);
  629. nicvf_clear_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
  630. nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_HEAD,
  631. cq->cq_idx, cq_head);
  632. nicvf_enable_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
  633. }
  634. return work_done;
  635. }
  636. /* Qset error interrupt handler
  637. *
  638. * As of now only CQ errors are handled
  639. */
  640. static void nicvf_handle_qs_err(unsigned long data)
  641. {
  642. struct nicvf *nic = (struct nicvf *)data;
  643. struct queue_set *qs = nic->qs;
  644. int qidx;
  645. u64 status;
  646. netif_tx_disable(nic->netdev);
  647. /* Check if it is CQ err */
  648. for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
  649. status = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS,
  650. qidx);
  651. if (!(status & CQ_ERR_MASK))
  652. continue;
  653. /* Process already queued CQEs and reconfig CQ */
  654. nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
  655. nicvf_sq_disable(nic, qidx);
  656. nicvf_cq_intr_handler(nic->netdev, qidx, NULL, 0);
  657. nicvf_cmp_queue_config(nic, qs, qidx, true);
  658. nicvf_sq_free_used_descs(nic->netdev, &qs->sq[qidx], qidx);
  659. nicvf_sq_enable(nic, &qs->sq[qidx], qidx);
  660. nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
  661. }
  662. netif_tx_start_all_queues(nic->netdev);
  663. /* Re-enable Qset error interrupt */
  664. nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
  665. }
  666. static void nicvf_dump_intr_status(struct nicvf *nic)
  667. {
  668. if (netif_msg_intr(nic))
  669. netdev_info(nic->netdev, "%s: interrupt status 0x%llx\n",
  670. nic->netdev->name, nicvf_reg_read(nic, NIC_VF_INT));
  671. }
  672. static irqreturn_t nicvf_misc_intr_handler(int irq, void *nicvf_irq)
  673. {
  674. struct nicvf *nic = (struct nicvf *)nicvf_irq;
  675. u64 intr;
  676. nicvf_dump_intr_status(nic);
  677. intr = nicvf_reg_read(nic, NIC_VF_INT);
  678. /* Check for spurious interrupt */
  679. if (!(intr & NICVF_INTR_MBOX_MASK))
  680. return IRQ_HANDLED;
  681. nicvf_handle_mbx_intr(nic);
  682. return IRQ_HANDLED;
  683. }
  684. static irqreturn_t nicvf_intr_handler(int irq, void *cq_irq)
  685. {
  686. struct nicvf_cq_poll *cq_poll = (struct nicvf_cq_poll *)cq_irq;
  687. struct nicvf *nic = cq_poll->nicvf;
  688. int qidx = cq_poll->cq_idx;
  689. nicvf_dump_intr_status(nic);
  690. /* Disable interrupts */
  691. nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
  692. /* Schedule NAPI */
  693. napi_schedule(&cq_poll->napi);
  694. /* Clear interrupt */
  695. nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
  696. return IRQ_HANDLED;
  697. }
  698. static irqreturn_t nicvf_rbdr_intr_handler(int irq, void *nicvf_irq)
  699. {
  700. struct nicvf *nic = (struct nicvf *)nicvf_irq;
  701. u8 qidx;
  702. nicvf_dump_intr_status(nic);
  703. /* Disable RBDR interrupt and schedule softirq */
  704. for (qidx = 0; qidx < nic->qs->rbdr_cnt; qidx++) {
  705. if (!nicvf_is_intr_enabled(nic, NICVF_INTR_RBDR, qidx))
  706. continue;
  707. nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
  708. tasklet_hi_schedule(&nic->rbdr_task);
  709. /* Clear interrupt */
  710. nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
  711. }
  712. return IRQ_HANDLED;
  713. }
  714. static irqreturn_t nicvf_qs_err_intr_handler(int irq, void *nicvf_irq)
  715. {
  716. struct nicvf *nic = (struct nicvf *)nicvf_irq;
  717. nicvf_dump_intr_status(nic);
  718. /* Disable Qset err interrupt and schedule softirq */
  719. nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
  720. tasklet_hi_schedule(&nic->qs_err_task);
  721. nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
  722. return IRQ_HANDLED;
  723. }
  724. static int nicvf_enable_msix(struct nicvf *nic)
  725. {
  726. int ret, vec;
  727. nic->num_vec = NIC_VF_MSIX_VECTORS;
  728. for (vec = 0; vec < nic->num_vec; vec++)
  729. nic->msix_entries[vec].entry = vec;
  730. ret = pci_enable_msix(nic->pdev, nic->msix_entries, nic->num_vec);
  731. if (ret) {
  732. netdev_err(nic->netdev,
  733. "Req for #%d msix vectors failed\n", nic->num_vec);
  734. return 0;
  735. }
  736. nic->msix_enabled = 1;
  737. return 1;
  738. }
  739. static void nicvf_disable_msix(struct nicvf *nic)
  740. {
  741. if (nic->msix_enabled) {
  742. pci_disable_msix(nic->pdev);
  743. nic->msix_enabled = 0;
  744. nic->num_vec = 0;
  745. }
  746. }
  747. static int nicvf_register_interrupts(struct nicvf *nic)
  748. {
  749. int irq, ret = 0;
  750. int vector;
  751. for_each_cq_irq(irq)
  752. sprintf(nic->irq_name[irq], "NICVF%d CQ%d",
  753. nic->vf_id, irq);
  754. for_each_sq_irq(irq)
  755. sprintf(nic->irq_name[irq], "NICVF%d SQ%d",
  756. nic->vf_id, irq - NICVF_INTR_ID_SQ);
  757. for_each_rbdr_irq(irq)
  758. sprintf(nic->irq_name[irq], "NICVF%d RBDR%d",
  759. nic->vf_id, irq - NICVF_INTR_ID_RBDR);
  760. /* Register CQ interrupts */
  761. for (irq = 0; irq < nic->qs->cq_cnt; irq++) {
  762. vector = nic->msix_entries[irq].vector;
  763. ret = request_irq(vector, nicvf_intr_handler,
  764. 0, nic->irq_name[irq], nic->napi[irq]);
  765. if (ret)
  766. goto err;
  767. nic->irq_allocated[irq] = true;
  768. }
  769. /* Register RBDR interrupt */
  770. for (irq = NICVF_INTR_ID_RBDR;
  771. irq < (NICVF_INTR_ID_RBDR + nic->qs->rbdr_cnt); irq++) {
  772. vector = nic->msix_entries[irq].vector;
  773. ret = request_irq(vector, nicvf_rbdr_intr_handler,
  774. 0, nic->irq_name[irq], nic);
  775. if (ret)
  776. goto err;
  777. nic->irq_allocated[irq] = true;
  778. }
  779. /* Register QS error interrupt */
  780. sprintf(nic->irq_name[NICVF_INTR_ID_QS_ERR],
  781. "NICVF%d Qset error", nic->vf_id);
  782. irq = NICVF_INTR_ID_QS_ERR;
  783. ret = request_irq(nic->msix_entries[irq].vector,
  784. nicvf_qs_err_intr_handler,
  785. 0, nic->irq_name[irq], nic);
  786. if (!ret)
  787. nic->irq_allocated[irq] = true;
  788. err:
  789. if (ret)
  790. netdev_err(nic->netdev, "request_irq failed, vector %d\n", irq);
  791. return ret;
  792. }
  793. static void nicvf_unregister_interrupts(struct nicvf *nic)
  794. {
  795. int irq;
  796. /* Free registered interrupts */
  797. for (irq = 0; irq < nic->num_vec; irq++) {
  798. if (!nic->irq_allocated[irq])
  799. continue;
  800. if (irq < NICVF_INTR_ID_SQ)
  801. free_irq(nic->msix_entries[irq].vector, nic->napi[irq]);
  802. else
  803. free_irq(nic->msix_entries[irq].vector, nic);
  804. nic->irq_allocated[irq] = false;
  805. }
  806. /* Disable MSI-X */
  807. nicvf_disable_msix(nic);
  808. }
  809. /* Initialize MSIX vectors and register MISC interrupt.
  810. * Send READY message to PF to check if its alive
  811. */
  812. static int nicvf_register_misc_interrupt(struct nicvf *nic)
  813. {
  814. int ret = 0;
  815. int irq = NICVF_INTR_ID_MISC;
  816. /* Return if mailbox interrupt is already registered */
  817. if (nic->msix_enabled)
  818. return 0;
  819. /* Enable MSI-X */
  820. if (!nicvf_enable_msix(nic))
  821. return 1;
  822. sprintf(nic->irq_name[irq], "%s Mbox", "NICVF");
  823. /* Register Misc interrupt */
  824. ret = request_irq(nic->msix_entries[irq].vector,
  825. nicvf_misc_intr_handler, 0, nic->irq_name[irq], nic);
  826. if (ret)
  827. return ret;
  828. nic->irq_allocated[irq] = true;
  829. /* Enable mailbox interrupt */
  830. nicvf_enable_intr(nic, NICVF_INTR_MBOX, 0);
  831. /* Check if VF is able to communicate with PF */
  832. if (!nicvf_check_pf_ready(nic)) {
  833. nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
  834. nicvf_unregister_interrupts(nic);
  835. return 1;
  836. }
  837. return 0;
  838. }
  839. static netdev_tx_t nicvf_xmit(struct sk_buff *skb, struct net_device *netdev)
  840. {
  841. struct nicvf *nic = netdev_priv(netdev);
  842. int qid = skb_get_queue_mapping(skb);
  843. struct netdev_queue *txq = netdev_get_tx_queue(netdev, qid);
  844. /* Check for minimum packet length */
  845. if (skb->len <= ETH_HLEN) {
  846. dev_kfree_skb(skb);
  847. return NETDEV_TX_OK;
  848. }
  849. if (!netif_tx_queue_stopped(txq) && !nicvf_sq_append_skb(nic, skb)) {
  850. netif_tx_stop_queue(txq);
  851. nic->drv_stats.txq_stop++;
  852. if (netif_msg_tx_err(nic))
  853. netdev_warn(netdev,
  854. "%s: Transmit ring full, stopping SQ%d\n",
  855. netdev->name, qid);
  856. return NETDEV_TX_BUSY;
  857. }
  858. return NETDEV_TX_OK;
  859. }
  860. static inline void nicvf_free_cq_poll(struct nicvf *nic)
  861. {
  862. struct nicvf_cq_poll *cq_poll;
  863. int qidx;
  864. for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
  865. cq_poll = nic->napi[qidx];
  866. if (!cq_poll)
  867. continue;
  868. nic->napi[qidx] = NULL;
  869. kfree(cq_poll);
  870. }
  871. }
  872. int nicvf_stop(struct net_device *netdev)
  873. {
  874. int irq, qidx;
  875. struct nicvf *nic = netdev_priv(netdev);
  876. struct queue_set *qs = nic->qs;
  877. struct nicvf_cq_poll *cq_poll = NULL;
  878. union nic_mbx mbx = {};
  879. mbx.msg.msg = NIC_MBOX_MSG_SHUTDOWN;
  880. nicvf_send_msg_to_pf(nic, &mbx);
  881. netif_carrier_off(netdev);
  882. netif_tx_stop_all_queues(nic->netdev);
  883. nic->link_up = false;
  884. /* Teardown secondary qsets first */
  885. if (!nic->sqs_mode) {
  886. for (qidx = 0; qidx < nic->sqs_count; qidx++) {
  887. if (!nic->snicvf[qidx])
  888. continue;
  889. nicvf_stop(nic->snicvf[qidx]->netdev);
  890. nic->snicvf[qidx] = NULL;
  891. }
  892. }
  893. /* Disable RBDR & QS error interrupts */
  894. for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) {
  895. nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
  896. nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
  897. }
  898. nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
  899. nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
  900. /* Wait for pending IRQ handlers to finish */
  901. for (irq = 0; irq < nic->num_vec; irq++)
  902. synchronize_irq(nic->msix_entries[irq].vector);
  903. tasklet_kill(&nic->rbdr_task);
  904. tasklet_kill(&nic->qs_err_task);
  905. if (nic->rb_work_scheduled)
  906. cancel_delayed_work_sync(&nic->rbdr_work);
  907. for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
  908. cq_poll = nic->napi[qidx];
  909. if (!cq_poll)
  910. continue;
  911. napi_synchronize(&cq_poll->napi);
  912. /* CQ intr is enabled while napi_complete,
  913. * so disable it now
  914. */
  915. nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
  916. nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
  917. napi_disable(&cq_poll->napi);
  918. netif_napi_del(&cq_poll->napi);
  919. }
  920. netif_tx_disable(netdev);
  921. /* Free resources */
  922. nicvf_config_data_transfer(nic, false);
  923. /* Disable HW Qset */
  924. nicvf_qset_config(nic, false);
  925. /* disable mailbox interrupt */
  926. nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
  927. nicvf_unregister_interrupts(nic);
  928. nicvf_free_cq_poll(nic);
  929. /* Clear multiqset info */
  930. nic->pnicvf = nic;
  931. return 0;
  932. }
  933. int nicvf_open(struct net_device *netdev)
  934. {
  935. int err, qidx;
  936. struct nicvf *nic = netdev_priv(netdev);
  937. struct queue_set *qs = nic->qs;
  938. struct nicvf_cq_poll *cq_poll = NULL;
  939. nic->mtu = netdev->mtu;
  940. netif_carrier_off(netdev);
  941. err = nicvf_register_misc_interrupt(nic);
  942. if (err)
  943. return err;
  944. /* Register NAPI handler for processing CQEs */
  945. for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
  946. cq_poll = kzalloc(sizeof(*cq_poll), GFP_KERNEL);
  947. if (!cq_poll) {
  948. err = -ENOMEM;
  949. goto napi_del;
  950. }
  951. cq_poll->cq_idx = qidx;
  952. cq_poll->nicvf = nic;
  953. netif_napi_add(netdev, &cq_poll->napi, nicvf_poll,
  954. NAPI_POLL_WEIGHT);
  955. napi_enable(&cq_poll->napi);
  956. nic->napi[qidx] = cq_poll;
  957. }
  958. /* Check if we got MAC address from PF or else generate a radom MAC */
  959. if (is_zero_ether_addr(netdev->dev_addr)) {
  960. eth_hw_addr_random(netdev);
  961. nicvf_hw_set_mac_addr(nic, netdev);
  962. }
  963. if (nic->set_mac_pending) {
  964. nic->set_mac_pending = false;
  965. nicvf_hw_set_mac_addr(nic, netdev);
  966. }
  967. /* Init tasklet for handling Qset err interrupt */
  968. tasklet_init(&nic->qs_err_task, nicvf_handle_qs_err,
  969. (unsigned long)nic);
  970. /* Init RBDR tasklet which will refill RBDR */
  971. tasklet_init(&nic->rbdr_task, nicvf_rbdr_task,
  972. (unsigned long)nic);
  973. INIT_DELAYED_WORK(&nic->rbdr_work, nicvf_rbdr_work);
  974. /* Configure CPI alorithm */
  975. nic->cpi_alg = cpi_alg;
  976. if (!nic->sqs_mode)
  977. nicvf_config_cpi(nic);
  978. nicvf_request_sqs(nic);
  979. if (nic->sqs_mode)
  980. nicvf_get_primary_vf_struct(nic);
  981. /* Configure receive side scaling */
  982. if (!nic->sqs_mode)
  983. nicvf_rss_init(nic);
  984. err = nicvf_register_interrupts(nic);
  985. if (err)
  986. goto cleanup;
  987. /* Initialize the queues */
  988. err = nicvf_init_resources(nic);
  989. if (err)
  990. goto cleanup;
  991. /* Make sure queue initialization is written */
  992. wmb();
  993. nicvf_reg_write(nic, NIC_VF_INT, -1);
  994. /* Enable Qset err interrupt */
  995. nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
  996. /* Enable completion queue interrupt */
  997. for (qidx = 0; qidx < qs->cq_cnt; qidx++)
  998. nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
  999. /* Enable RBDR threshold interrupt */
  1000. for (qidx = 0; qidx < qs->rbdr_cnt; qidx++)
  1001. nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx);
  1002. nic->drv_stats.txq_stop = 0;
  1003. nic->drv_stats.txq_wake = 0;
  1004. return 0;
  1005. cleanup:
  1006. nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
  1007. nicvf_unregister_interrupts(nic);
  1008. tasklet_kill(&nic->qs_err_task);
  1009. tasklet_kill(&nic->rbdr_task);
  1010. napi_del:
  1011. for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
  1012. cq_poll = nic->napi[qidx];
  1013. if (!cq_poll)
  1014. continue;
  1015. napi_disable(&cq_poll->napi);
  1016. netif_napi_del(&cq_poll->napi);
  1017. }
  1018. nicvf_free_cq_poll(nic);
  1019. return err;
  1020. }
  1021. static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu)
  1022. {
  1023. union nic_mbx mbx = {};
  1024. mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS;
  1025. mbx.frs.max_frs = mtu;
  1026. mbx.frs.vf_id = nic->vf_id;
  1027. return nicvf_send_msg_to_pf(nic, &mbx);
  1028. }
  1029. static int nicvf_change_mtu(struct net_device *netdev, int new_mtu)
  1030. {
  1031. struct nicvf *nic = netdev_priv(netdev);
  1032. if (new_mtu > NIC_HW_MAX_FRS)
  1033. return -EINVAL;
  1034. if (new_mtu < NIC_HW_MIN_FRS)
  1035. return -EINVAL;
  1036. if (nicvf_update_hw_max_frs(nic, new_mtu))
  1037. return -EINVAL;
  1038. netdev->mtu = new_mtu;
  1039. nic->mtu = new_mtu;
  1040. return 0;
  1041. }
  1042. static int nicvf_set_mac_address(struct net_device *netdev, void *p)
  1043. {
  1044. struct sockaddr *addr = p;
  1045. struct nicvf *nic = netdev_priv(netdev);
  1046. if (!is_valid_ether_addr(addr->sa_data))
  1047. return -EADDRNOTAVAIL;
  1048. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1049. if (nic->msix_enabled) {
  1050. if (nicvf_hw_set_mac_addr(nic, netdev))
  1051. return -EBUSY;
  1052. } else {
  1053. nic->set_mac_pending = true;
  1054. }
  1055. return 0;
  1056. }
  1057. void nicvf_update_lmac_stats(struct nicvf *nic)
  1058. {
  1059. int stat = 0;
  1060. union nic_mbx mbx = {};
  1061. if (!netif_running(nic->netdev))
  1062. return;
  1063. mbx.bgx_stats.msg = NIC_MBOX_MSG_BGX_STATS;
  1064. mbx.bgx_stats.vf_id = nic->vf_id;
  1065. /* Rx stats */
  1066. mbx.bgx_stats.rx = 1;
  1067. while (stat < BGX_RX_STATS_COUNT) {
  1068. mbx.bgx_stats.idx = stat;
  1069. if (nicvf_send_msg_to_pf(nic, &mbx))
  1070. return;
  1071. stat++;
  1072. }
  1073. stat = 0;
  1074. /* Tx stats */
  1075. mbx.bgx_stats.rx = 0;
  1076. while (stat < BGX_TX_STATS_COUNT) {
  1077. mbx.bgx_stats.idx = stat;
  1078. if (nicvf_send_msg_to_pf(nic, &mbx))
  1079. return;
  1080. stat++;
  1081. }
  1082. }
  1083. void nicvf_update_stats(struct nicvf *nic)
  1084. {
  1085. int qidx;
  1086. struct nicvf_hw_stats *stats = &nic->hw_stats;
  1087. struct nicvf_drv_stats *drv_stats = &nic->drv_stats;
  1088. struct queue_set *qs = nic->qs;
  1089. #define GET_RX_STATS(reg) \
  1090. nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3))
  1091. #define GET_TX_STATS(reg) \
  1092. nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3))
  1093. stats->rx_bytes = GET_RX_STATS(RX_OCTS);
  1094. stats->rx_ucast_frames = GET_RX_STATS(RX_UCAST);
  1095. stats->rx_bcast_frames = GET_RX_STATS(RX_BCAST);
  1096. stats->rx_mcast_frames = GET_RX_STATS(RX_MCAST);
  1097. stats->rx_fcs_errors = GET_RX_STATS(RX_FCS);
  1098. stats->rx_l2_errors = GET_RX_STATS(RX_L2ERR);
  1099. stats->rx_drop_red = GET_RX_STATS(RX_RED);
  1100. stats->rx_drop_red_bytes = GET_RX_STATS(RX_RED_OCTS);
  1101. stats->rx_drop_overrun = GET_RX_STATS(RX_ORUN);
  1102. stats->rx_drop_overrun_bytes = GET_RX_STATS(RX_ORUN_OCTS);
  1103. stats->rx_drop_bcast = GET_RX_STATS(RX_DRP_BCAST);
  1104. stats->rx_drop_mcast = GET_RX_STATS(RX_DRP_MCAST);
  1105. stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST);
  1106. stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST);
  1107. stats->tx_bytes_ok = GET_TX_STATS(TX_OCTS);
  1108. stats->tx_ucast_frames_ok = GET_TX_STATS(TX_UCAST);
  1109. stats->tx_bcast_frames_ok = GET_TX_STATS(TX_BCAST);
  1110. stats->tx_mcast_frames_ok = GET_TX_STATS(TX_MCAST);
  1111. stats->tx_drops = GET_TX_STATS(TX_DROP);
  1112. drv_stats->tx_frames_ok = stats->tx_ucast_frames_ok +
  1113. stats->tx_bcast_frames_ok +
  1114. stats->tx_mcast_frames_ok;
  1115. drv_stats->rx_frames_ok = stats->rx_ucast_frames +
  1116. stats->rx_bcast_frames +
  1117. stats->rx_mcast_frames;
  1118. drv_stats->rx_drops = stats->rx_drop_red +
  1119. stats->rx_drop_overrun;
  1120. drv_stats->tx_drops = stats->tx_drops;
  1121. /* Update RQ and SQ stats */
  1122. for (qidx = 0; qidx < qs->rq_cnt; qidx++)
  1123. nicvf_update_rq_stats(nic, qidx);
  1124. for (qidx = 0; qidx < qs->sq_cnt; qidx++)
  1125. nicvf_update_sq_stats(nic, qidx);
  1126. }
  1127. static struct rtnl_link_stats64 *nicvf_get_stats64(struct net_device *netdev,
  1128. struct rtnl_link_stats64 *stats)
  1129. {
  1130. struct nicvf *nic = netdev_priv(netdev);
  1131. struct nicvf_hw_stats *hw_stats = &nic->hw_stats;
  1132. struct nicvf_drv_stats *drv_stats = &nic->drv_stats;
  1133. nicvf_update_stats(nic);
  1134. stats->rx_bytes = hw_stats->rx_bytes;
  1135. stats->rx_packets = drv_stats->rx_frames_ok;
  1136. stats->rx_dropped = drv_stats->rx_drops;
  1137. stats->multicast = hw_stats->rx_mcast_frames;
  1138. stats->tx_bytes = hw_stats->tx_bytes_ok;
  1139. stats->tx_packets = drv_stats->tx_frames_ok;
  1140. stats->tx_dropped = drv_stats->tx_drops;
  1141. return stats;
  1142. }
  1143. static void nicvf_tx_timeout(struct net_device *dev)
  1144. {
  1145. struct nicvf *nic = netdev_priv(dev);
  1146. if (netif_msg_tx_err(nic))
  1147. netdev_warn(dev, "%s: Transmit timed out, resetting\n",
  1148. dev->name);
  1149. schedule_work(&nic->reset_task);
  1150. }
  1151. static void nicvf_reset_task(struct work_struct *work)
  1152. {
  1153. struct nicvf *nic;
  1154. nic = container_of(work, struct nicvf, reset_task);
  1155. if (!netif_running(nic->netdev))
  1156. return;
  1157. nicvf_stop(nic->netdev);
  1158. nicvf_open(nic->netdev);
  1159. nic->netdev->trans_start = jiffies;
  1160. }
  1161. static int nicvf_config_loopback(struct nicvf *nic,
  1162. netdev_features_t features)
  1163. {
  1164. union nic_mbx mbx = {};
  1165. mbx.lbk.msg = NIC_MBOX_MSG_LOOPBACK;
  1166. mbx.lbk.vf_id = nic->vf_id;
  1167. mbx.lbk.enable = (features & NETIF_F_LOOPBACK) != 0;
  1168. return nicvf_send_msg_to_pf(nic, &mbx);
  1169. }
  1170. static netdev_features_t nicvf_fix_features(struct net_device *netdev,
  1171. netdev_features_t features)
  1172. {
  1173. struct nicvf *nic = netdev_priv(netdev);
  1174. if ((features & NETIF_F_LOOPBACK) &&
  1175. netif_running(netdev) && !nic->loopback_supported)
  1176. features &= ~NETIF_F_LOOPBACK;
  1177. return features;
  1178. }
  1179. static int nicvf_set_features(struct net_device *netdev,
  1180. netdev_features_t features)
  1181. {
  1182. struct nicvf *nic = netdev_priv(netdev);
  1183. netdev_features_t changed = features ^ netdev->features;
  1184. if (changed & NETIF_F_HW_VLAN_CTAG_RX)
  1185. nicvf_config_vlan_stripping(nic, features);
  1186. if ((changed & NETIF_F_LOOPBACK) && netif_running(netdev))
  1187. return nicvf_config_loopback(nic, features);
  1188. return 0;
  1189. }
  1190. static const struct net_device_ops nicvf_netdev_ops = {
  1191. .ndo_open = nicvf_open,
  1192. .ndo_stop = nicvf_stop,
  1193. .ndo_start_xmit = nicvf_xmit,
  1194. .ndo_change_mtu = nicvf_change_mtu,
  1195. .ndo_set_mac_address = nicvf_set_mac_address,
  1196. .ndo_get_stats64 = nicvf_get_stats64,
  1197. .ndo_tx_timeout = nicvf_tx_timeout,
  1198. .ndo_fix_features = nicvf_fix_features,
  1199. .ndo_set_features = nicvf_set_features,
  1200. };
  1201. static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1202. {
  1203. struct device *dev = &pdev->dev;
  1204. struct net_device *netdev;
  1205. struct nicvf *nic;
  1206. int err, qcount;
  1207. err = pci_enable_device(pdev);
  1208. if (err) {
  1209. dev_err(dev, "Failed to enable PCI device\n");
  1210. return err;
  1211. }
  1212. err = pci_request_regions(pdev, DRV_NAME);
  1213. if (err) {
  1214. dev_err(dev, "PCI request regions failed 0x%x\n", err);
  1215. goto err_disable_device;
  1216. }
  1217. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(48));
  1218. if (err) {
  1219. dev_err(dev, "Unable to get usable DMA configuration\n");
  1220. goto err_release_regions;
  1221. }
  1222. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48));
  1223. if (err) {
  1224. dev_err(dev, "unable to get 48-bit DMA for consistent allocations\n");
  1225. goto err_release_regions;
  1226. }
  1227. qcount = MAX_CMP_QUEUES_PER_QS;
  1228. /* Restrict multiqset support only for host bound VFs */
  1229. if (pdev->is_virtfn) {
  1230. /* Set max number of queues per VF */
  1231. qcount = roundup(num_online_cpus(), MAX_CMP_QUEUES_PER_QS);
  1232. qcount = min(qcount,
  1233. (MAX_SQS_PER_VF + 1) * MAX_CMP_QUEUES_PER_QS);
  1234. }
  1235. netdev = alloc_etherdev_mqs(sizeof(struct nicvf), qcount, qcount);
  1236. if (!netdev) {
  1237. err = -ENOMEM;
  1238. goto err_release_regions;
  1239. }
  1240. pci_set_drvdata(pdev, netdev);
  1241. SET_NETDEV_DEV(netdev, &pdev->dev);
  1242. nic = netdev_priv(netdev);
  1243. nic->netdev = netdev;
  1244. nic->pdev = pdev;
  1245. nic->pnicvf = nic;
  1246. nic->max_queues = qcount;
  1247. /* MAP VF's configuration registers */
  1248. nic->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);
  1249. if (!nic->reg_base) {
  1250. dev_err(dev, "Cannot map config register space, aborting\n");
  1251. err = -ENOMEM;
  1252. goto err_free_netdev;
  1253. }
  1254. err = nicvf_set_qset_resources(nic);
  1255. if (err)
  1256. goto err_free_netdev;
  1257. /* Check if PF is alive and get MAC address for this VF */
  1258. err = nicvf_register_misc_interrupt(nic);
  1259. if (err)
  1260. goto err_free_netdev;
  1261. nicvf_send_vf_struct(nic);
  1262. /* Check if this VF is in QS only mode */
  1263. if (nic->sqs_mode)
  1264. return 0;
  1265. err = nicvf_set_real_num_queues(netdev, nic->tx_queues, nic->rx_queues);
  1266. if (err)
  1267. goto err_unregister_interrupts;
  1268. netdev->hw_features = (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
  1269. NETIF_F_TSO | NETIF_F_GRO |
  1270. NETIF_F_HW_VLAN_CTAG_RX);
  1271. netdev->hw_features |= NETIF_F_RXHASH;
  1272. netdev->features |= netdev->hw_features;
  1273. netdev->hw_features |= NETIF_F_LOOPBACK;
  1274. netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO;
  1275. netdev->netdev_ops = &nicvf_netdev_ops;
  1276. netdev->watchdog_timeo = NICVF_TX_TIMEOUT;
  1277. INIT_WORK(&nic->reset_task, nicvf_reset_task);
  1278. err = register_netdev(netdev);
  1279. if (err) {
  1280. dev_err(dev, "Failed to register netdevice\n");
  1281. goto err_unregister_interrupts;
  1282. }
  1283. nic->msg_enable = debug;
  1284. nicvf_set_ethtool_ops(netdev);
  1285. return 0;
  1286. err_unregister_interrupts:
  1287. nicvf_unregister_interrupts(nic);
  1288. err_free_netdev:
  1289. pci_set_drvdata(pdev, NULL);
  1290. free_netdev(netdev);
  1291. err_release_regions:
  1292. pci_release_regions(pdev);
  1293. err_disable_device:
  1294. pci_disable_device(pdev);
  1295. return err;
  1296. }
  1297. static void nicvf_remove(struct pci_dev *pdev)
  1298. {
  1299. struct net_device *netdev = pci_get_drvdata(pdev);
  1300. struct nicvf *nic;
  1301. struct net_device *pnetdev;
  1302. if (!netdev)
  1303. return;
  1304. nic = netdev_priv(netdev);
  1305. pnetdev = nic->pnicvf->netdev;
  1306. /* Check if this Qset is assigned to different VF.
  1307. * If yes, clean primary and all secondary Qsets.
  1308. */
  1309. if (pnetdev && (pnetdev->reg_state == NETREG_REGISTERED))
  1310. unregister_netdev(pnetdev);
  1311. nicvf_unregister_interrupts(nic);
  1312. pci_set_drvdata(pdev, NULL);
  1313. free_netdev(netdev);
  1314. pci_release_regions(pdev);
  1315. pci_disable_device(pdev);
  1316. }
  1317. static void nicvf_shutdown(struct pci_dev *pdev)
  1318. {
  1319. nicvf_remove(pdev);
  1320. }
  1321. static struct pci_driver nicvf_driver = {
  1322. .name = DRV_NAME,
  1323. .id_table = nicvf_id_table,
  1324. .probe = nicvf_probe,
  1325. .remove = nicvf_remove,
  1326. .shutdown = nicvf_shutdown,
  1327. };
  1328. static int __init nicvf_init_module(void)
  1329. {
  1330. pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION);
  1331. return pci_register_driver(&nicvf_driver);
  1332. }
  1333. static void __exit nicvf_cleanup_module(void)
  1334. {
  1335. pci_unregister_driver(&nicvf_driver);
  1336. }
  1337. module_init(nicvf_init_module);
  1338. module_exit(nicvf_cleanup_module);