cxgb3_ioctl.h 3.8 KB

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  1. /*
  2. * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #ifndef __CHIOCTL_H__
  33. #define __CHIOCTL_H__
  34. /*
  35. * Ioctl commands specific to this driver.
  36. */
  37. enum {
  38. CHELSIO_GETMTUTAB = 1029,
  39. CHELSIO_SETMTUTAB = 1030,
  40. CHELSIO_SET_PM = 1032,
  41. CHELSIO_GET_PM = 1033,
  42. CHELSIO_GET_MEM = 1038,
  43. CHELSIO_LOAD_FW = 1041,
  44. CHELSIO_SET_TRACE_FILTER = 1044,
  45. CHELSIO_SET_QSET_PARAMS = 1045,
  46. CHELSIO_GET_QSET_PARAMS = 1046,
  47. CHELSIO_SET_QSET_NUM = 1047,
  48. CHELSIO_GET_QSET_NUM = 1048,
  49. };
  50. struct ch_reg {
  51. uint32_t cmd;
  52. uint32_t addr;
  53. uint32_t val;
  54. };
  55. struct ch_cntxt {
  56. uint32_t cmd;
  57. uint32_t cntxt_type;
  58. uint32_t cntxt_id;
  59. uint32_t data[4];
  60. };
  61. /* context types */
  62. enum { CNTXT_TYPE_EGRESS, CNTXT_TYPE_FL, CNTXT_TYPE_RSP, CNTXT_TYPE_CQ };
  63. struct ch_desc {
  64. uint32_t cmd;
  65. uint32_t queue_num;
  66. uint32_t idx;
  67. uint32_t size;
  68. uint8_t data[128];
  69. };
  70. struct ch_mem_range {
  71. uint32_t cmd;
  72. uint32_t mem_id;
  73. uint32_t addr;
  74. uint32_t len;
  75. uint32_t version;
  76. uint8_t buf[0];
  77. };
  78. struct ch_qset_params {
  79. uint32_t cmd;
  80. uint32_t qset_idx;
  81. int32_t txq_size[3];
  82. int32_t rspq_size;
  83. int32_t fl_size[2];
  84. int32_t intr_lat;
  85. int32_t polling;
  86. int32_t lro;
  87. int32_t cong_thres;
  88. int32_t vector;
  89. int32_t qnum;
  90. };
  91. struct ch_pktsched_params {
  92. uint32_t cmd;
  93. uint8_t sched;
  94. uint8_t idx;
  95. uint8_t min;
  96. uint8_t max;
  97. uint8_t binding;
  98. };
  99. #ifndef TCB_SIZE
  100. # define TCB_SIZE 128
  101. #endif
  102. /* TCB size in 32-bit words */
  103. #define TCB_WORDS (TCB_SIZE / 4)
  104. enum { MEM_CM, MEM_PMRX, MEM_PMTX }; /* ch_mem_range.mem_id values */
  105. struct ch_mtus {
  106. uint32_t cmd;
  107. uint32_t nmtus;
  108. uint16_t mtus[NMTUS];
  109. };
  110. struct ch_pm {
  111. uint32_t cmd;
  112. uint32_t tx_pg_sz;
  113. uint32_t tx_num_pg;
  114. uint32_t rx_pg_sz;
  115. uint32_t rx_num_pg;
  116. uint32_t pm_total;
  117. };
  118. struct ch_tcam {
  119. uint32_t cmd;
  120. uint32_t tcam_size;
  121. uint32_t nservers;
  122. uint32_t nroutes;
  123. uint32_t nfilters;
  124. };
  125. struct ch_tcb {
  126. uint32_t cmd;
  127. uint32_t tcb_index;
  128. uint32_t tcb_data[TCB_WORDS];
  129. };
  130. struct ch_tcam_word {
  131. uint32_t cmd;
  132. uint32_t addr;
  133. uint32_t buf[3];
  134. };
  135. struct ch_trace {
  136. uint32_t cmd;
  137. uint32_t sip;
  138. uint32_t sip_mask;
  139. uint32_t dip;
  140. uint32_t dip_mask;
  141. uint16_t sport;
  142. uint16_t sport_mask;
  143. uint16_t dport;
  144. uint16_t dport_mask;
  145. uint32_t vlan:12;
  146. uint32_t vlan_mask:12;
  147. uint32_t intf:4;
  148. uint32_t intf_mask:4;
  149. uint8_t proto;
  150. uint8_t proto_mask;
  151. uint8_t invert_match:1;
  152. uint8_t config_tx:1;
  153. uint8_t config_rx:1;
  154. uint8_t trace_tx:1;
  155. uint8_t trace_rx:1;
  156. };
  157. #define SIOCCHIOCTL SIOCDEVPRIVATE
  158. #endif