adapter.h 17 KB

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  1. /*
  2. * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
  3. * driver for Linux.
  4. *
  5. * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
  6. *
  7. * This software is available to you under a choice of one of two
  8. * licenses. You may choose to be licensed under the terms of the GNU
  9. * General Public License (GPL) Version 2, available from the file
  10. * COPYING in the main directory of this source tree, or the
  11. * OpenIB.org BSD license below:
  12. *
  13. * Redistribution and use in source and binary forms, with or
  14. * without modification, are permitted provided that the following
  15. * conditions are met:
  16. *
  17. * - Redistributions of source code must retain the above
  18. * copyright notice, this list of conditions and the following
  19. * disclaimer.
  20. *
  21. * - Redistributions in binary form must reproduce the above
  22. * copyright notice, this list of conditions and the following
  23. * disclaimer in the documentation and/or other materials
  24. * provided with the distribution.
  25. *
  26. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33. * SOFTWARE.
  34. */
  35. /*
  36. * This file should not be included directly. Include t4vf_common.h instead.
  37. */
  38. #ifndef __CXGB4VF_ADAPTER_H__
  39. #define __CXGB4VF_ADAPTER_H__
  40. #include <linux/interrupt.h>
  41. #include <linux/pci.h>
  42. #include <linux/spinlock.h>
  43. #include <linux/skbuff.h>
  44. #include <linux/if_ether.h>
  45. #include <linux/netdevice.h>
  46. #include "../cxgb4/t4_hw.h"
  47. /*
  48. * Constants of the implementation.
  49. */
  50. enum {
  51. MAX_NPORTS = 1, /* max # of "ports" */
  52. MAX_PORT_QSETS = 8, /* max # of Queue Sets / "port" */
  53. MAX_ETH_QSETS = MAX_NPORTS*MAX_PORT_QSETS,
  54. /*
  55. * MSI-X interrupt index usage.
  56. */
  57. MSIX_FW = 0, /* MSI-X index for firmware Q */
  58. MSIX_IQFLINT = 1, /* MSI-X index base for Ingress Qs */
  59. MSIX_EXTRAS = 1,
  60. MSIX_ENTRIES = MAX_ETH_QSETS + MSIX_EXTRAS,
  61. /*
  62. * The maximum number of Ingress and Egress Queues is determined by
  63. * the maximum number of "Queue Sets" which we support plus any
  64. * ancillary queues. Each "Queue Set" requires one Ingress Queue
  65. * for RX Packet Ingress Event notifications and two Egress Queues for
  66. * a Free List and an Ethernet TX list.
  67. */
  68. INGQ_EXTRAS = 2, /* firmware event queue and */
  69. /* forwarded interrupts */
  70. MAX_INGQ = MAX_ETH_QSETS+INGQ_EXTRAS,
  71. MAX_EGRQ = MAX_ETH_QSETS*2,
  72. };
  73. /*
  74. * Forward structure definition references.
  75. */
  76. struct adapter;
  77. struct sge_eth_rxq;
  78. struct sge_rspq;
  79. /*
  80. * Per-"port" information. This is really per-Virtual Interface information
  81. * but the use of the "port" nomanclature makes it easier to go back and forth
  82. * between the PF and VF drivers ...
  83. */
  84. struct port_info {
  85. struct adapter *adapter; /* our adapter */
  86. u16 viid; /* virtual interface ID */
  87. s16 xact_addr_filt; /* index of our MAC address filter */
  88. u16 rss_size; /* size of VI's RSS table slice */
  89. u8 pidx; /* index into adapter port[] */
  90. s8 mdio_addr;
  91. u8 port_type; /* firmware port type */
  92. u8 mod_type; /* firmware module type */
  93. u8 port_id; /* physical port ID */
  94. u8 nqsets; /* # of "Queue Sets" */
  95. u8 first_qset; /* index of first "Queue Set" */
  96. struct link_config link_cfg; /* physical port configuration */
  97. };
  98. /*
  99. * Scatter Gather Engine resources for the "adapter". Our ingress and egress
  100. * queues are organized into "Queue Sets" with one ingress and one egress
  101. * queue per Queue Set. These Queue Sets are aportionable between the "ports"
  102. * (Virtual Interfaces). One extra ingress queue is used to receive
  103. * asynchronous messages from the firmware. Note that the "Queue IDs" that we
  104. * use here are really "Relative Queue IDs" which are returned as part of the
  105. * firmware command to allocate queues. These queue IDs are relative to the
  106. * absolute Queue ID base of the section of the Queue ID space allocated to
  107. * the PF/VF.
  108. */
  109. /*
  110. * SGE free-list queue state.
  111. */
  112. struct rx_sw_desc;
  113. struct sge_fl {
  114. unsigned int avail; /* # of available RX buffers */
  115. unsigned int pend_cred; /* new buffers since last FL DB ring */
  116. unsigned int cidx; /* consumer index */
  117. unsigned int pidx; /* producer index */
  118. unsigned long alloc_failed; /* # of buffer allocation failures */
  119. unsigned long large_alloc_failed;
  120. unsigned long starving; /* # of times FL was found starving */
  121. /*
  122. * Write-once/infrequently fields.
  123. * -------------------------------
  124. */
  125. unsigned int cntxt_id; /* SGE relative QID for the free list */
  126. unsigned int abs_id; /* SGE absolute QID for the free list */
  127. unsigned int size; /* capacity of free list */
  128. struct rx_sw_desc *sdesc; /* address of SW RX descriptor ring */
  129. __be64 *desc; /* address of HW RX descriptor ring */
  130. dma_addr_t addr; /* PCI bus address of hardware ring */
  131. void __iomem *bar2_addr; /* address of BAR2 Queue registers */
  132. unsigned int bar2_qid; /* Queue ID for BAR2 Queue registers */
  133. };
  134. /*
  135. * An ingress packet gather list.
  136. */
  137. struct pkt_gl {
  138. struct page_frag frags[MAX_SKB_FRAGS];
  139. void *va; /* virtual address of first byte */
  140. unsigned int nfrags; /* # of fragments */
  141. unsigned int tot_len; /* total length of fragments */
  142. };
  143. typedef int (*rspq_handler_t)(struct sge_rspq *, const __be64 *,
  144. const struct pkt_gl *);
  145. /*
  146. * State for an SGE Response Queue.
  147. */
  148. struct sge_rspq {
  149. struct napi_struct napi; /* NAPI scheduling control */
  150. const __be64 *cur_desc; /* current descriptor in queue */
  151. unsigned int cidx; /* consumer index */
  152. u8 gen; /* current generation bit */
  153. u8 next_intr_params; /* holdoff params for next interrupt */
  154. int offset; /* offset into current FL buffer */
  155. unsigned int unhandled_irqs; /* bogus interrupts */
  156. /*
  157. * Write-once/infrequently fields.
  158. * -------------------------------
  159. */
  160. u8 intr_params; /* interrupt holdoff parameters */
  161. u8 pktcnt_idx; /* interrupt packet threshold */
  162. u8 idx; /* queue index within its group */
  163. u16 cntxt_id; /* SGE rel QID for the response Q */
  164. u16 abs_id; /* SGE abs QID for the response Q */
  165. __be64 *desc; /* address of hardware response ring */
  166. dma_addr_t phys_addr; /* PCI bus address of ring */
  167. void __iomem *bar2_addr; /* address of BAR2 Queue registers */
  168. unsigned int bar2_qid; /* Queue ID for BAR2 Queue registers */
  169. unsigned int iqe_len; /* entry size */
  170. unsigned int size; /* capcity of response Q */
  171. struct adapter *adapter; /* our adapter */
  172. struct net_device *netdev; /* associated net device */
  173. rspq_handler_t handler; /* the handler for this response Q */
  174. };
  175. /*
  176. * Ethernet queue statistics
  177. */
  178. struct sge_eth_stats {
  179. unsigned long pkts; /* # of ethernet packets */
  180. unsigned long lro_pkts; /* # of LRO super packets */
  181. unsigned long lro_merged; /* # of wire packets merged by LRO */
  182. unsigned long rx_cso; /* # of Rx checksum offloads */
  183. unsigned long vlan_ex; /* # of Rx VLAN extractions */
  184. unsigned long rx_drops; /* # of packets dropped due to no mem */
  185. };
  186. /*
  187. * State for an Ethernet Receive Queue.
  188. */
  189. struct sge_eth_rxq {
  190. struct sge_rspq rspq; /* Response Queue */
  191. struct sge_fl fl; /* Free List */
  192. struct sge_eth_stats stats; /* receive statistics */
  193. };
  194. /*
  195. * SGE Transmit Queue state. This contains all of the resources associated
  196. * with the hardware status of a TX Queue which is a circular ring of hardware
  197. * TX Descriptors. For convenience, it also contains a pointer to a parallel
  198. * "Software Descriptor" array but we don't know anything about it here other
  199. * than its type name.
  200. */
  201. struct tx_desc {
  202. /*
  203. * Egress Queues are measured in units of SGE_EQ_IDXSIZE by the
  204. * hardware: Sizes, Producer and Consumer indices, etc.
  205. */
  206. __be64 flit[SGE_EQ_IDXSIZE/sizeof(__be64)];
  207. };
  208. struct tx_sw_desc;
  209. struct sge_txq {
  210. unsigned int in_use; /* # of in-use TX descriptors */
  211. unsigned int size; /* # of descriptors */
  212. unsigned int cidx; /* SW consumer index */
  213. unsigned int pidx; /* producer index */
  214. unsigned long stops; /* # of times queue has been stopped */
  215. unsigned long restarts; /* # of queue restarts */
  216. /*
  217. * Write-once/infrequently fields.
  218. * -------------------------------
  219. */
  220. unsigned int cntxt_id; /* SGE relative QID for the TX Q */
  221. unsigned int abs_id; /* SGE absolute QID for the TX Q */
  222. struct tx_desc *desc; /* address of HW TX descriptor ring */
  223. struct tx_sw_desc *sdesc; /* address of SW TX descriptor ring */
  224. struct sge_qstat *stat; /* queue status entry */
  225. dma_addr_t phys_addr; /* PCI bus address of hardware ring */
  226. void __iomem *bar2_addr; /* address of BAR2 Queue registers */
  227. unsigned int bar2_qid; /* Queue ID for BAR2 Queue registers */
  228. };
  229. /*
  230. * State for an Ethernet Transmit Queue.
  231. */
  232. struct sge_eth_txq {
  233. struct sge_txq q; /* SGE TX Queue */
  234. struct netdev_queue *txq; /* associated netdev TX queue */
  235. unsigned long tso; /* # of TSO requests */
  236. unsigned long tx_cso; /* # of TX checksum offloads */
  237. unsigned long vlan_ins; /* # of TX VLAN insertions */
  238. unsigned long mapping_err; /* # of I/O MMU packet mapping errors */
  239. };
  240. /*
  241. * The complete set of Scatter/Gather Engine resources.
  242. */
  243. struct sge {
  244. /*
  245. * Our "Queue Sets" ...
  246. */
  247. struct sge_eth_txq ethtxq[MAX_ETH_QSETS];
  248. struct sge_eth_rxq ethrxq[MAX_ETH_QSETS];
  249. /*
  250. * Extra ingress queues for asynchronous firmware events and
  251. * forwarded interrupts (when in MSI mode).
  252. */
  253. struct sge_rspq fw_evtq ____cacheline_aligned_in_smp;
  254. struct sge_rspq intrq ____cacheline_aligned_in_smp;
  255. spinlock_t intrq_lock;
  256. /*
  257. * State for managing "starving Free Lists" -- Free Lists which have
  258. * fallen below a certain threshold of buffers available to the
  259. * hardware and attempts to refill them up to that threshold have
  260. * failed. We have a regular "slow tick" timer process which will
  261. * make periodic attempts to refill these starving Free Lists ...
  262. */
  263. DECLARE_BITMAP(starving_fl, MAX_EGRQ);
  264. struct timer_list rx_timer;
  265. /*
  266. * State for cleaning up completed TX descriptors.
  267. */
  268. struct timer_list tx_timer;
  269. /*
  270. * Write-once/infrequently fields.
  271. * -------------------------------
  272. */
  273. u16 max_ethqsets; /* # of available Ethernet queue sets */
  274. u16 ethqsets; /* # of active Ethernet queue sets */
  275. u16 ethtxq_rover; /* Tx queue to clean up next */
  276. u16 timer_val[SGE_NTIMERS]; /* interrupt holdoff timer array */
  277. u8 counter_val[SGE_NCOUNTERS]; /* interrupt RX threshold array */
  278. /* Decoded Adapter Parameters.
  279. */
  280. u32 fl_pg_order; /* large page allocation size */
  281. u32 stat_len; /* length of status page at ring end */
  282. u32 pktshift; /* padding between CPL & packet data */
  283. u32 fl_align; /* response queue message alignment */
  284. u32 fl_starve_thres; /* Free List starvation threshold */
  285. /*
  286. * Reverse maps from Absolute Queue IDs to associated queue pointers.
  287. * The absolute Queue IDs are in a compact range which start at a
  288. * [potentially large] Base Queue ID. We perform the reverse map by
  289. * first converting the Absolute Queue ID into a Relative Queue ID by
  290. * subtracting off the Base Queue ID and then use a Relative Queue ID
  291. * indexed table to get the pointer to the corresponding software
  292. * queue structure.
  293. */
  294. unsigned int egr_base;
  295. unsigned int ingr_base;
  296. void *egr_map[MAX_EGRQ];
  297. struct sge_rspq *ingr_map[MAX_INGQ];
  298. };
  299. /*
  300. * Utility macros to convert Absolute- to Relative-Queue indices and Egress-
  301. * and Ingress-Queues. The EQ_MAP() and IQ_MAP() macros which provide
  302. * pointers to Ingress- and Egress-Queues can be used as both L- and R-values
  303. */
  304. #define EQ_IDX(s, abs_id) ((unsigned int)((abs_id) - (s)->egr_base))
  305. #define IQ_IDX(s, abs_id) ((unsigned int)((abs_id) - (s)->ingr_base))
  306. #define EQ_MAP(s, abs_id) ((s)->egr_map[EQ_IDX(s, abs_id)])
  307. #define IQ_MAP(s, abs_id) ((s)->ingr_map[IQ_IDX(s, abs_id)])
  308. /*
  309. * Macro to iterate across Queue Sets ("rxq" is a historic misnomer).
  310. */
  311. #define for_each_ethrxq(sge, iter) \
  312. for (iter = 0; iter < (sge)->ethqsets; iter++)
  313. /*
  314. * Per-"adapter" (Virtual Function) information.
  315. */
  316. struct adapter {
  317. /* PCI resources */
  318. void __iomem *regs;
  319. void __iomem *bar2;
  320. struct pci_dev *pdev;
  321. struct device *pdev_dev;
  322. /* "adapter" resources */
  323. unsigned long registered_device_map;
  324. unsigned long open_device_map;
  325. unsigned long flags;
  326. struct adapter_params params;
  327. /* queue and interrupt resources */
  328. struct {
  329. unsigned short vec;
  330. char desc[22];
  331. } msix_info[MSIX_ENTRIES];
  332. struct sge sge;
  333. /* Linux network device resources */
  334. struct net_device *port[MAX_NPORTS];
  335. const char *name;
  336. unsigned int msg_enable;
  337. /* debugfs resources */
  338. struct dentry *debugfs_root;
  339. /* various locks */
  340. spinlock_t stats_lock;
  341. };
  342. enum { /* adapter flags */
  343. FULL_INIT_DONE = (1UL << 0),
  344. USING_MSI = (1UL << 1),
  345. USING_MSIX = (1UL << 2),
  346. QUEUES_BOUND = (1UL << 3),
  347. };
  348. /*
  349. * The following register read/write routine definitions are required by
  350. * the common code.
  351. */
  352. /**
  353. * t4_read_reg - read a HW register
  354. * @adapter: the adapter
  355. * @reg_addr: the register address
  356. *
  357. * Returns the 32-bit value of the given HW register.
  358. */
  359. static inline u32 t4_read_reg(struct adapter *adapter, u32 reg_addr)
  360. {
  361. return readl(adapter->regs + reg_addr);
  362. }
  363. /**
  364. * t4_write_reg - write a HW register
  365. * @adapter: the adapter
  366. * @reg_addr: the register address
  367. * @val: the value to write
  368. *
  369. * Write a 32-bit value into the given HW register.
  370. */
  371. static inline void t4_write_reg(struct adapter *adapter, u32 reg_addr, u32 val)
  372. {
  373. writel(val, adapter->regs + reg_addr);
  374. }
  375. #ifndef readq
  376. static inline u64 readq(const volatile void __iomem *addr)
  377. {
  378. return readl(addr) + ((u64)readl(addr + 4) << 32);
  379. }
  380. static inline void writeq(u64 val, volatile void __iomem *addr)
  381. {
  382. writel(val, addr);
  383. writel(val >> 32, addr + 4);
  384. }
  385. #endif
  386. /**
  387. * t4_read_reg64 - read a 64-bit HW register
  388. * @adapter: the adapter
  389. * @reg_addr: the register address
  390. *
  391. * Returns the 64-bit value of the given HW register.
  392. */
  393. static inline u64 t4_read_reg64(struct adapter *adapter, u32 reg_addr)
  394. {
  395. return readq(adapter->regs + reg_addr);
  396. }
  397. /**
  398. * t4_write_reg64 - write a 64-bit HW register
  399. * @adapter: the adapter
  400. * @reg_addr: the register address
  401. * @val: the value to write
  402. *
  403. * Write a 64-bit value into the given HW register.
  404. */
  405. static inline void t4_write_reg64(struct adapter *adapter, u32 reg_addr,
  406. u64 val)
  407. {
  408. writeq(val, adapter->regs + reg_addr);
  409. }
  410. /**
  411. * port_name - return the string name of a port
  412. * @adapter: the adapter
  413. * @pidx: the port index
  414. *
  415. * Return the string name of the selected port.
  416. */
  417. static inline const char *port_name(struct adapter *adapter, int pidx)
  418. {
  419. return adapter->port[pidx]->name;
  420. }
  421. /**
  422. * t4_os_set_hw_addr - store a port's MAC address in SW
  423. * @adapter: the adapter
  424. * @pidx: the port index
  425. * @hw_addr: the Ethernet address
  426. *
  427. * Store the Ethernet address of the given port in SW. Called by the common
  428. * code when it retrieves a port's Ethernet address from EEPROM.
  429. */
  430. static inline void t4_os_set_hw_addr(struct adapter *adapter, int pidx,
  431. u8 hw_addr[])
  432. {
  433. memcpy(adapter->port[pidx]->dev_addr, hw_addr, ETH_ALEN);
  434. }
  435. /**
  436. * netdev2pinfo - return the port_info structure associated with a net_device
  437. * @dev: the netdev
  438. *
  439. * Return the struct port_info associated with a net_device
  440. */
  441. static inline struct port_info *netdev2pinfo(const struct net_device *dev)
  442. {
  443. return netdev_priv(dev);
  444. }
  445. /**
  446. * adap2pinfo - return the port_info of a port
  447. * @adap: the adapter
  448. * @pidx: the port index
  449. *
  450. * Return the port_info structure for the adapter.
  451. */
  452. static inline struct port_info *adap2pinfo(struct adapter *adapter, int pidx)
  453. {
  454. return netdev_priv(adapter->port[pidx]);
  455. }
  456. /**
  457. * netdev2adap - return the adapter structure associated with a net_device
  458. * @dev: the netdev
  459. *
  460. * Return the struct adapter associated with a net_device
  461. */
  462. static inline struct adapter *netdev2adap(const struct net_device *dev)
  463. {
  464. return netdev2pinfo(dev)->adapter;
  465. }
  466. /*
  467. * OS "Callback" function declarations. These are functions that the OS code
  468. * is "contracted" to provide for the common code.
  469. */
  470. void t4vf_os_link_changed(struct adapter *, int, int);
  471. void t4vf_os_portmod_changed(struct adapter *, int);
  472. /*
  473. * SGE function prototype declarations.
  474. */
  475. int t4vf_sge_alloc_rxq(struct adapter *, struct sge_rspq *, bool,
  476. struct net_device *, int,
  477. struct sge_fl *, rspq_handler_t);
  478. int t4vf_sge_alloc_eth_txq(struct adapter *, struct sge_eth_txq *,
  479. struct net_device *, struct netdev_queue *,
  480. unsigned int);
  481. void t4vf_free_sge_resources(struct adapter *);
  482. int t4vf_eth_xmit(struct sk_buff *, struct net_device *);
  483. int t4vf_ethrx_handler(struct sge_rspq *, const __be64 *,
  484. const struct pkt_gl *);
  485. irq_handler_t t4vf_intr_handler(struct adapter *);
  486. irqreturn_t t4vf_sge_intr_msix(int, void *);
  487. int t4vf_sge_init(struct adapter *);
  488. void t4vf_sge_start(struct adapter *);
  489. void t4vf_sge_stop(struct adapter *);
  490. #endif /* __CXGB4VF_ADAPTER_H__ */