rx.c 29 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare network controllers and boards
  3. * Copyright 2005-2006 Fen Systems Ltd.
  4. * Copyright 2005-2013 Solarflare Communications Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation, incorporated herein by reference.
  9. */
  10. #include <linux/socket.h>
  11. #include <linux/in.h>
  12. #include <linux/slab.h>
  13. #include <linux/ip.h>
  14. #include <linux/ipv6.h>
  15. #include <linux/tcp.h>
  16. #include <linux/udp.h>
  17. #include <linux/prefetch.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/iommu.h>
  20. #include <net/ip.h>
  21. #include <net/checksum.h>
  22. #include "net_driver.h"
  23. #include "efx.h"
  24. #include "filter.h"
  25. #include "nic.h"
  26. #include "selftest.h"
  27. #include "workarounds.h"
  28. /* Preferred number of descriptors to fill at once */
  29. #define EFX_RX_PREFERRED_BATCH 8U
  30. /* Number of RX buffers to recycle pages for. When creating the RX page recycle
  31. * ring, this number is divided by the number of buffers per page to calculate
  32. * the number of pages to store in the RX page recycle ring.
  33. */
  34. #define EFX_RECYCLE_RING_SIZE_IOMMU 4096
  35. #define EFX_RECYCLE_RING_SIZE_NOIOMMU (2 * EFX_RX_PREFERRED_BATCH)
  36. /* Size of buffer allocated for skb header area. */
  37. #define EFX_SKB_HEADERS 128u
  38. /* This is the percentage fill level below which new RX descriptors
  39. * will be added to the RX descriptor ring.
  40. */
  41. static unsigned int rx_refill_threshold;
  42. /* Each packet can consume up to ceil(max_frame_len / buffer_size) buffers */
  43. #define EFX_RX_MAX_FRAGS DIV_ROUND_UP(EFX_MAX_FRAME_LEN(EFX_MAX_MTU), \
  44. EFX_RX_USR_BUF_SIZE)
  45. /*
  46. * RX maximum head room required.
  47. *
  48. * This must be at least 1 to prevent overflow, plus one packet-worth
  49. * to allow pipelined receives.
  50. */
  51. #define EFX_RXD_HEAD_ROOM (1 + EFX_RX_MAX_FRAGS)
  52. static inline u8 *efx_rx_buf_va(struct efx_rx_buffer *buf)
  53. {
  54. return page_address(buf->page) + buf->page_offset;
  55. }
  56. static inline u32 efx_rx_buf_hash(struct efx_nic *efx, const u8 *eh)
  57. {
  58. #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS)
  59. return __le32_to_cpup((const __le32 *)(eh + efx->rx_packet_hash_offset));
  60. #else
  61. const u8 *data = eh + efx->rx_packet_hash_offset;
  62. return (u32)data[0] |
  63. (u32)data[1] << 8 |
  64. (u32)data[2] << 16 |
  65. (u32)data[3] << 24;
  66. #endif
  67. }
  68. static inline struct efx_rx_buffer *
  69. efx_rx_buf_next(struct efx_rx_queue *rx_queue, struct efx_rx_buffer *rx_buf)
  70. {
  71. if (unlikely(rx_buf == efx_rx_buffer(rx_queue, rx_queue->ptr_mask)))
  72. return efx_rx_buffer(rx_queue, 0);
  73. else
  74. return rx_buf + 1;
  75. }
  76. static inline void efx_sync_rx_buffer(struct efx_nic *efx,
  77. struct efx_rx_buffer *rx_buf,
  78. unsigned int len)
  79. {
  80. dma_sync_single_for_cpu(&efx->pci_dev->dev, rx_buf->dma_addr, len,
  81. DMA_FROM_DEVICE);
  82. }
  83. void efx_rx_config_page_split(struct efx_nic *efx)
  84. {
  85. efx->rx_page_buf_step = ALIGN(efx->rx_dma_len + efx->rx_ip_align,
  86. EFX_RX_BUF_ALIGNMENT);
  87. efx->rx_bufs_per_page = efx->rx_buffer_order ? 1 :
  88. ((PAGE_SIZE - sizeof(struct efx_rx_page_state)) /
  89. efx->rx_page_buf_step);
  90. efx->rx_buffer_truesize = (PAGE_SIZE << efx->rx_buffer_order) /
  91. efx->rx_bufs_per_page;
  92. efx->rx_pages_per_batch = DIV_ROUND_UP(EFX_RX_PREFERRED_BATCH,
  93. efx->rx_bufs_per_page);
  94. }
  95. /* Check the RX page recycle ring for a page that can be reused. */
  96. static struct page *efx_reuse_page(struct efx_rx_queue *rx_queue)
  97. {
  98. struct efx_nic *efx = rx_queue->efx;
  99. struct page *page;
  100. struct efx_rx_page_state *state;
  101. unsigned index;
  102. index = rx_queue->page_remove & rx_queue->page_ptr_mask;
  103. page = rx_queue->page_ring[index];
  104. if (page == NULL)
  105. return NULL;
  106. rx_queue->page_ring[index] = NULL;
  107. /* page_remove cannot exceed page_add. */
  108. if (rx_queue->page_remove != rx_queue->page_add)
  109. ++rx_queue->page_remove;
  110. /* If page_count is 1 then we hold the only reference to this page. */
  111. if (page_count(page) == 1) {
  112. ++rx_queue->page_recycle_count;
  113. return page;
  114. } else {
  115. state = page_address(page);
  116. dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
  117. PAGE_SIZE << efx->rx_buffer_order,
  118. DMA_FROM_DEVICE);
  119. put_page(page);
  120. ++rx_queue->page_recycle_failed;
  121. }
  122. return NULL;
  123. }
  124. /**
  125. * efx_init_rx_buffers - create EFX_RX_BATCH page-based RX buffers
  126. *
  127. * @rx_queue: Efx RX queue
  128. *
  129. * This allocates a batch of pages, maps them for DMA, and populates
  130. * struct efx_rx_buffers for each one. Return a negative error code or
  131. * 0 on success. If a single page can be used for multiple buffers,
  132. * then the page will either be inserted fully, or not at all.
  133. */
  134. static int efx_init_rx_buffers(struct efx_rx_queue *rx_queue, bool atomic)
  135. {
  136. struct efx_nic *efx = rx_queue->efx;
  137. struct efx_rx_buffer *rx_buf;
  138. struct page *page;
  139. unsigned int page_offset;
  140. struct efx_rx_page_state *state;
  141. dma_addr_t dma_addr;
  142. unsigned index, count;
  143. count = 0;
  144. do {
  145. page = efx_reuse_page(rx_queue);
  146. if (page == NULL) {
  147. page = alloc_pages(__GFP_COLD | __GFP_COMP |
  148. (atomic ? GFP_ATOMIC : GFP_KERNEL),
  149. efx->rx_buffer_order);
  150. if (unlikely(page == NULL))
  151. return -ENOMEM;
  152. dma_addr =
  153. dma_map_page(&efx->pci_dev->dev, page, 0,
  154. PAGE_SIZE << efx->rx_buffer_order,
  155. DMA_FROM_DEVICE);
  156. if (unlikely(dma_mapping_error(&efx->pci_dev->dev,
  157. dma_addr))) {
  158. __free_pages(page, efx->rx_buffer_order);
  159. return -EIO;
  160. }
  161. state = page_address(page);
  162. state->dma_addr = dma_addr;
  163. } else {
  164. state = page_address(page);
  165. dma_addr = state->dma_addr;
  166. }
  167. dma_addr += sizeof(struct efx_rx_page_state);
  168. page_offset = sizeof(struct efx_rx_page_state);
  169. do {
  170. index = rx_queue->added_count & rx_queue->ptr_mask;
  171. rx_buf = efx_rx_buffer(rx_queue, index);
  172. rx_buf->dma_addr = dma_addr + efx->rx_ip_align;
  173. rx_buf->page = page;
  174. rx_buf->page_offset = page_offset + efx->rx_ip_align;
  175. rx_buf->len = efx->rx_dma_len;
  176. rx_buf->flags = 0;
  177. ++rx_queue->added_count;
  178. get_page(page);
  179. dma_addr += efx->rx_page_buf_step;
  180. page_offset += efx->rx_page_buf_step;
  181. } while (page_offset + efx->rx_page_buf_step <= PAGE_SIZE);
  182. rx_buf->flags = EFX_RX_BUF_LAST_IN_PAGE;
  183. } while (++count < efx->rx_pages_per_batch);
  184. return 0;
  185. }
  186. /* Unmap a DMA-mapped page. This function is only called for the final RX
  187. * buffer in a page.
  188. */
  189. static void efx_unmap_rx_buffer(struct efx_nic *efx,
  190. struct efx_rx_buffer *rx_buf)
  191. {
  192. struct page *page = rx_buf->page;
  193. if (page) {
  194. struct efx_rx_page_state *state = page_address(page);
  195. dma_unmap_page(&efx->pci_dev->dev,
  196. state->dma_addr,
  197. PAGE_SIZE << efx->rx_buffer_order,
  198. DMA_FROM_DEVICE);
  199. }
  200. }
  201. static void efx_free_rx_buffers(struct efx_rx_queue *rx_queue,
  202. struct efx_rx_buffer *rx_buf,
  203. unsigned int num_bufs)
  204. {
  205. do {
  206. if (rx_buf->page) {
  207. put_page(rx_buf->page);
  208. rx_buf->page = NULL;
  209. }
  210. rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
  211. } while (--num_bufs);
  212. }
  213. /* Attempt to recycle the page if there is an RX recycle ring; the page can
  214. * only be added if this is the final RX buffer, to prevent pages being used in
  215. * the descriptor ring and appearing in the recycle ring simultaneously.
  216. */
  217. static void efx_recycle_rx_page(struct efx_channel *channel,
  218. struct efx_rx_buffer *rx_buf)
  219. {
  220. struct page *page = rx_buf->page;
  221. struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
  222. struct efx_nic *efx = rx_queue->efx;
  223. unsigned index;
  224. /* Only recycle the page after processing the final buffer. */
  225. if (!(rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE))
  226. return;
  227. index = rx_queue->page_add & rx_queue->page_ptr_mask;
  228. if (rx_queue->page_ring[index] == NULL) {
  229. unsigned read_index = rx_queue->page_remove &
  230. rx_queue->page_ptr_mask;
  231. /* The next slot in the recycle ring is available, but
  232. * increment page_remove if the read pointer currently
  233. * points here.
  234. */
  235. if (read_index == index)
  236. ++rx_queue->page_remove;
  237. rx_queue->page_ring[index] = page;
  238. ++rx_queue->page_add;
  239. return;
  240. }
  241. ++rx_queue->page_recycle_full;
  242. efx_unmap_rx_buffer(efx, rx_buf);
  243. put_page(rx_buf->page);
  244. }
  245. static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
  246. struct efx_rx_buffer *rx_buf)
  247. {
  248. /* Release the page reference we hold for the buffer. */
  249. if (rx_buf->page)
  250. put_page(rx_buf->page);
  251. /* If this is the last buffer in a page, unmap and free it. */
  252. if (rx_buf->flags & EFX_RX_BUF_LAST_IN_PAGE) {
  253. efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
  254. efx_free_rx_buffers(rx_queue, rx_buf, 1);
  255. }
  256. rx_buf->page = NULL;
  257. }
  258. /* Recycle the pages that are used by buffers that have just been received. */
  259. static void efx_recycle_rx_pages(struct efx_channel *channel,
  260. struct efx_rx_buffer *rx_buf,
  261. unsigned int n_frags)
  262. {
  263. struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
  264. do {
  265. efx_recycle_rx_page(channel, rx_buf);
  266. rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
  267. } while (--n_frags);
  268. }
  269. static void efx_discard_rx_packet(struct efx_channel *channel,
  270. struct efx_rx_buffer *rx_buf,
  271. unsigned int n_frags)
  272. {
  273. struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
  274. efx_recycle_rx_pages(channel, rx_buf, n_frags);
  275. efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
  276. }
  277. /**
  278. * efx_fast_push_rx_descriptors - push new RX descriptors quickly
  279. * @rx_queue: RX descriptor queue
  280. *
  281. * This will aim to fill the RX descriptor queue up to
  282. * @rx_queue->@max_fill. If there is insufficient atomic
  283. * memory to do so, a slow fill will be scheduled.
  284. *
  285. * The caller must provide serialisation (none is used here). In practise,
  286. * this means this function must run from the NAPI handler, or be called
  287. * when NAPI is disabled.
  288. */
  289. void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue, bool atomic)
  290. {
  291. struct efx_nic *efx = rx_queue->efx;
  292. unsigned int fill_level, batch_size;
  293. int space, rc = 0;
  294. if (!rx_queue->refill_enabled)
  295. return;
  296. /* Calculate current fill level, and exit if we don't need to fill */
  297. fill_level = (rx_queue->added_count - rx_queue->removed_count);
  298. EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
  299. if (fill_level >= rx_queue->fast_fill_trigger)
  300. goto out;
  301. /* Record minimum fill level */
  302. if (unlikely(fill_level < rx_queue->min_fill)) {
  303. if (fill_level)
  304. rx_queue->min_fill = fill_level;
  305. }
  306. batch_size = efx->rx_pages_per_batch * efx->rx_bufs_per_page;
  307. space = rx_queue->max_fill - fill_level;
  308. EFX_BUG_ON_PARANOID(space < batch_size);
  309. netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
  310. "RX queue %d fast-filling descriptor ring from"
  311. " level %d to level %d\n",
  312. efx_rx_queue_index(rx_queue), fill_level,
  313. rx_queue->max_fill);
  314. do {
  315. rc = efx_init_rx_buffers(rx_queue, atomic);
  316. if (unlikely(rc)) {
  317. /* Ensure that we don't leave the rx queue empty */
  318. if (rx_queue->added_count == rx_queue->removed_count)
  319. efx_schedule_slow_fill(rx_queue);
  320. goto out;
  321. }
  322. } while ((space -= batch_size) >= batch_size);
  323. netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
  324. "RX queue %d fast-filled descriptor ring "
  325. "to level %d\n", efx_rx_queue_index(rx_queue),
  326. rx_queue->added_count - rx_queue->removed_count);
  327. out:
  328. if (rx_queue->notified_count != rx_queue->added_count)
  329. efx_nic_notify_rx_desc(rx_queue);
  330. }
  331. void efx_rx_slow_fill(unsigned long context)
  332. {
  333. struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
  334. /* Post an event to cause NAPI to run and refill the queue */
  335. efx_nic_generate_fill_event(rx_queue);
  336. ++rx_queue->slow_fill_count;
  337. }
  338. static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
  339. struct efx_rx_buffer *rx_buf,
  340. int len)
  341. {
  342. struct efx_nic *efx = rx_queue->efx;
  343. unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
  344. if (likely(len <= max_len))
  345. return;
  346. /* The packet must be discarded, but this is only a fatal error
  347. * if the caller indicated it was
  348. */
  349. rx_buf->flags |= EFX_RX_PKT_DISCARD;
  350. if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
  351. if (net_ratelimit())
  352. netif_err(efx, rx_err, efx->net_dev,
  353. " RX queue %d seriously overlength "
  354. "RX event (0x%x > 0x%x+0x%x). Leaking\n",
  355. efx_rx_queue_index(rx_queue), len, max_len,
  356. efx->type->rx_buffer_padding);
  357. efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
  358. } else {
  359. if (net_ratelimit())
  360. netif_err(efx, rx_err, efx->net_dev,
  361. " RX queue %d overlength RX event "
  362. "(0x%x > 0x%x)\n",
  363. efx_rx_queue_index(rx_queue), len, max_len);
  364. }
  365. efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
  366. }
  367. /* Pass a received packet up through GRO. GRO can handle pages
  368. * regardless of checksum state and skbs with a good checksum.
  369. */
  370. static void
  371. efx_rx_packet_gro(struct efx_channel *channel, struct efx_rx_buffer *rx_buf,
  372. unsigned int n_frags, u8 *eh)
  373. {
  374. struct napi_struct *napi = &channel->napi_str;
  375. gro_result_t gro_result;
  376. struct efx_nic *efx = channel->efx;
  377. struct sk_buff *skb;
  378. skb = napi_get_frags(napi);
  379. if (unlikely(!skb)) {
  380. struct efx_rx_queue *rx_queue;
  381. rx_queue = efx_channel_get_rx_queue(channel);
  382. efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
  383. return;
  384. }
  385. if (efx->net_dev->features & NETIF_F_RXHASH)
  386. skb_set_hash(skb, efx_rx_buf_hash(efx, eh),
  387. PKT_HASH_TYPE_L3);
  388. skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
  389. CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
  390. for (;;) {
  391. skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
  392. rx_buf->page, rx_buf->page_offset,
  393. rx_buf->len);
  394. rx_buf->page = NULL;
  395. skb->len += rx_buf->len;
  396. if (skb_shinfo(skb)->nr_frags == n_frags)
  397. break;
  398. rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
  399. }
  400. skb->data_len = skb->len;
  401. skb->truesize += n_frags * efx->rx_buffer_truesize;
  402. skb_record_rx_queue(skb, channel->rx_queue.core_index);
  403. skb_mark_napi_id(skb, &channel->napi_str);
  404. gro_result = napi_gro_frags(napi);
  405. if (gro_result != GRO_DROP)
  406. channel->irq_mod_score += 2;
  407. }
  408. /* Allocate and construct an SKB around page fragments */
  409. static struct sk_buff *efx_rx_mk_skb(struct efx_channel *channel,
  410. struct efx_rx_buffer *rx_buf,
  411. unsigned int n_frags,
  412. u8 *eh, int hdr_len)
  413. {
  414. struct efx_nic *efx = channel->efx;
  415. struct sk_buff *skb;
  416. /* Allocate an SKB to store the headers */
  417. skb = netdev_alloc_skb(efx->net_dev,
  418. efx->rx_ip_align + efx->rx_prefix_size +
  419. hdr_len);
  420. if (unlikely(skb == NULL)) {
  421. atomic_inc(&efx->n_rx_noskb_drops);
  422. return NULL;
  423. }
  424. EFX_BUG_ON_PARANOID(rx_buf->len < hdr_len);
  425. memcpy(skb->data + efx->rx_ip_align, eh - efx->rx_prefix_size,
  426. efx->rx_prefix_size + hdr_len);
  427. skb_reserve(skb, efx->rx_ip_align + efx->rx_prefix_size);
  428. __skb_put(skb, hdr_len);
  429. /* Append the remaining page(s) onto the frag list */
  430. if (rx_buf->len > hdr_len) {
  431. rx_buf->page_offset += hdr_len;
  432. rx_buf->len -= hdr_len;
  433. for (;;) {
  434. skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
  435. rx_buf->page, rx_buf->page_offset,
  436. rx_buf->len);
  437. rx_buf->page = NULL;
  438. skb->len += rx_buf->len;
  439. skb->data_len += rx_buf->len;
  440. if (skb_shinfo(skb)->nr_frags == n_frags)
  441. break;
  442. rx_buf = efx_rx_buf_next(&channel->rx_queue, rx_buf);
  443. }
  444. } else {
  445. __free_pages(rx_buf->page, efx->rx_buffer_order);
  446. rx_buf->page = NULL;
  447. n_frags = 0;
  448. }
  449. skb->truesize += n_frags * efx->rx_buffer_truesize;
  450. /* Move past the ethernet header */
  451. skb->protocol = eth_type_trans(skb, efx->net_dev);
  452. skb_mark_napi_id(skb, &channel->napi_str);
  453. return skb;
  454. }
  455. void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
  456. unsigned int n_frags, unsigned int len, u16 flags)
  457. {
  458. struct efx_nic *efx = rx_queue->efx;
  459. struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
  460. struct efx_rx_buffer *rx_buf;
  461. rx_queue->rx_packets++;
  462. rx_buf = efx_rx_buffer(rx_queue, index);
  463. rx_buf->flags |= flags;
  464. /* Validate the number of fragments and completed length */
  465. if (n_frags == 1) {
  466. if (!(flags & EFX_RX_PKT_PREFIX_LEN))
  467. efx_rx_packet__check_len(rx_queue, rx_buf, len);
  468. } else if (unlikely(n_frags > EFX_RX_MAX_FRAGS) ||
  469. unlikely(len <= (n_frags - 1) * efx->rx_dma_len) ||
  470. unlikely(len > n_frags * efx->rx_dma_len) ||
  471. unlikely(!efx->rx_scatter)) {
  472. /* If this isn't an explicit discard request, either
  473. * the hardware or the driver is broken.
  474. */
  475. WARN_ON(!(len == 0 && rx_buf->flags & EFX_RX_PKT_DISCARD));
  476. rx_buf->flags |= EFX_RX_PKT_DISCARD;
  477. }
  478. netif_vdbg(efx, rx_status, efx->net_dev,
  479. "RX queue %d received ids %x-%x len %d %s%s\n",
  480. efx_rx_queue_index(rx_queue), index,
  481. (index + n_frags - 1) & rx_queue->ptr_mask, len,
  482. (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "",
  483. (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : "");
  484. /* Discard packet, if instructed to do so. Process the
  485. * previous receive first.
  486. */
  487. if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) {
  488. efx_rx_flush_packet(channel);
  489. efx_discard_rx_packet(channel, rx_buf, n_frags);
  490. return;
  491. }
  492. if (n_frags == 1 && !(flags & EFX_RX_PKT_PREFIX_LEN))
  493. rx_buf->len = len;
  494. /* Release and/or sync the DMA mapping - assumes all RX buffers
  495. * consumed in-order per RX queue.
  496. */
  497. efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
  498. /* Prefetch nice and early so data will (hopefully) be in cache by
  499. * the time we look at it.
  500. */
  501. prefetch(efx_rx_buf_va(rx_buf));
  502. rx_buf->page_offset += efx->rx_prefix_size;
  503. rx_buf->len -= efx->rx_prefix_size;
  504. if (n_frags > 1) {
  505. /* Release/sync DMA mapping for additional fragments.
  506. * Fix length for last fragment.
  507. */
  508. unsigned int tail_frags = n_frags - 1;
  509. for (;;) {
  510. rx_buf = efx_rx_buf_next(rx_queue, rx_buf);
  511. if (--tail_frags == 0)
  512. break;
  513. efx_sync_rx_buffer(efx, rx_buf, efx->rx_dma_len);
  514. }
  515. rx_buf->len = len - (n_frags - 1) * efx->rx_dma_len;
  516. efx_sync_rx_buffer(efx, rx_buf, rx_buf->len);
  517. }
  518. /* All fragments have been DMA-synced, so recycle pages. */
  519. rx_buf = efx_rx_buffer(rx_queue, index);
  520. efx_recycle_rx_pages(channel, rx_buf, n_frags);
  521. /* Pipeline receives so that we give time for packet headers to be
  522. * prefetched into cache.
  523. */
  524. efx_rx_flush_packet(channel);
  525. channel->rx_pkt_n_frags = n_frags;
  526. channel->rx_pkt_index = index;
  527. }
  528. static void efx_rx_deliver(struct efx_channel *channel, u8 *eh,
  529. struct efx_rx_buffer *rx_buf,
  530. unsigned int n_frags)
  531. {
  532. struct sk_buff *skb;
  533. u16 hdr_len = min_t(u16, rx_buf->len, EFX_SKB_HEADERS);
  534. skb = efx_rx_mk_skb(channel, rx_buf, n_frags, eh, hdr_len);
  535. if (unlikely(skb == NULL)) {
  536. struct efx_rx_queue *rx_queue;
  537. rx_queue = efx_channel_get_rx_queue(channel);
  538. efx_free_rx_buffers(rx_queue, rx_buf, n_frags);
  539. return;
  540. }
  541. skb_record_rx_queue(skb, channel->rx_queue.core_index);
  542. /* Set the SKB flags */
  543. skb_checksum_none_assert(skb);
  544. if (likely(rx_buf->flags & EFX_RX_PKT_CSUMMED))
  545. skb->ip_summed = CHECKSUM_UNNECESSARY;
  546. efx_rx_skb_attach_timestamp(channel, skb);
  547. if (channel->type->receive_skb)
  548. if (channel->type->receive_skb(channel, skb))
  549. return;
  550. /* Pass the packet up */
  551. netif_receive_skb(skb);
  552. }
  553. /* Handle a received packet. Second half: Touches packet payload. */
  554. void __efx_rx_packet(struct efx_channel *channel)
  555. {
  556. struct efx_nic *efx = channel->efx;
  557. struct efx_rx_buffer *rx_buf =
  558. efx_rx_buffer(&channel->rx_queue, channel->rx_pkt_index);
  559. u8 *eh = efx_rx_buf_va(rx_buf);
  560. /* Read length from the prefix if necessary. This already
  561. * excludes the length of the prefix itself.
  562. */
  563. if (rx_buf->flags & EFX_RX_PKT_PREFIX_LEN)
  564. rx_buf->len = le16_to_cpup((__le16 *)
  565. (eh + efx->rx_packet_len_offset));
  566. /* If we're in loopback test, then pass the packet directly to the
  567. * loopback layer, and free the rx_buf here
  568. */
  569. if (unlikely(efx->loopback_selftest)) {
  570. struct efx_rx_queue *rx_queue;
  571. efx_loopback_rx_packet(efx, eh, rx_buf->len);
  572. rx_queue = efx_channel_get_rx_queue(channel);
  573. efx_free_rx_buffers(rx_queue, rx_buf,
  574. channel->rx_pkt_n_frags);
  575. goto out;
  576. }
  577. if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
  578. rx_buf->flags &= ~EFX_RX_PKT_CSUMMED;
  579. if ((rx_buf->flags & EFX_RX_PKT_TCP) && !channel->type->receive_skb &&
  580. !efx_channel_busy_polling(channel))
  581. efx_rx_packet_gro(channel, rx_buf, channel->rx_pkt_n_frags, eh);
  582. else
  583. efx_rx_deliver(channel, eh, rx_buf, channel->rx_pkt_n_frags);
  584. out:
  585. channel->rx_pkt_n_frags = 0;
  586. }
  587. int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
  588. {
  589. struct efx_nic *efx = rx_queue->efx;
  590. unsigned int entries;
  591. int rc;
  592. /* Create the smallest power-of-two aligned ring */
  593. entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
  594. EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
  595. rx_queue->ptr_mask = entries - 1;
  596. netif_dbg(efx, probe, efx->net_dev,
  597. "creating RX queue %d size %#x mask %#x\n",
  598. efx_rx_queue_index(rx_queue), efx->rxq_entries,
  599. rx_queue->ptr_mask);
  600. /* Allocate RX buffers */
  601. rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
  602. GFP_KERNEL);
  603. if (!rx_queue->buffer)
  604. return -ENOMEM;
  605. rc = efx_nic_probe_rx(rx_queue);
  606. if (rc) {
  607. kfree(rx_queue->buffer);
  608. rx_queue->buffer = NULL;
  609. }
  610. return rc;
  611. }
  612. static void efx_init_rx_recycle_ring(struct efx_nic *efx,
  613. struct efx_rx_queue *rx_queue)
  614. {
  615. unsigned int bufs_in_recycle_ring, page_ring_size;
  616. /* Set the RX recycle ring size */
  617. #ifdef CONFIG_PPC64
  618. bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
  619. #else
  620. if (iommu_present(&pci_bus_type))
  621. bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_IOMMU;
  622. else
  623. bufs_in_recycle_ring = EFX_RECYCLE_RING_SIZE_NOIOMMU;
  624. #endif /* CONFIG_PPC64 */
  625. page_ring_size = roundup_pow_of_two(bufs_in_recycle_ring /
  626. efx->rx_bufs_per_page);
  627. rx_queue->page_ring = kcalloc(page_ring_size,
  628. sizeof(*rx_queue->page_ring), GFP_KERNEL);
  629. rx_queue->page_ptr_mask = page_ring_size - 1;
  630. }
  631. void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
  632. {
  633. struct efx_nic *efx = rx_queue->efx;
  634. unsigned int max_fill, trigger, max_trigger;
  635. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  636. "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
  637. /* Initialise ptr fields */
  638. rx_queue->added_count = 0;
  639. rx_queue->notified_count = 0;
  640. rx_queue->removed_count = 0;
  641. rx_queue->min_fill = -1U;
  642. efx_init_rx_recycle_ring(efx, rx_queue);
  643. rx_queue->page_remove = 0;
  644. rx_queue->page_add = rx_queue->page_ptr_mask + 1;
  645. rx_queue->page_recycle_count = 0;
  646. rx_queue->page_recycle_failed = 0;
  647. rx_queue->page_recycle_full = 0;
  648. /* Initialise limit fields */
  649. max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
  650. max_trigger =
  651. max_fill - efx->rx_pages_per_batch * efx->rx_bufs_per_page;
  652. if (rx_refill_threshold != 0) {
  653. trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
  654. if (trigger > max_trigger)
  655. trigger = max_trigger;
  656. } else {
  657. trigger = max_trigger;
  658. }
  659. rx_queue->max_fill = max_fill;
  660. rx_queue->fast_fill_trigger = trigger;
  661. rx_queue->refill_enabled = true;
  662. /* Set up RX descriptor ring */
  663. efx_nic_init_rx(rx_queue);
  664. }
  665. void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
  666. {
  667. int i;
  668. struct efx_nic *efx = rx_queue->efx;
  669. struct efx_rx_buffer *rx_buf;
  670. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  671. "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
  672. del_timer_sync(&rx_queue->slow_fill);
  673. /* Release RX buffers from the current read ptr to the write ptr */
  674. if (rx_queue->buffer) {
  675. for (i = rx_queue->removed_count; i < rx_queue->added_count;
  676. i++) {
  677. unsigned index = i & rx_queue->ptr_mask;
  678. rx_buf = efx_rx_buffer(rx_queue, index);
  679. efx_fini_rx_buffer(rx_queue, rx_buf);
  680. }
  681. }
  682. /* Unmap and release the pages in the recycle ring. Remove the ring. */
  683. for (i = 0; i <= rx_queue->page_ptr_mask; i++) {
  684. struct page *page = rx_queue->page_ring[i];
  685. struct efx_rx_page_state *state;
  686. if (page == NULL)
  687. continue;
  688. state = page_address(page);
  689. dma_unmap_page(&efx->pci_dev->dev, state->dma_addr,
  690. PAGE_SIZE << efx->rx_buffer_order,
  691. DMA_FROM_DEVICE);
  692. put_page(page);
  693. }
  694. kfree(rx_queue->page_ring);
  695. rx_queue->page_ring = NULL;
  696. }
  697. void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
  698. {
  699. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  700. "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
  701. efx_nic_remove_rx(rx_queue);
  702. kfree(rx_queue->buffer);
  703. rx_queue->buffer = NULL;
  704. }
  705. module_param(rx_refill_threshold, uint, 0444);
  706. MODULE_PARM_DESC(rx_refill_threshold,
  707. "RX descriptor ring refill threshold (%)");
  708. #ifdef CONFIG_RFS_ACCEL
  709. int efx_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  710. u16 rxq_index, u32 flow_id)
  711. {
  712. struct efx_nic *efx = netdev_priv(net_dev);
  713. struct efx_channel *channel;
  714. struct efx_filter_spec spec;
  715. const __be16 *ports;
  716. __be16 ether_type;
  717. int nhoff;
  718. int rc;
  719. /* The core RPS/RFS code has already parsed and validated
  720. * VLAN, IP and transport headers. We assume they are in the
  721. * header area.
  722. */
  723. if (skb->protocol == htons(ETH_P_8021Q)) {
  724. const struct vlan_hdr *vh =
  725. (const struct vlan_hdr *)skb->data;
  726. /* We can't filter on the IP 5-tuple and the vlan
  727. * together, so just strip the vlan header and filter
  728. * on the IP part.
  729. */
  730. EFX_BUG_ON_PARANOID(skb_headlen(skb) < sizeof(*vh));
  731. ether_type = vh->h_vlan_encapsulated_proto;
  732. nhoff = sizeof(struct vlan_hdr);
  733. } else {
  734. ether_type = skb->protocol;
  735. nhoff = 0;
  736. }
  737. if (ether_type != htons(ETH_P_IP) && ether_type != htons(ETH_P_IPV6))
  738. return -EPROTONOSUPPORT;
  739. efx_filter_init_rx(&spec, EFX_FILTER_PRI_HINT,
  740. efx->rx_scatter ? EFX_FILTER_FLAG_RX_SCATTER : 0,
  741. rxq_index);
  742. spec.match_flags =
  743. EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
  744. EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
  745. EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
  746. spec.ether_type = ether_type;
  747. if (ether_type == htons(ETH_P_IP)) {
  748. const struct iphdr *ip =
  749. (const struct iphdr *)(skb->data + nhoff);
  750. EFX_BUG_ON_PARANOID(skb_headlen(skb) < nhoff + sizeof(*ip));
  751. if (ip_is_fragment(ip))
  752. return -EPROTONOSUPPORT;
  753. spec.ip_proto = ip->protocol;
  754. spec.rem_host[0] = ip->saddr;
  755. spec.loc_host[0] = ip->daddr;
  756. EFX_BUG_ON_PARANOID(skb_headlen(skb) < nhoff + 4 * ip->ihl + 4);
  757. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  758. } else {
  759. const struct ipv6hdr *ip6 =
  760. (const struct ipv6hdr *)(skb->data + nhoff);
  761. EFX_BUG_ON_PARANOID(skb_headlen(skb) <
  762. nhoff + sizeof(*ip6) + 4);
  763. spec.ip_proto = ip6->nexthdr;
  764. memcpy(spec.rem_host, &ip6->saddr, sizeof(ip6->saddr));
  765. memcpy(spec.loc_host, &ip6->daddr, sizeof(ip6->daddr));
  766. ports = (const __be16 *)(ip6 + 1);
  767. }
  768. spec.rem_port = ports[0];
  769. spec.loc_port = ports[1];
  770. rc = efx->type->filter_rfs_insert(efx, &spec);
  771. if (rc < 0)
  772. return rc;
  773. /* Remember this so we can check whether to expire the filter later */
  774. efx->rps_flow_id[rc] = flow_id;
  775. channel = efx_get_channel(efx, skb_get_rx_queue(skb));
  776. ++channel->rfs_filters_added;
  777. if (ether_type == htons(ETH_P_IP))
  778. netif_info(efx, rx_status, efx->net_dev,
  779. "steering %s %pI4:%u:%pI4:%u to queue %u [flow %u filter %d]\n",
  780. (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
  781. spec.rem_host, ntohs(ports[0]), spec.loc_host,
  782. ntohs(ports[1]), rxq_index, flow_id, rc);
  783. else
  784. netif_info(efx, rx_status, efx->net_dev,
  785. "steering %s [%pI6]:%u:[%pI6]:%u to queue %u [flow %u filter %d]\n",
  786. (spec.ip_proto == IPPROTO_TCP) ? "TCP" : "UDP",
  787. spec.rem_host, ntohs(ports[0]), spec.loc_host,
  788. ntohs(ports[1]), rxq_index, flow_id, rc);
  789. return rc;
  790. }
  791. bool __efx_filter_rfs_expire(struct efx_nic *efx, unsigned int quota)
  792. {
  793. bool (*expire_one)(struct efx_nic *efx, u32 flow_id, unsigned int index);
  794. unsigned int index, size;
  795. u32 flow_id;
  796. if (!spin_trylock_bh(&efx->filter_lock))
  797. return false;
  798. expire_one = efx->type->filter_rfs_expire_one;
  799. index = efx->rps_expire_index;
  800. size = efx->type->max_rx_ip_filters;
  801. while (quota--) {
  802. flow_id = efx->rps_flow_id[index];
  803. if (expire_one(efx, flow_id, index))
  804. netif_info(efx, rx_status, efx->net_dev,
  805. "expired filter %d [flow %u]\n",
  806. index, flow_id);
  807. if (++index == size)
  808. index = 0;
  809. }
  810. efx->rps_expire_index = index;
  811. spin_unlock_bh(&efx->filter_lock);
  812. return true;
  813. }
  814. #endif /* CONFIG_RFS_ACCEL */
  815. /**
  816. * efx_filter_is_mc_recipient - test whether spec is a multicast recipient
  817. * @spec: Specification to test
  818. *
  819. * Return: %true if the specification is a non-drop RX filter that
  820. * matches a local MAC address I/G bit value of 1 or matches a local
  821. * IPv4 or IPv6 address value in the respective multicast address
  822. * range. Otherwise %false.
  823. */
  824. bool efx_filter_is_mc_recipient(const struct efx_filter_spec *spec)
  825. {
  826. if (!(spec->flags & EFX_FILTER_FLAG_RX) ||
  827. spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP)
  828. return false;
  829. if (spec->match_flags &
  830. (EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_LOC_MAC_IG) &&
  831. is_multicast_ether_addr(spec->loc_mac))
  832. return true;
  833. if ((spec->match_flags &
  834. (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) ==
  835. (EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_LOC_HOST)) {
  836. if (spec->ether_type == htons(ETH_P_IP) &&
  837. ipv4_is_multicast(spec->loc_host[0]))
  838. return true;
  839. if (spec->ether_type == htons(ETH_P_IPV6) &&
  840. ((const u8 *)spec->loc_host)[0] == 0xff)
  841. return true;
  842. }
  843. return false;
  844. }