tsi108_eth.c 46 KB

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  1. /*******************************************************************************
  2. Copyright(c) 2006 Tundra Semiconductor Corporation.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. *******************************************************************************/
  15. /* This driver is based on the driver code originally developed
  16. * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
  17. * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation
  18. *
  19. * Currently changes from original version are:
  20. * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
  21. * - modifications to handle two ports independently and support for
  22. * additional PHY devices (alexandre.bounine@tundra.com)
  23. * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
  24. *
  25. */
  26. #include <linux/module.h>
  27. #include <linux/types.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/net.h>
  30. #include <linux/netdevice.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/ethtool.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/delay.h>
  36. #include <linux/crc32.h>
  37. #include <linux/mii.h>
  38. #include <linux/device.h>
  39. #include <linux/pci.h>
  40. #include <linux/rtnetlink.h>
  41. #include <linux/timer.h>
  42. #include <linux/platform_device.h>
  43. #include <linux/gfp.h>
  44. #include <asm/io.h>
  45. #include <asm/tsi108.h>
  46. #include "tsi108_eth.h"
  47. #define MII_READ_DELAY 10000 /* max link wait time in msec */
  48. #define TSI108_RXRING_LEN 256
  49. /* NOTE: The driver currently does not support receiving packets
  50. * larger than the buffer size, so don't decrease this (unless you
  51. * want to add such support).
  52. */
  53. #define TSI108_RXBUF_SIZE 1536
  54. #define TSI108_TXRING_LEN 256
  55. #define TSI108_TX_INT_FREQ 64
  56. /* Check the phy status every half a second. */
  57. #define CHECK_PHY_INTERVAL (HZ/2)
  58. static int tsi108_init_one(struct platform_device *pdev);
  59. static int tsi108_ether_remove(struct platform_device *pdev);
  60. struct tsi108_prv_data {
  61. void __iomem *regs; /* Base of normal regs */
  62. void __iomem *phyregs; /* Base of register bank used for PHY access */
  63. struct net_device *dev;
  64. struct napi_struct napi;
  65. unsigned int phy; /* Index of PHY for this interface */
  66. unsigned int irq_num;
  67. unsigned int id;
  68. unsigned int phy_type;
  69. struct timer_list timer;/* Timer that triggers the check phy function */
  70. unsigned int rxtail; /* Next entry in rxring to read */
  71. unsigned int rxhead; /* Next entry in rxring to give a new buffer */
  72. unsigned int rxfree; /* Number of free, allocated RX buffers */
  73. unsigned int rxpending; /* Non-zero if there are still descriptors
  74. * to be processed from a previous descriptor
  75. * interrupt condition that has been cleared */
  76. unsigned int txtail; /* Next TX descriptor to check status on */
  77. unsigned int txhead; /* Next TX descriptor to use */
  78. /* Number of free TX descriptors. This could be calculated from
  79. * rxhead and rxtail if one descriptor were left unused to disambiguate
  80. * full and empty conditions, but it's simpler to just keep track
  81. * explicitly. */
  82. unsigned int txfree;
  83. unsigned int phy_ok; /* The PHY is currently powered on. */
  84. /* PHY status (duplex is 1 for half, 2 for full,
  85. * so that the default 0 indicates that neither has
  86. * yet been configured). */
  87. unsigned int link_up;
  88. unsigned int speed;
  89. unsigned int duplex;
  90. tx_desc *txring;
  91. rx_desc *rxring;
  92. struct sk_buff *txskbs[TSI108_TXRING_LEN];
  93. struct sk_buff *rxskbs[TSI108_RXRING_LEN];
  94. dma_addr_t txdma, rxdma;
  95. /* txlock nests in misclock and phy_lock */
  96. spinlock_t txlock, misclock;
  97. /* stats is used to hold the upper bits of each hardware counter,
  98. * and tmpstats is used to hold the full values for returning
  99. * to the caller of get_stats(). They must be separate in case
  100. * an overflow interrupt occurs before the stats are consumed.
  101. */
  102. struct net_device_stats stats;
  103. struct net_device_stats tmpstats;
  104. /* These stats are kept separate in hardware, thus require individual
  105. * fields for handling carry. They are combined in get_stats.
  106. */
  107. unsigned long rx_fcs; /* Add to rx_frame_errors */
  108. unsigned long rx_short_fcs; /* Add to rx_frame_errors */
  109. unsigned long rx_long_fcs; /* Add to rx_frame_errors */
  110. unsigned long rx_underruns; /* Add to rx_length_errors */
  111. unsigned long rx_overruns; /* Add to rx_length_errors */
  112. unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */
  113. unsigned long tx_pause_drop; /* Add to tx_aborted_errors */
  114. unsigned long mc_hash[16];
  115. u32 msg_enable; /* debug message level */
  116. struct mii_if_info mii_if;
  117. unsigned int init_media;
  118. };
  119. /* Structure for a device driver */
  120. static struct platform_driver tsi_eth_driver = {
  121. .probe = tsi108_init_one,
  122. .remove = tsi108_ether_remove,
  123. .driver = {
  124. .name = "tsi-ethernet",
  125. },
  126. };
  127. static void tsi108_timed_checker(unsigned long dev_ptr);
  128. static void dump_eth_one(struct net_device *dev)
  129. {
  130. struct tsi108_prv_data *data = netdev_priv(dev);
  131. printk("Dumping %s...\n", dev->name);
  132. printk("intstat %x intmask %x phy_ok %d"
  133. " link %d speed %d duplex %d\n",
  134. TSI_READ(TSI108_EC_INTSTAT),
  135. TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
  136. data->link_up, data->speed, data->duplex);
  137. printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
  138. data->txhead, data->txtail, data->txfree,
  139. TSI_READ(TSI108_EC_TXSTAT),
  140. TSI_READ(TSI108_EC_TXESTAT),
  141. TSI_READ(TSI108_EC_TXERR));
  142. printk("RX: head %d, tail %d, free %d, stat %x,"
  143. " estat %x, err %x, pending %d\n\n",
  144. data->rxhead, data->rxtail, data->rxfree,
  145. TSI_READ(TSI108_EC_RXSTAT),
  146. TSI_READ(TSI108_EC_RXESTAT),
  147. TSI_READ(TSI108_EC_RXERR), data->rxpending);
  148. }
  149. /* Synchronization is needed between the thread and up/down events.
  150. * Note that the PHY is accessed through the same registers for both
  151. * interfaces, so this can't be made interface-specific.
  152. */
  153. static DEFINE_SPINLOCK(phy_lock);
  154. static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
  155. {
  156. unsigned i;
  157. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  158. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  159. (reg << TSI108_MAC_MII_ADDR_REG));
  160. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
  161. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
  162. for (i = 0; i < 100; i++) {
  163. if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  164. (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
  165. break;
  166. udelay(10);
  167. }
  168. if (i == 100)
  169. return 0xffff;
  170. else
  171. return TSI_READ_PHY(TSI108_MAC_MII_DATAIN);
  172. }
  173. static void tsi108_write_mii(struct tsi108_prv_data *data,
  174. int reg, u16 val)
  175. {
  176. unsigned i = 100;
  177. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  178. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  179. (reg << TSI108_MAC_MII_ADDR_REG));
  180. TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
  181. while (i--) {
  182. if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  183. TSI108_MAC_MII_IND_BUSY))
  184. break;
  185. udelay(10);
  186. }
  187. }
  188. static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
  189. {
  190. struct tsi108_prv_data *data = netdev_priv(dev);
  191. return tsi108_read_mii(data, reg);
  192. }
  193. static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
  194. {
  195. struct tsi108_prv_data *data = netdev_priv(dev);
  196. tsi108_write_mii(data, reg, val);
  197. }
  198. static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
  199. int reg, u16 val)
  200. {
  201. unsigned i = 1000;
  202. TSI_WRITE(TSI108_MAC_MII_ADDR,
  203. (0x1e << TSI108_MAC_MII_ADDR_PHY)
  204. | (reg << TSI108_MAC_MII_ADDR_REG));
  205. TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
  206. while(i--) {
  207. if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
  208. return;
  209. udelay(10);
  210. }
  211. printk(KERN_ERR "%s function time out\n", __func__);
  212. }
  213. static int mii_speed(struct mii_if_info *mii)
  214. {
  215. int advert, lpa, val, media;
  216. int lpa2 = 0;
  217. int speed;
  218. if (!mii_link_ok(mii))
  219. return 0;
  220. val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
  221. if ((val & BMSR_ANEGCOMPLETE) == 0)
  222. return 0;
  223. advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
  224. lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
  225. media = mii_nway_result(advert & lpa);
  226. if (mii->supports_gmii)
  227. lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
  228. speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
  229. (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
  230. return speed;
  231. }
  232. static void tsi108_check_phy(struct net_device *dev)
  233. {
  234. struct tsi108_prv_data *data = netdev_priv(dev);
  235. u32 mac_cfg2_reg, portctrl_reg;
  236. u32 duplex;
  237. u32 speed;
  238. unsigned long flags;
  239. spin_lock_irqsave(&phy_lock, flags);
  240. if (!data->phy_ok)
  241. goto out;
  242. duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
  243. data->init_media = 0;
  244. if (netif_carrier_ok(dev)) {
  245. speed = mii_speed(&data->mii_if);
  246. if ((speed != data->speed) || duplex) {
  247. mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
  248. portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
  249. mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
  250. if (speed == 1000) {
  251. mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
  252. portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
  253. } else {
  254. mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
  255. portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
  256. }
  257. data->speed = speed;
  258. if (data->mii_if.full_duplex) {
  259. mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
  260. portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
  261. data->duplex = 2;
  262. } else {
  263. mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
  264. portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
  265. data->duplex = 1;
  266. }
  267. TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
  268. TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
  269. }
  270. if (data->link_up == 0) {
  271. /* The manual says it can take 3-4 usecs for the speed change
  272. * to take effect.
  273. */
  274. udelay(5);
  275. spin_lock(&data->txlock);
  276. if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
  277. netif_wake_queue(dev);
  278. data->link_up = 1;
  279. spin_unlock(&data->txlock);
  280. }
  281. } else {
  282. if (data->link_up == 1) {
  283. netif_stop_queue(dev);
  284. data->link_up = 0;
  285. printk(KERN_NOTICE "%s : link is down\n", dev->name);
  286. }
  287. goto out;
  288. }
  289. out:
  290. spin_unlock_irqrestore(&phy_lock, flags);
  291. }
  292. static inline void
  293. tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
  294. unsigned long *upper)
  295. {
  296. if (carry & carry_bit)
  297. *upper += carry_shift;
  298. }
  299. static void tsi108_stat_carry(struct net_device *dev)
  300. {
  301. struct tsi108_prv_data *data = netdev_priv(dev);
  302. u32 carry1, carry2;
  303. spin_lock_irq(&data->misclock);
  304. carry1 = TSI_READ(TSI108_STAT_CARRY1);
  305. carry2 = TSI_READ(TSI108_STAT_CARRY2);
  306. TSI_WRITE(TSI108_STAT_CARRY1, carry1);
  307. TSI_WRITE(TSI108_STAT_CARRY2, carry2);
  308. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
  309. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  310. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
  311. TSI108_STAT_RXPKTS_CARRY,
  312. &data->stats.rx_packets);
  313. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
  314. TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
  315. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
  316. TSI108_STAT_RXMCAST_CARRY,
  317. &data->stats.multicast);
  318. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
  319. TSI108_STAT_RXALIGN_CARRY,
  320. &data->stats.rx_frame_errors);
  321. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
  322. TSI108_STAT_RXLENGTH_CARRY,
  323. &data->stats.rx_length_errors);
  324. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
  325. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  326. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
  327. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  328. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
  329. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  330. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
  331. TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
  332. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
  333. TSI108_STAT_RXDROP_CARRY,
  334. &data->stats.rx_missed_errors);
  335. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
  336. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  337. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
  338. TSI108_STAT_TXPKTS_CARRY,
  339. &data->stats.tx_packets);
  340. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
  341. TSI108_STAT_TXEXDEF_CARRY,
  342. &data->stats.tx_aborted_errors);
  343. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
  344. TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
  345. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
  346. TSI108_STAT_TXTCOL_CARRY,
  347. &data->stats.collisions);
  348. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
  349. TSI108_STAT_TXPAUSEDROP_CARRY,
  350. &data->tx_pause_drop);
  351. spin_unlock_irq(&data->misclock);
  352. }
  353. /* Read a stat counter atomically with respect to carries.
  354. * data->misclock must be held.
  355. */
  356. static inline unsigned long
  357. tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
  358. int carry_shift, unsigned long *upper)
  359. {
  360. int carryreg;
  361. unsigned long val;
  362. if (reg < 0xb0)
  363. carryreg = TSI108_STAT_CARRY1;
  364. else
  365. carryreg = TSI108_STAT_CARRY2;
  366. again:
  367. val = TSI_READ(reg) | *upper;
  368. /* Check to see if it overflowed, but the interrupt hasn't
  369. * been serviced yet. If so, handle the carry here, and
  370. * try again.
  371. */
  372. if (unlikely(TSI_READ(carryreg) & carry_bit)) {
  373. *upper += carry_shift;
  374. TSI_WRITE(carryreg, carry_bit);
  375. goto again;
  376. }
  377. return val;
  378. }
  379. static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
  380. {
  381. unsigned long excol;
  382. struct tsi108_prv_data *data = netdev_priv(dev);
  383. spin_lock_irq(&data->misclock);
  384. data->tmpstats.rx_packets =
  385. tsi108_read_stat(data, TSI108_STAT_RXPKTS,
  386. TSI108_STAT_CARRY1_RXPKTS,
  387. TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
  388. data->tmpstats.tx_packets =
  389. tsi108_read_stat(data, TSI108_STAT_TXPKTS,
  390. TSI108_STAT_CARRY2_TXPKTS,
  391. TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
  392. data->tmpstats.rx_bytes =
  393. tsi108_read_stat(data, TSI108_STAT_RXBYTES,
  394. TSI108_STAT_CARRY1_RXBYTES,
  395. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  396. data->tmpstats.tx_bytes =
  397. tsi108_read_stat(data, TSI108_STAT_TXBYTES,
  398. TSI108_STAT_CARRY2_TXBYTES,
  399. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  400. data->tmpstats.multicast =
  401. tsi108_read_stat(data, TSI108_STAT_RXMCAST,
  402. TSI108_STAT_CARRY1_RXMCAST,
  403. TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
  404. excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
  405. TSI108_STAT_CARRY2_TXEXCOL,
  406. TSI108_STAT_TXEXCOL_CARRY,
  407. &data->tx_coll_abort);
  408. data->tmpstats.collisions =
  409. tsi108_read_stat(data, TSI108_STAT_TXTCOL,
  410. TSI108_STAT_CARRY2_TXTCOL,
  411. TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
  412. data->tmpstats.collisions += excol;
  413. data->tmpstats.rx_length_errors =
  414. tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
  415. TSI108_STAT_CARRY1_RXLENGTH,
  416. TSI108_STAT_RXLENGTH_CARRY,
  417. &data->stats.rx_length_errors);
  418. data->tmpstats.rx_length_errors +=
  419. tsi108_read_stat(data, TSI108_STAT_RXRUNT,
  420. TSI108_STAT_CARRY1_RXRUNT,
  421. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  422. data->tmpstats.rx_length_errors +=
  423. tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
  424. TSI108_STAT_CARRY1_RXJUMBO,
  425. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  426. data->tmpstats.rx_frame_errors =
  427. tsi108_read_stat(data, TSI108_STAT_RXALIGN,
  428. TSI108_STAT_CARRY1_RXALIGN,
  429. TSI108_STAT_RXALIGN_CARRY,
  430. &data->stats.rx_frame_errors);
  431. data->tmpstats.rx_frame_errors +=
  432. tsi108_read_stat(data, TSI108_STAT_RXFCS,
  433. TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
  434. &data->rx_fcs);
  435. data->tmpstats.rx_frame_errors +=
  436. tsi108_read_stat(data, TSI108_STAT_RXFRAG,
  437. TSI108_STAT_CARRY1_RXFRAG,
  438. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  439. data->tmpstats.rx_missed_errors =
  440. tsi108_read_stat(data, TSI108_STAT_RXDROP,
  441. TSI108_STAT_CARRY1_RXDROP,
  442. TSI108_STAT_RXDROP_CARRY,
  443. &data->stats.rx_missed_errors);
  444. /* These three are maintained by software. */
  445. data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
  446. data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
  447. data->tmpstats.tx_aborted_errors =
  448. tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
  449. TSI108_STAT_CARRY2_TXEXDEF,
  450. TSI108_STAT_TXEXDEF_CARRY,
  451. &data->stats.tx_aborted_errors);
  452. data->tmpstats.tx_aborted_errors +=
  453. tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
  454. TSI108_STAT_CARRY2_TXPAUSE,
  455. TSI108_STAT_TXPAUSEDROP_CARRY,
  456. &data->tx_pause_drop);
  457. data->tmpstats.tx_aborted_errors += excol;
  458. data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
  459. data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
  460. data->tmpstats.rx_crc_errors +
  461. data->tmpstats.rx_frame_errors +
  462. data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
  463. spin_unlock_irq(&data->misclock);
  464. return &data->tmpstats;
  465. }
  466. static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
  467. {
  468. TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
  469. TSI108_EC_RXQ_PTRHIGH_VALID);
  470. TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
  471. | TSI108_EC_RXCTRL_QUEUE0);
  472. }
  473. static void tsi108_restart_tx(struct tsi108_prv_data * data)
  474. {
  475. TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
  476. TSI108_EC_TXQ_PTRHIGH_VALID);
  477. TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
  478. TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
  479. }
  480. /* txlock must be held by caller, with IRQs disabled, and
  481. * with permission to re-enable them when the lock is dropped.
  482. */
  483. static void tsi108_complete_tx(struct net_device *dev)
  484. {
  485. struct tsi108_prv_data *data = netdev_priv(dev);
  486. int tx;
  487. struct sk_buff *skb;
  488. int release = 0;
  489. while (!data->txfree || data->txhead != data->txtail) {
  490. tx = data->txtail;
  491. if (data->txring[tx].misc & TSI108_TX_OWN)
  492. break;
  493. skb = data->txskbs[tx];
  494. if (!(data->txring[tx].misc & TSI108_TX_OK))
  495. printk("%s: bad tx packet, misc %x\n",
  496. dev->name, data->txring[tx].misc);
  497. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  498. data->txfree++;
  499. if (data->txring[tx].misc & TSI108_TX_EOF) {
  500. dev_kfree_skb_any(skb);
  501. release++;
  502. }
  503. }
  504. if (release) {
  505. if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
  506. netif_wake_queue(dev);
  507. }
  508. }
  509. static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
  510. {
  511. struct tsi108_prv_data *data = netdev_priv(dev);
  512. int frags = skb_shinfo(skb)->nr_frags + 1;
  513. int i;
  514. if (!data->phy_ok && net_ratelimit())
  515. printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
  516. if (!data->link_up) {
  517. printk(KERN_ERR "%s: Transmit while link is down!\n",
  518. dev->name);
  519. netif_stop_queue(dev);
  520. return NETDEV_TX_BUSY;
  521. }
  522. if (data->txfree < MAX_SKB_FRAGS + 1) {
  523. netif_stop_queue(dev);
  524. if (net_ratelimit())
  525. printk(KERN_ERR "%s: Transmit with full tx ring!\n",
  526. dev->name);
  527. return NETDEV_TX_BUSY;
  528. }
  529. if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
  530. netif_stop_queue(dev);
  531. }
  532. spin_lock_irq(&data->txlock);
  533. for (i = 0; i < frags; i++) {
  534. int misc = 0;
  535. int tx = data->txhead;
  536. /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
  537. * the interrupt bit. TX descriptor-complete interrupts are
  538. * enabled when the queue fills up, and masked when there is
  539. * still free space. This way, when saturating the outbound
  540. * link, the tx interrupts are kept to a reasonable level.
  541. * When the queue is not full, reclamation of skbs still occurs
  542. * as new packets are transmitted, or on a queue-empty
  543. * interrupt.
  544. */
  545. if ((tx % TSI108_TX_INT_FREQ == 0) &&
  546. ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
  547. misc = TSI108_TX_INT;
  548. data->txskbs[tx] = skb;
  549. if (i == 0) {
  550. data->txring[tx].buf0 = dma_map_single(NULL, skb->data,
  551. skb_headlen(skb), DMA_TO_DEVICE);
  552. data->txring[tx].len = skb_headlen(skb);
  553. misc |= TSI108_TX_SOF;
  554. } else {
  555. const skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
  556. data->txring[tx].buf0 = skb_frag_dma_map(NULL, frag,
  557. 0,
  558. skb_frag_size(frag),
  559. DMA_TO_DEVICE);
  560. data->txring[tx].len = skb_frag_size(frag);
  561. }
  562. if (i == frags - 1)
  563. misc |= TSI108_TX_EOF;
  564. if (netif_msg_pktdata(data)) {
  565. int i;
  566. printk("%s: Tx Frame contents (%d)\n", dev->name,
  567. skb->len);
  568. for (i = 0; i < skb->len; i++)
  569. printk(" %2.2x", skb->data[i]);
  570. printk(".\n");
  571. }
  572. data->txring[tx].misc = misc | TSI108_TX_OWN;
  573. data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
  574. data->txfree--;
  575. }
  576. tsi108_complete_tx(dev);
  577. /* This must be done after the check for completed tx descriptors,
  578. * so that the tail pointer is correct.
  579. */
  580. if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
  581. tsi108_restart_tx(data);
  582. spin_unlock_irq(&data->txlock);
  583. return NETDEV_TX_OK;
  584. }
  585. static int tsi108_complete_rx(struct net_device *dev, int budget)
  586. {
  587. struct tsi108_prv_data *data = netdev_priv(dev);
  588. int done = 0;
  589. while (data->rxfree && done != budget) {
  590. int rx = data->rxtail;
  591. struct sk_buff *skb;
  592. if (data->rxring[rx].misc & TSI108_RX_OWN)
  593. break;
  594. skb = data->rxskbs[rx];
  595. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  596. data->rxfree--;
  597. done++;
  598. if (data->rxring[rx].misc & TSI108_RX_BAD) {
  599. spin_lock_irq(&data->misclock);
  600. if (data->rxring[rx].misc & TSI108_RX_CRC)
  601. data->stats.rx_crc_errors++;
  602. if (data->rxring[rx].misc & TSI108_RX_OVER)
  603. data->stats.rx_fifo_errors++;
  604. spin_unlock_irq(&data->misclock);
  605. dev_kfree_skb_any(skb);
  606. continue;
  607. }
  608. if (netif_msg_pktdata(data)) {
  609. int i;
  610. printk("%s: Rx Frame contents (%d)\n",
  611. dev->name, data->rxring[rx].len);
  612. for (i = 0; i < data->rxring[rx].len; i++)
  613. printk(" %2.2x", skb->data[i]);
  614. printk(".\n");
  615. }
  616. skb_put(skb, data->rxring[rx].len);
  617. skb->protocol = eth_type_trans(skb, dev);
  618. netif_receive_skb(skb);
  619. }
  620. return done;
  621. }
  622. static int tsi108_refill_rx(struct net_device *dev, int budget)
  623. {
  624. struct tsi108_prv_data *data = netdev_priv(dev);
  625. int done = 0;
  626. while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
  627. int rx = data->rxhead;
  628. struct sk_buff *skb;
  629. skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
  630. data->rxskbs[rx] = skb;
  631. if (!skb)
  632. break;
  633. data->rxring[rx].buf0 = dma_map_single(NULL, skb->data,
  634. TSI108_RX_SKB_SIZE,
  635. DMA_FROM_DEVICE);
  636. /* Sometimes the hardware sets blen to zero after packet
  637. * reception, even though the manual says that it's only ever
  638. * modified by the driver.
  639. */
  640. data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
  641. data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
  642. data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
  643. data->rxfree++;
  644. done++;
  645. }
  646. if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
  647. TSI108_EC_RXSTAT_QUEUE0))
  648. tsi108_restart_rx(data, dev);
  649. return done;
  650. }
  651. static int tsi108_poll(struct napi_struct *napi, int budget)
  652. {
  653. struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
  654. struct net_device *dev = data->dev;
  655. u32 estat = TSI_READ(TSI108_EC_RXESTAT);
  656. u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
  657. int num_received = 0, num_filled = 0;
  658. intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  659. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
  660. TSI_WRITE(TSI108_EC_RXESTAT, estat);
  661. TSI_WRITE(TSI108_EC_INTSTAT, intstat);
  662. if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
  663. num_received = tsi108_complete_rx(dev, budget);
  664. /* This should normally fill no more slots than the number of
  665. * packets received in tsi108_complete_rx(). The exception
  666. * is when we previously ran out of memory for RX SKBs. In that
  667. * case, it's helpful to obey the budget, not only so that the
  668. * CPU isn't hogged, but so that memory (which may still be low)
  669. * is not hogged by one device.
  670. *
  671. * A work unit is considered to be two SKBs to allow us to catch
  672. * up when the ring has shrunk due to out-of-memory but we're
  673. * still removing the full budget's worth of packets each time.
  674. */
  675. if (data->rxfree < TSI108_RXRING_LEN)
  676. num_filled = tsi108_refill_rx(dev, budget * 2);
  677. if (intstat & TSI108_INT_RXERROR) {
  678. u32 err = TSI_READ(TSI108_EC_RXERR);
  679. TSI_WRITE(TSI108_EC_RXERR, err);
  680. if (err) {
  681. if (net_ratelimit())
  682. printk(KERN_DEBUG "%s: RX error %x\n",
  683. dev->name, err);
  684. if (!(TSI_READ(TSI108_EC_RXSTAT) &
  685. TSI108_EC_RXSTAT_QUEUE0))
  686. tsi108_restart_rx(data, dev);
  687. }
  688. }
  689. if (intstat & TSI108_INT_RXOVERRUN) {
  690. spin_lock_irq(&data->misclock);
  691. data->stats.rx_fifo_errors++;
  692. spin_unlock_irq(&data->misclock);
  693. }
  694. if (num_received < budget) {
  695. data->rxpending = 0;
  696. napi_complete(napi);
  697. TSI_WRITE(TSI108_EC_INTMASK,
  698. TSI_READ(TSI108_EC_INTMASK)
  699. & ~(TSI108_INT_RXQUEUE0
  700. | TSI108_INT_RXTHRESH |
  701. TSI108_INT_RXOVERRUN |
  702. TSI108_INT_RXERROR |
  703. TSI108_INT_RXWAIT));
  704. } else {
  705. data->rxpending = 1;
  706. }
  707. return num_received;
  708. }
  709. static void tsi108_rx_int(struct net_device *dev)
  710. {
  711. struct tsi108_prv_data *data = netdev_priv(dev);
  712. /* A race could cause dev to already be scheduled, so it's not an
  713. * error if that happens (and interrupts shouldn't be re-masked,
  714. * because that can cause harmful races, if poll has already
  715. * unmasked them but not cleared LINK_STATE_SCHED).
  716. *
  717. * This can happen if this code races with tsi108_poll(), which masks
  718. * the interrupts after tsi108_irq_one() read the mask, but before
  719. * napi_schedule is called. It could also happen due to calls
  720. * from tsi108_check_rxring().
  721. */
  722. if (napi_schedule_prep(&data->napi)) {
  723. /* Mask, rather than ack, the receive interrupts. The ack
  724. * will happen in tsi108_poll().
  725. */
  726. TSI_WRITE(TSI108_EC_INTMASK,
  727. TSI_READ(TSI108_EC_INTMASK) |
  728. TSI108_INT_RXQUEUE0
  729. | TSI108_INT_RXTHRESH |
  730. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
  731. TSI108_INT_RXWAIT);
  732. __napi_schedule(&data->napi);
  733. } else {
  734. if (!netif_running(dev)) {
  735. /* This can happen if an interrupt occurs while the
  736. * interface is being brought down, as the START
  737. * bit is cleared before the stop function is called.
  738. *
  739. * In this case, the interrupts must be masked, or
  740. * they will continue indefinitely.
  741. *
  742. * There's a race here if the interface is brought down
  743. * and then up in rapid succession, as the device could
  744. * be made running after the above check and before
  745. * the masking below. This will only happen if the IRQ
  746. * thread has a lower priority than the task brining
  747. * up the interface. Fixing this race would likely
  748. * require changes in generic code.
  749. */
  750. TSI_WRITE(TSI108_EC_INTMASK,
  751. TSI_READ
  752. (TSI108_EC_INTMASK) |
  753. TSI108_INT_RXQUEUE0 |
  754. TSI108_INT_RXTHRESH |
  755. TSI108_INT_RXOVERRUN |
  756. TSI108_INT_RXERROR |
  757. TSI108_INT_RXWAIT);
  758. }
  759. }
  760. }
  761. /* If the RX ring has run out of memory, try periodically
  762. * to allocate some more, as otherwise poll would never
  763. * get called (apart from the initial end-of-queue condition).
  764. *
  765. * This is called once per second (by default) from the thread.
  766. */
  767. static void tsi108_check_rxring(struct net_device *dev)
  768. {
  769. struct tsi108_prv_data *data = netdev_priv(dev);
  770. /* A poll is scheduled, as opposed to caling tsi108_refill_rx
  771. * directly, so as to keep the receive path single-threaded
  772. * (and thus not needing a lock).
  773. */
  774. if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
  775. tsi108_rx_int(dev);
  776. }
  777. static void tsi108_tx_int(struct net_device *dev)
  778. {
  779. struct tsi108_prv_data *data = netdev_priv(dev);
  780. u32 estat = TSI_READ(TSI108_EC_TXESTAT);
  781. TSI_WRITE(TSI108_EC_TXESTAT, estat);
  782. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
  783. TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
  784. if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
  785. u32 err = TSI_READ(TSI108_EC_TXERR);
  786. TSI_WRITE(TSI108_EC_TXERR, err);
  787. if (err && net_ratelimit())
  788. printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
  789. }
  790. if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
  791. spin_lock(&data->txlock);
  792. tsi108_complete_tx(dev);
  793. spin_unlock(&data->txlock);
  794. }
  795. }
  796. static irqreturn_t tsi108_irq(int irq, void *dev_id)
  797. {
  798. struct net_device *dev = dev_id;
  799. struct tsi108_prv_data *data = netdev_priv(dev);
  800. u32 stat = TSI_READ(TSI108_EC_INTSTAT);
  801. if (!(stat & TSI108_INT_ANY))
  802. return IRQ_NONE; /* Not our interrupt */
  803. stat &= ~TSI_READ(TSI108_EC_INTMASK);
  804. if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
  805. TSI108_INT_TXERROR))
  806. tsi108_tx_int(dev);
  807. if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  808. TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
  809. TSI108_INT_RXERROR))
  810. tsi108_rx_int(dev);
  811. if (stat & TSI108_INT_SFN) {
  812. if (net_ratelimit())
  813. printk(KERN_DEBUG "%s: SFN error\n", dev->name);
  814. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
  815. }
  816. if (stat & TSI108_INT_STATCARRY) {
  817. tsi108_stat_carry(dev);
  818. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
  819. }
  820. return IRQ_HANDLED;
  821. }
  822. static void tsi108_stop_ethernet(struct net_device *dev)
  823. {
  824. struct tsi108_prv_data *data = netdev_priv(dev);
  825. int i = 1000;
  826. /* Disable all TX and RX queues ... */
  827. TSI_WRITE(TSI108_EC_TXCTRL, 0);
  828. TSI_WRITE(TSI108_EC_RXCTRL, 0);
  829. /* ...and wait for them to become idle */
  830. while(i--) {
  831. if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
  832. break;
  833. udelay(10);
  834. }
  835. i = 1000;
  836. while(i--){
  837. if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
  838. return;
  839. udelay(10);
  840. }
  841. printk(KERN_ERR "%s function time out\n", __func__);
  842. }
  843. static void tsi108_reset_ether(struct tsi108_prv_data * data)
  844. {
  845. TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
  846. udelay(100);
  847. TSI_WRITE(TSI108_MAC_CFG1, 0);
  848. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
  849. udelay(100);
  850. TSI_WRITE(TSI108_EC_PORTCTRL,
  851. TSI_READ(TSI108_EC_PORTCTRL) &
  852. ~TSI108_EC_PORTCTRL_STATRST);
  853. TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
  854. udelay(100);
  855. TSI_WRITE(TSI108_EC_TXCFG,
  856. TSI_READ(TSI108_EC_TXCFG) &
  857. ~TSI108_EC_TXCFG_RST);
  858. TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
  859. udelay(100);
  860. TSI_WRITE(TSI108_EC_RXCFG,
  861. TSI_READ(TSI108_EC_RXCFG) &
  862. ~TSI108_EC_RXCFG_RST);
  863. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  864. TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
  865. TSI108_MAC_MII_MGMT_RST);
  866. udelay(100);
  867. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  868. (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
  869. ~(TSI108_MAC_MII_MGMT_RST |
  870. TSI108_MAC_MII_MGMT_CLK)) | 0x07);
  871. }
  872. static int tsi108_get_mac(struct net_device *dev)
  873. {
  874. struct tsi108_prv_data *data = netdev_priv(dev);
  875. u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
  876. u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
  877. /* Note that the octets are reversed from what the manual says,
  878. * producing an even weirder ordering...
  879. */
  880. if (word2 == 0 && word1 == 0) {
  881. dev->dev_addr[0] = 0x00;
  882. dev->dev_addr[1] = 0x06;
  883. dev->dev_addr[2] = 0xd2;
  884. dev->dev_addr[3] = 0x00;
  885. dev->dev_addr[4] = 0x00;
  886. if (0x8 == data->phy)
  887. dev->dev_addr[5] = 0x01;
  888. else
  889. dev->dev_addr[5] = 0x02;
  890. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  891. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  892. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  893. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  894. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  895. } else {
  896. dev->dev_addr[0] = (word2 >> 16) & 0xff;
  897. dev->dev_addr[1] = (word2 >> 24) & 0xff;
  898. dev->dev_addr[2] = (word1 >> 0) & 0xff;
  899. dev->dev_addr[3] = (word1 >> 8) & 0xff;
  900. dev->dev_addr[4] = (word1 >> 16) & 0xff;
  901. dev->dev_addr[5] = (word1 >> 24) & 0xff;
  902. }
  903. if (!is_valid_ether_addr(dev->dev_addr)) {
  904. printk(KERN_ERR
  905. "%s: Invalid MAC address. word1: %08x, word2: %08x\n",
  906. dev->name, word1, word2);
  907. return -EINVAL;
  908. }
  909. return 0;
  910. }
  911. static int tsi108_set_mac(struct net_device *dev, void *addr)
  912. {
  913. struct tsi108_prv_data *data = netdev_priv(dev);
  914. u32 word1, word2;
  915. int i;
  916. if (!is_valid_ether_addr(addr))
  917. return -EADDRNOTAVAIL;
  918. for (i = 0; i < 6; i++)
  919. /* +2 is for the offset of the HW addr type */
  920. dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
  921. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  922. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  923. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  924. spin_lock_irq(&data->misclock);
  925. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  926. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  927. spin_lock(&data->txlock);
  928. if (data->txfree && data->link_up)
  929. netif_wake_queue(dev);
  930. spin_unlock(&data->txlock);
  931. spin_unlock_irq(&data->misclock);
  932. return 0;
  933. }
  934. /* Protected by dev->xmit_lock. */
  935. static void tsi108_set_rx_mode(struct net_device *dev)
  936. {
  937. struct tsi108_prv_data *data = netdev_priv(dev);
  938. u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
  939. if (dev->flags & IFF_PROMISC) {
  940. rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
  941. rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
  942. goto out;
  943. }
  944. rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
  945. if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
  946. int i;
  947. struct netdev_hw_addr *ha;
  948. rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
  949. memset(data->mc_hash, 0, sizeof(data->mc_hash));
  950. netdev_for_each_mc_addr(ha, dev) {
  951. u32 hash, crc;
  952. crc = ether_crc(6, ha->addr);
  953. hash = crc >> 23;
  954. __set_bit(hash, &data->mc_hash[0]);
  955. }
  956. TSI_WRITE(TSI108_EC_HASHADDR,
  957. TSI108_EC_HASHADDR_AUTOINC |
  958. TSI108_EC_HASHADDR_MCAST);
  959. for (i = 0; i < 16; i++) {
  960. /* The manual says that the hardware may drop
  961. * back-to-back writes to the data register.
  962. */
  963. udelay(1);
  964. TSI_WRITE(TSI108_EC_HASHDATA,
  965. data->mc_hash[i]);
  966. }
  967. }
  968. out:
  969. TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
  970. }
  971. static void tsi108_init_phy(struct net_device *dev)
  972. {
  973. struct tsi108_prv_data *data = netdev_priv(dev);
  974. u32 i = 0;
  975. u16 phyval = 0;
  976. unsigned long flags;
  977. spin_lock_irqsave(&phy_lock, flags);
  978. tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
  979. while (--i) {
  980. if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
  981. break;
  982. udelay(10);
  983. }
  984. if (i == 0)
  985. printk(KERN_ERR "%s function time out\n", __func__);
  986. if (data->phy_type == TSI108_PHY_BCM54XX) {
  987. tsi108_write_mii(data, 0x09, 0x0300);
  988. tsi108_write_mii(data, 0x10, 0x1020);
  989. tsi108_write_mii(data, 0x1c, 0x8c00);
  990. }
  991. tsi108_write_mii(data,
  992. MII_BMCR,
  993. BMCR_ANENABLE | BMCR_ANRESTART);
  994. while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
  995. cpu_relax();
  996. /* Set G/MII mode and receive clock select in TBI control #2. The
  997. * second port won't work if this isn't done, even though we don't
  998. * use TBI mode.
  999. */
  1000. tsi108_write_tbi(data, 0x11, 0x30);
  1001. /* FIXME: It seems to take more than 2 back-to-back reads to the
  1002. * PHY_STAT register before the link up status bit is set.
  1003. */
  1004. data->link_up = 0;
  1005. while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
  1006. BMSR_LSTATUS)) {
  1007. if (i++ > (MII_READ_DELAY / 10)) {
  1008. break;
  1009. }
  1010. spin_unlock_irqrestore(&phy_lock, flags);
  1011. msleep(10);
  1012. spin_lock_irqsave(&phy_lock, flags);
  1013. }
  1014. data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
  1015. printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
  1016. data->phy_ok = 1;
  1017. data->init_media = 1;
  1018. spin_unlock_irqrestore(&phy_lock, flags);
  1019. }
  1020. static void tsi108_kill_phy(struct net_device *dev)
  1021. {
  1022. struct tsi108_prv_data *data = netdev_priv(dev);
  1023. unsigned long flags;
  1024. spin_lock_irqsave(&phy_lock, flags);
  1025. tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
  1026. data->phy_ok = 0;
  1027. spin_unlock_irqrestore(&phy_lock, flags);
  1028. }
  1029. static int tsi108_open(struct net_device *dev)
  1030. {
  1031. int i;
  1032. struct tsi108_prv_data *data = netdev_priv(dev);
  1033. unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
  1034. unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
  1035. i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
  1036. if (i != 0) {
  1037. printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
  1038. data->id, data->irq_num);
  1039. return i;
  1040. } else {
  1041. dev->irq = data->irq_num;
  1042. printk(KERN_NOTICE
  1043. "tsi108_open : Port %d Assigned IRQ %d to %s\n",
  1044. data->id, dev->irq, dev->name);
  1045. }
  1046. data->rxring = dma_zalloc_coherent(NULL, rxring_size, &data->rxdma,
  1047. GFP_KERNEL);
  1048. if (!data->rxring)
  1049. return -ENOMEM;
  1050. data->txring = dma_zalloc_coherent(NULL, txring_size, &data->txdma,
  1051. GFP_KERNEL);
  1052. if (!data->txring) {
  1053. pci_free_consistent(0, rxring_size, data->rxring, data->rxdma);
  1054. return -ENOMEM;
  1055. }
  1056. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1057. data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
  1058. data->rxring[i].blen = TSI108_RXBUF_SIZE;
  1059. data->rxring[i].vlan = 0;
  1060. }
  1061. data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
  1062. data->rxtail = 0;
  1063. data->rxhead = 0;
  1064. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1065. struct sk_buff *skb;
  1066. skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
  1067. if (!skb) {
  1068. /* Bah. No memory for now, but maybe we'll get
  1069. * some more later.
  1070. * For now, we'll live with the smaller ring.
  1071. */
  1072. printk(KERN_WARNING
  1073. "%s: Could only allocate %d receive skb(s).\n",
  1074. dev->name, i);
  1075. data->rxhead = i;
  1076. break;
  1077. }
  1078. data->rxskbs[i] = skb;
  1079. data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
  1080. data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
  1081. }
  1082. data->rxfree = i;
  1083. TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
  1084. for (i = 0; i < TSI108_TXRING_LEN; i++) {
  1085. data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
  1086. data->txring[i].misc = 0;
  1087. }
  1088. data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
  1089. data->txtail = 0;
  1090. data->txhead = 0;
  1091. data->txfree = TSI108_TXRING_LEN;
  1092. TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
  1093. tsi108_init_phy(dev);
  1094. napi_enable(&data->napi);
  1095. setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev);
  1096. mod_timer(&data->timer, jiffies + 1);
  1097. tsi108_restart_rx(data, dev);
  1098. TSI_WRITE(TSI108_EC_INTSTAT, ~0);
  1099. TSI_WRITE(TSI108_EC_INTMASK,
  1100. ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
  1101. TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
  1102. TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
  1103. TSI108_INT_SFN | TSI108_INT_STATCARRY));
  1104. TSI_WRITE(TSI108_MAC_CFG1,
  1105. TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
  1106. netif_start_queue(dev);
  1107. return 0;
  1108. }
  1109. static int tsi108_close(struct net_device *dev)
  1110. {
  1111. struct tsi108_prv_data *data = netdev_priv(dev);
  1112. netif_stop_queue(dev);
  1113. napi_disable(&data->napi);
  1114. del_timer_sync(&data->timer);
  1115. tsi108_stop_ethernet(dev);
  1116. tsi108_kill_phy(dev);
  1117. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1118. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1119. /* Check for any pending TX packets, and drop them. */
  1120. while (!data->txfree || data->txhead != data->txtail) {
  1121. int tx = data->txtail;
  1122. struct sk_buff *skb;
  1123. skb = data->txskbs[tx];
  1124. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  1125. data->txfree++;
  1126. dev_kfree_skb(skb);
  1127. }
  1128. free_irq(data->irq_num, dev);
  1129. /* Discard the RX ring. */
  1130. while (data->rxfree) {
  1131. int rx = data->rxtail;
  1132. struct sk_buff *skb;
  1133. skb = data->rxskbs[rx];
  1134. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  1135. data->rxfree--;
  1136. dev_kfree_skb(skb);
  1137. }
  1138. dma_free_coherent(0,
  1139. TSI108_RXRING_LEN * sizeof(rx_desc),
  1140. data->rxring, data->rxdma);
  1141. dma_free_coherent(0,
  1142. TSI108_TXRING_LEN * sizeof(tx_desc),
  1143. data->txring, data->txdma);
  1144. return 0;
  1145. }
  1146. static void tsi108_init_mac(struct net_device *dev)
  1147. {
  1148. struct tsi108_prv_data *data = netdev_priv(dev);
  1149. TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
  1150. TSI108_MAC_CFG2_PADCRC);
  1151. TSI_WRITE(TSI108_EC_TXTHRESH,
  1152. (192 << TSI108_EC_TXTHRESH_STARTFILL) |
  1153. (192 << TSI108_EC_TXTHRESH_STOPFILL));
  1154. TSI_WRITE(TSI108_STAT_CARRYMASK1,
  1155. ~(TSI108_STAT_CARRY1_RXBYTES |
  1156. TSI108_STAT_CARRY1_RXPKTS |
  1157. TSI108_STAT_CARRY1_RXFCS |
  1158. TSI108_STAT_CARRY1_RXMCAST |
  1159. TSI108_STAT_CARRY1_RXALIGN |
  1160. TSI108_STAT_CARRY1_RXLENGTH |
  1161. TSI108_STAT_CARRY1_RXRUNT |
  1162. TSI108_STAT_CARRY1_RXJUMBO |
  1163. TSI108_STAT_CARRY1_RXFRAG |
  1164. TSI108_STAT_CARRY1_RXJABBER |
  1165. TSI108_STAT_CARRY1_RXDROP));
  1166. TSI_WRITE(TSI108_STAT_CARRYMASK2,
  1167. ~(TSI108_STAT_CARRY2_TXBYTES |
  1168. TSI108_STAT_CARRY2_TXPKTS |
  1169. TSI108_STAT_CARRY2_TXEXDEF |
  1170. TSI108_STAT_CARRY2_TXEXCOL |
  1171. TSI108_STAT_CARRY2_TXTCOL |
  1172. TSI108_STAT_CARRY2_TXPAUSE));
  1173. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
  1174. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1175. TSI_WRITE(TSI108_EC_RXCFG,
  1176. TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
  1177. TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
  1178. TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
  1179. TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1180. TSI108_EC_TXQ_CFG_SFNPORT));
  1181. TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
  1182. TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
  1183. TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1184. TSI108_EC_RXQ_CFG_SFNPORT));
  1185. TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
  1186. TSI108_EC_TXQ_BUFCFG_BURST256 |
  1187. TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1188. TSI108_EC_TXQ_BUFCFG_SFNPORT));
  1189. TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
  1190. TSI108_EC_RXQ_BUFCFG_BURST256 |
  1191. TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1192. TSI108_EC_RXQ_BUFCFG_SFNPORT));
  1193. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1194. }
  1195. static int tsi108_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1196. {
  1197. struct tsi108_prv_data *data = netdev_priv(dev);
  1198. unsigned long flags;
  1199. int rc;
  1200. spin_lock_irqsave(&data->txlock, flags);
  1201. rc = mii_ethtool_gset(&data->mii_if, cmd);
  1202. spin_unlock_irqrestore(&data->txlock, flags);
  1203. return rc;
  1204. }
  1205. static int tsi108_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1206. {
  1207. struct tsi108_prv_data *data = netdev_priv(dev);
  1208. unsigned long flags;
  1209. int rc;
  1210. spin_lock_irqsave(&data->txlock, flags);
  1211. rc = mii_ethtool_sset(&data->mii_if, cmd);
  1212. spin_unlock_irqrestore(&data->txlock, flags);
  1213. return rc;
  1214. }
  1215. static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1216. {
  1217. struct tsi108_prv_data *data = netdev_priv(dev);
  1218. if (!netif_running(dev))
  1219. return -EINVAL;
  1220. return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
  1221. }
  1222. static const struct ethtool_ops tsi108_ethtool_ops = {
  1223. .get_link = ethtool_op_get_link,
  1224. .get_settings = tsi108_get_settings,
  1225. .set_settings = tsi108_set_settings,
  1226. };
  1227. static const struct net_device_ops tsi108_netdev_ops = {
  1228. .ndo_open = tsi108_open,
  1229. .ndo_stop = tsi108_close,
  1230. .ndo_start_xmit = tsi108_send_packet,
  1231. .ndo_set_rx_mode = tsi108_set_rx_mode,
  1232. .ndo_get_stats = tsi108_get_stats,
  1233. .ndo_do_ioctl = tsi108_do_ioctl,
  1234. .ndo_set_mac_address = tsi108_set_mac,
  1235. .ndo_validate_addr = eth_validate_addr,
  1236. .ndo_change_mtu = eth_change_mtu,
  1237. };
  1238. static int
  1239. tsi108_init_one(struct platform_device *pdev)
  1240. {
  1241. struct net_device *dev = NULL;
  1242. struct tsi108_prv_data *data = NULL;
  1243. hw_info *einfo;
  1244. int err = 0;
  1245. einfo = dev_get_platdata(&pdev->dev);
  1246. if (NULL == einfo) {
  1247. printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
  1248. pdev->id);
  1249. return -ENODEV;
  1250. }
  1251. /* Create an ethernet device instance */
  1252. dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
  1253. if (!dev)
  1254. return -ENOMEM;
  1255. printk("tsi108_eth%d: probe...\n", pdev->id);
  1256. data = netdev_priv(dev);
  1257. data->dev = dev;
  1258. pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
  1259. pdev->id, einfo->regs, einfo->phyregs,
  1260. einfo->phy, einfo->irq_num);
  1261. data->regs = ioremap(einfo->regs, 0x400);
  1262. if (NULL == data->regs) {
  1263. err = -ENOMEM;
  1264. goto regs_fail;
  1265. }
  1266. data->phyregs = ioremap(einfo->phyregs, 0x400);
  1267. if (NULL == data->phyregs) {
  1268. err = -ENOMEM;
  1269. goto phyregs_fail;
  1270. }
  1271. /* MII setup */
  1272. data->mii_if.dev = dev;
  1273. data->mii_if.mdio_read = tsi108_mdio_read;
  1274. data->mii_if.mdio_write = tsi108_mdio_write;
  1275. data->mii_if.phy_id = einfo->phy;
  1276. data->mii_if.phy_id_mask = 0x1f;
  1277. data->mii_if.reg_num_mask = 0x1f;
  1278. data->phy = einfo->phy;
  1279. data->phy_type = einfo->phy_type;
  1280. data->irq_num = einfo->irq_num;
  1281. data->id = pdev->id;
  1282. netif_napi_add(dev, &data->napi, tsi108_poll, 64);
  1283. dev->netdev_ops = &tsi108_netdev_ops;
  1284. dev->ethtool_ops = &tsi108_ethtool_ops;
  1285. /* Apparently, the Linux networking code won't use scatter-gather
  1286. * if the hardware doesn't do checksums. However, it's faster
  1287. * to checksum in place and use SG, as (among other reasons)
  1288. * the cache won't be dirtied (which then has to be flushed
  1289. * before DMA). The checksumming is done by the driver (via
  1290. * a new function skb_csum_dev() in net/core/skbuff.c).
  1291. */
  1292. dev->features = NETIF_F_HIGHDMA;
  1293. spin_lock_init(&data->txlock);
  1294. spin_lock_init(&data->misclock);
  1295. tsi108_reset_ether(data);
  1296. tsi108_kill_phy(dev);
  1297. if ((err = tsi108_get_mac(dev)) != 0) {
  1298. printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n",
  1299. dev->name);
  1300. goto register_fail;
  1301. }
  1302. tsi108_init_mac(dev);
  1303. err = register_netdev(dev);
  1304. if (err) {
  1305. printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
  1306. dev->name);
  1307. goto register_fail;
  1308. }
  1309. platform_set_drvdata(pdev, dev);
  1310. printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n",
  1311. dev->name, dev->dev_addr);
  1312. #ifdef DEBUG
  1313. data->msg_enable = DEBUG;
  1314. dump_eth_one(dev);
  1315. #endif
  1316. return 0;
  1317. register_fail:
  1318. iounmap(data->phyregs);
  1319. phyregs_fail:
  1320. iounmap(data->regs);
  1321. regs_fail:
  1322. free_netdev(dev);
  1323. return err;
  1324. }
  1325. /* There's no way to either get interrupts from the PHY when
  1326. * something changes, or to have the Tsi108 automatically communicate
  1327. * with the PHY to reconfigure itself.
  1328. *
  1329. * Thus, we have to do it using a timer.
  1330. */
  1331. static void tsi108_timed_checker(unsigned long dev_ptr)
  1332. {
  1333. struct net_device *dev = (struct net_device *)dev_ptr;
  1334. struct tsi108_prv_data *data = netdev_priv(dev);
  1335. tsi108_check_phy(dev);
  1336. tsi108_check_rxring(dev);
  1337. mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
  1338. }
  1339. static int tsi108_ether_remove(struct platform_device *pdev)
  1340. {
  1341. struct net_device *dev = platform_get_drvdata(pdev);
  1342. struct tsi108_prv_data *priv = netdev_priv(dev);
  1343. unregister_netdev(dev);
  1344. tsi108_stop_ethernet(dev);
  1345. iounmap(priv->regs);
  1346. iounmap(priv->phyregs);
  1347. free_netdev(dev);
  1348. return 0;
  1349. }
  1350. module_platform_driver(tsi_eth_driver);
  1351. MODULE_AUTHOR("Tundra Semiconductor Corporation");
  1352. MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
  1353. MODULE_LICENSE("GPL");
  1354. MODULE_ALIAS("platform:tsi-ethernet");