bcm-cygnus.c 4.0 KB

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  1. /*
  2. * Copyright (C) 2015 Broadcom Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation version 2.
  7. *
  8. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  9. * kind, whether express or implied; without even the implied warranty
  10. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. /* Broadcom Cygnus SoC internal transceivers support. */
  14. #include "bcm-phy-lib.h"
  15. #include <linux/brcmphy.h>
  16. #include <linux/module.h>
  17. #include <linux/netdevice.h>
  18. #include <linux/phy.h>
  19. /* Broadcom Cygnus Phy specific registers */
  20. #define MII_BCM_CYGNUS_AFE_VDAC_ICTRL_0 0x91E5 /* VDAL Control register */
  21. static int bcm_cygnus_afe_config(struct phy_device *phydev)
  22. {
  23. int rc;
  24. /* ensure smdspclk is enabled */
  25. rc = phy_write(phydev, MII_BCM54XX_AUX_CTL, 0x0c30);
  26. if (rc < 0)
  27. return rc;
  28. /* AFE_VDAC_ICTRL_0 bit 7:4 Iq=1100 for 1g 10bt, normal modes */
  29. rc = bcm_phy_write_misc(phydev, 0x39, 0x01, 0xA7C8);
  30. if (rc < 0)
  31. return rc;
  32. /* AFE_HPF_TRIM_OTHERS bit11=1, short cascode enable for all modes*/
  33. rc = bcm_phy_write_misc(phydev, 0x3A, 0x00, 0x0803);
  34. if (rc < 0)
  35. return rc;
  36. /* AFE_TX_CONFIG_1 bit 7:4 Iq=1100 for test modes */
  37. rc = bcm_phy_write_misc(phydev, 0x3A, 0x01, 0xA740);
  38. if (rc < 0)
  39. return rc;
  40. /* AFE TEMPSEN_OTHERS rcal_HT, rcal_LT 10000 */
  41. rc = bcm_phy_write_misc(phydev, 0x3A, 0x03, 0x8400);
  42. if (rc < 0)
  43. return rc;
  44. /* AFE_FUTURE_RSV bit 2:0 rccal <2:0>=100 */
  45. rc = bcm_phy_write_misc(phydev, 0x3B, 0x00, 0x0004);
  46. if (rc < 0)
  47. return rc;
  48. /* Adjust bias current trim to overcome digital offSet */
  49. rc = phy_write(phydev, MII_BRCM_CORE_BASE1E, 0x02);
  50. if (rc < 0)
  51. return rc;
  52. /* make rcal=100, since rdb default is 000 */
  53. rc = bcm_phy_write_exp_sel(phydev, MII_BRCM_CORE_EXPB1, 0x10);
  54. if (rc < 0)
  55. return rc;
  56. /* CORE_EXPB0, Reset R_CAL/RC_CAL Engine */
  57. rc = bcm_phy_write_exp_sel(phydev, MII_BRCM_CORE_EXPB0, 0x10);
  58. if (rc < 0)
  59. return rc;
  60. /* CORE_EXPB0, Disable Reset R_CAL/RC_CAL Engine */
  61. rc = bcm_phy_write_exp_sel(phydev, MII_BRCM_CORE_EXPB0, 0x00);
  62. return 0;
  63. }
  64. static int bcm_cygnus_config_init(struct phy_device *phydev)
  65. {
  66. int reg, rc;
  67. reg = phy_read(phydev, MII_BCM54XX_ECR);
  68. if (reg < 0)
  69. return reg;
  70. /* Mask interrupts globally. */
  71. reg |= MII_BCM54XX_ECR_IM;
  72. rc = phy_write(phydev, MII_BCM54XX_ECR, reg);
  73. if (rc)
  74. return rc;
  75. /* Unmask events of interest */
  76. reg = ~(MII_BCM54XX_INT_DUPLEX |
  77. MII_BCM54XX_INT_SPEED |
  78. MII_BCM54XX_INT_LINK);
  79. rc = phy_write(phydev, MII_BCM54XX_IMR, reg);
  80. if (rc)
  81. return rc;
  82. /* Apply AFE settings for the PHY */
  83. rc = bcm_cygnus_afe_config(phydev);
  84. if (rc)
  85. return rc;
  86. /* Advertise EEE */
  87. rc = bcm_phy_enable_eee(phydev);
  88. if (rc)
  89. return rc;
  90. /* Enable APD */
  91. return bcm_phy_enable_apd(phydev, false);
  92. }
  93. static int bcm_cygnus_resume(struct phy_device *phydev)
  94. {
  95. int rc;
  96. genphy_resume(phydev);
  97. /* Re-initialize the PHY to apply AFE work-arounds and
  98. * configurations when coming out of suspend.
  99. */
  100. rc = bcm_cygnus_config_init(phydev);
  101. if (rc)
  102. return rc;
  103. /* restart auto negotiation with the new settings */
  104. return genphy_config_aneg(phydev);
  105. }
  106. static struct phy_driver bcm_cygnus_phy_driver[] = {
  107. {
  108. .phy_id = PHY_ID_BCM_CYGNUS,
  109. .phy_id_mask = 0xfffffff0,
  110. .name = "Broadcom Cygnus PHY",
  111. .features = PHY_GBIT_FEATURES |
  112. SUPPORTED_Pause | SUPPORTED_Asym_Pause,
  113. .config_init = bcm_cygnus_config_init,
  114. .config_aneg = genphy_config_aneg,
  115. .read_status = genphy_read_status,
  116. .ack_interrupt = bcm_phy_ack_intr,
  117. .config_intr = bcm_phy_config_intr,
  118. .suspend = genphy_suspend,
  119. .resume = bcm_cygnus_resume,
  120. } };
  121. static struct mdio_device_id __maybe_unused bcm_cygnus_phy_tbl[] = {
  122. { PHY_ID_BCM_CYGNUS, 0xfffffff0, },
  123. { }
  124. };
  125. MODULE_DEVICE_TABLE(mdio, bcm_cygnus_phy_tbl);
  126. module_phy_driver(bcm_cygnus_phy_driver);
  127. MODULE_DESCRIPTION("Broadcom Cygnus internal PHY driver");
  128. MODULE_LICENSE("GPL v2");
  129. MODULE_AUTHOR("Broadcom Corporation");