bcm87xx.c 5.0 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2011 - 2012 Cavium, Inc.
  7. */
  8. #include <linux/module.h>
  9. #include <linux/phy.h>
  10. #include <linux/of.h>
  11. #define PHY_ID_BCM8706 0x0143bdc1
  12. #define PHY_ID_BCM8727 0x0143bff0
  13. #define BCM87XX_PMD_RX_SIGNAL_DETECT (MII_ADDR_C45 | 0x1000a)
  14. #define BCM87XX_10GBASER_PCS_STATUS (MII_ADDR_C45 | 0x30020)
  15. #define BCM87XX_XGXS_LANE_STATUS (MII_ADDR_C45 | 0x40018)
  16. #define BCM87XX_LASI_CONTROL (MII_ADDR_C45 | 0x39002)
  17. #define BCM87XX_LASI_STATUS (MII_ADDR_C45 | 0x39005)
  18. #if IS_ENABLED(CONFIG_OF_MDIO)
  19. /* Set and/or override some configuration registers based on the
  20. * broadcom,c45-reg-init property stored in the of_node for the phydev.
  21. *
  22. * broadcom,c45-reg-init = <devid reg mask value>,...;
  23. *
  24. * There may be one or more sets of <devid reg mask value>:
  25. *
  26. * devid: which sub-device to use.
  27. * reg: the register.
  28. * mask: if non-zero, ANDed with existing register value.
  29. * value: ORed with the masked value and written to the regiser.
  30. *
  31. */
  32. static int bcm87xx_of_reg_init(struct phy_device *phydev)
  33. {
  34. const __be32 *paddr;
  35. const __be32 *paddr_end;
  36. int len, ret;
  37. if (!phydev->dev.of_node)
  38. return 0;
  39. paddr = of_get_property(phydev->dev.of_node,
  40. "broadcom,c45-reg-init", &len);
  41. if (!paddr)
  42. return 0;
  43. paddr_end = paddr + (len /= sizeof(*paddr));
  44. ret = 0;
  45. while (paddr + 3 < paddr_end) {
  46. u16 devid = be32_to_cpup(paddr++);
  47. u16 reg = be32_to_cpup(paddr++);
  48. u16 mask = be32_to_cpup(paddr++);
  49. u16 val_bits = be32_to_cpup(paddr++);
  50. int val;
  51. u32 regnum = MII_ADDR_C45 | (devid << 16) | reg;
  52. val = 0;
  53. if (mask) {
  54. val = phy_read(phydev, regnum);
  55. if (val < 0) {
  56. ret = val;
  57. goto err;
  58. }
  59. val &= mask;
  60. }
  61. val |= val_bits;
  62. ret = phy_write(phydev, regnum, val);
  63. if (ret < 0)
  64. goto err;
  65. }
  66. err:
  67. return ret;
  68. }
  69. #else
  70. static int bcm87xx_of_reg_init(struct phy_device *phydev)
  71. {
  72. return 0;
  73. }
  74. #endif /* CONFIG_OF_MDIO */
  75. static int bcm87xx_config_init(struct phy_device *phydev)
  76. {
  77. phydev->supported = SUPPORTED_10000baseR_FEC;
  78. phydev->advertising = ADVERTISED_10000baseR_FEC;
  79. phydev->state = PHY_NOLINK;
  80. phydev->autoneg = AUTONEG_DISABLE;
  81. bcm87xx_of_reg_init(phydev);
  82. return 0;
  83. }
  84. static int bcm87xx_config_aneg(struct phy_device *phydev)
  85. {
  86. return -EINVAL;
  87. }
  88. static int bcm87xx_read_status(struct phy_device *phydev)
  89. {
  90. int rx_signal_detect;
  91. int pcs_status;
  92. int xgxs_lane_status;
  93. rx_signal_detect = phy_read(phydev, BCM87XX_PMD_RX_SIGNAL_DETECT);
  94. if (rx_signal_detect < 0)
  95. return rx_signal_detect;
  96. if ((rx_signal_detect & 1) == 0)
  97. goto no_link;
  98. pcs_status = phy_read(phydev, BCM87XX_10GBASER_PCS_STATUS);
  99. if (pcs_status < 0)
  100. return pcs_status;
  101. if ((pcs_status & 1) == 0)
  102. goto no_link;
  103. xgxs_lane_status = phy_read(phydev, BCM87XX_XGXS_LANE_STATUS);
  104. if (xgxs_lane_status < 0)
  105. return xgxs_lane_status;
  106. if ((xgxs_lane_status & 0x1000) == 0)
  107. goto no_link;
  108. phydev->speed = 10000;
  109. phydev->link = 1;
  110. phydev->duplex = 1;
  111. return 0;
  112. no_link:
  113. phydev->link = 0;
  114. return 0;
  115. }
  116. static int bcm87xx_config_intr(struct phy_device *phydev)
  117. {
  118. int reg, err;
  119. reg = phy_read(phydev, BCM87XX_LASI_CONTROL);
  120. if (reg < 0)
  121. return reg;
  122. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  123. reg |= 1;
  124. else
  125. reg &= ~1;
  126. err = phy_write(phydev, BCM87XX_LASI_CONTROL, reg);
  127. return err;
  128. }
  129. static int bcm87xx_did_interrupt(struct phy_device *phydev)
  130. {
  131. int reg;
  132. reg = phy_read(phydev, BCM87XX_LASI_STATUS);
  133. if (reg < 0) {
  134. dev_err(&phydev->dev,
  135. "Error: Read of BCM87XX_LASI_STATUS failed: %d\n", reg);
  136. return 0;
  137. }
  138. return (reg & 1) != 0;
  139. }
  140. static int bcm87xx_ack_interrupt(struct phy_device *phydev)
  141. {
  142. /* Reading the LASI status clears it. */
  143. bcm87xx_did_interrupt(phydev);
  144. return 0;
  145. }
  146. static int bcm8706_match_phy_device(struct phy_device *phydev)
  147. {
  148. return phydev->c45_ids.device_ids[4] == PHY_ID_BCM8706;
  149. }
  150. static int bcm8727_match_phy_device(struct phy_device *phydev)
  151. {
  152. return phydev->c45_ids.device_ids[4] == PHY_ID_BCM8727;
  153. }
  154. static struct phy_driver bcm87xx_driver[] = {
  155. {
  156. .phy_id = PHY_ID_BCM8706,
  157. .phy_id_mask = 0xffffffff,
  158. .name = "Broadcom BCM8706",
  159. .flags = PHY_HAS_INTERRUPT,
  160. .config_init = bcm87xx_config_init,
  161. .config_aneg = bcm87xx_config_aneg,
  162. .read_status = bcm87xx_read_status,
  163. .ack_interrupt = bcm87xx_ack_interrupt,
  164. .config_intr = bcm87xx_config_intr,
  165. .did_interrupt = bcm87xx_did_interrupt,
  166. .match_phy_device = bcm8706_match_phy_device,
  167. .driver = { .owner = THIS_MODULE },
  168. }, {
  169. .phy_id = PHY_ID_BCM8727,
  170. .phy_id_mask = 0xffffffff,
  171. .name = "Broadcom BCM8727",
  172. .flags = PHY_HAS_INTERRUPT,
  173. .config_init = bcm87xx_config_init,
  174. .config_aneg = bcm87xx_config_aneg,
  175. .read_status = bcm87xx_read_status,
  176. .ack_interrupt = bcm87xx_ack_interrupt,
  177. .config_intr = bcm87xx_config_intr,
  178. .did_interrupt = bcm87xx_did_interrupt,
  179. .match_phy_device = bcm8727_match_phy_device,
  180. .driver = { .owner = THIS_MODULE },
  181. } };
  182. module_phy_driver(bcm87xx_driver);
  183. MODULE_LICENSE("GPL");