ar5523.c 47 KB

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  1. /*
  2. * Copyright (c) 2006 Damien Bergamini <damien.bergamini@free.fr>
  3. * Copyright (c) 2006 Sam Leffler, Errno Consulting
  4. * Copyright (c) 2007 Christoph Hellwig <hch@lst.de>
  5. * Copyright (c) 2008-2009 Weongyo Jeong <weongyo@freebsd.org>
  6. * Copyright (c) 2012 Pontus Fuchs <pontus.fuchs@gmail.com>
  7. *
  8. * Permission to use, copy, modify, and/or distribute this software for any
  9. * purpose with or without fee is hereby granted, provided that the above
  10. * copyright notice and this permission notice appear in all copies.
  11. *
  12. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  13. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  14. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  15. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  16. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  17. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  18. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  19. */
  20. /*
  21. * This driver is based on the uath driver written by Damien Bergamini for
  22. * OpenBSD, who did black-box analysis of the Windows binary driver to find
  23. * out how the hardware works. It contains a lot magic numbers because of
  24. * that and only has minimal functionality.
  25. */
  26. #include <linux/compiler.h>
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/list.h>
  30. #include <linux/completion.h>
  31. #include <linux/firmware.h>
  32. #include <linux/skbuff.h>
  33. #include <linux/usb.h>
  34. #include <net/mac80211.h>
  35. #include "ar5523.h"
  36. #include "ar5523_hw.h"
  37. /*
  38. * Various supported device vendors/products.
  39. * UB51: AR5005UG 802.11b/g, UB52: AR5005UX 802.11a/b/g
  40. */
  41. static int ar5523_submit_rx_cmd(struct ar5523 *ar);
  42. static void ar5523_data_tx_pkt_put(struct ar5523 *ar);
  43. static void ar5523_read_reply(struct ar5523 *ar, struct ar5523_cmd_hdr *hdr,
  44. struct ar5523_tx_cmd *cmd)
  45. {
  46. int dlen, olen;
  47. __be32 *rp;
  48. dlen = be32_to_cpu(hdr->len) - sizeof(*hdr);
  49. if (dlen < 0) {
  50. WARN_ON(1);
  51. goto out;
  52. }
  53. ar5523_dbg(ar, "Code = %d len = %d\n", be32_to_cpu(hdr->code) & 0xff,
  54. dlen);
  55. rp = (__be32 *)(hdr + 1);
  56. if (dlen >= sizeof(u32)) {
  57. olen = be32_to_cpu(rp[0]);
  58. dlen -= sizeof(u32);
  59. if (olen == 0) {
  60. /* convention is 0 =>'s one word */
  61. olen = sizeof(u32);
  62. }
  63. } else
  64. olen = 0;
  65. if (cmd->odata) {
  66. if (cmd->olen < olen) {
  67. ar5523_err(ar, "olen to small %d < %d\n",
  68. cmd->olen, olen);
  69. cmd->olen = 0;
  70. cmd->res = -EOVERFLOW;
  71. } else {
  72. cmd->olen = olen;
  73. memcpy(cmd->odata, &rp[1], olen);
  74. cmd->res = 0;
  75. }
  76. }
  77. out:
  78. complete(&cmd->done);
  79. }
  80. static void ar5523_cmd_rx_cb(struct urb *urb)
  81. {
  82. struct ar5523 *ar = urb->context;
  83. struct ar5523_tx_cmd *cmd = &ar->tx_cmd;
  84. struct ar5523_cmd_hdr *hdr = ar->rx_cmd_buf;
  85. int dlen;
  86. u32 code, hdrlen;
  87. if (urb->status) {
  88. if (urb->status != -ESHUTDOWN)
  89. ar5523_err(ar, "RX USB error %d.\n", urb->status);
  90. goto skip;
  91. }
  92. if (urb->actual_length < sizeof(struct ar5523_cmd_hdr)) {
  93. ar5523_err(ar, "RX USB to short.\n");
  94. goto skip;
  95. }
  96. ar5523_dbg(ar, "%s code %02x priv %d\n", __func__,
  97. be32_to_cpu(hdr->code) & 0xff, hdr->priv);
  98. code = be32_to_cpu(hdr->code);
  99. hdrlen = be32_to_cpu(hdr->len);
  100. switch (code & 0xff) {
  101. default:
  102. /* reply to a read command */
  103. if (hdr->priv != AR5523_CMD_ID) {
  104. ar5523_err(ar, "Unexpected command id: %02x\n",
  105. code & 0xff);
  106. goto skip;
  107. }
  108. ar5523_read_reply(ar, hdr, cmd);
  109. break;
  110. case WDCMSG_DEVICE_AVAIL:
  111. ar5523_dbg(ar, "WDCMSG_DEVICE_AVAIL\n");
  112. cmd->res = 0;
  113. cmd->olen = 0;
  114. complete(&cmd->done);
  115. break;
  116. case WDCMSG_SEND_COMPLETE:
  117. ar5523_dbg(ar, "WDCMSG_SEND_COMPLETE: %d pending\n",
  118. atomic_read(&ar->tx_nr_pending));
  119. if (!test_bit(AR5523_HW_UP, &ar->flags))
  120. ar5523_dbg(ar, "Unexpected WDCMSG_SEND_COMPLETE\n");
  121. else {
  122. mod_timer(&ar->tx_wd_timer,
  123. jiffies + AR5523_TX_WD_TIMEOUT);
  124. ar5523_data_tx_pkt_put(ar);
  125. }
  126. break;
  127. case WDCMSG_TARGET_START:
  128. /* This command returns a bogus id so it needs special
  129. handling */
  130. dlen = hdrlen - sizeof(*hdr);
  131. if (dlen != (int)sizeof(u32)) {
  132. ar5523_err(ar, "Invalid reply to WDCMSG_TARGET_START");
  133. return;
  134. }
  135. memcpy(cmd->odata, hdr + 1, sizeof(u32));
  136. cmd->olen = sizeof(u32);
  137. cmd->res = 0;
  138. complete(&cmd->done);
  139. break;
  140. case WDCMSG_STATS_UPDATE:
  141. ar5523_dbg(ar, "WDCMSG_STATS_UPDATE\n");
  142. break;
  143. }
  144. skip:
  145. ar5523_submit_rx_cmd(ar);
  146. }
  147. static int ar5523_alloc_rx_cmd(struct ar5523 *ar)
  148. {
  149. ar->rx_cmd_urb = usb_alloc_urb(0, GFP_KERNEL);
  150. if (!ar->rx_cmd_urb)
  151. return -ENOMEM;
  152. ar->rx_cmd_buf = usb_alloc_coherent(ar->dev, AR5523_MAX_RXCMDSZ,
  153. GFP_KERNEL,
  154. &ar->rx_cmd_urb->transfer_dma);
  155. if (!ar->rx_cmd_buf) {
  156. usb_free_urb(ar->rx_cmd_urb);
  157. return -ENOMEM;
  158. }
  159. return 0;
  160. }
  161. static void ar5523_cancel_rx_cmd(struct ar5523 *ar)
  162. {
  163. usb_kill_urb(ar->rx_cmd_urb);
  164. }
  165. static void ar5523_free_rx_cmd(struct ar5523 *ar)
  166. {
  167. usb_free_coherent(ar->dev, AR5523_MAX_RXCMDSZ,
  168. ar->rx_cmd_buf, ar->rx_cmd_urb->transfer_dma);
  169. usb_free_urb(ar->rx_cmd_urb);
  170. }
  171. static int ar5523_submit_rx_cmd(struct ar5523 *ar)
  172. {
  173. int error;
  174. usb_fill_bulk_urb(ar->rx_cmd_urb, ar->dev,
  175. ar5523_cmd_rx_pipe(ar->dev), ar->rx_cmd_buf,
  176. AR5523_MAX_RXCMDSZ, ar5523_cmd_rx_cb, ar);
  177. ar->rx_cmd_urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
  178. error = usb_submit_urb(ar->rx_cmd_urb, GFP_ATOMIC);
  179. if (error) {
  180. if (error != -ENODEV)
  181. ar5523_err(ar, "error %d when submitting rx urb\n",
  182. error);
  183. return error;
  184. }
  185. return 0;
  186. }
  187. /*
  188. * Command submitted cb
  189. */
  190. static void ar5523_cmd_tx_cb(struct urb *urb)
  191. {
  192. struct ar5523_tx_cmd *cmd = urb->context;
  193. struct ar5523 *ar = cmd->ar;
  194. if (urb->status) {
  195. ar5523_err(ar, "Failed to TX command. Status = %d\n",
  196. urb->status);
  197. cmd->res = urb->status;
  198. complete(&cmd->done);
  199. return;
  200. }
  201. if (!(cmd->flags & AR5523_CMD_FLAG_READ)) {
  202. cmd->res = 0;
  203. complete(&cmd->done);
  204. }
  205. }
  206. static int ar5523_cmd(struct ar5523 *ar, u32 code, const void *idata,
  207. int ilen, void *odata, int olen, int flags)
  208. {
  209. struct ar5523_cmd_hdr *hdr;
  210. struct ar5523_tx_cmd *cmd = &ar->tx_cmd;
  211. int xferlen, error;
  212. /* always bulk-out a multiple of 4 bytes */
  213. xferlen = (sizeof(struct ar5523_cmd_hdr) + ilen + 3) & ~3;
  214. hdr = (struct ar5523_cmd_hdr *)cmd->buf_tx;
  215. memset(hdr, 0, sizeof(struct ar5523_cmd_hdr));
  216. hdr->len = cpu_to_be32(xferlen);
  217. hdr->code = cpu_to_be32(code);
  218. hdr->priv = AR5523_CMD_ID;
  219. if (flags & AR5523_CMD_FLAG_MAGIC)
  220. hdr->magic = cpu_to_be32(1 << 24);
  221. memcpy(hdr + 1, idata, ilen);
  222. cmd->odata = odata;
  223. cmd->olen = olen;
  224. cmd->flags = flags;
  225. ar5523_dbg(ar, "do cmd %02x\n", code);
  226. usb_fill_bulk_urb(cmd->urb_tx, ar->dev, ar5523_cmd_tx_pipe(ar->dev),
  227. cmd->buf_tx, xferlen, ar5523_cmd_tx_cb, cmd);
  228. cmd->urb_tx->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
  229. error = usb_submit_urb(cmd->urb_tx, GFP_KERNEL);
  230. if (error) {
  231. ar5523_err(ar, "could not send command 0x%x, error=%d\n",
  232. code, error);
  233. return error;
  234. }
  235. if (!wait_for_completion_timeout(&cmd->done, 2 * HZ)) {
  236. cmd->odata = NULL;
  237. ar5523_err(ar, "timeout waiting for command %02x reply\n",
  238. code);
  239. cmd->res = -ETIMEDOUT;
  240. }
  241. return cmd->res;
  242. }
  243. static int ar5523_cmd_write(struct ar5523 *ar, u32 code, const void *data,
  244. int len, int flags)
  245. {
  246. flags &= ~AR5523_CMD_FLAG_READ;
  247. return ar5523_cmd(ar, code, data, len, NULL, 0, flags);
  248. }
  249. static int ar5523_cmd_read(struct ar5523 *ar, u32 code, const void *idata,
  250. int ilen, void *odata, int olen, int flags)
  251. {
  252. flags |= AR5523_CMD_FLAG_READ;
  253. return ar5523_cmd(ar, code, idata, ilen, odata, olen, flags);
  254. }
  255. static int ar5523_config(struct ar5523 *ar, u32 reg, u32 val)
  256. {
  257. struct ar5523_write_mac write;
  258. int error;
  259. write.reg = cpu_to_be32(reg);
  260. write.len = cpu_to_be32(0); /* 0 = single write */
  261. *(__be32 *)write.data = cpu_to_be32(val);
  262. error = ar5523_cmd_write(ar, WDCMSG_TARGET_SET_CONFIG, &write,
  263. 3 * sizeof(u32), 0);
  264. if (error != 0)
  265. ar5523_err(ar, "could not write register 0x%02x\n", reg);
  266. return error;
  267. }
  268. static int ar5523_config_multi(struct ar5523 *ar, u32 reg, const void *data,
  269. int len)
  270. {
  271. struct ar5523_write_mac write;
  272. int error;
  273. write.reg = cpu_to_be32(reg);
  274. write.len = cpu_to_be32(len);
  275. memcpy(write.data, data, len);
  276. /* properly handle the case where len is zero (reset) */
  277. error = ar5523_cmd_write(ar, WDCMSG_TARGET_SET_CONFIG, &write,
  278. (len == 0) ? sizeof(u32) : 2 * sizeof(u32) + len, 0);
  279. if (error != 0)
  280. ar5523_err(ar, "could not write %d bytes to register 0x%02x\n",
  281. len, reg);
  282. return error;
  283. }
  284. static int ar5523_get_status(struct ar5523 *ar, u32 which, void *odata,
  285. int olen)
  286. {
  287. int error;
  288. __be32 which_be;
  289. which_be = cpu_to_be32(which);
  290. error = ar5523_cmd_read(ar, WDCMSG_TARGET_GET_STATUS,
  291. &which_be, sizeof(which_be), odata, olen, AR5523_CMD_FLAG_MAGIC);
  292. if (error != 0)
  293. ar5523_err(ar, "could not read EEPROM offset 0x%02x\n", which);
  294. return error;
  295. }
  296. static int ar5523_get_capability(struct ar5523 *ar, u32 cap, u32 *val)
  297. {
  298. int error;
  299. __be32 cap_be, val_be;
  300. cap_be = cpu_to_be32(cap);
  301. error = ar5523_cmd_read(ar, WDCMSG_TARGET_GET_CAPABILITY, &cap_be,
  302. sizeof(cap_be), &val_be, sizeof(__be32),
  303. AR5523_CMD_FLAG_MAGIC);
  304. if (error != 0) {
  305. ar5523_err(ar, "could not read capability %u\n", cap);
  306. return error;
  307. }
  308. *val = be32_to_cpu(val_be);
  309. return error;
  310. }
  311. static int ar5523_get_devcap(struct ar5523 *ar)
  312. {
  313. #define GETCAP(x) do { \
  314. error = ar5523_get_capability(ar, x, &cap); \
  315. if (error != 0) \
  316. return error; \
  317. ar5523_info(ar, "Cap: " \
  318. "%s=0x%08x\n", #x, cap); \
  319. } while (0)
  320. int error;
  321. u32 cap;
  322. /* collect device capabilities */
  323. GETCAP(CAP_TARGET_VERSION);
  324. GETCAP(CAP_TARGET_REVISION);
  325. GETCAP(CAP_MAC_VERSION);
  326. GETCAP(CAP_MAC_REVISION);
  327. GETCAP(CAP_PHY_REVISION);
  328. GETCAP(CAP_ANALOG_5GHz_REVISION);
  329. GETCAP(CAP_ANALOG_2GHz_REVISION);
  330. GETCAP(CAP_REG_DOMAIN);
  331. GETCAP(CAP_REG_CAP_BITS);
  332. GETCAP(CAP_WIRELESS_MODES);
  333. GETCAP(CAP_CHAN_SPREAD_SUPPORT);
  334. GETCAP(CAP_COMPRESS_SUPPORT);
  335. GETCAP(CAP_BURST_SUPPORT);
  336. GETCAP(CAP_FAST_FRAMES_SUPPORT);
  337. GETCAP(CAP_CHAP_TUNING_SUPPORT);
  338. GETCAP(CAP_TURBOG_SUPPORT);
  339. GETCAP(CAP_TURBO_PRIME_SUPPORT);
  340. GETCAP(CAP_DEVICE_TYPE);
  341. GETCAP(CAP_WME_SUPPORT);
  342. GETCAP(CAP_TOTAL_QUEUES);
  343. GETCAP(CAP_CONNECTION_ID_MAX);
  344. GETCAP(CAP_LOW_5GHZ_CHAN);
  345. GETCAP(CAP_HIGH_5GHZ_CHAN);
  346. GETCAP(CAP_LOW_2GHZ_CHAN);
  347. GETCAP(CAP_HIGH_2GHZ_CHAN);
  348. GETCAP(CAP_TWICE_ANTENNAGAIN_5G);
  349. GETCAP(CAP_TWICE_ANTENNAGAIN_2G);
  350. GETCAP(CAP_CIPHER_AES_CCM);
  351. GETCAP(CAP_CIPHER_TKIP);
  352. GETCAP(CAP_MIC_TKIP);
  353. return 0;
  354. }
  355. static int ar5523_set_ledsteady(struct ar5523 *ar, int lednum, int ledmode)
  356. {
  357. struct ar5523_cmd_ledsteady led;
  358. led.lednum = cpu_to_be32(lednum);
  359. led.ledmode = cpu_to_be32(ledmode);
  360. ar5523_dbg(ar, "set %s led %s (steady)\n",
  361. (lednum == UATH_LED_LINK) ? "link" : "activity",
  362. ledmode ? "on" : "off");
  363. return ar5523_cmd_write(ar, WDCMSG_SET_LED_STEADY, &led, sizeof(led),
  364. 0);
  365. }
  366. static int ar5523_set_rxfilter(struct ar5523 *ar, u32 bits, u32 op)
  367. {
  368. struct ar5523_cmd_rx_filter rxfilter;
  369. rxfilter.bits = cpu_to_be32(bits);
  370. rxfilter.op = cpu_to_be32(op);
  371. ar5523_dbg(ar, "setting Rx filter=0x%x flags=0x%x\n", bits, op);
  372. return ar5523_cmd_write(ar, WDCMSG_RX_FILTER, &rxfilter,
  373. sizeof(rxfilter), 0);
  374. }
  375. static int ar5523_reset_tx_queues(struct ar5523 *ar)
  376. {
  377. __be32 qid = cpu_to_be32(0);
  378. ar5523_dbg(ar, "resetting Tx queue\n");
  379. return ar5523_cmd_write(ar, WDCMSG_RELEASE_TX_QUEUE,
  380. &qid, sizeof(qid), 0);
  381. }
  382. static int ar5523_set_chan(struct ar5523 *ar)
  383. {
  384. struct ieee80211_conf *conf = &ar->hw->conf;
  385. struct ar5523_cmd_reset reset;
  386. memset(&reset, 0, sizeof(reset));
  387. reset.flags |= cpu_to_be32(UATH_CHAN_2GHZ);
  388. reset.flags |= cpu_to_be32(UATH_CHAN_OFDM);
  389. reset.freq = cpu_to_be32(conf->chandef.chan->center_freq);
  390. reset.maxrdpower = cpu_to_be32(50); /* XXX */
  391. reset.channelchange = cpu_to_be32(1);
  392. reset.keeprccontent = cpu_to_be32(0);
  393. ar5523_dbg(ar, "set chan flags 0x%x freq %d\n",
  394. be32_to_cpu(reset.flags),
  395. conf->chandef.chan->center_freq);
  396. return ar5523_cmd_write(ar, WDCMSG_RESET, &reset, sizeof(reset), 0);
  397. }
  398. static int ar5523_queue_init(struct ar5523 *ar)
  399. {
  400. struct ar5523_cmd_txq_setup qinfo;
  401. ar5523_dbg(ar, "setting up Tx queue\n");
  402. qinfo.qid = cpu_to_be32(0);
  403. qinfo.len = cpu_to_be32(sizeof(qinfo.attr));
  404. qinfo.attr.priority = cpu_to_be32(0); /* XXX */
  405. qinfo.attr.aifs = cpu_to_be32(3);
  406. qinfo.attr.logcwmin = cpu_to_be32(4);
  407. qinfo.attr.logcwmax = cpu_to_be32(10);
  408. qinfo.attr.bursttime = cpu_to_be32(0);
  409. qinfo.attr.mode = cpu_to_be32(0);
  410. qinfo.attr.qflags = cpu_to_be32(1); /* XXX? */
  411. return ar5523_cmd_write(ar, WDCMSG_SETUP_TX_QUEUE, &qinfo,
  412. sizeof(qinfo), 0);
  413. }
  414. static int ar5523_switch_chan(struct ar5523 *ar)
  415. {
  416. int error;
  417. error = ar5523_set_chan(ar);
  418. if (error) {
  419. ar5523_err(ar, "could not set chan, error %d\n", error);
  420. goto out_err;
  421. }
  422. /* reset Tx rings */
  423. error = ar5523_reset_tx_queues(ar);
  424. if (error) {
  425. ar5523_err(ar, "could not reset Tx queues, error %d\n",
  426. error);
  427. goto out_err;
  428. }
  429. /* set Tx rings WME properties */
  430. error = ar5523_queue_init(ar);
  431. if (error)
  432. ar5523_err(ar, "could not init wme, error %d\n", error);
  433. out_err:
  434. return error;
  435. }
  436. static void ar5523_rx_data_put(struct ar5523 *ar,
  437. struct ar5523_rx_data *data)
  438. {
  439. unsigned long flags;
  440. spin_lock_irqsave(&ar->rx_data_list_lock, flags);
  441. list_move(&data->list, &ar->rx_data_free);
  442. spin_unlock_irqrestore(&ar->rx_data_list_lock, flags);
  443. }
  444. static void ar5523_data_rx_cb(struct urb *urb)
  445. {
  446. struct ar5523_rx_data *data = urb->context;
  447. struct ar5523 *ar = data->ar;
  448. struct ar5523_rx_desc *desc;
  449. struct ar5523_chunk *chunk;
  450. struct ieee80211_hw *hw = ar->hw;
  451. struct ieee80211_rx_status *rx_status;
  452. u32 rxlen;
  453. int usblen = urb->actual_length;
  454. int hdrlen, pad;
  455. ar5523_dbg(ar, "%s\n", __func__);
  456. /* sync/async unlink faults aren't errors */
  457. if (urb->status) {
  458. if (urb->status != -ESHUTDOWN)
  459. ar5523_err(ar, "%s: USB err: %d\n", __func__,
  460. urb->status);
  461. goto skip;
  462. }
  463. if (usblen < AR5523_MIN_RXBUFSZ) {
  464. ar5523_err(ar, "RX: wrong xfer size (usblen=%d)\n", usblen);
  465. goto skip;
  466. }
  467. chunk = (struct ar5523_chunk *) data->skb->data;
  468. if (((chunk->flags & UATH_CFLAGS_FINAL) == 0) ||
  469. chunk->seqnum != 0) {
  470. ar5523_dbg(ar, "RX: No final flag. s: %d f: %02x l: %d\n",
  471. chunk->seqnum, chunk->flags,
  472. be16_to_cpu(chunk->length));
  473. goto skip;
  474. }
  475. /* Rx descriptor is located at the end, 32-bit aligned */
  476. desc = (struct ar5523_rx_desc *)
  477. (data->skb->data + usblen - sizeof(struct ar5523_rx_desc));
  478. rxlen = be32_to_cpu(desc->len);
  479. if (rxlen > ar->rxbufsz) {
  480. ar5523_dbg(ar, "RX: Bad descriptor (len=%d)\n",
  481. be32_to_cpu(desc->len));
  482. goto skip;
  483. }
  484. if (!rxlen) {
  485. ar5523_dbg(ar, "RX: rxlen is 0\n");
  486. goto skip;
  487. }
  488. if (be32_to_cpu(desc->status) != 0) {
  489. ar5523_dbg(ar, "Bad RX status (0x%x len = %d). Skip\n",
  490. be32_to_cpu(desc->status), be32_to_cpu(desc->len));
  491. goto skip;
  492. }
  493. skb_reserve(data->skb, sizeof(*chunk));
  494. skb_put(data->skb, rxlen - sizeof(struct ar5523_rx_desc));
  495. hdrlen = ieee80211_get_hdrlen_from_skb(data->skb);
  496. if (!IS_ALIGNED(hdrlen, 4)) {
  497. ar5523_dbg(ar, "eek, alignment workaround activated\n");
  498. pad = ALIGN(hdrlen, 4) - hdrlen;
  499. memmove(data->skb->data + pad, data->skb->data, hdrlen);
  500. skb_pull(data->skb, pad);
  501. skb_put(data->skb, pad);
  502. }
  503. rx_status = IEEE80211_SKB_RXCB(data->skb);
  504. memset(rx_status, 0, sizeof(*rx_status));
  505. rx_status->freq = be32_to_cpu(desc->channel);
  506. rx_status->band = hw->conf.chandef.chan->band;
  507. rx_status->signal = -95 + be32_to_cpu(desc->rssi);
  508. ieee80211_rx_irqsafe(hw, data->skb);
  509. data->skb = NULL;
  510. skip:
  511. if (data->skb) {
  512. dev_kfree_skb_irq(data->skb);
  513. data->skb = NULL;
  514. }
  515. ar5523_rx_data_put(ar, data);
  516. if (atomic_inc_return(&ar->rx_data_free_cnt) >=
  517. AR5523_RX_DATA_REFILL_COUNT &&
  518. test_bit(AR5523_HW_UP, &ar->flags))
  519. queue_work(ar->wq, &ar->rx_refill_work);
  520. }
  521. static void ar5523_rx_refill_work(struct work_struct *work)
  522. {
  523. struct ar5523 *ar = container_of(work, struct ar5523, rx_refill_work);
  524. struct ar5523_rx_data *data;
  525. unsigned long flags;
  526. int error;
  527. ar5523_dbg(ar, "%s\n", __func__);
  528. do {
  529. spin_lock_irqsave(&ar->rx_data_list_lock, flags);
  530. if (!list_empty(&ar->rx_data_free))
  531. data = (struct ar5523_rx_data *) ar->rx_data_free.next;
  532. else
  533. data = NULL;
  534. spin_unlock_irqrestore(&ar->rx_data_list_lock, flags);
  535. if (!data)
  536. goto done;
  537. data->skb = alloc_skb(ar->rxbufsz, GFP_KERNEL);
  538. if (!data->skb) {
  539. ar5523_err(ar, "could not allocate rx skbuff\n");
  540. return;
  541. }
  542. usb_fill_bulk_urb(data->urb, ar->dev,
  543. ar5523_data_rx_pipe(ar->dev), data->skb->data,
  544. ar->rxbufsz, ar5523_data_rx_cb, data);
  545. spin_lock_irqsave(&ar->rx_data_list_lock, flags);
  546. list_move(&data->list, &ar->rx_data_used);
  547. spin_unlock_irqrestore(&ar->rx_data_list_lock, flags);
  548. atomic_dec(&ar->rx_data_free_cnt);
  549. error = usb_submit_urb(data->urb, GFP_KERNEL);
  550. if (error) {
  551. kfree_skb(data->skb);
  552. if (error != -ENODEV)
  553. ar5523_err(ar, "Err sending rx data urb %d\n",
  554. error);
  555. ar5523_rx_data_put(ar, data);
  556. atomic_inc(&ar->rx_data_free_cnt);
  557. return;
  558. }
  559. } while (true);
  560. done:
  561. return;
  562. }
  563. static void ar5523_cancel_rx_bufs(struct ar5523 *ar)
  564. {
  565. struct ar5523_rx_data *data;
  566. unsigned long flags;
  567. do {
  568. spin_lock_irqsave(&ar->rx_data_list_lock, flags);
  569. if (!list_empty(&ar->rx_data_used))
  570. data = (struct ar5523_rx_data *) ar->rx_data_used.next;
  571. else
  572. data = NULL;
  573. spin_unlock_irqrestore(&ar->rx_data_list_lock, flags);
  574. if (!data)
  575. break;
  576. usb_kill_urb(data->urb);
  577. list_move(&data->list, &ar->rx_data_free);
  578. atomic_inc(&ar->rx_data_free_cnt);
  579. } while (data);
  580. }
  581. static void ar5523_free_rx_bufs(struct ar5523 *ar)
  582. {
  583. struct ar5523_rx_data *data;
  584. ar5523_cancel_rx_bufs(ar);
  585. while (!list_empty(&ar->rx_data_free)) {
  586. data = (struct ar5523_rx_data *) ar->rx_data_free.next;
  587. list_del(&data->list);
  588. usb_free_urb(data->urb);
  589. }
  590. }
  591. static int ar5523_alloc_rx_bufs(struct ar5523 *ar)
  592. {
  593. int i;
  594. for (i = 0; i < AR5523_RX_DATA_COUNT; i++) {
  595. struct ar5523_rx_data *data = &ar->rx_data[i];
  596. data->ar = ar;
  597. data->urb = usb_alloc_urb(0, GFP_KERNEL);
  598. if (!data->urb) {
  599. ar5523_err(ar, "could not allocate rx data urb\n");
  600. goto err;
  601. }
  602. list_add_tail(&data->list, &ar->rx_data_free);
  603. atomic_inc(&ar->rx_data_free_cnt);
  604. }
  605. return 0;
  606. err:
  607. ar5523_free_rx_bufs(ar);
  608. return -ENOMEM;
  609. }
  610. static void ar5523_data_tx_pkt_put(struct ar5523 *ar)
  611. {
  612. atomic_dec(&ar->tx_nr_total);
  613. if (!atomic_dec_return(&ar->tx_nr_pending)) {
  614. del_timer(&ar->tx_wd_timer);
  615. wake_up(&ar->tx_flush_waitq);
  616. }
  617. if (atomic_read(&ar->tx_nr_total) < AR5523_TX_DATA_RESTART_COUNT) {
  618. ar5523_dbg(ar, "restart tx queue\n");
  619. ieee80211_wake_queues(ar->hw);
  620. }
  621. }
  622. static void ar5523_data_tx_cb(struct urb *urb)
  623. {
  624. struct sk_buff *skb = urb->context;
  625. struct ieee80211_tx_info *txi = IEEE80211_SKB_CB(skb);
  626. struct ar5523_tx_data *data = (struct ar5523_tx_data *)
  627. txi->driver_data;
  628. struct ar5523 *ar = data->ar;
  629. unsigned long flags;
  630. ar5523_dbg(ar, "data tx urb completed: %d\n", urb->status);
  631. spin_lock_irqsave(&ar->tx_data_list_lock, flags);
  632. list_del(&data->list);
  633. spin_unlock_irqrestore(&ar->tx_data_list_lock, flags);
  634. if (urb->status) {
  635. ar5523_dbg(ar, "%s: urb status: %d\n", __func__, urb->status);
  636. ar5523_data_tx_pkt_put(ar);
  637. ieee80211_free_txskb(ar->hw, skb);
  638. } else {
  639. skb_pull(skb, sizeof(struct ar5523_tx_desc) + sizeof(__be32));
  640. ieee80211_tx_status_irqsafe(ar->hw, skb);
  641. }
  642. usb_free_urb(urb);
  643. }
  644. static void ar5523_tx(struct ieee80211_hw *hw,
  645. struct ieee80211_tx_control *control,
  646. struct sk_buff *skb)
  647. {
  648. struct ieee80211_tx_info *txi = IEEE80211_SKB_CB(skb);
  649. struct ar5523_tx_data *data = (struct ar5523_tx_data *)
  650. txi->driver_data;
  651. struct ar5523 *ar = hw->priv;
  652. unsigned long flags;
  653. ar5523_dbg(ar, "tx called\n");
  654. if (atomic_inc_return(&ar->tx_nr_total) >= AR5523_TX_DATA_COUNT) {
  655. ar5523_dbg(ar, "tx queue full\n");
  656. ar5523_dbg(ar, "stop queues (tot %d pend %d)\n",
  657. atomic_read(&ar->tx_nr_total),
  658. atomic_read(&ar->tx_nr_pending));
  659. ieee80211_stop_queues(hw);
  660. }
  661. spin_lock_irqsave(&ar->tx_data_list_lock, flags);
  662. list_add_tail(&data->list, &ar->tx_queue_pending);
  663. spin_unlock_irqrestore(&ar->tx_data_list_lock, flags);
  664. ieee80211_queue_work(ar->hw, &ar->tx_work);
  665. }
  666. static void ar5523_tx_work_locked(struct ar5523 *ar)
  667. {
  668. struct ar5523_tx_data *data;
  669. struct ar5523_tx_desc *desc;
  670. struct ar5523_chunk *chunk;
  671. struct ieee80211_tx_info *txi;
  672. struct urb *urb;
  673. struct sk_buff *skb;
  674. int error = 0, paylen;
  675. u32 txqid;
  676. unsigned long flags;
  677. BUILD_BUG_ON(sizeof(struct ar5523_tx_data) >
  678. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  679. ar5523_dbg(ar, "%s\n", __func__);
  680. do {
  681. spin_lock_irqsave(&ar->tx_data_list_lock, flags);
  682. if (!list_empty(&ar->tx_queue_pending)) {
  683. data = (struct ar5523_tx_data *)
  684. ar->tx_queue_pending.next;
  685. list_del(&data->list);
  686. } else
  687. data = NULL;
  688. spin_unlock_irqrestore(&ar->tx_data_list_lock, flags);
  689. if (!data)
  690. break;
  691. txi = container_of((void *)data, struct ieee80211_tx_info,
  692. driver_data);
  693. txqid = 0;
  694. skb = container_of((void *)txi, struct sk_buff, cb);
  695. paylen = skb->len;
  696. urb = usb_alloc_urb(0, GFP_KERNEL);
  697. if (!urb) {
  698. ar5523_err(ar, "Failed to allocate TX urb\n");
  699. ieee80211_free_txskb(ar->hw, skb);
  700. continue;
  701. }
  702. data->ar = ar;
  703. data->urb = urb;
  704. desc = (struct ar5523_tx_desc *)skb_push(skb, sizeof(*desc));
  705. chunk = (struct ar5523_chunk *)skb_push(skb, sizeof(*chunk));
  706. chunk->seqnum = 0;
  707. chunk->flags = UATH_CFLAGS_FINAL;
  708. chunk->length = cpu_to_be16(skb->len);
  709. desc->msglen = cpu_to_be32(skb->len);
  710. desc->msgid = AR5523_DATA_ID;
  711. desc->buflen = cpu_to_be32(paylen);
  712. desc->type = cpu_to_be32(WDCMSG_SEND);
  713. desc->flags = cpu_to_be32(UATH_TX_NOTIFY);
  714. if (test_bit(AR5523_CONNECTED, &ar->flags))
  715. desc->connid = cpu_to_be32(AR5523_ID_BSS);
  716. else
  717. desc->connid = cpu_to_be32(AR5523_ID_BROADCAST);
  718. if (txi->flags & IEEE80211_TX_CTL_USE_MINRATE)
  719. txqid |= UATH_TXQID_MINRATE;
  720. desc->txqid = cpu_to_be32(txqid);
  721. urb->transfer_flags = URB_ZERO_PACKET;
  722. usb_fill_bulk_urb(urb, ar->dev, ar5523_data_tx_pipe(ar->dev),
  723. skb->data, skb->len, ar5523_data_tx_cb, skb);
  724. spin_lock_irqsave(&ar->tx_data_list_lock, flags);
  725. list_add_tail(&data->list, &ar->tx_queue_submitted);
  726. spin_unlock_irqrestore(&ar->tx_data_list_lock, flags);
  727. mod_timer(&ar->tx_wd_timer, jiffies + AR5523_TX_WD_TIMEOUT);
  728. atomic_inc(&ar->tx_nr_pending);
  729. ar5523_dbg(ar, "TX Frame (%d pending)\n",
  730. atomic_read(&ar->tx_nr_pending));
  731. error = usb_submit_urb(urb, GFP_KERNEL);
  732. if (error) {
  733. ar5523_err(ar, "error %d when submitting tx urb\n",
  734. error);
  735. spin_lock_irqsave(&ar->tx_data_list_lock, flags);
  736. list_del(&data->list);
  737. spin_unlock_irqrestore(&ar->tx_data_list_lock, flags);
  738. atomic_dec(&ar->tx_nr_pending);
  739. ar5523_data_tx_pkt_put(ar);
  740. usb_free_urb(urb);
  741. ieee80211_free_txskb(ar->hw, skb);
  742. }
  743. } while (true);
  744. }
  745. static void ar5523_tx_work(struct work_struct *work)
  746. {
  747. struct ar5523 *ar = container_of(work, struct ar5523, tx_work);
  748. ar5523_dbg(ar, "%s\n", __func__);
  749. mutex_lock(&ar->mutex);
  750. ar5523_tx_work_locked(ar);
  751. mutex_unlock(&ar->mutex);
  752. }
  753. static void ar5523_tx_wd_timer(unsigned long arg)
  754. {
  755. struct ar5523 *ar = (struct ar5523 *) arg;
  756. ar5523_dbg(ar, "TX watchdog timer triggered\n");
  757. ieee80211_queue_work(ar->hw, &ar->tx_wd_work);
  758. }
  759. static void ar5523_tx_wd_work(struct work_struct *work)
  760. {
  761. struct ar5523 *ar = container_of(work, struct ar5523, tx_wd_work);
  762. /* Occasionally the TX queues stop responding. The only way to
  763. * recover seems to be to reset the dongle.
  764. */
  765. mutex_lock(&ar->mutex);
  766. ar5523_err(ar, "TX queue stuck (tot %d pend %d)\n",
  767. atomic_read(&ar->tx_nr_total),
  768. atomic_read(&ar->tx_nr_pending));
  769. ar5523_err(ar, "Will restart dongle.\n");
  770. ar5523_cmd_write(ar, WDCMSG_TARGET_RESET, NULL, 0, 0);
  771. mutex_unlock(&ar->mutex);
  772. }
  773. static void ar5523_flush_tx(struct ar5523 *ar)
  774. {
  775. ar5523_tx_work_locked(ar);
  776. /* Don't waste time trying to flush if USB is disconnected */
  777. if (test_bit(AR5523_USB_DISCONNECTED, &ar->flags))
  778. return;
  779. if (!wait_event_timeout(ar->tx_flush_waitq,
  780. !atomic_read(&ar->tx_nr_pending), AR5523_FLUSH_TIMEOUT))
  781. ar5523_err(ar, "flush timeout (tot %d pend %d)\n",
  782. atomic_read(&ar->tx_nr_total),
  783. atomic_read(&ar->tx_nr_pending));
  784. }
  785. static void ar5523_free_tx_cmd(struct ar5523 *ar)
  786. {
  787. struct ar5523_tx_cmd *cmd = &ar->tx_cmd;
  788. usb_free_coherent(ar->dev, AR5523_MAX_RXCMDSZ, cmd->buf_tx,
  789. cmd->urb_tx->transfer_dma);
  790. usb_free_urb(cmd->urb_tx);
  791. }
  792. static int ar5523_alloc_tx_cmd(struct ar5523 *ar)
  793. {
  794. struct ar5523_tx_cmd *cmd = &ar->tx_cmd;
  795. cmd->ar = ar;
  796. init_completion(&cmd->done);
  797. cmd->urb_tx = usb_alloc_urb(0, GFP_KERNEL);
  798. if (!cmd->urb_tx) {
  799. ar5523_err(ar, "could not allocate urb\n");
  800. return -ENOMEM;
  801. }
  802. cmd->buf_tx = usb_alloc_coherent(ar->dev, AR5523_MAX_TXCMDSZ,
  803. GFP_KERNEL,
  804. &cmd->urb_tx->transfer_dma);
  805. if (!cmd->buf_tx) {
  806. usb_free_urb(cmd->urb_tx);
  807. return -ENOMEM;
  808. }
  809. return 0;
  810. }
  811. /*
  812. * This function is called periodically (every second) when associated to
  813. * query device statistics.
  814. */
  815. static void ar5523_stat_work(struct work_struct *work)
  816. {
  817. struct ar5523 *ar = container_of(work, struct ar5523, stat_work.work);
  818. int error;
  819. ar5523_dbg(ar, "%s\n", __func__);
  820. mutex_lock(&ar->mutex);
  821. /*
  822. * Send request for statistics asynchronously once a second. This
  823. * seems to be important. Throughput is a lot better if this is done.
  824. */
  825. error = ar5523_cmd_write(ar, WDCMSG_TARGET_GET_STATS, NULL, 0, 0);
  826. if (error)
  827. ar5523_err(ar, "could not query stats, error %d\n", error);
  828. mutex_unlock(&ar->mutex);
  829. ieee80211_queue_delayed_work(ar->hw, &ar->stat_work, HZ);
  830. }
  831. /*
  832. * Interface routines to the mac80211 stack.
  833. */
  834. static int ar5523_start(struct ieee80211_hw *hw)
  835. {
  836. struct ar5523 *ar = hw->priv;
  837. int error;
  838. __be32 val;
  839. ar5523_dbg(ar, "start called\n");
  840. mutex_lock(&ar->mutex);
  841. val = cpu_to_be32(0);
  842. ar5523_cmd_write(ar, WDCMSG_BIND, &val, sizeof(val), 0);
  843. /* set MAC address */
  844. ar5523_config_multi(ar, CFG_MAC_ADDR, &ar->hw->wiphy->perm_addr,
  845. ETH_ALEN);
  846. /* XXX honor net80211 state */
  847. ar5523_config(ar, CFG_RATE_CONTROL_ENABLE, 0x00000001);
  848. ar5523_config(ar, CFG_DIVERSITY_CTL, 0x00000001);
  849. ar5523_config(ar, CFG_ABOLT, 0x0000003f);
  850. ar5523_config(ar, CFG_WME_ENABLED, 0x00000000);
  851. ar5523_config(ar, CFG_SERVICE_TYPE, 1);
  852. ar5523_config(ar, CFG_TP_SCALE, 0x00000000);
  853. ar5523_config(ar, CFG_TPC_HALF_DBM5, 0x0000003c);
  854. ar5523_config(ar, CFG_TPC_HALF_DBM2, 0x0000003c);
  855. ar5523_config(ar, CFG_OVERRD_TX_POWER, 0x00000000);
  856. ar5523_config(ar, CFG_GMODE_PROTECTION, 0x00000000);
  857. ar5523_config(ar, CFG_GMODE_PROTECT_RATE_INDEX, 0x00000003);
  858. ar5523_config(ar, CFG_PROTECTION_TYPE, 0x00000000);
  859. ar5523_config(ar, CFG_MODE_CTS, 0x00000002);
  860. error = ar5523_cmd_read(ar, WDCMSG_TARGET_START, NULL, 0,
  861. &val, sizeof(val), AR5523_CMD_FLAG_MAGIC);
  862. if (error) {
  863. ar5523_dbg(ar, "could not start target, error %d\n", error);
  864. goto err;
  865. }
  866. ar5523_dbg(ar, "WDCMSG_TARGET_START returns handle: 0x%x\n",
  867. be32_to_cpu(val));
  868. ar5523_switch_chan(ar);
  869. val = cpu_to_be32(TARGET_DEVICE_AWAKE);
  870. ar5523_cmd_write(ar, WDCMSG_SET_PWR_MODE, &val, sizeof(val), 0);
  871. /* XXX? check */
  872. ar5523_cmd_write(ar, WDCMSG_RESET_KEY_CACHE, NULL, 0, 0);
  873. set_bit(AR5523_HW_UP, &ar->flags);
  874. queue_work(ar->wq, &ar->rx_refill_work);
  875. /* enable Rx */
  876. ar5523_set_rxfilter(ar, 0, UATH_FILTER_OP_INIT);
  877. ar5523_set_rxfilter(ar,
  878. UATH_FILTER_RX_UCAST | UATH_FILTER_RX_MCAST |
  879. UATH_FILTER_RX_BCAST | UATH_FILTER_RX_BEACON,
  880. UATH_FILTER_OP_SET);
  881. ar5523_set_ledsteady(ar, UATH_LED_ACTIVITY, UATH_LED_ON);
  882. ar5523_dbg(ar, "start OK\n");
  883. err:
  884. mutex_unlock(&ar->mutex);
  885. return error;
  886. }
  887. static void ar5523_stop(struct ieee80211_hw *hw)
  888. {
  889. struct ar5523 *ar = hw->priv;
  890. ar5523_dbg(ar, "stop called\n");
  891. cancel_delayed_work_sync(&ar->stat_work);
  892. mutex_lock(&ar->mutex);
  893. clear_bit(AR5523_HW_UP, &ar->flags);
  894. ar5523_set_ledsteady(ar, UATH_LED_LINK, UATH_LED_OFF);
  895. ar5523_set_ledsteady(ar, UATH_LED_ACTIVITY, UATH_LED_OFF);
  896. ar5523_cmd_write(ar, WDCMSG_TARGET_STOP, NULL, 0, 0);
  897. del_timer_sync(&ar->tx_wd_timer);
  898. cancel_work_sync(&ar->tx_wd_work);
  899. cancel_work_sync(&ar->rx_refill_work);
  900. ar5523_cancel_rx_bufs(ar);
  901. mutex_unlock(&ar->mutex);
  902. }
  903. static int ar5523_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  904. {
  905. struct ar5523 *ar = hw->priv;
  906. int ret;
  907. ar5523_dbg(ar, "set_rts_threshold called\n");
  908. mutex_lock(&ar->mutex);
  909. ret = ar5523_config(ar, CFG_USER_RTS_THRESHOLD, value);
  910. mutex_unlock(&ar->mutex);
  911. return ret;
  912. }
  913. static void ar5523_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  914. u32 queues, bool drop)
  915. {
  916. struct ar5523 *ar = hw->priv;
  917. ar5523_dbg(ar, "flush called\n");
  918. ar5523_flush_tx(ar);
  919. }
  920. static int ar5523_add_interface(struct ieee80211_hw *hw,
  921. struct ieee80211_vif *vif)
  922. {
  923. struct ar5523 *ar = hw->priv;
  924. ar5523_dbg(ar, "add interface called\n");
  925. if (ar->vif) {
  926. ar5523_dbg(ar, "invalid add_interface\n");
  927. return -EOPNOTSUPP;
  928. }
  929. switch (vif->type) {
  930. case NL80211_IFTYPE_STATION:
  931. ar->vif = vif;
  932. break;
  933. default:
  934. return -EOPNOTSUPP;
  935. }
  936. return 0;
  937. }
  938. static void ar5523_remove_interface(struct ieee80211_hw *hw,
  939. struct ieee80211_vif *vif)
  940. {
  941. struct ar5523 *ar = hw->priv;
  942. ar5523_dbg(ar, "remove interface called\n");
  943. ar->vif = NULL;
  944. }
  945. static int ar5523_hwconfig(struct ieee80211_hw *hw, u32 changed)
  946. {
  947. struct ar5523 *ar = hw->priv;
  948. ar5523_dbg(ar, "config called\n");
  949. mutex_lock(&ar->mutex);
  950. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  951. ar5523_dbg(ar, "Do channel switch\n");
  952. ar5523_flush_tx(ar);
  953. ar5523_switch_chan(ar);
  954. }
  955. mutex_unlock(&ar->mutex);
  956. return 0;
  957. }
  958. static int ar5523_get_wlan_mode(struct ar5523 *ar,
  959. struct ieee80211_bss_conf *bss_conf)
  960. {
  961. struct ieee80211_supported_band *band;
  962. int bit;
  963. struct ieee80211_sta *sta;
  964. u32 sta_rate_set;
  965. band = ar->hw->wiphy->bands[ar->hw->conf.chandef.chan->band];
  966. sta = ieee80211_find_sta(ar->vif, bss_conf->bssid);
  967. if (!sta) {
  968. ar5523_info(ar, "STA not found!\n");
  969. return WLAN_MODE_11b;
  970. }
  971. sta_rate_set = sta->supp_rates[ar->hw->conf.chandef.chan->band];
  972. for (bit = 0; bit < band->n_bitrates; bit++) {
  973. if (sta_rate_set & 1) {
  974. int rate = band->bitrates[bit].bitrate;
  975. switch (rate) {
  976. case 60:
  977. case 90:
  978. case 120:
  979. case 180:
  980. case 240:
  981. case 360:
  982. case 480:
  983. case 540:
  984. return WLAN_MODE_11g;
  985. }
  986. }
  987. sta_rate_set >>= 1;
  988. }
  989. return WLAN_MODE_11b;
  990. }
  991. static void ar5523_create_rateset(struct ar5523 *ar,
  992. struct ieee80211_bss_conf *bss_conf,
  993. struct ar5523_cmd_rateset *rs,
  994. bool basic)
  995. {
  996. struct ieee80211_supported_band *band;
  997. struct ieee80211_sta *sta;
  998. int bit, i = 0;
  999. u32 sta_rate_set, basic_rate_set;
  1000. sta = ieee80211_find_sta(ar->vif, bss_conf->bssid);
  1001. basic_rate_set = bss_conf->basic_rates;
  1002. if (!sta) {
  1003. ar5523_info(ar, "STA not found. Cannot set rates\n");
  1004. sta_rate_set = bss_conf->basic_rates;
  1005. } else
  1006. sta_rate_set = sta->supp_rates[ar->hw->conf.chandef.chan->band];
  1007. ar5523_dbg(ar, "sta rate_set = %08x\n", sta_rate_set);
  1008. band = ar->hw->wiphy->bands[ar->hw->conf.chandef.chan->band];
  1009. for (bit = 0; bit < band->n_bitrates; bit++) {
  1010. BUG_ON(i >= AR5523_MAX_NRATES);
  1011. ar5523_dbg(ar, "Considering rate %d : %d\n",
  1012. band->bitrates[bit].hw_value, sta_rate_set & 1);
  1013. if (sta_rate_set & 1) {
  1014. rs->set[i] = band->bitrates[bit].hw_value;
  1015. if (basic_rate_set & 1 && basic)
  1016. rs->set[i] |= 0x80;
  1017. i++;
  1018. }
  1019. sta_rate_set >>= 1;
  1020. basic_rate_set >>= 1;
  1021. }
  1022. rs->length = i;
  1023. }
  1024. static int ar5523_set_basic_rates(struct ar5523 *ar,
  1025. struct ieee80211_bss_conf *bss)
  1026. {
  1027. struct ar5523_cmd_rates rates;
  1028. memset(&rates, 0, sizeof(rates));
  1029. rates.connid = cpu_to_be32(2); /* XXX */
  1030. rates.size = cpu_to_be32(sizeof(struct ar5523_cmd_rateset));
  1031. ar5523_create_rateset(ar, bss, &rates.rateset, true);
  1032. return ar5523_cmd_write(ar, WDCMSG_SET_BASIC_RATE, &rates,
  1033. sizeof(rates), 0);
  1034. }
  1035. static int ar5523_create_connection(struct ar5523 *ar,
  1036. struct ieee80211_vif *vif,
  1037. struct ieee80211_bss_conf *bss)
  1038. {
  1039. struct ar5523_cmd_create_connection create;
  1040. int wlan_mode;
  1041. memset(&create, 0, sizeof(create));
  1042. create.connid = cpu_to_be32(2);
  1043. create.bssid = cpu_to_be32(0);
  1044. /* XXX packed or not? */
  1045. create.size = cpu_to_be32(sizeof(struct ar5523_cmd_rateset));
  1046. ar5523_create_rateset(ar, bss, &create.connattr.rateset, false);
  1047. wlan_mode = ar5523_get_wlan_mode(ar, bss);
  1048. create.connattr.wlanmode = cpu_to_be32(wlan_mode);
  1049. return ar5523_cmd_write(ar, WDCMSG_CREATE_CONNECTION, &create,
  1050. sizeof(create), 0);
  1051. }
  1052. static int ar5523_write_associd(struct ar5523 *ar,
  1053. struct ieee80211_bss_conf *bss)
  1054. {
  1055. struct ar5523_cmd_set_associd associd;
  1056. memset(&associd, 0, sizeof(associd));
  1057. associd.defaultrateix = cpu_to_be32(0); /* XXX */
  1058. associd.associd = cpu_to_be32(bss->aid);
  1059. associd.timoffset = cpu_to_be32(0x3b); /* XXX */
  1060. memcpy(associd.bssid, bss->bssid, ETH_ALEN);
  1061. return ar5523_cmd_write(ar, WDCMSG_WRITE_ASSOCID, &associd,
  1062. sizeof(associd), 0);
  1063. }
  1064. static void ar5523_bss_info_changed(struct ieee80211_hw *hw,
  1065. struct ieee80211_vif *vif,
  1066. struct ieee80211_bss_conf *bss,
  1067. u32 changed)
  1068. {
  1069. struct ar5523 *ar = hw->priv;
  1070. int error;
  1071. ar5523_dbg(ar, "bss_info_changed called\n");
  1072. mutex_lock(&ar->mutex);
  1073. if (!(changed & BSS_CHANGED_ASSOC))
  1074. goto out_unlock;
  1075. if (bss->assoc) {
  1076. error = ar5523_create_connection(ar, vif, bss);
  1077. if (error) {
  1078. ar5523_err(ar, "could not create connection\n");
  1079. goto out_unlock;
  1080. }
  1081. error = ar5523_set_basic_rates(ar, bss);
  1082. if (error) {
  1083. ar5523_err(ar, "could not set negotiated rate set\n");
  1084. goto out_unlock;
  1085. }
  1086. error = ar5523_write_associd(ar, bss);
  1087. if (error) {
  1088. ar5523_err(ar, "could not set association\n");
  1089. goto out_unlock;
  1090. }
  1091. /* turn link LED on */
  1092. ar5523_set_ledsteady(ar, UATH_LED_LINK, UATH_LED_ON);
  1093. set_bit(AR5523_CONNECTED, &ar->flags);
  1094. ieee80211_queue_delayed_work(hw, &ar->stat_work, HZ);
  1095. } else {
  1096. cancel_delayed_work(&ar->stat_work);
  1097. clear_bit(AR5523_CONNECTED, &ar->flags);
  1098. ar5523_set_ledsteady(ar, UATH_LED_LINK, UATH_LED_OFF);
  1099. }
  1100. out_unlock:
  1101. mutex_unlock(&ar->mutex);
  1102. }
  1103. #define AR5523_SUPPORTED_FILTERS (FIF_ALLMULTI | \
  1104. FIF_FCSFAIL | \
  1105. FIF_OTHER_BSS)
  1106. static void ar5523_configure_filter(struct ieee80211_hw *hw,
  1107. unsigned int changed_flags,
  1108. unsigned int *total_flags,
  1109. u64 multicast)
  1110. {
  1111. struct ar5523 *ar = hw->priv;
  1112. u32 filter = 0;
  1113. ar5523_dbg(ar, "configure_filter called\n");
  1114. mutex_lock(&ar->mutex);
  1115. ar5523_flush_tx(ar);
  1116. *total_flags &= AR5523_SUPPORTED_FILTERS;
  1117. /* The filters seems strange. UATH_FILTER_RX_BCAST and
  1118. * UATH_FILTER_RX_MCAST does not result in those frames being RXed.
  1119. * The only way I have found to get [mb]cast frames seems to be
  1120. * to set UATH_FILTER_RX_PROM. */
  1121. filter |= UATH_FILTER_RX_UCAST | UATH_FILTER_RX_MCAST |
  1122. UATH_FILTER_RX_BCAST | UATH_FILTER_RX_BEACON |
  1123. UATH_FILTER_RX_PROM;
  1124. ar5523_set_rxfilter(ar, 0, UATH_FILTER_OP_INIT);
  1125. ar5523_set_rxfilter(ar, filter, UATH_FILTER_OP_SET);
  1126. mutex_unlock(&ar->mutex);
  1127. }
  1128. static const struct ieee80211_ops ar5523_ops = {
  1129. .start = ar5523_start,
  1130. .stop = ar5523_stop,
  1131. .tx = ar5523_tx,
  1132. .set_rts_threshold = ar5523_set_rts_threshold,
  1133. .add_interface = ar5523_add_interface,
  1134. .remove_interface = ar5523_remove_interface,
  1135. .config = ar5523_hwconfig,
  1136. .bss_info_changed = ar5523_bss_info_changed,
  1137. .configure_filter = ar5523_configure_filter,
  1138. .flush = ar5523_flush,
  1139. };
  1140. static int ar5523_host_available(struct ar5523 *ar)
  1141. {
  1142. struct ar5523_cmd_host_available setup;
  1143. /* inform target the host is available */
  1144. setup.sw_ver_major = cpu_to_be32(ATH_SW_VER_MAJOR);
  1145. setup.sw_ver_minor = cpu_to_be32(ATH_SW_VER_MINOR);
  1146. setup.sw_ver_patch = cpu_to_be32(ATH_SW_VER_PATCH);
  1147. setup.sw_ver_build = cpu_to_be32(ATH_SW_VER_BUILD);
  1148. return ar5523_cmd_read(ar, WDCMSG_HOST_AVAILABLE,
  1149. &setup, sizeof(setup), NULL, 0, 0);
  1150. }
  1151. static int ar5523_get_devstatus(struct ar5523 *ar)
  1152. {
  1153. u8 macaddr[ETH_ALEN];
  1154. int error;
  1155. /* retrieve MAC address */
  1156. error = ar5523_get_status(ar, ST_MAC_ADDR, macaddr, ETH_ALEN);
  1157. if (error) {
  1158. ar5523_err(ar, "could not read MAC address\n");
  1159. return error;
  1160. }
  1161. SET_IEEE80211_PERM_ADDR(ar->hw, macaddr);
  1162. error = ar5523_get_status(ar, ST_SERIAL_NUMBER,
  1163. &ar->serial[0], sizeof(ar->serial));
  1164. if (error) {
  1165. ar5523_err(ar, "could not read device serial number\n");
  1166. return error;
  1167. }
  1168. return 0;
  1169. }
  1170. #define AR5523_SANE_RXBUFSZ 2000
  1171. static int ar5523_get_max_rxsz(struct ar5523 *ar)
  1172. {
  1173. int error;
  1174. __be32 rxsize;
  1175. /* Get max rx size */
  1176. error = ar5523_get_status(ar, ST_WDC_TRANSPORT_CHUNK_SIZE, &rxsize,
  1177. sizeof(rxsize));
  1178. if (error != 0) {
  1179. ar5523_err(ar, "could not read max RX size\n");
  1180. return error;
  1181. }
  1182. ar->rxbufsz = be32_to_cpu(rxsize);
  1183. if (!ar->rxbufsz || ar->rxbufsz > AR5523_SANE_RXBUFSZ) {
  1184. ar5523_err(ar, "Bad rxbufsz from device. Using %d instead\n",
  1185. AR5523_SANE_RXBUFSZ);
  1186. ar->rxbufsz = AR5523_SANE_RXBUFSZ;
  1187. }
  1188. ar5523_dbg(ar, "Max RX buf size: %d\n", ar->rxbufsz);
  1189. return 0;
  1190. }
  1191. /*
  1192. * This is copied from rtl818x, but we should probably move this
  1193. * to common code as in OpenBSD.
  1194. */
  1195. static const struct ieee80211_rate ar5523_rates[] = {
  1196. { .bitrate = 10, .hw_value = 2, },
  1197. { .bitrate = 20, .hw_value = 4 },
  1198. { .bitrate = 55, .hw_value = 11, },
  1199. { .bitrate = 110, .hw_value = 22, },
  1200. { .bitrate = 60, .hw_value = 12, },
  1201. { .bitrate = 90, .hw_value = 18, },
  1202. { .bitrate = 120, .hw_value = 24, },
  1203. { .bitrate = 180, .hw_value = 36, },
  1204. { .bitrate = 240, .hw_value = 48, },
  1205. { .bitrate = 360, .hw_value = 72, },
  1206. { .bitrate = 480, .hw_value = 96, },
  1207. { .bitrate = 540, .hw_value = 108, },
  1208. };
  1209. static const struct ieee80211_channel ar5523_channels[] = {
  1210. { .center_freq = 2412 },
  1211. { .center_freq = 2417 },
  1212. { .center_freq = 2422 },
  1213. { .center_freq = 2427 },
  1214. { .center_freq = 2432 },
  1215. { .center_freq = 2437 },
  1216. { .center_freq = 2442 },
  1217. { .center_freq = 2447 },
  1218. { .center_freq = 2452 },
  1219. { .center_freq = 2457 },
  1220. { .center_freq = 2462 },
  1221. { .center_freq = 2467 },
  1222. { .center_freq = 2472 },
  1223. { .center_freq = 2484 },
  1224. };
  1225. static int ar5523_init_modes(struct ar5523 *ar)
  1226. {
  1227. BUILD_BUG_ON(sizeof(ar->channels) != sizeof(ar5523_channels));
  1228. BUILD_BUG_ON(sizeof(ar->rates) != sizeof(ar5523_rates));
  1229. memcpy(ar->channels, ar5523_channels, sizeof(ar5523_channels));
  1230. memcpy(ar->rates, ar5523_rates, sizeof(ar5523_rates));
  1231. ar->band.band = IEEE80211_BAND_2GHZ;
  1232. ar->band.channels = ar->channels;
  1233. ar->band.n_channels = ARRAY_SIZE(ar5523_channels);
  1234. ar->band.bitrates = ar->rates;
  1235. ar->band.n_bitrates = ARRAY_SIZE(ar5523_rates);
  1236. ar->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &ar->band;
  1237. return 0;
  1238. }
  1239. /*
  1240. * Load the MIPS R4000 microcode into the device. Once the image is loaded,
  1241. * the device will detach itself from the bus and reattach later with a new
  1242. * product Id (a la ezusb).
  1243. */
  1244. static int ar5523_load_firmware(struct usb_device *dev)
  1245. {
  1246. struct ar5523_fwblock *txblock, *rxblock;
  1247. const struct firmware *fw;
  1248. void *fwbuf;
  1249. int len, offset;
  1250. int foolen; /* XXX(hch): handle short transfers */
  1251. int error = -ENXIO;
  1252. if (request_firmware(&fw, AR5523_FIRMWARE_FILE, &dev->dev)) {
  1253. dev_err(&dev->dev, "no firmware found: %s\n",
  1254. AR5523_FIRMWARE_FILE);
  1255. return -ENOENT;
  1256. }
  1257. txblock = kmalloc(sizeof(*txblock), GFP_KERNEL);
  1258. if (!txblock)
  1259. goto out;
  1260. rxblock = kmalloc(sizeof(*rxblock), GFP_KERNEL);
  1261. if (!rxblock)
  1262. goto out_free_txblock;
  1263. fwbuf = kmalloc(AR5523_MAX_FWBLOCK_SIZE, GFP_KERNEL);
  1264. if (!fwbuf)
  1265. goto out_free_rxblock;
  1266. memset(txblock, 0, sizeof(struct ar5523_fwblock));
  1267. txblock->flags = cpu_to_be32(AR5523_WRITE_BLOCK);
  1268. txblock->total = cpu_to_be32(fw->size);
  1269. offset = 0;
  1270. len = fw->size;
  1271. while (len > 0) {
  1272. int mlen = min(len, AR5523_MAX_FWBLOCK_SIZE);
  1273. txblock->remain = cpu_to_be32(len - mlen);
  1274. txblock->len = cpu_to_be32(mlen);
  1275. /* send firmware block meta-data */
  1276. error = usb_bulk_msg(dev, ar5523_cmd_tx_pipe(dev),
  1277. txblock, sizeof(*txblock), &foolen,
  1278. AR5523_CMD_TIMEOUT);
  1279. if (error) {
  1280. dev_err(&dev->dev,
  1281. "could not send firmware block info\n");
  1282. goto out_free_fwbuf;
  1283. }
  1284. /* send firmware block data */
  1285. memcpy(fwbuf, fw->data + offset, mlen);
  1286. error = usb_bulk_msg(dev, ar5523_data_tx_pipe(dev),
  1287. fwbuf, mlen, &foolen,
  1288. AR5523_DATA_TIMEOUT);
  1289. if (error) {
  1290. dev_err(&dev->dev,
  1291. "could not send firmware block data\n");
  1292. goto out_free_fwbuf;
  1293. }
  1294. /* wait for ack from firmware */
  1295. error = usb_bulk_msg(dev, ar5523_cmd_rx_pipe(dev),
  1296. rxblock, sizeof(*rxblock), &foolen,
  1297. AR5523_CMD_TIMEOUT);
  1298. if (error) {
  1299. dev_err(&dev->dev,
  1300. "could not read firmware answer\n");
  1301. goto out_free_fwbuf;
  1302. }
  1303. len -= mlen;
  1304. offset += mlen;
  1305. }
  1306. /*
  1307. * Set the error to -ENXIO to make sure we continue probing for
  1308. * a driver.
  1309. */
  1310. error = -ENXIO;
  1311. out_free_fwbuf:
  1312. kfree(fwbuf);
  1313. out_free_rxblock:
  1314. kfree(rxblock);
  1315. out_free_txblock:
  1316. kfree(txblock);
  1317. out:
  1318. release_firmware(fw);
  1319. return error;
  1320. }
  1321. static int ar5523_probe(struct usb_interface *intf,
  1322. const struct usb_device_id *id)
  1323. {
  1324. struct usb_device *dev = interface_to_usbdev(intf);
  1325. struct ieee80211_hw *hw;
  1326. struct ar5523 *ar;
  1327. int error = -ENOMEM;
  1328. /*
  1329. * Load firmware if the device requires it. This will return
  1330. * -ENXIO on success and we'll get called back afer the usb
  1331. * id changes to indicate that the firmware is present.
  1332. */
  1333. if (id->driver_info & AR5523_FLAG_PRE_FIRMWARE)
  1334. return ar5523_load_firmware(dev);
  1335. hw = ieee80211_alloc_hw(sizeof(*ar), &ar5523_ops);
  1336. if (!hw)
  1337. goto out;
  1338. SET_IEEE80211_DEV(hw, &intf->dev);
  1339. ar = hw->priv;
  1340. ar->hw = hw;
  1341. ar->dev = dev;
  1342. mutex_init(&ar->mutex);
  1343. INIT_DELAYED_WORK(&ar->stat_work, ar5523_stat_work);
  1344. init_timer(&ar->tx_wd_timer);
  1345. setup_timer(&ar->tx_wd_timer, ar5523_tx_wd_timer, (unsigned long) ar);
  1346. INIT_WORK(&ar->tx_wd_work, ar5523_tx_wd_work);
  1347. INIT_WORK(&ar->tx_work, ar5523_tx_work);
  1348. INIT_LIST_HEAD(&ar->tx_queue_pending);
  1349. INIT_LIST_HEAD(&ar->tx_queue_submitted);
  1350. spin_lock_init(&ar->tx_data_list_lock);
  1351. atomic_set(&ar->tx_nr_total, 0);
  1352. atomic_set(&ar->tx_nr_pending, 0);
  1353. init_waitqueue_head(&ar->tx_flush_waitq);
  1354. atomic_set(&ar->rx_data_free_cnt, 0);
  1355. INIT_WORK(&ar->rx_refill_work, ar5523_rx_refill_work);
  1356. INIT_LIST_HEAD(&ar->rx_data_free);
  1357. INIT_LIST_HEAD(&ar->rx_data_used);
  1358. spin_lock_init(&ar->rx_data_list_lock);
  1359. ar->wq = create_singlethread_workqueue("ar5523");
  1360. if (!ar->wq) {
  1361. ar5523_err(ar, "Could not create wq\n");
  1362. goto out_free_ar;
  1363. }
  1364. error = ar5523_alloc_rx_bufs(ar);
  1365. if (error) {
  1366. ar5523_err(ar, "Could not allocate rx buffers\n");
  1367. goto out_free_wq;
  1368. }
  1369. error = ar5523_alloc_rx_cmd(ar);
  1370. if (error) {
  1371. ar5523_err(ar, "Could not allocate rx command buffers\n");
  1372. goto out_free_rx_bufs;
  1373. }
  1374. error = ar5523_alloc_tx_cmd(ar);
  1375. if (error) {
  1376. ar5523_err(ar, "Could not allocate tx command buffers\n");
  1377. goto out_free_rx_cmd;
  1378. }
  1379. error = ar5523_submit_rx_cmd(ar);
  1380. if (error) {
  1381. ar5523_err(ar, "Failed to submit rx cmd\n");
  1382. goto out_free_tx_cmd;
  1383. }
  1384. /*
  1385. * We're now ready to send/receive firmware commands.
  1386. */
  1387. error = ar5523_host_available(ar);
  1388. if (error) {
  1389. ar5523_err(ar, "could not initialize adapter\n");
  1390. goto out_cancel_rx_cmd;
  1391. }
  1392. error = ar5523_get_max_rxsz(ar);
  1393. if (error) {
  1394. ar5523_err(ar, "could not get caps from adapter\n");
  1395. goto out_cancel_rx_cmd;
  1396. }
  1397. error = ar5523_get_devcap(ar);
  1398. if (error) {
  1399. ar5523_err(ar, "could not get caps from adapter\n");
  1400. goto out_cancel_rx_cmd;
  1401. }
  1402. error = ar5523_get_devstatus(ar);
  1403. if (error != 0) {
  1404. ar5523_err(ar, "could not get device status\n");
  1405. goto out_cancel_rx_cmd;
  1406. }
  1407. ar5523_info(ar, "MAC/BBP AR5523, RF AR%c112\n",
  1408. (id->driver_info & AR5523_FLAG_ABG) ? '5' : '2');
  1409. ar->vif = NULL;
  1410. ieee80211_hw_set(hw, HAS_RATE_CONTROL);
  1411. ieee80211_hw_set(hw, RX_INCLUDES_FCS);
  1412. ieee80211_hw_set(hw, SIGNAL_DBM);
  1413. hw->extra_tx_headroom = sizeof(struct ar5523_tx_desc) +
  1414. sizeof(struct ar5523_chunk);
  1415. hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
  1416. hw->queues = 1;
  1417. error = ar5523_init_modes(ar);
  1418. if (error)
  1419. goto out_cancel_rx_cmd;
  1420. usb_set_intfdata(intf, hw);
  1421. error = ieee80211_register_hw(hw);
  1422. if (error) {
  1423. ar5523_err(ar, "could not register device\n");
  1424. goto out_cancel_rx_cmd;
  1425. }
  1426. ar5523_info(ar, "Found and initialized AR5523 device\n");
  1427. return 0;
  1428. out_cancel_rx_cmd:
  1429. ar5523_cancel_rx_cmd(ar);
  1430. out_free_tx_cmd:
  1431. ar5523_free_tx_cmd(ar);
  1432. out_free_rx_cmd:
  1433. ar5523_free_rx_cmd(ar);
  1434. out_free_rx_bufs:
  1435. ar5523_free_rx_bufs(ar);
  1436. out_free_wq:
  1437. destroy_workqueue(ar->wq);
  1438. out_free_ar:
  1439. ieee80211_free_hw(hw);
  1440. out:
  1441. return error;
  1442. }
  1443. static void ar5523_disconnect(struct usb_interface *intf)
  1444. {
  1445. struct ieee80211_hw *hw = usb_get_intfdata(intf);
  1446. struct ar5523 *ar = hw->priv;
  1447. ar5523_dbg(ar, "detaching\n");
  1448. set_bit(AR5523_USB_DISCONNECTED, &ar->flags);
  1449. ieee80211_unregister_hw(hw);
  1450. ar5523_cancel_rx_cmd(ar);
  1451. ar5523_free_tx_cmd(ar);
  1452. ar5523_free_rx_cmd(ar);
  1453. ar5523_free_rx_bufs(ar);
  1454. destroy_workqueue(ar->wq);
  1455. ieee80211_free_hw(hw);
  1456. usb_set_intfdata(intf, NULL);
  1457. }
  1458. #define AR5523_DEVICE_UG(vendor, device) \
  1459. { USB_DEVICE((vendor), (device)) }, \
  1460. { USB_DEVICE((vendor), (device) + 1), \
  1461. .driver_info = AR5523_FLAG_PRE_FIRMWARE }
  1462. #define AR5523_DEVICE_UX(vendor, device) \
  1463. { USB_DEVICE((vendor), (device)), \
  1464. .driver_info = AR5523_FLAG_ABG }, \
  1465. { USB_DEVICE((vendor), (device) + 1), \
  1466. .driver_info = AR5523_FLAG_ABG|AR5523_FLAG_PRE_FIRMWARE }
  1467. static struct usb_device_id ar5523_id_table[] = {
  1468. AR5523_DEVICE_UG(0x168c, 0x0001), /* Atheros / AR5523 */
  1469. AR5523_DEVICE_UG(0x0cf3, 0x0001), /* Atheros2 / AR5523_1 */
  1470. AR5523_DEVICE_UG(0x0cf3, 0x0003), /* Atheros2 / AR5523_2 */
  1471. AR5523_DEVICE_UX(0x0cf3, 0x0005), /* Atheros2 / AR5523_3 */
  1472. AR5523_DEVICE_UG(0x0d8e, 0x7801), /* Conceptronic / AR5523_1 */
  1473. AR5523_DEVICE_UX(0x0d8e, 0x7811), /* Conceptronic / AR5523_2 */
  1474. AR5523_DEVICE_UX(0x2001, 0x3a00), /* Dlink / DWLAG132 */
  1475. AR5523_DEVICE_UG(0x2001, 0x3a02), /* Dlink / DWLG132 */
  1476. AR5523_DEVICE_UX(0x2001, 0x3a04), /* Dlink / DWLAG122 */
  1477. AR5523_DEVICE_UG(0x07d1, 0x3a07), /* D-Link / WUA-2340 rev A1 */
  1478. AR5523_DEVICE_UG(0x1690, 0x0712), /* Gigaset / AR5523 */
  1479. AR5523_DEVICE_UG(0x1690, 0x0710), /* Gigaset / SMCWUSBTG */
  1480. AR5523_DEVICE_UG(0x129b, 0x160b), /* Gigaset / USB stick 108
  1481. (CyberTAN Technology) */
  1482. AR5523_DEVICE_UG(0x16ab, 0x7801), /* Globalsun / AR5523_1 */
  1483. AR5523_DEVICE_UX(0x16ab, 0x7811), /* Globalsun / AR5523_2 */
  1484. AR5523_DEVICE_UG(0x0d8e, 0x7802), /* Globalsun / AR5523_3 */
  1485. AR5523_DEVICE_UX(0x0846, 0x4300), /* Netgear / WG111U */
  1486. AR5523_DEVICE_UG(0x0846, 0x4250), /* Netgear / WG111T */
  1487. AR5523_DEVICE_UG(0x0846, 0x5f00), /* Netgear / WPN111 */
  1488. AR5523_DEVICE_UG(0x157e, 0x3006), /* Umedia / AR5523_1 */
  1489. AR5523_DEVICE_UX(0x157e, 0x3205), /* Umedia / AR5523_2 */
  1490. AR5523_DEVICE_UG(0x157e, 0x3006), /* Umedia / TEW444UBEU */
  1491. AR5523_DEVICE_UG(0x1435, 0x0826), /* Wistronneweb / AR5523_1 */
  1492. AR5523_DEVICE_UX(0x1435, 0x0828), /* Wistronneweb / AR5523_2 */
  1493. AR5523_DEVICE_UG(0x0cde, 0x0012), /* Zcom / AR5523 */
  1494. AR5523_DEVICE_UG(0x1385, 0x4250), /* Netgear3 / WG111T (2) */
  1495. AR5523_DEVICE_UG(0x1385, 0x5f00), /* Netgear / WPN111 */
  1496. AR5523_DEVICE_UG(0x1385, 0x5f02), /* Netgear / WPN111 */
  1497. { }
  1498. };
  1499. MODULE_DEVICE_TABLE(usb, ar5523_id_table);
  1500. static struct usb_driver ar5523_driver = {
  1501. .name = "ar5523",
  1502. .id_table = ar5523_id_table,
  1503. .probe = ar5523_probe,
  1504. .disconnect = ar5523_disconnect,
  1505. };
  1506. module_usb_driver(ar5523_driver);
  1507. MODULE_LICENSE("Dual BSD/GPL");
  1508. MODULE_FIRMWARE(AR5523_FIRMWARE_FILE);