bmi.h 6.1 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef _BMI_H_
  18. #define _BMI_H_
  19. #include "core.h"
  20. /*
  21. * Bootloader Messaging Interface (BMI)
  22. *
  23. * BMI is a very simple messaging interface used during initialization
  24. * to read memory, write memory, execute code, and to define an
  25. * application entry PC.
  26. *
  27. * It is used to download an application to QCA988x, to provide
  28. * patches to code that is already resident on QCA988x, and generally
  29. * to examine and modify state. The Host has an opportunity to use
  30. * BMI only once during bootup. Once the Host issues a BMI_DONE
  31. * command, this opportunity ends.
  32. *
  33. * The Host writes BMI requests to mailbox0, and reads BMI responses
  34. * from mailbox0. BMI requests all begin with a command
  35. * (see below for specific commands), and are followed by
  36. * command-specific data.
  37. *
  38. * Flow control:
  39. * The Host can only issue a command once the Target gives it a
  40. * "BMI Command Credit", using AR8K Counter #4. As soon as the
  41. * Target has completed a command, it issues another BMI Command
  42. * Credit (so the Host can issue the next command).
  43. *
  44. * BMI handles all required Target-side cache flushing.
  45. */
  46. /* Maximum data size used for BMI transfers */
  47. #define BMI_MAX_DATA_SIZE 256
  48. /* len = cmd + addr + length */
  49. #define BMI_MAX_CMDBUF_SIZE (BMI_MAX_DATA_SIZE + \
  50. sizeof(u32) + \
  51. sizeof(u32) + \
  52. sizeof(u32))
  53. /* BMI Commands */
  54. enum bmi_cmd_id {
  55. BMI_NO_COMMAND = 0,
  56. BMI_DONE = 1,
  57. BMI_READ_MEMORY = 2,
  58. BMI_WRITE_MEMORY = 3,
  59. BMI_EXECUTE = 4,
  60. BMI_SET_APP_START = 5,
  61. BMI_READ_SOC_REGISTER = 6,
  62. BMI_READ_SOC_WORD = 6,
  63. BMI_WRITE_SOC_REGISTER = 7,
  64. BMI_WRITE_SOC_WORD = 7,
  65. BMI_GET_TARGET_ID = 8,
  66. BMI_GET_TARGET_INFO = 8,
  67. BMI_ROMPATCH_INSTALL = 9,
  68. BMI_ROMPATCH_UNINSTALL = 10,
  69. BMI_ROMPATCH_ACTIVATE = 11,
  70. BMI_ROMPATCH_DEACTIVATE = 12,
  71. BMI_LZ_STREAM_START = 13, /* should be followed by LZ_DATA */
  72. BMI_LZ_DATA = 14,
  73. BMI_NVRAM_PROCESS = 15,
  74. };
  75. #define BMI_NVRAM_SEG_NAME_SZ 16
  76. #define BMI_PARAM_GET_EEPROM_BOARD_ID 0x10
  77. #define ATH10K_BMI_BOARD_ID_FROM_OTP_MASK 0x7c00
  78. #define ATH10K_BMI_BOARD_ID_FROM_OTP_LSB 10
  79. #define ATH10K_BMI_CHIP_ID_FROM_OTP_MASK 0x18000
  80. #define ATH10K_BMI_CHIP_ID_FROM_OTP_LSB 15
  81. #define ATH10K_BMI_BOARD_ID_STATUS_MASK 0xff
  82. struct bmi_cmd {
  83. __le32 id; /* enum bmi_cmd_id */
  84. union {
  85. struct {
  86. } done;
  87. struct {
  88. __le32 addr;
  89. __le32 len;
  90. } read_mem;
  91. struct {
  92. __le32 addr;
  93. __le32 len;
  94. u8 payload[0];
  95. } write_mem;
  96. struct {
  97. __le32 addr;
  98. __le32 param;
  99. } execute;
  100. struct {
  101. __le32 addr;
  102. } set_app_start;
  103. struct {
  104. __le32 addr;
  105. } read_soc_reg;
  106. struct {
  107. __le32 addr;
  108. __le32 value;
  109. } write_soc_reg;
  110. struct {
  111. } get_target_info;
  112. struct {
  113. __le32 rom_addr;
  114. __le32 ram_addr; /* or value */
  115. __le32 size;
  116. __le32 activate; /* 0=install, but dont activate */
  117. } rompatch_install;
  118. struct {
  119. __le32 patch_id;
  120. } rompatch_uninstall;
  121. struct {
  122. __le32 count;
  123. __le32 patch_ids[0]; /* length of @count */
  124. } rompatch_activate;
  125. struct {
  126. __le32 count;
  127. __le32 patch_ids[0]; /* length of @count */
  128. } rompatch_deactivate;
  129. struct {
  130. __le32 addr;
  131. } lz_start;
  132. struct {
  133. __le32 len; /* max BMI_MAX_DATA_SIZE */
  134. u8 payload[0]; /* length of @len */
  135. } lz_data;
  136. struct {
  137. u8 name[BMI_NVRAM_SEG_NAME_SZ];
  138. } nvram_process;
  139. u8 payload[BMI_MAX_CMDBUF_SIZE];
  140. };
  141. } __packed;
  142. union bmi_resp {
  143. struct {
  144. u8 payload[0];
  145. } read_mem;
  146. struct {
  147. __le32 result;
  148. } execute;
  149. struct {
  150. __le32 value;
  151. } read_soc_reg;
  152. struct {
  153. __le32 len;
  154. __le32 version;
  155. __le32 type;
  156. } get_target_info;
  157. struct {
  158. __le32 patch_id;
  159. } rompatch_install;
  160. struct {
  161. __le32 patch_id;
  162. } rompatch_uninstall;
  163. struct {
  164. /* 0 = nothing executed
  165. * otherwise = NVRAM segment return value */
  166. __le32 result;
  167. } nvram_process;
  168. u8 payload[BMI_MAX_CMDBUF_SIZE];
  169. } __packed;
  170. struct bmi_target_info {
  171. u32 version;
  172. u32 type;
  173. };
  174. /* in msec */
  175. #define BMI_COMMUNICATION_TIMEOUT_HZ (2 * HZ)
  176. #define BMI_CE_NUM_TO_TARG 0
  177. #define BMI_CE_NUM_TO_HOST 1
  178. void ath10k_bmi_start(struct ath10k *ar);
  179. int ath10k_bmi_done(struct ath10k *ar);
  180. int ath10k_bmi_get_target_info(struct ath10k *ar,
  181. struct bmi_target_info *target_info);
  182. int ath10k_bmi_read_memory(struct ath10k *ar, u32 address,
  183. void *buffer, u32 length);
  184. int ath10k_bmi_write_memory(struct ath10k *ar, u32 address,
  185. const void *buffer, u32 length);
  186. #define ath10k_bmi_read32(ar, item, val) \
  187. ({ \
  188. int ret; \
  189. u32 addr; \
  190. __le32 tmp; \
  191. \
  192. addr = host_interest_item_address(HI_ITEM(item)); \
  193. ret = ath10k_bmi_read_memory(ar, addr, (u8 *)&tmp, 4); \
  194. if (!ret) \
  195. *val = __le32_to_cpu(tmp); \
  196. ret; \
  197. })
  198. #define ath10k_bmi_write32(ar, item, val) \
  199. ({ \
  200. int ret; \
  201. u32 address; \
  202. __le32 v = __cpu_to_le32(val); \
  203. \
  204. address = host_interest_item_address(HI_ITEM(item)); \
  205. ret = ath10k_bmi_write_memory(ar, address, \
  206. (u8 *)&v, sizeof(v)); \
  207. ret; \
  208. })
  209. int ath10k_bmi_execute(struct ath10k *ar, u32 address, u32 param, u32 *result);
  210. int ath10k_bmi_lz_stream_start(struct ath10k *ar, u32 address);
  211. int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length);
  212. int ath10k_bmi_fast_download(struct ath10k *ar, u32 address,
  213. const void *buffer, u32 length);
  214. #endif /* _BMI_H_ */