swap.h 2.2 KB

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  1. /*
  2. * Copyright (c) 2015 Qualcomm Atheros, Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _SWAP_H_
  17. #define _SWAP_H_
  18. #define ATH10K_SWAP_CODE_SEG_BIN_LEN_MAX (512 * 1024)
  19. #define ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ 12
  20. #define ATH10K_SWAP_CODE_SEG_NUM_MAX 16
  21. /* Currently only one swap segment is supported */
  22. #define ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED 1
  23. struct ath10k_swap_code_seg_tlv {
  24. __le32 address;
  25. __le32 length;
  26. u8 data[0];
  27. } __packed;
  28. struct ath10k_swap_code_seg_tail {
  29. u8 magic_signature[ATH10K_SWAP_CODE_SEG_MAGIC_BYTES_SZ];
  30. __le32 bmi_write_addr;
  31. } __packed;
  32. union ath10k_swap_code_seg_item {
  33. struct ath10k_swap_code_seg_tlv tlv;
  34. struct ath10k_swap_code_seg_tail tail;
  35. } __packed;
  36. enum ath10k_swap_code_seg_bin_type {
  37. ATH10K_SWAP_CODE_SEG_BIN_TYPE_OTP,
  38. ATH10K_SWAP_CODE_SEG_BIN_TYPE_FW,
  39. ATH10K_SWAP_CODE_SEG_BIN_TYPE_UTF,
  40. };
  41. struct ath10k_swap_code_seg_hw_info {
  42. /* Swap binary image size */
  43. __le32 swap_size;
  44. __le32 num_segs;
  45. /* Swap data size */
  46. __le32 size;
  47. __le32 size_log2;
  48. __le32 bus_addr[ATH10K_SWAP_CODE_SEG_NUM_MAX];
  49. __le64 reserved[ATH10K_SWAP_CODE_SEG_NUM_MAX];
  50. } __packed;
  51. struct ath10k_swap_code_seg_info {
  52. struct ath10k_swap_code_seg_hw_info seg_hw_info;
  53. void *virt_address[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
  54. u32 target_addr;
  55. dma_addr_t paddr[ATH10K_SWAP_CODE_SEG_NUM_SUPPORTED];
  56. };
  57. int ath10k_swap_code_seg_configure(struct ath10k *ar,
  58. enum ath10k_swap_code_seg_bin_type type);
  59. void ath10k_swap_code_seg_release(struct ath10k *ar);
  60. int ath10k_swap_code_seg_init(struct ath10k *ar);
  61. #endif