bmi.h 7.9 KB

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  1. /*
  2. * Copyright (c) 2004-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef BMI_H
  18. #define BMI_H
  19. /*
  20. * Bootloader Messaging Interface (BMI)
  21. *
  22. * BMI is a very simple messaging interface used during initialization
  23. * to read memory, write memory, execute code, and to define an
  24. * application entry PC.
  25. *
  26. * It is used to download an application to ATH6KL, to provide
  27. * patches to code that is already resident on ATH6KL, and generally
  28. * to examine and modify state. The Host has an opportunity to use
  29. * BMI only once during bootup. Once the Host issues a BMI_DONE
  30. * command, this opportunity ends.
  31. *
  32. * The Host writes BMI requests to mailbox0, and reads BMI responses
  33. * from mailbox0. BMI requests all begin with a command
  34. * (see below for specific commands), and are followed by
  35. * command-specific data.
  36. *
  37. * Flow control:
  38. * The Host can only issue a command once the Target gives it a
  39. * "BMI Command Credit", using ATH6KL Counter #4. As soon as the
  40. * Target has completed a command, it issues another BMI Command
  41. * Credit (so the Host can issue the next command).
  42. *
  43. * BMI handles all required Target-side cache flushing.
  44. */
  45. /* BMI Commands */
  46. #define BMI_NO_COMMAND 0
  47. #define BMI_DONE 1
  48. /*
  49. * Semantics: Host is done using BMI
  50. * Request format:
  51. * u32 command (BMI_DONE)
  52. * Response format: none
  53. */
  54. #define BMI_READ_MEMORY 2
  55. /*
  56. * Semantics: Host reads ATH6KL memory
  57. * Request format:
  58. * u32 command (BMI_READ_MEMORY)
  59. * u32 address
  60. * u32 length, at most BMI_DATASZ_MAX
  61. * Response format:
  62. * u8 data[length]
  63. */
  64. #define BMI_WRITE_MEMORY 3
  65. /*
  66. * Semantics: Host writes ATH6KL memory
  67. * Request format:
  68. * u32 command (BMI_WRITE_MEMORY)
  69. * u32 address
  70. * u32 length, at most BMI_DATASZ_MAX
  71. * u8 data[length]
  72. * Response format: none
  73. */
  74. #define BMI_EXECUTE 4
  75. /*
  76. * Semantics: Causes ATH6KL to execute code
  77. * Request format:
  78. * u32 command (BMI_EXECUTE)
  79. * u32 address
  80. * u32 parameter
  81. * Response format:
  82. * u32 return value
  83. */
  84. #define BMI_SET_APP_START 5
  85. /*
  86. * Semantics: Set Target application starting address
  87. * Request format:
  88. * u32 command (BMI_SET_APP_START)
  89. * u32 address
  90. * Response format: none
  91. */
  92. #define BMI_READ_SOC_REGISTER 6
  93. /*
  94. * Semantics: Read a 32-bit Target SOC register.
  95. * Request format:
  96. * u32 command (BMI_READ_REGISTER)
  97. * u32 address
  98. * Response format:
  99. * u32 value
  100. */
  101. #define BMI_WRITE_SOC_REGISTER 7
  102. /*
  103. * Semantics: Write a 32-bit Target SOC register.
  104. * Request format:
  105. * u32 command (BMI_WRITE_REGISTER)
  106. * u32 address
  107. * u32 value
  108. *
  109. * Response format: none
  110. */
  111. #define BMI_GET_TARGET_ID 8
  112. #define BMI_GET_TARGET_INFO 8
  113. /*
  114. * Semantics: Fetch the 4-byte Target information
  115. * Request format:
  116. * u32 command (BMI_GET_TARGET_ID/INFO)
  117. * Response format1 (old firmware):
  118. * u32 TargetVersionID
  119. * Response format2 (newer firmware):
  120. * u32 TARGET_VERSION_SENTINAL
  121. * struct bmi_target_info;
  122. */
  123. #define TARGET_VERSION_SENTINAL 0xffffffff
  124. #define TARGET_TYPE_AR6003 3
  125. #define TARGET_TYPE_AR6004 5
  126. #define BMI_ROMPATCH_INSTALL 9
  127. /*
  128. * Semantics: Install a ROM Patch.
  129. * Request format:
  130. * u32 command (BMI_ROMPATCH_INSTALL)
  131. * u32 Target ROM Address
  132. * u32 Target RAM Address or Value (depending on Target Type)
  133. * u32 Size, in bytes
  134. * u32 Activate? 1-->activate;
  135. * 0-->install but do not activate
  136. * Response format:
  137. * u32 PatchID
  138. */
  139. #define BMI_ROMPATCH_UNINSTALL 10
  140. /*
  141. * Semantics: Uninstall a previously-installed ROM Patch,
  142. * automatically deactivating, if necessary.
  143. * Request format:
  144. * u32 command (BMI_ROMPATCH_UNINSTALL)
  145. * u32 PatchID
  146. *
  147. * Response format: none
  148. */
  149. #define BMI_ROMPATCH_ACTIVATE 11
  150. /*
  151. * Semantics: Activate a list of previously-installed ROM Patches.
  152. * Request format:
  153. * u32 command (BMI_ROMPATCH_ACTIVATE)
  154. * u32 rompatch_count
  155. * u32 PatchID[rompatch_count]
  156. *
  157. * Response format: none
  158. */
  159. #define BMI_ROMPATCH_DEACTIVATE 12
  160. /*
  161. * Semantics: Deactivate a list of active ROM Patches.
  162. * Request format:
  163. * u32 command (BMI_ROMPATCH_DEACTIVATE)
  164. * u32 rompatch_count
  165. * u32 PatchID[rompatch_count]
  166. *
  167. * Response format: none
  168. */
  169. #define BMI_LZ_STREAM_START 13
  170. /*
  171. * Semantics: Begin an LZ-compressed stream of input
  172. * which is to be uncompressed by the Target to an
  173. * output buffer at address. The output buffer must
  174. * be sufficiently large to hold the uncompressed
  175. * output from the compressed input stream. This BMI
  176. * command should be followed by a series of 1 or more
  177. * BMI_LZ_DATA commands.
  178. * u32 command (BMI_LZ_STREAM_START)
  179. * u32 address
  180. * Note: Not supported on all versions of ROM firmware.
  181. */
  182. #define BMI_LZ_DATA 14
  183. /*
  184. * Semantics: Host writes ATH6KL memory with LZ-compressed
  185. * data which is uncompressed by the Target. This command
  186. * must be preceded by a BMI_LZ_STREAM_START command. A series
  187. * of BMI_LZ_DATA commands are considered part of a single
  188. * input stream until another BMI_LZ_STREAM_START is issued.
  189. * Request format:
  190. * u32 command (BMI_LZ_DATA)
  191. * u32 length (of compressed data),
  192. * at most BMI_DATASZ_MAX
  193. * u8 CompressedData[length]
  194. * Response format: none
  195. * Note: Not supported on all versions of ROM firmware.
  196. */
  197. #define BMI_COMMUNICATION_TIMEOUT 1000 /* in msec */
  198. struct ath6kl;
  199. struct ath6kl_bmi_target_info {
  200. __le32 byte_count; /* size of this structure */
  201. __le32 version; /* target version id */
  202. __le32 type; /* target type */
  203. } __packed;
  204. #define ath6kl_bmi_write_hi32(ar, item, val) \
  205. ({ \
  206. u32 addr; \
  207. __le32 v; \
  208. \
  209. addr = ath6kl_get_hi_item_addr(ar, HI_ITEM(item)); \
  210. v = cpu_to_le32(val); \
  211. ath6kl_bmi_write(ar, addr, (u8 *) &v, sizeof(v)); \
  212. })
  213. #define ath6kl_bmi_read_hi32(ar, item, val) \
  214. ({ \
  215. u32 addr, *check_type = val; \
  216. __le32 tmp; \
  217. int ret; \
  218. \
  219. (void) (check_type == val); \
  220. addr = ath6kl_get_hi_item_addr(ar, HI_ITEM(item)); \
  221. ret = ath6kl_bmi_read(ar, addr, (u8 *) &tmp, 4); \
  222. if (!ret) \
  223. *val = le32_to_cpu(tmp); \
  224. ret; \
  225. })
  226. int ath6kl_bmi_init(struct ath6kl *ar);
  227. void ath6kl_bmi_cleanup(struct ath6kl *ar);
  228. void ath6kl_bmi_reset(struct ath6kl *ar);
  229. int ath6kl_bmi_done(struct ath6kl *ar);
  230. int ath6kl_bmi_get_target_info(struct ath6kl *ar,
  231. struct ath6kl_bmi_target_info *targ_info);
  232. int ath6kl_bmi_read(struct ath6kl *ar, u32 addr, u8 *buf, u32 len);
  233. int ath6kl_bmi_write(struct ath6kl *ar, u32 addr, u8 *buf, u32 len);
  234. int ath6kl_bmi_execute(struct ath6kl *ar,
  235. u32 addr, u32 *param);
  236. int ath6kl_bmi_set_app_start(struct ath6kl *ar,
  237. u32 addr);
  238. int ath6kl_bmi_reg_read(struct ath6kl *ar, u32 addr, u32 *param);
  239. int ath6kl_bmi_reg_write(struct ath6kl *ar, u32 addr, u32 param);
  240. int ath6kl_bmi_lz_data(struct ath6kl *ar,
  241. u8 *buf, u32 len);
  242. int ath6kl_bmi_lz_stream_start(struct ath6kl *ar,
  243. u32 addr);
  244. int ath6kl_bmi_fast_download(struct ath6kl *ar,
  245. u32 addr, u8 *buf, u32 len);
  246. #endif