hif-ops.h 5.0 KB

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  1. /*
  2. * Copyright (c) 2004-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef HIF_OPS_H
  18. #define HIF_OPS_H
  19. #include "hif.h"
  20. #include "debug.h"
  21. static inline int hif_read_write_sync(struct ath6kl *ar, u32 addr, u8 *buf,
  22. u32 len, u32 request)
  23. {
  24. ath6kl_dbg(ATH6KL_DBG_HIF,
  25. "hif %s sync addr 0x%x buf 0x%p len %d request 0x%x\n",
  26. (request & HIF_WRITE) ? "write" : "read",
  27. addr, buf, len, request);
  28. return ar->hif_ops->read_write_sync(ar, addr, buf, len, request);
  29. }
  30. static inline int hif_write_async(struct ath6kl *ar, u32 address, u8 *buffer,
  31. u32 length, u32 request,
  32. struct htc_packet *packet)
  33. {
  34. ath6kl_dbg(ATH6KL_DBG_HIF,
  35. "hif write async addr 0x%x buf 0x%p len %d request 0x%x\n",
  36. address, buffer, length, request);
  37. return ar->hif_ops->write_async(ar, address, buffer, length,
  38. request, packet);
  39. }
  40. static inline void ath6kl_hif_irq_enable(struct ath6kl *ar)
  41. {
  42. ath6kl_dbg(ATH6KL_DBG_HIF, "hif irq enable\n");
  43. return ar->hif_ops->irq_enable(ar);
  44. }
  45. static inline void ath6kl_hif_irq_disable(struct ath6kl *ar)
  46. {
  47. ath6kl_dbg(ATH6KL_DBG_HIF, "hif irq disable\n");
  48. return ar->hif_ops->irq_disable(ar);
  49. }
  50. static inline struct hif_scatter_req *hif_scatter_req_get(struct ath6kl *ar)
  51. {
  52. return ar->hif_ops->scatter_req_get(ar);
  53. }
  54. static inline void hif_scatter_req_add(struct ath6kl *ar,
  55. struct hif_scatter_req *s_req)
  56. {
  57. return ar->hif_ops->scatter_req_add(ar, s_req);
  58. }
  59. static inline int ath6kl_hif_enable_scatter(struct ath6kl *ar)
  60. {
  61. return ar->hif_ops->enable_scatter(ar);
  62. }
  63. static inline int ath6kl_hif_scat_req_rw(struct ath6kl *ar,
  64. struct hif_scatter_req *scat_req)
  65. {
  66. return ar->hif_ops->scat_req_rw(ar, scat_req);
  67. }
  68. static inline void ath6kl_hif_cleanup_scatter(struct ath6kl *ar)
  69. {
  70. return ar->hif_ops->cleanup_scatter(ar);
  71. }
  72. static inline int ath6kl_hif_suspend(struct ath6kl *ar,
  73. struct cfg80211_wowlan *wow)
  74. {
  75. ath6kl_dbg(ATH6KL_DBG_HIF, "hif suspend\n");
  76. return ar->hif_ops->suspend(ar, wow);
  77. }
  78. /*
  79. * Read from the ATH6KL through its diagnostic window. No cooperation from
  80. * the Target is required for this.
  81. */
  82. static inline int ath6kl_hif_diag_read32(struct ath6kl *ar, u32 address,
  83. u32 *value)
  84. {
  85. return ar->hif_ops->diag_read32(ar, address, value);
  86. }
  87. /*
  88. * Write to the ATH6KL through its diagnostic window. No cooperation from
  89. * the Target is required for this.
  90. */
  91. static inline int ath6kl_hif_diag_write32(struct ath6kl *ar, u32 address,
  92. __le32 value)
  93. {
  94. return ar->hif_ops->diag_write32(ar, address, value);
  95. }
  96. static inline int ath6kl_hif_bmi_read(struct ath6kl *ar, u8 *buf, u32 len)
  97. {
  98. return ar->hif_ops->bmi_read(ar, buf, len);
  99. }
  100. static inline int ath6kl_hif_bmi_write(struct ath6kl *ar, u8 *buf, u32 len)
  101. {
  102. return ar->hif_ops->bmi_write(ar, buf, len);
  103. }
  104. static inline int ath6kl_hif_resume(struct ath6kl *ar)
  105. {
  106. ath6kl_dbg(ATH6KL_DBG_HIF, "hif resume\n");
  107. return ar->hif_ops->resume(ar);
  108. }
  109. static inline int ath6kl_hif_power_on(struct ath6kl *ar)
  110. {
  111. ath6kl_dbg(ATH6KL_DBG_HIF, "hif power on\n");
  112. return ar->hif_ops->power_on(ar);
  113. }
  114. static inline int ath6kl_hif_power_off(struct ath6kl *ar)
  115. {
  116. ath6kl_dbg(ATH6KL_DBG_HIF, "hif power off\n");
  117. return ar->hif_ops->power_off(ar);
  118. }
  119. static inline void ath6kl_hif_stop(struct ath6kl *ar)
  120. {
  121. ath6kl_dbg(ATH6KL_DBG_HIF, "hif stop\n");
  122. ar->hif_ops->stop(ar);
  123. }
  124. static inline int ath6kl_hif_pipe_send(struct ath6kl *ar,
  125. u8 pipe, struct sk_buff *hdr_buf,
  126. struct sk_buff *buf)
  127. {
  128. ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe send\n");
  129. return ar->hif_ops->pipe_send(ar, pipe, hdr_buf, buf);
  130. }
  131. static inline void ath6kl_hif_pipe_get_default(struct ath6kl *ar,
  132. u8 *ul_pipe, u8 *dl_pipe)
  133. {
  134. ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe get default\n");
  135. ar->hif_ops->pipe_get_default(ar, ul_pipe, dl_pipe);
  136. }
  137. static inline int ath6kl_hif_pipe_map_service(struct ath6kl *ar,
  138. u16 service_id, u8 *ul_pipe,
  139. u8 *dl_pipe)
  140. {
  141. ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe get default\n");
  142. return ar->hif_ops->pipe_map_service(ar, service_id, ul_pipe, dl_pipe);
  143. }
  144. static inline u16 ath6kl_hif_pipe_get_free_queue_number(struct ath6kl *ar,
  145. u8 pipe)
  146. {
  147. ath6kl_dbg(ATH6KL_DBG_HIF, "hif pipe get free queue number\n");
  148. return ar->hif_ops->pipe_get_free_queue_number(ar, pipe);
  149. }
  150. #endif