phy_common.h 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457
  1. #ifndef LINUX_B43_PHY_COMMON_H_
  2. #define LINUX_B43_PHY_COMMON_H_
  3. #include <linux/types.h>
  4. #include <linux/nl80211.h>
  5. struct b43_wldev;
  6. /* Complex number using 2 32-bit signed integers */
  7. struct b43_c32 { s32 i, q; };
  8. #define CORDIC_CONVERT(value) (((value) >= 0) ? \
  9. ((((value) >> 15) + 1) >> 1) : \
  10. -((((-(value)) >> 15) + 1) >> 1))
  11. /* PHY register routing bits */
  12. #define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */
  13. #define B43_PHYROUTE_BASE 0x0000 /* Base registers */
  14. #define B43_PHYROUTE_OFDM_GPHY 0x0400 /* OFDM register routing for G-PHYs */
  15. #define B43_PHYROUTE_EXT_GPHY 0x0800 /* Extended G-PHY registers */
  16. #define B43_PHYROUTE_N_BMODE 0x0C00 /* N-PHY BMODE registers */
  17. /* CCK (B-PHY) registers. */
  18. #define B43_PHY_CCK(reg) ((reg) | B43_PHYROUTE_BASE)
  19. /* N-PHY registers. */
  20. #define B43_PHY_N(reg) ((reg) | B43_PHYROUTE_BASE)
  21. /* N-PHY BMODE registers. */
  22. #define B43_PHY_N_BMODE(reg) ((reg) | B43_PHYROUTE_N_BMODE)
  23. /* OFDM (A-PHY) registers. */
  24. #define B43_PHY_OFDM(reg) ((reg) | B43_PHYROUTE_OFDM_GPHY)
  25. /* Extended G-PHY registers. */
  26. #define B43_PHY_EXTG(reg) ((reg) | B43_PHYROUTE_EXT_GPHY)
  27. /* Masks for the PHY versioning registers. */
  28. #define B43_PHYVER_ANALOG 0xF000
  29. #define B43_PHYVER_ANALOG_SHIFT 12
  30. #define B43_PHYVER_TYPE 0x0F00
  31. #define B43_PHYVER_TYPE_SHIFT 8
  32. #define B43_PHYVER_VERSION 0x00FF
  33. /* PHY writes need to be flushed if we reach limit */
  34. #define B43_MAX_WRITES_IN_ROW 24
  35. /**
  36. * enum b43_interference_mitigation - Interference Mitigation mode
  37. *
  38. * @B43_INTERFMODE_NONE: Disabled
  39. * @B43_INTERFMODE_NONWLAN: Non-WLAN Interference Mitigation
  40. * @B43_INTERFMODE_MANUALWLAN: WLAN Interference Mitigation
  41. * @B43_INTERFMODE_AUTOWLAN: Automatic WLAN Interference Mitigation
  42. */
  43. enum b43_interference_mitigation {
  44. B43_INTERFMODE_NONE,
  45. B43_INTERFMODE_NONWLAN,
  46. B43_INTERFMODE_MANUALWLAN,
  47. B43_INTERFMODE_AUTOWLAN,
  48. };
  49. /* Antenna identifiers */
  50. enum {
  51. B43_ANTENNA0 = 0, /* Antenna 0 */
  52. B43_ANTENNA1 = 1, /* Antenna 1 */
  53. B43_ANTENNA_AUTO0 = 2, /* Automatic, starting with antenna 0 */
  54. B43_ANTENNA_AUTO1 = 3, /* Automatic, starting with antenna 1 */
  55. B43_ANTENNA2 = 4,
  56. B43_ANTENNA3 = 8,
  57. B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
  58. B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
  59. };
  60. /**
  61. * enum b43_txpwr_result - Return value for the recalc_txpower PHY op.
  62. *
  63. * @B43_TXPWR_RES_NEED_ADJUST: Values changed. Hardware adjustment is needed.
  64. * @B43_TXPWR_RES_DONE: No more work to do. Everything is done.
  65. */
  66. enum b43_txpwr_result {
  67. B43_TXPWR_RES_NEED_ADJUST,
  68. B43_TXPWR_RES_DONE,
  69. };
  70. /**
  71. * struct b43_phy_operations - Function pointers for PHY ops.
  72. *
  73. * @allocate: Allocate and initialise the PHY data structures.
  74. * Must not be NULL.
  75. * @free: Destroy and free the PHY data structures.
  76. * Must not be NULL.
  77. *
  78. * @prepare_structs: Prepare the PHY data structures.
  79. * The data structures allocated in @allocate are
  80. * initialized here.
  81. * Must not be NULL.
  82. * @prepare_hardware: Prepare the PHY. This is called before b43_chip_init to
  83. * do some early early PHY hardware init.
  84. * Can be NULL, if not required.
  85. * @init: Initialize the PHY.
  86. * Must not be NULL.
  87. * @exit: Shutdown the PHY.
  88. * Can be NULL, if not required.
  89. *
  90. * @phy_read: Read from a PHY register.
  91. * Must not be NULL.
  92. * @phy_write: Write to a PHY register.
  93. * Must not be NULL.
  94. * @phy_maskset: Maskset a PHY register, taking shortcuts.
  95. * If it is NULL, a generic algorithm is used.
  96. * @radio_read: Read from a Radio register.
  97. * Must not be NULL.
  98. * @radio_write: Write to a Radio register.
  99. * Must not be NULL.
  100. *
  101. * @supports_hwpctl: Returns a boolean whether Hardware Power Control
  102. * is supported or not.
  103. * If NULL, hwpctl is assumed to be never supported.
  104. * @software_rfkill: Turn the radio ON or OFF.
  105. * Possible state values are
  106. * RFKILL_STATE_SOFT_BLOCKED or
  107. * RFKILL_STATE_UNBLOCKED
  108. * Must not be NULL.
  109. * @switch_analog: Turn the Analog on/off.
  110. * Must not be NULL.
  111. * @switch_channel: Switch the radio to another channel.
  112. * Must not be NULL.
  113. * @get_default_chan: Just returns the default channel number.
  114. * Must not be NULL.
  115. * @set_rx_antenna: Set the antenna used for RX.
  116. * Can be NULL, if not supported.
  117. * @interf_mitigation: Switch the Interference Mitigation mode.
  118. * Can be NULL, if not supported.
  119. *
  120. * @recalc_txpower: Recalculate the transmission power parameters.
  121. * This callback has to recalculate the TX power settings,
  122. * but does not need to write them to the hardware, yet.
  123. * Returns enum b43_txpwr_result to indicate whether the hardware
  124. * needs to be adjusted.
  125. * If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower
  126. * will be called later.
  127. * If the parameter "ignore_tssi" is true, the TSSI values should
  128. * be ignored and a recalculation of the power settings should be
  129. * done even if the TSSI values did not change.
  130. * This function may sleep, but should not.
  131. * Must not be NULL.
  132. * @adjust_txpower: Write the previously calculated TX power settings
  133. * (from @recalc_txpower) to the hardware.
  134. * This function may sleep.
  135. * Can be NULL, if (and ONLY if) @recalc_txpower _always_
  136. * returns B43_TXPWR_RES_DONE.
  137. *
  138. * @pwork_15sec: Periodic work. Called every 15 seconds.
  139. * Can be NULL, if not required.
  140. * @pwork_60sec: Periodic work. Called every 60 seconds.
  141. * Can be NULL, if not required.
  142. */
  143. struct b43_phy_operations {
  144. /* Initialisation */
  145. int (*allocate)(struct b43_wldev *dev);
  146. void (*free)(struct b43_wldev *dev);
  147. void (*prepare_structs)(struct b43_wldev *dev);
  148. int (*prepare_hardware)(struct b43_wldev *dev);
  149. int (*init)(struct b43_wldev *dev);
  150. void (*exit)(struct b43_wldev *dev);
  151. /* Register access */
  152. u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
  153. void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
  154. void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set);
  155. u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
  156. void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
  157. /* Radio */
  158. bool (*supports_hwpctl)(struct b43_wldev *dev);
  159. void (*software_rfkill)(struct b43_wldev *dev, bool blocked);
  160. void (*switch_analog)(struct b43_wldev *dev, bool on);
  161. int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel);
  162. unsigned int (*get_default_chan)(struct b43_wldev *dev);
  163. void (*set_rx_antenna)(struct b43_wldev *dev, int antenna);
  164. int (*interf_mitigation)(struct b43_wldev *dev,
  165. enum b43_interference_mitigation new_mode);
  166. /* Transmission power adjustment */
  167. enum b43_txpwr_result (*recalc_txpower)(struct b43_wldev *dev,
  168. bool ignore_tssi);
  169. void (*adjust_txpower)(struct b43_wldev *dev);
  170. /* Misc */
  171. void (*pwork_15sec)(struct b43_wldev *dev);
  172. void (*pwork_60sec)(struct b43_wldev *dev);
  173. };
  174. struct b43_phy_a;
  175. struct b43_phy_g;
  176. struct b43_phy_n;
  177. struct b43_phy_lp;
  178. struct b43_phy_ht;
  179. struct b43_phy_lcn;
  180. struct b43_phy {
  181. /* Hardware operation callbacks. */
  182. const struct b43_phy_operations *ops;
  183. /* Most hardware context information is stored in the standard-
  184. * specific data structures pointed to by the pointers below.
  185. * Only one of them is valid (the currently enabled PHY). */
  186. #ifdef CONFIG_B43_DEBUG
  187. /* No union for debug build to force NULL derefs in buggy code. */
  188. struct {
  189. #else
  190. union {
  191. #endif
  192. /* A-PHY specific information */
  193. struct b43_phy_a *a;
  194. /* G-PHY specific information */
  195. struct b43_phy_g *g;
  196. /* N-PHY specific information */
  197. struct b43_phy_n *n;
  198. /* LP-PHY specific information */
  199. struct b43_phy_lp *lp;
  200. /* HT-PHY specific information */
  201. struct b43_phy_ht *ht;
  202. /* LCN-PHY specific information */
  203. struct b43_phy_lcn *lcn;
  204. /* AC-PHY specific information */
  205. struct b43_phy_ac *ac;
  206. };
  207. /* Band support flags. */
  208. bool supports_2ghz;
  209. bool supports_5ghz;
  210. /* Is GMODE (2 GHz mode) bit enabled? */
  211. bool gmode;
  212. /* After power reset full init has to be performed */
  213. bool do_full_init;
  214. /* Analog Type */
  215. u8 analog;
  216. /* B43_PHYTYPE_ */
  217. u8 type;
  218. /* PHY revision number. */
  219. u8 rev;
  220. /* Count writes since last read */
  221. u8 writes_counter;
  222. /* Radio versioning */
  223. u16 radio_manuf; /* Radio manufacturer */
  224. u16 radio_ver; /* Radio version */
  225. u8 radio_rev; /* Radio revision */
  226. /* Software state of the radio */
  227. bool radio_on;
  228. /* Desired TX power level (in dBm).
  229. * This is set by the user and adjusted in b43_phy_xmitpower(). */
  230. int desired_txpower;
  231. /* Hardware Power Control enabled? */
  232. bool hardware_power_control;
  233. /* The time (in absolute jiffies) when the next TX power output
  234. * check is needed. */
  235. unsigned long next_txpwr_check_time;
  236. /* Current channel */
  237. struct cfg80211_chan_def *chandef;
  238. unsigned int channel;
  239. /* PHY TX errors counter. */
  240. atomic_t txerr_cnt;
  241. #ifdef CONFIG_B43_DEBUG
  242. /* PHY registers locked (w.r.t. firmware) */
  243. bool phy_locked;
  244. /* Radio registers locked (w.r.t. firmware) */
  245. bool radio_locked;
  246. #endif /* B43_DEBUG */
  247. };
  248. /**
  249. * b43_phy_allocate - Allocate PHY structs
  250. * Allocate the PHY data structures, based on the current dev->phy.type
  251. */
  252. int b43_phy_allocate(struct b43_wldev *dev);
  253. /**
  254. * b43_phy_free - Free PHY structs
  255. */
  256. void b43_phy_free(struct b43_wldev *dev);
  257. /**
  258. * b43_phy_init - Initialise the PHY
  259. */
  260. int b43_phy_init(struct b43_wldev *dev);
  261. /**
  262. * b43_phy_exit - Cleanup PHY
  263. */
  264. void b43_phy_exit(struct b43_wldev *dev);
  265. /**
  266. * b43_has_hardware_pctl - Hardware Power Control supported?
  267. * Returns a boolean, whether hardware power control is supported.
  268. */
  269. bool b43_has_hardware_pctl(struct b43_wldev *dev);
  270. /**
  271. * b43_phy_read - 16bit PHY register read access
  272. */
  273. u16 b43_phy_read(struct b43_wldev *dev, u16 reg);
  274. /**
  275. * b43_phy_write - 16bit PHY register write access
  276. */
  277. void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);
  278. /**
  279. * b43_phy_copy - copy contents of 16bit PHY register to another
  280. */
  281. void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg);
  282. /**
  283. * b43_phy_mask - Mask a PHY register with a mask
  284. */
  285. void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);
  286. /**
  287. * b43_phy_set - OR a PHY register with a bitmap
  288. */
  289. void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
  290. /**
  291. * b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
  292. */
  293. void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
  294. /**
  295. * b43_radio_read - 16bit Radio register read access
  296. */
  297. u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
  298. #define b43_radio_read16 b43_radio_read /* DEPRECATED */
  299. /**
  300. * b43_radio_write - 16bit Radio register write access
  301. */
  302. void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
  303. #define b43_radio_write16 b43_radio_write /* DEPRECATED */
  304. /**
  305. * b43_radio_mask - Mask a 16bit radio register with a mask
  306. */
  307. void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);
  308. /**
  309. * b43_radio_set - OR a 16bit radio register with a bitmap
  310. */
  311. void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);
  312. /**
  313. * b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
  314. */
  315. void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
  316. /**
  317. * b43_radio_wait_value - Waits for a given value in masked register read
  318. */
  319. bool b43_radio_wait_value(struct b43_wldev *dev, u16 offset, u16 mask,
  320. u16 value, int delay, int timeout);
  321. /**
  322. * b43_radio_lock - Lock firmware radio register access
  323. */
  324. void b43_radio_lock(struct b43_wldev *dev);
  325. /**
  326. * b43_radio_unlock - Unlock firmware radio register access
  327. */
  328. void b43_radio_unlock(struct b43_wldev *dev);
  329. /**
  330. * b43_phy_lock - Lock firmware PHY register access
  331. */
  332. void b43_phy_lock(struct b43_wldev *dev);
  333. /**
  334. * b43_phy_unlock - Unlock firmware PHY register access
  335. */
  336. void b43_phy_unlock(struct b43_wldev *dev);
  337. void b43_phy_put_into_reset(struct b43_wldev *dev);
  338. void b43_phy_take_out_of_reset(struct b43_wldev *dev);
  339. /**
  340. * b43_switch_channel - Switch to another channel
  341. */
  342. int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
  343. /**
  344. * b43_software_rfkill - Turn the radio ON or OFF in software.
  345. */
  346. void b43_software_rfkill(struct b43_wldev *dev, bool blocked);
  347. /**
  348. * b43_phy_txpower_check - Check TX power output.
  349. *
  350. * Compare the current TX power output to the desired power emission
  351. * and schedule an adjustment in case it mismatches.
  352. *
  353. * @flags: OR'ed enum b43_phy_txpower_check_flags flags.
  354. * See the docs below.
  355. */
  356. void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags);
  357. /**
  358. * enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check()
  359. *
  360. * @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo
  361. * the check now.
  362. * @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average
  363. * TSSI did not change.
  364. */
  365. enum b43_phy_txpower_check_flags {
  366. B43_TXPWR_IGNORE_TIME = (1 << 0),
  367. B43_TXPWR_IGNORE_TSSI = (1 << 1),
  368. };
  369. struct work_struct;
  370. void b43_phy_txpower_adjust_work(struct work_struct *work);
  371. /**
  372. * b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM.
  373. *
  374. * @shm_offset: The SHM address to read the values from.
  375. *
  376. * Returns the average of the 4 TSSI values, or a negative error code.
  377. */
  378. int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
  379. /**
  380. * b43_phy_switch_analog_generic - Generic PHY operation for switching the Analog.
  381. *
  382. * It does the switching based on the PHY0 core register.
  383. * Do _not_ call this directly. Only use it as a switch_analog callback
  384. * for struct b43_phy_operations.
  385. */
  386. void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
  387. bool b43_is_40mhz(struct b43_wldev *dev);
  388. void b43_phy_force_clock(struct b43_wldev *dev, bool force);
  389. struct b43_c32 b43_cordic(int theta);
  390. #endif /* LINUX_B43_PHY_COMMON_H_ */