pio.c 20 KB

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  1. /*
  2. Broadcom B43 wireless driver
  3. PIO data transfer
  4. Copyright (c) 2005-2008 Michael Buesch <m@bues.ch>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; see the file COPYING. If not, write to
  15. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  16. Boston, MA 02110-1301, USA.
  17. */
  18. #include "b43.h"
  19. #include "pio.h"
  20. #include "dma.h"
  21. #include "main.h"
  22. #include "xmit.h"
  23. #include <linux/delay.h>
  24. #include <linux/sched.h>
  25. #include <linux/slab.h>
  26. static u16 generate_cookie(struct b43_pio_txqueue *q,
  27. struct b43_pio_txpacket *pack)
  28. {
  29. u16 cookie;
  30. /* Use the upper 4 bits of the cookie as
  31. * PIO controller ID and store the packet index number
  32. * in the lower 12 bits.
  33. * Note that the cookie must never be 0, as this
  34. * is a special value used in RX path.
  35. * It can also not be 0xFFFF because that is special
  36. * for multicast frames.
  37. */
  38. cookie = (((u16)q->index + 1) << 12);
  39. cookie |= pack->index;
  40. return cookie;
  41. }
  42. static
  43. struct b43_pio_txqueue *parse_cookie(struct b43_wldev *dev,
  44. u16 cookie,
  45. struct b43_pio_txpacket **pack)
  46. {
  47. struct b43_pio *pio = &dev->pio;
  48. struct b43_pio_txqueue *q = NULL;
  49. unsigned int pack_index;
  50. switch (cookie & 0xF000) {
  51. case 0x1000:
  52. q = pio->tx_queue_AC_BK;
  53. break;
  54. case 0x2000:
  55. q = pio->tx_queue_AC_BE;
  56. break;
  57. case 0x3000:
  58. q = pio->tx_queue_AC_VI;
  59. break;
  60. case 0x4000:
  61. q = pio->tx_queue_AC_VO;
  62. break;
  63. case 0x5000:
  64. q = pio->tx_queue_mcast;
  65. break;
  66. }
  67. if (B43_WARN_ON(!q))
  68. return NULL;
  69. pack_index = (cookie & 0x0FFF);
  70. if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets)))
  71. return NULL;
  72. *pack = &q->packets[pack_index];
  73. return q;
  74. }
  75. static u16 index_to_pioqueue_base(struct b43_wldev *dev,
  76. unsigned int index)
  77. {
  78. static const u16 bases[] = {
  79. B43_MMIO_PIO_BASE0,
  80. B43_MMIO_PIO_BASE1,
  81. B43_MMIO_PIO_BASE2,
  82. B43_MMIO_PIO_BASE3,
  83. B43_MMIO_PIO_BASE4,
  84. B43_MMIO_PIO_BASE5,
  85. B43_MMIO_PIO_BASE6,
  86. B43_MMIO_PIO_BASE7,
  87. };
  88. static const u16 bases_rev11[] = {
  89. B43_MMIO_PIO11_BASE0,
  90. B43_MMIO_PIO11_BASE1,
  91. B43_MMIO_PIO11_BASE2,
  92. B43_MMIO_PIO11_BASE3,
  93. B43_MMIO_PIO11_BASE4,
  94. B43_MMIO_PIO11_BASE5,
  95. };
  96. if (dev->dev->core_rev >= 11) {
  97. B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
  98. return bases_rev11[index];
  99. }
  100. B43_WARN_ON(index >= ARRAY_SIZE(bases));
  101. return bases[index];
  102. }
  103. static u16 pio_txqueue_offset(struct b43_wldev *dev)
  104. {
  105. if (dev->dev->core_rev >= 11)
  106. return 0x18;
  107. return 0;
  108. }
  109. static u16 pio_rxqueue_offset(struct b43_wldev *dev)
  110. {
  111. if (dev->dev->core_rev >= 11)
  112. return 0x38;
  113. return 8;
  114. }
  115. static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
  116. unsigned int index)
  117. {
  118. struct b43_pio_txqueue *q;
  119. struct b43_pio_txpacket *p;
  120. unsigned int i;
  121. q = kzalloc(sizeof(*q), GFP_KERNEL);
  122. if (!q)
  123. return NULL;
  124. q->dev = dev;
  125. q->rev = dev->dev->core_rev;
  126. q->mmio_base = index_to_pioqueue_base(dev, index) +
  127. pio_txqueue_offset(dev);
  128. q->index = index;
  129. q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS;
  130. if (q->rev >= 8) {
  131. q->buffer_size = 1920; //FIXME this constant is wrong.
  132. } else {
  133. q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE);
  134. q->buffer_size -= 80;
  135. }
  136. INIT_LIST_HEAD(&q->packets_list);
  137. for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
  138. p = &(q->packets[i]);
  139. INIT_LIST_HEAD(&p->list);
  140. p->index = i;
  141. p->queue = q;
  142. list_add(&p->list, &q->packets_list);
  143. }
  144. return q;
  145. }
  146. static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
  147. unsigned int index)
  148. {
  149. struct b43_pio_rxqueue *q;
  150. q = kzalloc(sizeof(*q), GFP_KERNEL);
  151. if (!q)
  152. return NULL;
  153. q->dev = dev;
  154. q->rev = dev->dev->core_rev;
  155. q->mmio_base = index_to_pioqueue_base(dev, index) +
  156. pio_rxqueue_offset(dev);
  157. /* Enable Direct FIFO RX (PIO) on the engine. */
  158. b43_dma_direct_fifo_rx(dev, index, 1);
  159. return q;
  160. }
  161. static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q)
  162. {
  163. struct b43_pio_txpacket *pack;
  164. unsigned int i;
  165. for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
  166. pack = &(q->packets[i]);
  167. if (pack->skb) {
  168. ieee80211_free_txskb(q->dev->wl->hw, pack->skb);
  169. pack->skb = NULL;
  170. }
  171. }
  172. }
  173. static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q,
  174. const char *name)
  175. {
  176. if (!q)
  177. return;
  178. b43_pio_cancel_tx_packets(q);
  179. kfree(q);
  180. }
  181. static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q,
  182. const char *name)
  183. {
  184. if (!q)
  185. return;
  186. kfree(q);
  187. }
  188. #define destroy_queue_tx(pio, queue) do { \
  189. b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
  190. (pio)->queue = NULL; \
  191. } while (0)
  192. #define destroy_queue_rx(pio, queue) do { \
  193. b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
  194. (pio)->queue = NULL; \
  195. } while (0)
  196. void b43_pio_free(struct b43_wldev *dev)
  197. {
  198. struct b43_pio *pio;
  199. if (!b43_using_pio_transfers(dev))
  200. return;
  201. pio = &dev->pio;
  202. destroy_queue_rx(pio, rx_queue);
  203. destroy_queue_tx(pio, tx_queue_mcast);
  204. destroy_queue_tx(pio, tx_queue_AC_VO);
  205. destroy_queue_tx(pio, tx_queue_AC_VI);
  206. destroy_queue_tx(pio, tx_queue_AC_BE);
  207. destroy_queue_tx(pio, tx_queue_AC_BK);
  208. }
  209. int b43_pio_init(struct b43_wldev *dev)
  210. {
  211. struct b43_pio *pio = &dev->pio;
  212. int err = -ENOMEM;
  213. b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
  214. & ~B43_MACCTL_BE);
  215. b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0);
  216. pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0);
  217. if (!pio->tx_queue_AC_BK)
  218. goto out;
  219. pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1);
  220. if (!pio->tx_queue_AC_BE)
  221. goto err_destroy_bk;
  222. pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2);
  223. if (!pio->tx_queue_AC_VI)
  224. goto err_destroy_be;
  225. pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3);
  226. if (!pio->tx_queue_AC_VO)
  227. goto err_destroy_vi;
  228. pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4);
  229. if (!pio->tx_queue_mcast)
  230. goto err_destroy_vo;
  231. pio->rx_queue = b43_setup_pioqueue_rx(dev, 0);
  232. if (!pio->rx_queue)
  233. goto err_destroy_mcast;
  234. b43dbg(dev->wl, "PIO initialized\n");
  235. err = 0;
  236. out:
  237. return err;
  238. err_destroy_mcast:
  239. destroy_queue_tx(pio, tx_queue_mcast);
  240. err_destroy_vo:
  241. destroy_queue_tx(pio, tx_queue_AC_VO);
  242. err_destroy_vi:
  243. destroy_queue_tx(pio, tx_queue_AC_VI);
  244. err_destroy_be:
  245. destroy_queue_tx(pio, tx_queue_AC_BE);
  246. err_destroy_bk:
  247. destroy_queue_tx(pio, tx_queue_AC_BK);
  248. return err;
  249. }
  250. /* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
  251. static struct b43_pio_txqueue *select_queue_by_priority(struct b43_wldev *dev,
  252. u8 queue_prio)
  253. {
  254. struct b43_pio_txqueue *q;
  255. if (dev->qos_enabled) {
  256. /* 0 = highest priority */
  257. switch (queue_prio) {
  258. default:
  259. B43_WARN_ON(1);
  260. /* fallthrough */
  261. case 0:
  262. q = dev->pio.tx_queue_AC_VO;
  263. break;
  264. case 1:
  265. q = dev->pio.tx_queue_AC_VI;
  266. break;
  267. case 2:
  268. q = dev->pio.tx_queue_AC_BE;
  269. break;
  270. case 3:
  271. q = dev->pio.tx_queue_AC_BK;
  272. break;
  273. }
  274. } else
  275. q = dev->pio.tx_queue_AC_BE;
  276. return q;
  277. }
  278. static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
  279. u16 ctl,
  280. const void *_data,
  281. unsigned int data_len)
  282. {
  283. struct b43_wldev *dev = q->dev;
  284. struct b43_wl *wl = dev->wl;
  285. const u8 *data = _data;
  286. ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
  287. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  288. b43_block_write(dev, data, (data_len & ~1),
  289. q->mmio_base + B43_PIO_TXDATA,
  290. sizeof(u16));
  291. if (data_len & 1) {
  292. u8 *tail = wl->pio_tailspace;
  293. BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
  294. /* Write the last byte. */
  295. ctl &= ~B43_PIO_TXCTL_WRITEHI;
  296. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  297. tail[0] = data[data_len - 1];
  298. tail[1] = 0;
  299. b43_block_write(dev, tail, 2,
  300. q->mmio_base + B43_PIO_TXDATA,
  301. sizeof(u16));
  302. }
  303. return ctl;
  304. }
  305. static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack,
  306. const u8 *hdr, unsigned int hdrlen)
  307. {
  308. struct b43_pio_txqueue *q = pack->queue;
  309. const char *frame = pack->skb->data;
  310. unsigned int frame_len = pack->skb->len;
  311. u16 ctl;
  312. ctl = b43_piotx_read16(q, B43_PIO_TXCTL);
  313. ctl |= B43_PIO_TXCTL_FREADY;
  314. ctl &= ~B43_PIO_TXCTL_EOF;
  315. /* Transfer the header data. */
  316. ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen);
  317. /* Transfer the frame data. */
  318. ctl = tx_write_2byte_queue(q, ctl, frame, frame_len);
  319. ctl |= B43_PIO_TXCTL_EOF;
  320. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  321. }
  322. static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
  323. u32 ctl,
  324. const void *_data,
  325. unsigned int data_len)
  326. {
  327. struct b43_wldev *dev = q->dev;
  328. struct b43_wl *wl = dev->wl;
  329. const u8 *data = _data;
  330. ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 |
  331. B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
  332. b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
  333. b43_block_write(dev, data, (data_len & ~3),
  334. q->mmio_base + B43_PIO8_TXDATA,
  335. sizeof(u32));
  336. if (data_len & 3) {
  337. u8 *tail = wl->pio_tailspace;
  338. BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
  339. memset(tail, 0, 4);
  340. /* Write the last few bytes. */
  341. ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
  342. B43_PIO8_TXCTL_24_31);
  343. switch (data_len & 3) {
  344. case 3:
  345. ctl |= B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_8_15;
  346. tail[0] = data[data_len - 3];
  347. tail[1] = data[data_len - 2];
  348. tail[2] = data[data_len - 1];
  349. break;
  350. case 2:
  351. ctl |= B43_PIO8_TXCTL_8_15;
  352. tail[0] = data[data_len - 2];
  353. tail[1] = data[data_len - 1];
  354. break;
  355. case 1:
  356. tail[0] = data[data_len - 1];
  357. break;
  358. }
  359. b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
  360. b43_block_write(dev, tail, 4,
  361. q->mmio_base + B43_PIO8_TXDATA,
  362. sizeof(u32));
  363. }
  364. return ctl;
  365. }
  366. static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack,
  367. const u8 *hdr, unsigned int hdrlen)
  368. {
  369. struct b43_pio_txqueue *q = pack->queue;
  370. const char *frame = pack->skb->data;
  371. unsigned int frame_len = pack->skb->len;
  372. u32 ctl;
  373. ctl = b43_piotx_read32(q, B43_PIO8_TXCTL);
  374. ctl |= B43_PIO8_TXCTL_FREADY;
  375. ctl &= ~B43_PIO8_TXCTL_EOF;
  376. /* Transfer the header data. */
  377. ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen);
  378. /* Transfer the frame data. */
  379. ctl = tx_write_4byte_queue(q, ctl, frame, frame_len);
  380. ctl |= B43_PIO8_TXCTL_EOF;
  381. b43_piotx_write32(q, B43_PIO_TXCTL, ctl);
  382. }
  383. static int pio_tx_frame(struct b43_pio_txqueue *q,
  384. struct sk_buff *skb)
  385. {
  386. struct b43_wldev *dev = q->dev;
  387. struct b43_wl *wl = dev->wl;
  388. struct b43_pio_txpacket *pack;
  389. u16 cookie;
  390. int err;
  391. unsigned int hdrlen;
  392. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  393. struct b43_txhdr *txhdr = (struct b43_txhdr *)wl->pio_scratchspace;
  394. B43_WARN_ON(list_empty(&q->packets_list));
  395. pack = list_entry(q->packets_list.next,
  396. struct b43_pio_txpacket, list);
  397. cookie = generate_cookie(q, pack);
  398. hdrlen = b43_txhdr_size(dev);
  399. BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(struct b43_txhdr));
  400. B43_WARN_ON(sizeof(wl->pio_scratchspace) < hdrlen);
  401. err = b43_generate_txhdr(dev, (u8 *)txhdr, skb,
  402. info, cookie);
  403. if (err)
  404. return err;
  405. if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
  406. /* Tell the firmware about the cookie of the last
  407. * mcast frame, so it can clear the more-data bit in it. */
  408. b43_shm_write16(dev, B43_SHM_SHARED,
  409. B43_SHM_SH_MCASTCOOKIE, cookie);
  410. }
  411. pack->skb = skb;
  412. if (q->rev >= 8)
  413. pio_tx_frame_4byte_queue(pack, (const u8 *)txhdr, hdrlen);
  414. else
  415. pio_tx_frame_2byte_queue(pack, (const u8 *)txhdr, hdrlen);
  416. /* Remove it from the list of available packet slots.
  417. * It will be put back when we receive the status report. */
  418. list_del(&pack->list);
  419. /* Update the queue statistics. */
  420. q->buffer_used += roundup(skb->len + hdrlen, 4);
  421. q->free_packet_slots -= 1;
  422. return 0;
  423. }
  424. int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
  425. {
  426. struct b43_pio_txqueue *q;
  427. struct ieee80211_hdr *hdr;
  428. unsigned int hdrlen, total_len;
  429. int err = 0;
  430. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  431. hdr = (struct ieee80211_hdr *)skb->data;
  432. if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
  433. /* The multicast queue will be sent after the DTIM. */
  434. q = dev->pio.tx_queue_mcast;
  435. /* Set the frame More-Data bit. Ucode will clear it
  436. * for us on the last frame. */
  437. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
  438. } else {
  439. /* Decide by priority where to put this frame. */
  440. q = select_queue_by_priority(dev, skb_get_queue_mapping(skb));
  441. }
  442. hdrlen = b43_txhdr_size(dev);
  443. total_len = roundup(skb->len + hdrlen, 4);
  444. if (unlikely(total_len > q->buffer_size)) {
  445. err = -ENOBUFS;
  446. b43dbg(dev->wl, "PIO: TX packet longer than queue.\n");
  447. goto out;
  448. }
  449. if (unlikely(q->free_packet_slots == 0)) {
  450. err = -ENOBUFS;
  451. b43warn(dev->wl, "PIO: TX packet overflow.\n");
  452. goto out;
  453. }
  454. B43_WARN_ON(q->buffer_used > q->buffer_size);
  455. if (total_len > (q->buffer_size - q->buffer_used)) {
  456. /* Not enough memory on the queue. */
  457. err = -EBUSY;
  458. ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
  459. q->stopped = true;
  460. goto out;
  461. }
  462. /* Assign the queue number to the ring (if not already done before)
  463. * so TX status handling can use it. The mac80211-queue to b43-queue
  464. * mapping is static, so we don't need to store it per frame. */
  465. q->queue_prio = skb_get_queue_mapping(skb);
  466. err = pio_tx_frame(q, skb);
  467. if (unlikely(err == -ENOKEY)) {
  468. /* Drop this packet, as we don't have the encryption key
  469. * anymore and must not transmit it unencrypted. */
  470. ieee80211_free_txskb(dev->wl->hw, skb);
  471. err = 0;
  472. goto out;
  473. }
  474. if (unlikely(err)) {
  475. b43err(dev->wl, "PIO transmission failure\n");
  476. goto out;
  477. }
  478. B43_WARN_ON(q->buffer_used > q->buffer_size);
  479. if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) ||
  480. (q->free_packet_slots == 0)) {
  481. /* The queue is full. */
  482. ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
  483. q->stopped = true;
  484. }
  485. out:
  486. return err;
  487. }
  488. void b43_pio_handle_txstatus(struct b43_wldev *dev,
  489. const struct b43_txstatus *status)
  490. {
  491. struct b43_pio_txqueue *q;
  492. struct b43_pio_txpacket *pack = NULL;
  493. unsigned int total_len;
  494. struct ieee80211_tx_info *info;
  495. q = parse_cookie(dev, status->cookie, &pack);
  496. if (unlikely(!q))
  497. return;
  498. B43_WARN_ON(!pack);
  499. info = IEEE80211_SKB_CB(pack->skb);
  500. b43_fill_txstatus_report(dev, info, status);
  501. total_len = pack->skb->len + b43_txhdr_size(dev);
  502. total_len = roundup(total_len, 4);
  503. q->buffer_used -= total_len;
  504. q->free_packet_slots += 1;
  505. ieee80211_tx_status(dev->wl->hw, pack->skb);
  506. pack->skb = NULL;
  507. list_add(&pack->list, &q->packets_list);
  508. if (q->stopped) {
  509. ieee80211_wake_queue(dev->wl->hw, q->queue_prio);
  510. q->stopped = false;
  511. }
  512. }
  513. /* Returns whether we should fetch another frame. */
  514. static bool pio_rx_frame(struct b43_pio_rxqueue *q)
  515. {
  516. struct b43_wldev *dev = q->dev;
  517. struct b43_wl *wl = dev->wl;
  518. u16 len;
  519. u32 macstat = 0;
  520. unsigned int i, padding;
  521. struct sk_buff *skb;
  522. const char *err_msg = NULL;
  523. struct b43_rxhdr_fw4 *rxhdr =
  524. (struct b43_rxhdr_fw4 *)wl->pio_scratchspace;
  525. size_t rxhdr_size = sizeof(*rxhdr);
  526. BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(*rxhdr));
  527. switch (dev->fw.hdr_format) {
  528. case B43_FW_HDR_410:
  529. case B43_FW_HDR_351:
  530. rxhdr_size -= sizeof(rxhdr->format_598) -
  531. sizeof(rxhdr->format_351);
  532. break;
  533. case B43_FW_HDR_598:
  534. break;
  535. }
  536. memset(rxhdr, 0, rxhdr_size);
  537. /* Check if we have data and wait for it to get ready. */
  538. if (q->rev >= 8) {
  539. u32 ctl;
  540. ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
  541. if (!(ctl & B43_PIO8_RXCTL_FRAMERDY))
  542. return false;
  543. b43_piorx_write32(q, B43_PIO8_RXCTL,
  544. B43_PIO8_RXCTL_FRAMERDY);
  545. for (i = 0; i < 10; i++) {
  546. ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
  547. if (ctl & B43_PIO8_RXCTL_DATARDY)
  548. goto data_ready;
  549. udelay(10);
  550. }
  551. } else {
  552. u16 ctl;
  553. ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
  554. if (!(ctl & B43_PIO_RXCTL_FRAMERDY))
  555. return false;
  556. b43_piorx_write16(q, B43_PIO_RXCTL,
  557. B43_PIO_RXCTL_FRAMERDY);
  558. for (i = 0; i < 10; i++) {
  559. ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
  560. if (ctl & B43_PIO_RXCTL_DATARDY)
  561. goto data_ready;
  562. udelay(10);
  563. }
  564. }
  565. b43dbg(q->dev->wl, "PIO RX timed out\n");
  566. return true;
  567. data_ready:
  568. /* Get the preamble (RX header) */
  569. if (q->rev >= 8) {
  570. b43_block_read(dev, rxhdr, rxhdr_size,
  571. q->mmio_base + B43_PIO8_RXDATA,
  572. sizeof(u32));
  573. } else {
  574. b43_block_read(dev, rxhdr, rxhdr_size,
  575. q->mmio_base + B43_PIO_RXDATA,
  576. sizeof(u16));
  577. }
  578. /* Sanity checks. */
  579. len = le16_to_cpu(rxhdr->frame_len);
  580. if (unlikely(len > 0x700)) {
  581. err_msg = "len > 0x700";
  582. goto rx_error;
  583. }
  584. if (unlikely(len == 0)) {
  585. err_msg = "len == 0";
  586. goto rx_error;
  587. }
  588. switch (dev->fw.hdr_format) {
  589. case B43_FW_HDR_598:
  590. macstat = le32_to_cpu(rxhdr->format_598.mac_status);
  591. break;
  592. case B43_FW_HDR_410:
  593. case B43_FW_HDR_351:
  594. macstat = le32_to_cpu(rxhdr->format_351.mac_status);
  595. break;
  596. }
  597. if (macstat & B43_RX_MAC_FCSERR) {
  598. if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
  599. /* Drop frames with failed FCS. */
  600. err_msg = "Frame FCS error";
  601. goto rx_error;
  602. }
  603. }
  604. /* We always pad 2 bytes, as that's what upstream code expects
  605. * due to the RX-header being 30 bytes. In case the frame is
  606. * unaligned, we pad another 2 bytes. */
  607. padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
  608. skb = dev_alloc_skb(len + padding + 2);
  609. if (unlikely(!skb)) {
  610. err_msg = "Out of memory";
  611. goto rx_error;
  612. }
  613. skb_reserve(skb, 2);
  614. skb_put(skb, len + padding);
  615. if (q->rev >= 8) {
  616. b43_block_read(dev, skb->data + padding, (len & ~3),
  617. q->mmio_base + B43_PIO8_RXDATA,
  618. sizeof(u32));
  619. if (len & 3) {
  620. u8 *tail = wl->pio_tailspace;
  621. BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
  622. /* Read the last few bytes. */
  623. b43_block_read(dev, tail, 4,
  624. q->mmio_base + B43_PIO8_RXDATA,
  625. sizeof(u32));
  626. switch (len & 3) {
  627. case 3:
  628. skb->data[len + padding - 3] = tail[0];
  629. skb->data[len + padding - 2] = tail[1];
  630. skb->data[len + padding - 1] = tail[2];
  631. break;
  632. case 2:
  633. skb->data[len + padding - 2] = tail[0];
  634. skb->data[len + padding - 1] = tail[1];
  635. break;
  636. case 1:
  637. skb->data[len + padding - 1] = tail[0];
  638. break;
  639. }
  640. }
  641. } else {
  642. b43_block_read(dev, skb->data + padding, (len & ~1),
  643. q->mmio_base + B43_PIO_RXDATA,
  644. sizeof(u16));
  645. if (len & 1) {
  646. u8 *tail = wl->pio_tailspace;
  647. BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
  648. /* Read the last byte. */
  649. b43_block_read(dev, tail, 2,
  650. q->mmio_base + B43_PIO_RXDATA,
  651. sizeof(u16));
  652. skb->data[len + padding - 1] = tail[0];
  653. }
  654. }
  655. b43_rx(q->dev, skb, rxhdr);
  656. return true;
  657. rx_error:
  658. if (err_msg)
  659. b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg);
  660. if (q->rev >= 8)
  661. b43_piorx_write32(q, B43_PIO8_RXCTL, B43_PIO8_RXCTL_DATARDY);
  662. else
  663. b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY);
  664. return true;
  665. }
  666. void b43_pio_rx(struct b43_pio_rxqueue *q)
  667. {
  668. unsigned int count = 0;
  669. bool stop;
  670. while (1) {
  671. stop = (pio_rx_frame(q) == 0);
  672. if (stop)
  673. break;
  674. cond_resched();
  675. if (WARN_ON_ONCE(++count > 10000))
  676. break;
  677. }
  678. }
  679. static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q)
  680. {
  681. if (q->rev >= 8) {
  682. b43_piotx_write32(q, B43_PIO8_TXCTL,
  683. b43_piotx_read32(q, B43_PIO8_TXCTL)
  684. | B43_PIO8_TXCTL_SUSPREQ);
  685. } else {
  686. b43_piotx_write16(q, B43_PIO_TXCTL,
  687. b43_piotx_read16(q, B43_PIO_TXCTL)
  688. | B43_PIO_TXCTL_SUSPREQ);
  689. }
  690. }
  691. static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q)
  692. {
  693. if (q->rev >= 8) {
  694. b43_piotx_write32(q, B43_PIO8_TXCTL,
  695. b43_piotx_read32(q, B43_PIO8_TXCTL)
  696. & ~B43_PIO8_TXCTL_SUSPREQ);
  697. } else {
  698. b43_piotx_write16(q, B43_PIO_TXCTL,
  699. b43_piotx_read16(q, B43_PIO_TXCTL)
  700. & ~B43_PIO_TXCTL_SUSPREQ);
  701. }
  702. }
  703. void b43_pio_tx_suspend(struct b43_wldev *dev)
  704. {
  705. b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
  706. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK);
  707. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE);
  708. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI);
  709. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO);
  710. b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast);
  711. }
  712. void b43_pio_tx_resume(struct b43_wldev *dev)
  713. {
  714. b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast);
  715. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO);
  716. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI);
  717. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE);
  718. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK);
  719. b43_power_saving_ctl_bits(dev, 0);
  720. }