3945-mac.c 105 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/pci-aspm.h>
  35. #include <linux/slab.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/delay.h>
  38. #include <linux/sched.h>
  39. #include <linux/skbuff.h>
  40. #include <linux/netdevice.h>
  41. #include <linux/firmware.h>
  42. #include <linux/etherdevice.h>
  43. #include <linux/if_arp.h>
  44. #include <net/ieee80211_radiotap.h>
  45. #include <net/mac80211.h>
  46. #include <asm/div64.h>
  47. #define DRV_NAME "iwl3945"
  48. #include "commands.h"
  49. #include "common.h"
  50. #include "3945.h"
  51. #include "iwl-spectrum.h"
  52. /*
  53. * module name, copyright, version, etc.
  54. */
  55. #define DRV_DESCRIPTION \
  56. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  57. #ifdef CONFIG_IWLEGACY_DEBUG
  58. #define VD "d"
  59. #else
  60. #define VD
  61. #endif
  62. /*
  63. * add "s" to indicate spectrum measurement included.
  64. * we add it here to be consistent with previous releases in which
  65. * this was configurable.
  66. */
  67. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  68. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  69. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  70. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  71. MODULE_VERSION(DRV_VERSION);
  72. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  73. MODULE_LICENSE("GPL");
  74. /* module parameters */
  75. struct il_mod_params il3945_mod_params = {
  76. .sw_crypto = 1,
  77. .restart_fw = 1,
  78. .disable_hw_scan = 1,
  79. /* the rest are 0 by default */
  80. };
  81. /**
  82. * il3945_get_antenna_flags - Get antenna flags for RXON command
  83. * @il: eeprom and antenna fields are used to determine antenna flags
  84. *
  85. * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  86. * il3945_mod_params.antenna specifies the antenna diversity mode:
  87. *
  88. * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  89. * IL_ANTENNA_MAIN - Force MAIN antenna
  90. * IL_ANTENNA_AUX - Force AUX antenna
  91. */
  92. __le32
  93. il3945_get_antenna_flags(const struct il_priv *il)
  94. {
  95. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  96. switch (il3945_mod_params.antenna) {
  97. case IL_ANTENNA_DIVERSITY:
  98. return 0;
  99. case IL_ANTENNA_MAIN:
  100. if (eeprom->antenna_switch_type)
  101. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  103. case IL_ANTENNA_AUX:
  104. if (eeprom->antenna_switch_type)
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  107. }
  108. /* bad antenna selector value */
  109. IL_ERR("Bad antenna selector value (0x%x)\n",
  110. il3945_mod_params.antenna);
  111. return 0; /* "diversity" is default if error */
  112. }
  113. static int
  114. il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
  115. struct ieee80211_key_conf *keyconf, u8 sta_id)
  116. {
  117. unsigned long flags;
  118. __le16 key_flags = 0;
  119. int ret;
  120. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  121. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  122. if (sta_id == il->hw_params.bcast_id)
  123. key_flags |= STA_KEY_MULTICAST_MSK;
  124. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  125. keyconf->hw_key_idx = keyconf->keyidx;
  126. key_flags &= ~STA_KEY_FLG_INVALID;
  127. spin_lock_irqsave(&il->sta_lock, flags);
  128. il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
  129. il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  130. memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
  131. memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
  132. if ((il->stations[sta_id].sta.key.
  133. key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
  134. il->stations[sta_id].sta.key.key_offset =
  135. il_get_free_ucode_key_idx(il);
  136. /* else, we are overriding an existing key => no need to allocated room
  137. * in uCode. */
  138. WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  139. "no space for a new key");
  140. il->stations[sta_id].sta.key.key_flags = key_flags;
  141. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  142. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  143. D_INFO("hwcrypto: modify ucode station key info\n");
  144. ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
  145. spin_unlock_irqrestore(&il->sta_lock, flags);
  146. return ret;
  147. }
  148. static int
  149. il3945_set_tkip_dynamic_key_info(struct il_priv *il,
  150. struct ieee80211_key_conf *keyconf, u8 sta_id)
  151. {
  152. return -EOPNOTSUPP;
  153. }
  154. static int
  155. il3945_set_wep_dynamic_key_info(struct il_priv *il,
  156. struct ieee80211_key_conf *keyconf, u8 sta_id)
  157. {
  158. return -EOPNOTSUPP;
  159. }
  160. static int
  161. il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
  162. {
  163. unsigned long flags;
  164. struct il_addsta_cmd sta_cmd;
  165. spin_lock_irqsave(&il->sta_lock, flags);
  166. memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
  167. memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
  168. il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  169. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  170. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  171. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  172. sizeof(struct il_addsta_cmd));
  173. spin_unlock_irqrestore(&il->sta_lock, flags);
  174. D_INFO("hwcrypto: clear ucode station key info\n");
  175. return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  176. }
  177. static int
  178. il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
  179. u8 sta_id)
  180. {
  181. int ret = 0;
  182. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  183. switch (keyconf->cipher) {
  184. case WLAN_CIPHER_SUITE_CCMP:
  185. ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
  186. break;
  187. case WLAN_CIPHER_SUITE_TKIP:
  188. ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
  189. break;
  190. case WLAN_CIPHER_SUITE_WEP40:
  191. case WLAN_CIPHER_SUITE_WEP104:
  192. ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
  193. break;
  194. default:
  195. IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
  196. ret = -EINVAL;
  197. }
  198. D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
  200. return ret;
  201. }
  202. static int
  203. il3945_remove_static_key(struct il_priv *il)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int
  209. il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
  210. {
  211. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  212. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  213. return -EOPNOTSUPP;
  214. IL_ERR("Static key invalid: cipher %x\n", key->cipher);
  215. return -EINVAL;
  216. }
  217. static void
  218. il3945_clear_free_frames(struct il_priv *il)
  219. {
  220. struct list_head *element;
  221. D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
  222. while (!list_empty(&il->free_frames)) {
  223. element = il->free_frames.next;
  224. list_del(element);
  225. kfree(list_entry(element, struct il3945_frame, list));
  226. il->frames_count--;
  227. }
  228. if (il->frames_count) {
  229. IL_WARN("%d frames still in use. Did we lose one?\n",
  230. il->frames_count);
  231. il->frames_count = 0;
  232. }
  233. }
  234. static struct il3945_frame *
  235. il3945_get_free_frame(struct il_priv *il)
  236. {
  237. struct il3945_frame *frame;
  238. struct list_head *element;
  239. if (list_empty(&il->free_frames)) {
  240. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  241. if (!frame) {
  242. IL_ERR("Could not allocate frame!\n");
  243. return NULL;
  244. }
  245. il->frames_count++;
  246. return frame;
  247. }
  248. element = il->free_frames.next;
  249. list_del(element);
  250. return list_entry(element, struct il3945_frame, list);
  251. }
  252. static void
  253. il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
  254. {
  255. memset(frame, 0, sizeof(*frame));
  256. list_add(&frame->list, &il->free_frames);
  257. }
  258. unsigned int
  259. il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
  260. int left)
  261. {
  262. if (!il_is_associated(il) || !il->beacon_skb)
  263. return 0;
  264. if (il->beacon_skb->len > left)
  265. return 0;
  266. memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
  267. return il->beacon_skb->len;
  268. }
  269. static int
  270. il3945_send_beacon_cmd(struct il_priv *il)
  271. {
  272. struct il3945_frame *frame;
  273. unsigned int frame_size;
  274. int rc;
  275. u8 rate;
  276. frame = il3945_get_free_frame(il);
  277. if (!frame) {
  278. IL_ERR("Could not obtain free frame buffer for beacon "
  279. "command.\n");
  280. return -ENOMEM;
  281. }
  282. rate = il_get_lowest_plcp(il);
  283. frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
  284. rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
  285. il3945_free_frame(il, frame);
  286. return rc;
  287. }
  288. static void
  289. il3945_unset_hw_params(struct il_priv *il)
  290. {
  291. if (il->_3945.shared_virt)
  292. dma_free_coherent(&il->pci_dev->dev,
  293. sizeof(struct il3945_shared),
  294. il->_3945.shared_virt, il->_3945.shared_phys);
  295. }
  296. static void
  297. il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
  298. struct il_device_cmd *cmd,
  299. struct sk_buff *skb_frag, int sta_id)
  300. {
  301. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  302. struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
  303. tx_cmd->sec_ctl = 0;
  304. switch (keyinfo->cipher) {
  305. case WLAN_CIPHER_SUITE_CCMP:
  306. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  307. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  308. D_TX("tx_cmd with AES hwcrypto\n");
  309. break;
  310. case WLAN_CIPHER_SUITE_TKIP:
  311. break;
  312. case WLAN_CIPHER_SUITE_WEP104:
  313. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  314. /* fall through */
  315. case WLAN_CIPHER_SUITE_WEP40:
  316. tx_cmd->sec_ctl |=
  317. TX_CMD_SEC_WEP | (info->control.hw_key->
  318. hw_key_idx & TX_CMD_SEC_MSK) <<
  319. TX_CMD_SEC_SHIFT;
  320. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  321. D_TX("Configuring packet for WEP encryption " "with key %d\n",
  322. info->control.hw_key->hw_key_idx);
  323. break;
  324. default:
  325. IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
  326. break;
  327. }
  328. }
  329. /*
  330. * handle build C_TX command notification.
  331. */
  332. static void
  333. il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
  334. struct ieee80211_tx_info *info,
  335. struct ieee80211_hdr *hdr, u8 std_id)
  336. {
  337. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  338. __le32 tx_flags = tx_cmd->tx_flags;
  339. __le16 fc = hdr->frame_control;
  340. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  341. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  342. tx_flags |= TX_CMD_FLG_ACK_MSK;
  343. if (ieee80211_is_mgmt(fc))
  344. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  345. if (ieee80211_is_probe_resp(fc) &&
  346. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  347. tx_flags |= TX_CMD_FLG_TSF_MSK;
  348. } else {
  349. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  350. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  351. }
  352. tx_cmd->sta_id = std_id;
  353. if (ieee80211_has_morefrags(fc))
  354. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  355. if (ieee80211_is_data_qos(fc)) {
  356. u8 *qc = ieee80211_get_qos_ctl(hdr);
  357. tx_cmd->tid_tspec = qc[0] & 0xf;
  358. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  359. } else {
  360. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  361. }
  362. il_tx_cmd_protection(il, info, fc, &tx_flags);
  363. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  364. if (ieee80211_is_mgmt(fc)) {
  365. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  366. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  367. else
  368. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  369. } else {
  370. tx_cmd->timeout.pm_frame_timeout = 0;
  371. }
  372. tx_cmd->driver_txop = 0;
  373. tx_cmd->tx_flags = tx_flags;
  374. tx_cmd->next_frame_len = 0;
  375. }
  376. /*
  377. * start C_TX command process
  378. */
  379. static int
  380. il3945_tx_skb(struct il_priv *il,
  381. struct ieee80211_sta *sta,
  382. struct sk_buff *skb)
  383. {
  384. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  385. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  386. struct il3945_tx_cmd *tx_cmd;
  387. struct il_tx_queue *txq = NULL;
  388. struct il_queue *q = NULL;
  389. struct il_device_cmd *out_cmd;
  390. struct il_cmd_meta *out_meta;
  391. dma_addr_t phys_addr;
  392. dma_addr_t txcmd_phys;
  393. int txq_id = skb_get_queue_mapping(skb);
  394. u16 len, idx, hdr_len;
  395. u16 firstlen, secondlen;
  396. u8 id;
  397. u8 unicast;
  398. u8 sta_id;
  399. u8 tid = 0;
  400. __le16 fc;
  401. u8 wait_write_ptr = 0;
  402. unsigned long flags;
  403. spin_lock_irqsave(&il->lock, flags);
  404. if (il_is_rfkill(il)) {
  405. D_DROP("Dropping - RF KILL\n");
  406. goto drop_unlock;
  407. }
  408. if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
  409. IL_INVALID_RATE) {
  410. IL_ERR("ERROR: No TX rate available.\n");
  411. goto drop_unlock;
  412. }
  413. unicast = !is_multicast_ether_addr(hdr->addr1);
  414. id = 0;
  415. fc = hdr->frame_control;
  416. #ifdef CONFIG_IWLEGACY_DEBUG
  417. if (ieee80211_is_auth(fc))
  418. D_TX("Sending AUTH frame\n");
  419. else if (ieee80211_is_assoc_req(fc))
  420. D_TX("Sending ASSOC frame\n");
  421. else if (ieee80211_is_reassoc_req(fc))
  422. D_TX("Sending REASSOC frame\n");
  423. #endif
  424. spin_unlock_irqrestore(&il->lock, flags);
  425. hdr_len = ieee80211_hdrlen(fc);
  426. /* Find idx into station table for destination station */
  427. sta_id = il_sta_id_or_broadcast(il, sta);
  428. if (sta_id == IL_INVALID_STATION) {
  429. D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
  430. goto drop;
  431. }
  432. D_RATE("station Id %d\n", sta_id);
  433. if (ieee80211_is_data_qos(fc)) {
  434. u8 *qc = ieee80211_get_qos_ctl(hdr);
  435. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  436. if (unlikely(tid >= MAX_TID_COUNT))
  437. goto drop;
  438. }
  439. /* Descriptor for chosen Tx queue */
  440. txq = &il->txq[txq_id];
  441. q = &txq->q;
  442. if ((il_queue_space(q) < q->high_mark))
  443. goto drop;
  444. spin_lock_irqsave(&il->lock, flags);
  445. idx = il_get_cmd_idx(q, q->write_ptr, 0);
  446. txq->skbs[q->write_ptr] = skb;
  447. /* Init first empty entry in queue's array of Tx/cmd buffers */
  448. out_cmd = txq->cmd[idx];
  449. out_meta = &txq->meta[idx];
  450. tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
  451. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  452. memset(tx_cmd, 0, sizeof(*tx_cmd));
  453. /*
  454. * Set up the Tx-command (not MAC!) header.
  455. * Store the chosen Tx queue and TFD idx within the sequence field;
  456. * after Tx, uCode's Tx response will return this value so driver can
  457. * locate the frame within the tx queue and do post-tx processing.
  458. */
  459. out_cmd->hdr.cmd = C_TX;
  460. out_cmd->hdr.sequence =
  461. cpu_to_le16((u16)
  462. (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
  463. /* Copy MAC header from skb into command buffer */
  464. memcpy(tx_cmd->hdr, hdr, hdr_len);
  465. if (info->control.hw_key)
  466. il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
  467. /* TODO need this for burst mode later on */
  468. il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
  469. il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
  470. /* Total # bytes to be transmitted */
  471. tx_cmd->len = cpu_to_le16((u16) skb->len);
  472. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  473. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  474. /*
  475. * Use the first empty entry in this queue's command buffer array
  476. * to contain the Tx command and MAC header concatenated together
  477. * (payload data will be in another buffer).
  478. * Size of this varies, due to varying MAC header length.
  479. * If end is not dword aligned, we'll have 2 extra bytes at the end
  480. * of the MAC header (device reads on dword boundaries).
  481. * We'll tell device about this padding later.
  482. */
  483. len =
  484. sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
  485. hdr_len;
  486. firstlen = (len + 3) & ~3;
  487. /* Physical address of this Tx command's header (not MAC header!),
  488. * within command buffer array. */
  489. txcmd_phys =
  490. pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen,
  491. PCI_DMA_TODEVICE);
  492. if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys)))
  493. goto drop_unlock;
  494. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  495. * if any (802.11 null frames have no payload). */
  496. secondlen = skb->len - hdr_len;
  497. if (secondlen > 0) {
  498. phys_addr =
  499. pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen,
  500. PCI_DMA_TODEVICE);
  501. if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr)))
  502. goto drop_unlock;
  503. }
  504. /* Add buffer containing Tx command and MAC(!) header to TFD's
  505. * first entry */
  506. il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0);
  507. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  508. dma_unmap_len_set(out_meta, len, firstlen);
  509. if (secondlen > 0)
  510. il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0,
  511. U32_PAD(secondlen));
  512. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  513. txq->need_update = 1;
  514. } else {
  515. wait_write_ptr = 1;
  516. txq->need_update = 0;
  517. }
  518. il_update_stats(il, true, fc, skb->len);
  519. D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
  520. D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  521. il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  522. il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
  523. ieee80211_hdrlen(fc));
  524. /* Tell device the write idx *just past* this latest filled TFD */
  525. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  526. il_txq_update_write_ptr(il, txq);
  527. spin_unlock_irqrestore(&il->lock, flags);
  528. if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
  529. if (wait_write_ptr) {
  530. spin_lock_irqsave(&il->lock, flags);
  531. txq->need_update = 1;
  532. il_txq_update_write_ptr(il, txq);
  533. spin_unlock_irqrestore(&il->lock, flags);
  534. }
  535. il_stop_queue(il, txq);
  536. }
  537. return 0;
  538. drop_unlock:
  539. spin_unlock_irqrestore(&il->lock, flags);
  540. drop:
  541. return -1;
  542. }
  543. static int
  544. il3945_get_measurement(struct il_priv *il,
  545. struct ieee80211_measurement_params *params, u8 type)
  546. {
  547. struct il_spectrum_cmd spectrum;
  548. struct il_rx_pkt *pkt;
  549. struct il_host_cmd cmd = {
  550. .id = C_SPECTRUM_MEASUREMENT,
  551. .data = (void *)&spectrum,
  552. .flags = CMD_WANT_SKB,
  553. };
  554. u32 add_time = le64_to_cpu(params->start_time);
  555. int rc;
  556. int spectrum_resp_status;
  557. int duration = le16_to_cpu(params->duration);
  558. if (il_is_associated(il))
  559. add_time =
  560. il_usecs_to_beacons(il,
  561. le64_to_cpu(params->start_time) -
  562. il->_3945.last_tsf,
  563. le16_to_cpu(il->timing.beacon_interval));
  564. memset(&spectrum, 0, sizeof(spectrum));
  565. spectrum.channel_count = cpu_to_le16(1);
  566. spectrum.flags =
  567. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  568. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  569. cmd.len = sizeof(spectrum);
  570. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  571. if (il_is_associated(il))
  572. spectrum.start_time =
  573. il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
  574. le16_to_cpu(il->timing.beacon_interval));
  575. else
  576. spectrum.start_time = 0;
  577. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  578. spectrum.channels[0].channel = params->channel;
  579. spectrum.channels[0].type = type;
  580. if (il->active.flags & RXON_FLG_BAND_24G_MSK)
  581. spectrum.flags |=
  582. RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
  583. RXON_FLG_TGG_PROTECT_MSK;
  584. rc = il_send_cmd_sync(il, &cmd);
  585. if (rc)
  586. return rc;
  587. pkt = (struct il_rx_pkt *)cmd.reply_page;
  588. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  589. IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
  590. rc = -EIO;
  591. }
  592. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  593. switch (spectrum_resp_status) {
  594. case 0: /* Command will be handled */
  595. if (pkt->u.spectrum.id != 0xff) {
  596. D_INFO("Replaced existing measurement: %d\n",
  597. pkt->u.spectrum.id);
  598. il->measurement_status &= ~MEASUREMENT_READY;
  599. }
  600. il->measurement_status |= MEASUREMENT_ACTIVE;
  601. rc = 0;
  602. break;
  603. case 1: /* Command will not be handled */
  604. rc = -EAGAIN;
  605. break;
  606. }
  607. il_free_pages(il, cmd.reply_page);
  608. return rc;
  609. }
  610. static void
  611. il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
  612. {
  613. struct il_rx_pkt *pkt = rxb_addr(rxb);
  614. struct il_alive_resp *palive;
  615. struct delayed_work *pwork;
  616. palive = &pkt->u.alive_frame;
  617. D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
  618. palive->is_valid, palive->ver_type, palive->ver_subtype);
  619. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  620. D_INFO("Initialization Alive received.\n");
  621. memcpy(&il->card_alive_init, &pkt->u.alive_frame,
  622. sizeof(struct il_alive_resp));
  623. pwork = &il->init_alive_start;
  624. } else {
  625. D_INFO("Runtime Alive received.\n");
  626. memcpy(&il->card_alive, &pkt->u.alive_frame,
  627. sizeof(struct il_alive_resp));
  628. pwork = &il->alive_start;
  629. il3945_disable_events(il);
  630. }
  631. /* We delay the ALIVE response by 5ms to
  632. * give the HW RF Kill time to activate... */
  633. if (palive->is_valid == UCODE_VALID_OK)
  634. queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
  635. else
  636. IL_WARN("uCode did not respond OK.\n");
  637. }
  638. static void
  639. il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
  640. {
  641. #ifdef CONFIG_IWLEGACY_DEBUG
  642. struct il_rx_pkt *pkt = rxb_addr(rxb);
  643. #endif
  644. D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
  645. }
  646. static void
  647. il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
  648. {
  649. struct il_rx_pkt *pkt = rxb_addr(rxb);
  650. struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  651. #ifdef CONFIG_IWLEGACY_DEBUG
  652. u8 rate = beacon->beacon_notify_hdr.rate;
  653. D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
  654. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  655. beacon->beacon_notify_hdr.failure_frame,
  656. le32_to_cpu(beacon->ibss_mgr_status),
  657. le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
  658. #endif
  659. il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  660. }
  661. /* Handle notification from uCode that card's power state is changing
  662. * due to software, hardware, or critical temperature RFKILL */
  663. static void
  664. il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
  665. {
  666. struct il_rx_pkt *pkt = rxb_addr(rxb);
  667. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  668. unsigned long status = il->status;
  669. IL_WARN("Card state received: HW:%s SW:%s\n",
  670. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  671. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  672. _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  673. if (flags & HW_CARD_DISABLED)
  674. set_bit(S_RFKILL, &il->status);
  675. else
  676. clear_bit(S_RFKILL, &il->status);
  677. il_scan_cancel(il);
  678. if ((test_bit(S_RFKILL, &status) !=
  679. test_bit(S_RFKILL, &il->status)))
  680. wiphy_rfkill_set_hw_state(il->hw->wiphy,
  681. test_bit(S_RFKILL, &il->status));
  682. else
  683. wake_up(&il->wait_command_queue);
  684. }
  685. /**
  686. * il3945_setup_handlers - Initialize Rx handler callbacks
  687. *
  688. * Setup the RX handlers for each of the reply types sent from the uCode
  689. * to the host.
  690. *
  691. * This function chains into the hardware specific files for them to setup
  692. * any hardware specific handlers as well.
  693. */
  694. static void
  695. il3945_setup_handlers(struct il_priv *il)
  696. {
  697. il->handlers[N_ALIVE] = il3945_hdl_alive;
  698. il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
  699. il->handlers[N_ERROR] = il_hdl_error;
  700. il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
  701. il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
  702. il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
  703. il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
  704. il->handlers[N_BEACON] = il3945_hdl_beacon;
  705. /*
  706. * The same handler is used for both the REPLY to a discrete
  707. * stats request from the host as well as for the periodic
  708. * stats notifications (after received beacons) from the uCode.
  709. */
  710. il->handlers[C_STATS] = il3945_hdl_c_stats;
  711. il->handlers[N_STATS] = il3945_hdl_stats;
  712. il_setup_rx_scan_handlers(il);
  713. il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
  714. /* Set up hardware specific Rx handlers */
  715. il3945_hw_handler_setup(il);
  716. }
  717. /************************** RX-FUNCTIONS ****************************/
  718. /*
  719. * Rx theory of operation
  720. *
  721. * The host allocates 32 DMA target addresses and passes the host address
  722. * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
  723. * 0 to 31
  724. *
  725. * Rx Queue Indexes
  726. * The host/firmware share two idx registers for managing the Rx buffers.
  727. *
  728. * The READ idx maps to the first position that the firmware may be writing
  729. * to -- the driver can read up to (but not including) this position and get
  730. * good data.
  731. * The READ idx is managed by the firmware once the card is enabled.
  732. *
  733. * The WRITE idx maps to the last position the driver has read from -- the
  734. * position preceding WRITE is the last slot the firmware can place a packet.
  735. *
  736. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  737. * WRITE = READ.
  738. *
  739. * During initialization, the host sets up the READ queue position to the first
  740. * IDX position, and WRITE to the last (READ - 1 wrapped)
  741. *
  742. * When the firmware places a packet in a buffer, it will advance the READ idx
  743. * and fire the RX interrupt. The driver can then query the READ idx and
  744. * process as many packets as possible, moving the WRITE idx forward as it
  745. * resets the Rx queue buffers with new memory.
  746. *
  747. * The management in the driver is as follows:
  748. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  749. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  750. * to replenish the iwl->rxq->rx_free.
  751. * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  752. * iwl->rxq is replenished and the READ IDX is updated (updating the
  753. * 'processed' and 'read' driver idxes as well)
  754. * + A received packet is processed and handed to the kernel network stack,
  755. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  756. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  757. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  758. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  759. * were enough free buffers and RX_STALLED is set it is cleared.
  760. *
  761. *
  762. * Driver sequence:
  763. *
  764. * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  765. * il3945_rx_queue_restock
  766. * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  767. * queue, updates firmware pointers, and updates
  768. * the WRITE idx. If insufficient rx_free buffers
  769. * are available, schedules il3945_rx_replenish
  770. *
  771. * -- enable interrupts --
  772. * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
  773. * READ IDX, detaching the SKB from the pool.
  774. * Moves the packet buffer from queue to rx_used.
  775. * Calls il3945_rx_queue_restock to refill any empty
  776. * slots.
  777. * ...
  778. *
  779. */
  780. /**
  781. * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  782. */
  783. static inline __le32
  784. il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
  785. {
  786. return cpu_to_le32((u32) dma_addr);
  787. }
  788. /**
  789. * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
  790. *
  791. * If there are slots in the RX queue that need to be restocked,
  792. * and we have free pre-allocated buffers, fill the ranks as much
  793. * as we can, pulling from rx_free.
  794. *
  795. * This moves the 'write' idx forward to catch up with 'processed', and
  796. * also updates the memory address in the firmware to reference the new
  797. * target buffer.
  798. */
  799. static void
  800. il3945_rx_queue_restock(struct il_priv *il)
  801. {
  802. struct il_rx_queue *rxq = &il->rxq;
  803. struct list_head *element;
  804. struct il_rx_buf *rxb;
  805. unsigned long flags;
  806. int write;
  807. spin_lock_irqsave(&rxq->lock, flags);
  808. write = rxq->write & ~0x7;
  809. while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
  810. /* Get next free Rx buffer, remove from free list */
  811. element = rxq->rx_free.next;
  812. rxb = list_entry(element, struct il_rx_buf, list);
  813. list_del(element);
  814. /* Point to Rx buffer via next RBD in circular buffer */
  815. rxq->bd[rxq->write] =
  816. il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
  817. rxq->queue[rxq->write] = rxb;
  818. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  819. rxq->free_count--;
  820. }
  821. spin_unlock_irqrestore(&rxq->lock, flags);
  822. /* If the pre-allocated buffer pool is dropping low, schedule to
  823. * refill it */
  824. if (rxq->free_count <= RX_LOW_WATERMARK)
  825. queue_work(il->workqueue, &il->rx_replenish);
  826. /* If we've added more space for the firmware to place data, tell it.
  827. * Increment device's write pointer in multiples of 8. */
  828. if (rxq->write_actual != (rxq->write & ~0x7) ||
  829. abs(rxq->write - rxq->read) > 7) {
  830. spin_lock_irqsave(&rxq->lock, flags);
  831. rxq->need_update = 1;
  832. spin_unlock_irqrestore(&rxq->lock, flags);
  833. il_rx_queue_update_write_ptr(il, rxq);
  834. }
  835. }
  836. /**
  837. * il3945_rx_replenish - Move all used packet from rx_used to rx_free
  838. *
  839. * When moving to rx_free an SKB is allocated for the slot.
  840. *
  841. * Also restock the Rx queue via il3945_rx_queue_restock.
  842. * This is called as a scheduled work item (except for during initialization)
  843. */
  844. static void
  845. il3945_rx_allocate(struct il_priv *il, gfp_t priority)
  846. {
  847. struct il_rx_queue *rxq = &il->rxq;
  848. struct list_head *element;
  849. struct il_rx_buf *rxb;
  850. struct page *page;
  851. dma_addr_t page_dma;
  852. unsigned long flags;
  853. gfp_t gfp_mask = priority;
  854. while (1) {
  855. spin_lock_irqsave(&rxq->lock, flags);
  856. if (list_empty(&rxq->rx_used)) {
  857. spin_unlock_irqrestore(&rxq->lock, flags);
  858. return;
  859. }
  860. spin_unlock_irqrestore(&rxq->lock, flags);
  861. if (rxq->free_count > RX_LOW_WATERMARK)
  862. gfp_mask |= __GFP_NOWARN;
  863. if (il->hw_params.rx_page_order > 0)
  864. gfp_mask |= __GFP_COMP;
  865. /* Alloc a new receive buffer */
  866. page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
  867. if (!page) {
  868. if (net_ratelimit())
  869. D_INFO("Failed to allocate SKB buffer.\n");
  870. if (rxq->free_count <= RX_LOW_WATERMARK &&
  871. net_ratelimit())
  872. IL_ERR("Failed to allocate SKB buffer with %0x."
  873. "Only %u free buffers remaining.\n",
  874. priority, rxq->free_count);
  875. /* We don't reschedule replenish work here -- we will
  876. * call the restock method and if it still needs
  877. * more buffers it will schedule replenish */
  878. break;
  879. }
  880. /* Get physical address of RB/SKB */
  881. page_dma =
  882. pci_map_page(il->pci_dev, page, 0,
  883. PAGE_SIZE << il->hw_params.rx_page_order,
  884. PCI_DMA_FROMDEVICE);
  885. if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) {
  886. __free_pages(page, il->hw_params.rx_page_order);
  887. break;
  888. }
  889. spin_lock_irqsave(&rxq->lock, flags);
  890. if (list_empty(&rxq->rx_used)) {
  891. spin_unlock_irqrestore(&rxq->lock, flags);
  892. pci_unmap_page(il->pci_dev, page_dma,
  893. PAGE_SIZE << il->hw_params.rx_page_order,
  894. PCI_DMA_FROMDEVICE);
  895. __free_pages(page, il->hw_params.rx_page_order);
  896. return;
  897. }
  898. element = rxq->rx_used.next;
  899. rxb = list_entry(element, struct il_rx_buf, list);
  900. list_del(element);
  901. rxb->page = page;
  902. rxb->page_dma = page_dma;
  903. list_add_tail(&rxb->list, &rxq->rx_free);
  904. rxq->free_count++;
  905. il->alloc_rxb_page++;
  906. spin_unlock_irqrestore(&rxq->lock, flags);
  907. }
  908. }
  909. void
  910. il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
  911. {
  912. unsigned long flags;
  913. int i;
  914. spin_lock_irqsave(&rxq->lock, flags);
  915. INIT_LIST_HEAD(&rxq->rx_free);
  916. INIT_LIST_HEAD(&rxq->rx_used);
  917. /* Fill the rx_used queue with _all_ of the Rx buffers */
  918. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  919. /* In the reset function, these buffers may have been allocated
  920. * to an SKB, so we need to unmap and free potential storage */
  921. if (rxq->pool[i].page != NULL) {
  922. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  923. PAGE_SIZE << il->hw_params.rx_page_order,
  924. PCI_DMA_FROMDEVICE);
  925. __il_free_pages(il, rxq->pool[i].page);
  926. rxq->pool[i].page = NULL;
  927. }
  928. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  929. }
  930. /* Set us so that we have processed and used all buffers, but have
  931. * not restocked the Rx queue with fresh buffers */
  932. rxq->read = rxq->write = 0;
  933. rxq->write_actual = 0;
  934. rxq->free_count = 0;
  935. spin_unlock_irqrestore(&rxq->lock, flags);
  936. }
  937. void
  938. il3945_rx_replenish(void *data)
  939. {
  940. struct il_priv *il = data;
  941. unsigned long flags;
  942. il3945_rx_allocate(il, GFP_KERNEL);
  943. spin_lock_irqsave(&il->lock, flags);
  944. il3945_rx_queue_restock(il);
  945. spin_unlock_irqrestore(&il->lock, flags);
  946. }
  947. static void
  948. il3945_rx_replenish_now(struct il_priv *il)
  949. {
  950. il3945_rx_allocate(il, GFP_ATOMIC);
  951. il3945_rx_queue_restock(il);
  952. }
  953. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  954. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  955. * This free routine walks the list of POOL entries and if SKB is set to
  956. * non NULL it is unmapped and freed
  957. */
  958. static void
  959. il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
  960. {
  961. int i;
  962. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  963. if (rxq->pool[i].page != NULL) {
  964. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  965. PAGE_SIZE << il->hw_params.rx_page_order,
  966. PCI_DMA_FROMDEVICE);
  967. __il_free_pages(il, rxq->pool[i].page);
  968. rxq->pool[i].page = NULL;
  969. }
  970. }
  971. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  972. rxq->bd_dma);
  973. dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
  974. rxq->rb_stts, rxq->rb_stts_dma);
  975. rxq->bd = NULL;
  976. rxq->rb_stts = NULL;
  977. }
  978. /* Convert linear signal-to-noise ratio into dB */
  979. static u8 ratio2dB[100] = {
  980. /* 0 1 2 3 4 5 6 7 8 9 */
  981. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  982. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  983. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  984. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  985. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  986. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  987. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  988. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  989. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  990. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  991. };
  992. /* Calculates a relative dB value from a ratio of linear
  993. * (i.e. not dB) signal levels.
  994. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  995. int
  996. il3945_calc_db_from_ratio(int sig_ratio)
  997. {
  998. /* 1000:1 or higher just report as 60 dB */
  999. if (sig_ratio >= 1000)
  1000. return 60;
  1001. /* 100:1 or higher, divide by 10 and use table,
  1002. * add 20 dB to make up for divide by 10 */
  1003. if (sig_ratio >= 100)
  1004. return 20 + (int)ratio2dB[sig_ratio / 10];
  1005. /* We shouldn't see this */
  1006. if (sig_ratio < 1)
  1007. return 0;
  1008. /* Use table for ratios 1:1 - 99:1 */
  1009. return (int)ratio2dB[sig_ratio];
  1010. }
  1011. /**
  1012. * il3945_rx_handle - Main entry function for receiving responses from uCode
  1013. *
  1014. * Uses the il->handlers callback function array to invoke
  1015. * the appropriate handlers, including command responses,
  1016. * frame-received notifications, and other notifications.
  1017. */
  1018. static void
  1019. il3945_rx_handle(struct il_priv *il)
  1020. {
  1021. struct il_rx_buf *rxb;
  1022. struct il_rx_pkt *pkt;
  1023. struct il_rx_queue *rxq = &il->rxq;
  1024. u32 r, i;
  1025. int reclaim;
  1026. unsigned long flags;
  1027. u8 fill_rx = 0;
  1028. u32 count = 8;
  1029. int total_empty = 0;
  1030. /* uCode's read idx (stored in shared DRAM) indicates the last Rx
  1031. * buffer that the driver may process (last buffer filled by ucode). */
  1032. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1033. i = rxq->read;
  1034. /* calculate total frames need to be restock after handling RX */
  1035. total_empty = r - rxq->write_actual;
  1036. if (total_empty < 0)
  1037. total_empty += RX_QUEUE_SIZE;
  1038. if (total_empty > (RX_QUEUE_SIZE / 2))
  1039. fill_rx = 1;
  1040. /* Rx interrupt, but nothing sent from uCode */
  1041. if (i == r)
  1042. D_RX("r = %d, i = %d\n", r, i);
  1043. while (i != r) {
  1044. int len;
  1045. rxb = rxq->queue[i];
  1046. /* If an RXB doesn't have a Rx queue slot associated with it,
  1047. * then a bug has been introduced in the queue refilling
  1048. * routines -- catch it here */
  1049. BUG_ON(rxb == NULL);
  1050. rxq->queue[i] = NULL;
  1051. pci_unmap_page(il->pci_dev, rxb->page_dma,
  1052. PAGE_SIZE << il->hw_params.rx_page_order,
  1053. PCI_DMA_FROMDEVICE);
  1054. pkt = rxb_addr(rxb);
  1055. len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  1056. len += sizeof(u32); /* account for status word */
  1057. reclaim = il_need_reclaim(il, pkt);
  1058. /* Based on type of command response or notification,
  1059. * handle those that need handling via function in
  1060. * handlers table. See il3945_setup_handlers() */
  1061. if (il->handlers[pkt->hdr.cmd]) {
  1062. D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
  1063. il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1064. il->isr_stats.handlers[pkt->hdr.cmd]++;
  1065. il->handlers[pkt->hdr.cmd] (il, rxb);
  1066. } else {
  1067. /* No handling needed */
  1068. D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
  1069. i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1070. }
  1071. /*
  1072. * XXX: After here, we should always check rxb->page
  1073. * against NULL before touching it or its virtual
  1074. * memory (pkt). Because some handler might have
  1075. * already taken or freed the pages.
  1076. */
  1077. if (reclaim) {
  1078. /* Invoke any callbacks, transfer the buffer to caller,
  1079. * and fire off the (possibly) blocking il_send_cmd()
  1080. * as we reclaim the driver command queue */
  1081. if (rxb->page)
  1082. il_tx_cmd_complete(il, rxb);
  1083. else
  1084. IL_WARN("Claim null rxb?\n");
  1085. }
  1086. /* Reuse the page if possible. For notification packets and
  1087. * SKBs that fail to Rx correctly, add them back into the
  1088. * rx_free list for reuse later. */
  1089. spin_lock_irqsave(&rxq->lock, flags);
  1090. if (rxb->page != NULL) {
  1091. rxb->page_dma =
  1092. pci_map_page(il->pci_dev, rxb->page, 0,
  1093. PAGE_SIZE << il->hw_params.
  1094. rx_page_order, PCI_DMA_FROMDEVICE);
  1095. if (unlikely(pci_dma_mapping_error(il->pci_dev,
  1096. rxb->page_dma))) {
  1097. __il_free_pages(il, rxb->page);
  1098. rxb->page = NULL;
  1099. list_add_tail(&rxb->list, &rxq->rx_used);
  1100. } else {
  1101. list_add_tail(&rxb->list, &rxq->rx_free);
  1102. rxq->free_count++;
  1103. }
  1104. } else
  1105. list_add_tail(&rxb->list, &rxq->rx_used);
  1106. spin_unlock_irqrestore(&rxq->lock, flags);
  1107. i = (i + 1) & RX_QUEUE_MASK;
  1108. /* If there are a lot of unused frames,
  1109. * restock the Rx queue so ucode won't assert. */
  1110. if (fill_rx) {
  1111. count++;
  1112. if (count >= 8) {
  1113. rxq->read = i;
  1114. il3945_rx_replenish_now(il);
  1115. count = 0;
  1116. }
  1117. }
  1118. }
  1119. /* Backtrack one entry */
  1120. rxq->read = i;
  1121. if (fill_rx)
  1122. il3945_rx_replenish_now(il);
  1123. else
  1124. il3945_rx_queue_restock(il);
  1125. }
  1126. /* call this function to flush any scheduled tasklet */
  1127. static inline void
  1128. il3945_synchronize_irq(struct il_priv *il)
  1129. {
  1130. /* wait to make sure we flush pending tasklet */
  1131. synchronize_irq(il->pci_dev->irq);
  1132. tasklet_kill(&il->irq_tasklet);
  1133. }
  1134. static const char *
  1135. il3945_desc_lookup(int i)
  1136. {
  1137. switch (i) {
  1138. case 1:
  1139. return "FAIL";
  1140. case 2:
  1141. return "BAD_PARAM";
  1142. case 3:
  1143. return "BAD_CHECKSUM";
  1144. case 4:
  1145. return "NMI_INTERRUPT";
  1146. case 5:
  1147. return "SYSASSERT";
  1148. case 6:
  1149. return "FATAL_ERROR";
  1150. }
  1151. return "UNKNOWN";
  1152. }
  1153. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1154. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1155. void
  1156. il3945_dump_nic_error_log(struct il_priv *il)
  1157. {
  1158. u32 i;
  1159. u32 desc, time, count, base, data1;
  1160. u32 blink1, blink2, ilink1, ilink2;
  1161. base = le32_to_cpu(il->card_alive.error_event_table_ptr);
  1162. if (!il3945_hw_valid_rtc_data_addr(base)) {
  1163. IL_ERR("Not valid error log pointer 0x%08X\n", base);
  1164. return;
  1165. }
  1166. count = il_read_targ_mem(il, base);
  1167. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1168. IL_ERR("Start IWL Error Log Dump:\n");
  1169. IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
  1170. }
  1171. IL_ERR("Desc Time asrtPC blink2 "
  1172. "ilink1 nmiPC Line\n");
  1173. for (i = ERROR_START_OFFSET;
  1174. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1175. i += ERROR_ELEM_SIZE) {
  1176. desc = il_read_targ_mem(il, base + i);
  1177. time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
  1178. blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
  1179. blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
  1180. ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
  1181. ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
  1182. data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
  1183. IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1184. il3945_desc_lookup(desc), desc, time, blink1, blink2,
  1185. ilink1, ilink2, data1);
  1186. }
  1187. }
  1188. static void
  1189. il3945_irq_tasklet(struct il_priv *il)
  1190. {
  1191. u32 inta, handled = 0;
  1192. u32 inta_fh;
  1193. unsigned long flags;
  1194. #ifdef CONFIG_IWLEGACY_DEBUG
  1195. u32 inta_mask;
  1196. #endif
  1197. spin_lock_irqsave(&il->lock, flags);
  1198. /* Ack/clear/reset pending uCode interrupts.
  1199. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1200. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1201. inta = _il_rd(il, CSR_INT);
  1202. _il_wr(il, CSR_INT, inta);
  1203. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1204. * Any new interrupts that happen after this, either while we're
  1205. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1206. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1207. _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
  1208. #ifdef CONFIG_IWLEGACY_DEBUG
  1209. if (il_get_debug_level(il) & IL_DL_ISR) {
  1210. /* just for debug */
  1211. inta_mask = _il_rd(il, CSR_INT_MASK);
  1212. D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
  1213. inta_mask, inta_fh);
  1214. }
  1215. #endif
  1216. spin_unlock_irqrestore(&il->lock, flags);
  1217. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1218. * atomic, make sure that inta covers all the interrupts that
  1219. * we've discovered, even if FH interrupt came in just after
  1220. * reading CSR_INT. */
  1221. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1222. inta |= CSR_INT_BIT_FH_RX;
  1223. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1224. inta |= CSR_INT_BIT_FH_TX;
  1225. /* Now service all interrupt bits discovered above. */
  1226. if (inta & CSR_INT_BIT_HW_ERR) {
  1227. IL_ERR("Hardware error detected. Restarting.\n");
  1228. /* Tell the device to stop sending interrupts */
  1229. il_disable_interrupts(il);
  1230. il->isr_stats.hw++;
  1231. il_irq_handle_error(il);
  1232. handled |= CSR_INT_BIT_HW_ERR;
  1233. return;
  1234. }
  1235. #ifdef CONFIG_IWLEGACY_DEBUG
  1236. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1237. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1238. if (inta & CSR_INT_BIT_SCD) {
  1239. D_ISR("Scheduler finished to transmit "
  1240. "the frame/frames.\n");
  1241. il->isr_stats.sch++;
  1242. }
  1243. /* Alive notification via Rx interrupt will do the real work */
  1244. if (inta & CSR_INT_BIT_ALIVE) {
  1245. D_ISR("Alive interrupt\n");
  1246. il->isr_stats.alive++;
  1247. }
  1248. }
  1249. #endif
  1250. /* Safely ignore these bits for debug checks below */
  1251. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1252. /* Error detected by uCode */
  1253. if (inta & CSR_INT_BIT_SW_ERR) {
  1254. IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
  1255. inta);
  1256. il->isr_stats.sw++;
  1257. il_irq_handle_error(il);
  1258. handled |= CSR_INT_BIT_SW_ERR;
  1259. }
  1260. /* uCode wakes up after power-down sleep */
  1261. if (inta & CSR_INT_BIT_WAKEUP) {
  1262. D_ISR("Wakeup interrupt\n");
  1263. il_rx_queue_update_write_ptr(il, &il->rxq);
  1264. spin_lock_irqsave(&il->lock, flags);
  1265. il_txq_update_write_ptr(il, &il->txq[0]);
  1266. il_txq_update_write_ptr(il, &il->txq[1]);
  1267. il_txq_update_write_ptr(il, &il->txq[2]);
  1268. il_txq_update_write_ptr(il, &il->txq[3]);
  1269. il_txq_update_write_ptr(il, &il->txq[4]);
  1270. spin_unlock_irqrestore(&il->lock, flags);
  1271. il->isr_stats.wakeup++;
  1272. handled |= CSR_INT_BIT_WAKEUP;
  1273. }
  1274. /* All uCode command responses, including Tx command responses,
  1275. * Rx "responses" (frame-received notification), and other
  1276. * notifications from uCode come through here*/
  1277. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1278. il3945_rx_handle(il);
  1279. il->isr_stats.rx++;
  1280. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1281. }
  1282. if (inta & CSR_INT_BIT_FH_TX) {
  1283. D_ISR("Tx interrupt\n");
  1284. il->isr_stats.tx++;
  1285. _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
  1286. il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
  1287. handled |= CSR_INT_BIT_FH_TX;
  1288. }
  1289. if (inta & ~handled) {
  1290. IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1291. il->isr_stats.unhandled++;
  1292. }
  1293. if (inta & ~il->inta_mask) {
  1294. IL_WARN("Disabled INTA bits 0x%08x were pending\n",
  1295. inta & ~il->inta_mask);
  1296. IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
  1297. }
  1298. /* Re-enable all interrupts */
  1299. /* only Re-enable if disabled by irq */
  1300. if (test_bit(S_INT_ENABLED, &il->status))
  1301. il_enable_interrupts(il);
  1302. #ifdef CONFIG_IWLEGACY_DEBUG
  1303. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1304. inta = _il_rd(il, CSR_INT);
  1305. inta_mask = _il_rd(il, CSR_INT_MASK);
  1306. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1307. D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1308. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1309. }
  1310. #endif
  1311. }
  1312. static int
  1313. il3945_get_channels_for_scan(struct il_priv *il, enum ieee80211_band band,
  1314. u8 is_active, u8 n_probes,
  1315. struct il3945_scan_channel *scan_ch,
  1316. struct ieee80211_vif *vif)
  1317. {
  1318. struct ieee80211_channel *chan;
  1319. const struct ieee80211_supported_band *sband;
  1320. const struct il_channel_info *ch_info;
  1321. u16 passive_dwell = 0;
  1322. u16 active_dwell = 0;
  1323. int added, i;
  1324. sband = il_get_hw_mode(il, band);
  1325. if (!sband)
  1326. return 0;
  1327. active_dwell = il_get_active_dwell_time(il, band, n_probes);
  1328. passive_dwell = il_get_passive_dwell_time(il, band, vif);
  1329. if (passive_dwell <= active_dwell)
  1330. passive_dwell = active_dwell + 1;
  1331. for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
  1332. chan = il->scan_request->channels[i];
  1333. if (chan->band != band)
  1334. continue;
  1335. scan_ch->channel = chan->hw_value;
  1336. ch_info = il_get_channel_info(il, band, scan_ch->channel);
  1337. if (!il_is_channel_valid(ch_info)) {
  1338. D_SCAN("Channel %d is INVALID for this band.\n",
  1339. scan_ch->channel);
  1340. continue;
  1341. }
  1342. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1343. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1344. /* If passive , set up for auto-switch
  1345. * and use long active_dwell time.
  1346. */
  1347. if (!is_active || il_is_channel_passive(ch_info) ||
  1348. (chan->flags & IEEE80211_CHAN_NO_IR)) {
  1349. scan_ch->type = 0; /* passive */
  1350. if (IL_UCODE_API(il->ucode_ver) == 1)
  1351. scan_ch->active_dwell =
  1352. cpu_to_le16(passive_dwell - 1);
  1353. } else {
  1354. scan_ch->type = 1; /* active */
  1355. }
  1356. /* Set direct probe bits. These may be used both for active
  1357. * scan channels (probes gets sent right away),
  1358. * or for passive channels (probes get se sent only after
  1359. * hearing clear Rx packet).*/
  1360. if (IL_UCODE_API(il->ucode_ver) >= 2) {
  1361. if (n_probes)
  1362. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1363. } else {
  1364. /* uCode v1 does not allow setting direct probe bits on
  1365. * passive channel. */
  1366. if ((scan_ch->type & 1) && n_probes)
  1367. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1368. }
  1369. /* Set txpower levels to defaults */
  1370. scan_ch->tpc.dsp_atten = 110;
  1371. /* scan_pwr_info->tpc.dsp_atten; */
  1372. /*scan_pwr_info->tpc.tx_gain; */
  1373. if (band == IEEE80211_BAND_5GHZ)
  1374. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1375. else {
  1376. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1377. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1378. * power level:
  1379. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1380. */
  1381. }
  1382. D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
  1383. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1384. (scan_ch->type & 1) ? active_dwell : passive_dwell);
  1385. scan_ch++;
  1386. added++;
  1387. }
  1388. D_SCAN("total channels to scan %d\n", added);
  1389. return added;
  1390. }
  1391. static void
  1392. il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
  1393. {
  1394. int i;
  1395. for (i = 0; i < RATE_COUNT_LEGACY; i++) {
  1396. rates[i].bitrate = il3945_rates[i].ieee * 5;
  1397. rates[i].hw_value = i; /* Rate scaling will work on idxes */
  1398. rates[i].hw_value_short = i;
  1399. rates[i].flags = 0;
  1400. if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
  1401. /*
  1402. * If CCK != 1M then set short preamble rate flag.
  1403. */
  1404. rates[i].flags |=
  1405. (il3945_rates[i].plcp ==
  1406. 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1407. }
  1408. }
  1409. }
  1410. /******************************************************************************
  1411. *
  1412. * uCode download functions
  1413. *
  1414. ******************************************************************************/
  1415. static void
  1416. il3945_dealloc_ucode_pci(struct il_priv *il)
  1417. {
  1418. il_free_fw_desc(il->pci_dev, &il->ucode_code);
  1419. il_free_fw_desc(il->pci_dev, &il->ucode_data);
  1420. il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1421. il_free_fw_desc(il->pci_dev, &il->ucode_init);
  1422. il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
  1423. il_free_fw_desc(il->pci_dev, &il->ucode_boot);
  1424. }
  1425. /**
  1426. * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1427. * looking at all data.
  1428. */
  1429. static int
  1430. il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
  1431. {
  1432. u32 val;
  1433. u32 save_len = len;
  1434. int rc = 0;
  1435. u32 errcnt;
  1436. D_INFO("ucode inst image size is %u\n", len);
  1437. il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
  1438. errcnt = 0;
  1439. for (; len > 0; len -= sizeof(u32), image++) {
  1440. /* read data comes through single port, auto-incr addr */
  1441. /* NOTE: Use the debugless read so we don't flood kernel log
  1442. * if IL_DL_IO is set */
  1443. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1444. if (val != le32_to_cpu(*image)) {
  1445. IL_ERR("uCode INST section is invalid at "
  1446. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1447. save_len - len, val, le32_to_cpu(*image));
  1448. rc = -EIO;
  1449. errcnt++;
  1450. if (errcnt >= 20)
  1451. break;
  1452. }
  1453. }
  1454. if (!errcnt)
  1455. D_INFO("ucode image in INSTRUCTION memory is good\n");
  1456. return rc;
  1457. }
  1458. /**
  1459. * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1460. * using sample data 100 bytes apart. If these sample points are good,
  1461. * it's a pretty good bet that everything between them is good, too.
  1462. */
  1463. static int
  1464. il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
  1465. {
  1466. u32 val;
  1467. int rc = 0;
  1468. u32 errcnt = 0;
  1469. u32 i;
  1470. D_INFO("ucode inst image size is %u\n", len);
  1471. for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
  1472. /* read data comes through single port, auto-incr addr */
  1473. /* NOTE: Use the debugless read so we don't flood kernel log
  1474. * if IL_DL_IO is set */
  1475. il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
  1476. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1477. if (val != le32_to_cpu(*image)) {
  1478. #if 0 /* Enable this if you want to see details */
  1479. IL_ERR("uCode INST section is invalid at "
  1480. "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
  1481. *image);
  1482. #endif
  1483. rc = -EIO;
  1484. errcnt++;
  1485. if (errcnt >= 3)
  1486. break;
  1487. }
  1488. }
  1489. return rc;
  1490. }
  1491. /**
  1492. * il3945_verify_ucode - determine which instruction image is in SRAM,
  1493. * and verify its contents
  1494. */
  1495. static int
  1496. il3945_verify_ucode(struct il_priv *il)
  1497. {
  1498. __le32 *image;
  1499. u32 len;
  1500. int rc = 0;
  1501. /* Try bootstrap */
  1502. image = (__le32 *) il->ucode_boot.v_addr;
  1503. len = il->ucode_boot.len;
  1504. rc = il3945_verify_inst_sparse(il, image, len);
  1505. if (rc == 0) {
  1506. D_INFO("Bootstrap uCode is good in inst SRAM\n");
  1507. return 0;
  1508. }
  1509. /* Try initialize */
  1510. image = (__le32 *) il->ucode_init.v_addr;
  1511. len = il->ucode_init.len;
  1512. rc = il3945_verify_inst_sparse(il, image, len);
  1513. if (rc == 0) {
  1514. D_INFO("Initialize uCode is good in inst SRAM\n");
  1515. return 0;
  1516. }
  1517. /* Try runtime/protocol */
  1518. image = (__le32 *) il->ucode_code.v_addr;
  1519. len = il->ucode_code.len;
  1520. rc = il3945_verify_inst_sparse(il, image, len);
  1521. if (rc == 0) {
  1522. D_INFO("Runtime uCode is good in inst SRAM\n");
  1523. return 0;
  1524. }
  1525. IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1526. /* Since nothing seems to match, show first several data entries in
  1527. * instruction SRAM, so maybe visual inspection will give a clue.
  1528. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1529. image = (__le32 *) il->ucode_boot.v_addr;
  1530. len = il->ucode_boot.len;
  1531. rc = il3945_verify_inst_full(il, image, len);
  1532. return rc;
  1533. }
  1534. static void
  1535. il3945_nic_start(struct il_priv *il)
  1536. {
  1537. /* Remove all resets to allow NIC to operate */
  1538. _il_wr(il, CSR_RESET, 0);
  1539. }
  1540. #define IL3945_UCODE_GET(item) \
  1541. static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
  1542. { \
  1543. return le32_to_cpu(ucode->v1.item); \
  1544. }
  1545. static u32
  1546. il3945_ucode_get_header_size(u32 api_ver)
  1547. {
  1548. return 24;
  1549. }
  1550. static u8 *
  1551. il3945_ucode_get_data(const struct il_ucode_header *ucode)
  1552. {
  1553. return (u8 *) ucode->v1.data;
  1554. }
  1555. IL3945_UCODE_GET(inst_size);
  1556. IL3945_UCODE_GET(data_size);
  1557. IL3945_UCODE_GET(init_size);
  1558. IL3945_UCODE_GET(init_data_size);
  1559. IL3945_UCODE_GET(boot_size);
  1560. /**
  1561. * il3945_read_ucode - Read uCode images from disk file.
  1562. *
  1563. * Copy into buffers for card to fetch via bus-mastering
  1564. */
  1565. static int
  1566. il3945_read_ucode(struct il_priv *il)
  1567. {
  1568. const struct il_ucode_header *ucode;
  1569. int ret = -EINVAL, idx;
  1570. const struct firmware *ucode_raw;
  1571. /* firmware file name contains uCode/driver compatibility version */
  1572. const char *name_pre = il->cfg->fw_name_pre;
  1573. const unsigned int api_max = il->cfg->ucode_api_max;
  1574. const unsigned int api_min = il->cfg->ucode_api_min;
  1575. char buf[25];
  1576. u8 *src;
  1577. size_t len;
  1578. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1579. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1580. * request_firmware() is synchronous, file is in memory on return. */
  1581. for (idx = api_max; idx >= api_min; idx--) {
  1582. sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
  1583. ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
  1584. if (ret < 0) {
  1585. IL_ERR("%s firmware file req failed: %d\n", buf, ret);
  1586. if (ret == -ENOENT)
  1587. continue;
  1588. else
  1589. goto error;
  1590. } else {
  1591. if (idx < api_max)
  1592. IL_ERR("Loaded firmware %s, "
  1593. "which is deprecated. "
  1594. " Please use API v%u instead.\n", buf,
  1595. api_max);
  1596. D_INFO("Got firmware '%s' file "
  1597. "(%zd bytes) from disk\n", buf, ucode_raw->size);
  1598. break;
  1599. }
  1600. }
  1601. if (ret < 0)
  1602. goto error;
  1603. /* Make sure that we got at least our header! */
  1604. if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
  1605. IL_ERR("File size way too small!\n");
  1606. ret = -EINVAL;
  1607. goto err_release;
  1608. }
  1609. /* Data from ucode file: header followed by uCode images */
  1610. ucode = (struct il_ucode_header *)ucode_raw->data;
  1611. il->ucode_ver = le32_to_cpu(ucode->ver);
  1612. api_ver = IL_UCODE_API(il->ucode_ver);
  1613. inst_size = il3945_ucode_get_inst_size(ucode);
  1614. data_size = il3945_ucode_get_data_size(ucode);
  1615. init_size = il3945_ucode_get_init_size(ucode);
  1616. init_data_size = il3945_ucode_get_init_data_size(ucode);
  1617. boot_size = il3945_ucode_get_boot_size(ucode);
  1618. src = il3945_ucode_get_data(ucode);
  1619. /* api_ver should match the api version forming part of the
  1620. * firmware filename ... but we don't check for that and only rely
  1621. * on the API version read from firmware header from here on forward */
  1622. if (api_ver < api_min || api_ver > api_max) {
  1623. IL_ERR("Driver unable to support your firmware API. "
  1624. "Driver supports v%u, firmware is v%u.\n", api_max,
  1625. api_ver);
  1626. il->ucode_ver = 0;
  1627. ret = -EINVAL;
  1628. goto err_release;
  1629. }
  1630. if (api_ver != api_max)
  1631. IL_ERR("Firmware has old API version. Expected %u, "
  1632. "got %u. New firmware can be obtained "
  1633. "from http://www.intellinuxwireless.org.\n", api_max,
  1634. api_ver);
  1635. IL_INFO("loaded firmware version %u.%u.%u.%u\n",
  1636. IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
  1637. IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
  1638. snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
  1639. "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
  1640. IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
  1641. IL_UCODE_SERIAL(il->ucode_ver));
  1642. D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
  1643. D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  1644. D_INFO("f/w package hdr runtime data size = %u\n", data_size);
  1645. D_INFO("f/w package hdr init inst size = %u\n", init_size);
  1646. D_INFO("f/w package hdr init data size = %u\n", init_data_size);
  1647. D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  1648. /* Verify size of file vs. image size info in file's header */
  1649. if (ucode_raw->size !=
  1650. il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
  1651. init_size + init_data_size + boot_size) {
  1652. D_INFO("uCode file size %zd does not match expected size\n",
  1653. ucode_raw->size);
  1654. ret = -EINVAL;
  1655. goto err_release;
  1656. }
  1657. /* Verify that uCode images will fit in card's SRAM */
  1658. if (inst_size > IL39_MAX_INST_SIZE) {
  1659. D_INFO("uCode instr len %d too large to fit in\n", inst_size);
  1660. ret = -EINVAL;
  1661. goto err_release;
  1662. }
  1663. if (data_size > IL39_MAX_DATA_SIZE) {
  1664. D_INFO("uCode data len %d too large to fit in\n", data_size);
  1665. ret = -EINVAL;
  1666. goto err_release;
  1667. }
  1668. if (init_size > IL39_MAX_INST_SIZE) {
  1669. D_INFO("uCode init instr len %d too large to fit in\n",
  1670. init_size);
  1671. ret = -EINVAL;
  1672. goto err_release;
  1673. }
  1674. if (init_data_size > IL39_MAX_DATA_SIZE) {
  1675. D_INFO("uCode init data len %d too large to fit in\n",
  1676. init_data_size);
  1677. ret = -EINVAL;
  1678. goto err_release;
  1679. }
  1680. if (boot_size > IL39_MAX_BSM_SIZE) {
  1681. D_INFO("uCode boot instr len %d too large to fit in\n",
  1682. boot_size);
  1683. ret = -EINVAL;
  1684. goto err_release;
  1685. }
  1686. /* Allocate ucode buffers for card's bus-master loading ... */
  1687. /* Runtime instructions and 2 copies of data:
  1688. * 1) unmodified from disk
  1689. * 2) backup cache for save/restore during power-downs */
  1690. il->ucode_code.len = inst_size;
  1691. il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
  1692. il->ucode_data.len = data_size;
  1693. il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
  1694. il->ucode_data_backup.len = data_size;
  1695. il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1696. if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
  1697. !il->ucode_data_backup.v_addr)
  1698. goto err_pci_alloc;
  1699. /* Initialization instructions and data */
  1700. if (init_size && init_data_size) {
  1701. il->ucode_init.len = init_size;
  1702. il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
  1703. il->ucode_init_data.len = init_data_size;
  1704. il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
  1705. if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
  1706. goto err_pci_alloc;
  1707. }
  1708. /* Bootstrap (instructions only, no data) */
  1709. if (boot_size) {
  1710. il->ucode_boot.len = boot_size;
  1711. il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
  1712. if (!il->ucode_boot.v_addr)
  1713. goto err_pci_alloc;
  1714. }
  1715. /* Copy images into buffers for card's bus-master reads ... */
  1716. /* Runtime instructions (first block of data in file) */
  1717. len = inst_size;
  1718. D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
  1719. memcpy(il->ucode_code.v_addr, src, len);
  1720. src += len;
  1721. D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1722. il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
  1723. /* Runtime data (2nd block)
  1724. * NOTE: Copy into backup buffer will be done in il3945_up() */
  1725. len = data_size;
  1726. D_INFO("Copying (but not loading) uCode data len %zd\n", len);
  1727. memcpy(il->ucode_data.v_addr, src, len);
  1728. memcpy(il->ucode_data_backup.v_addr, src, len);
  1729. src += len;
  1730. /* Initialization instructions (3rd block) */
  1731. if (init_size) {
  1732. len = init_size;
  1733. D_INFO("Copying (but not loading) init instr len %zd\n", len);
  1734. memcpy(il->ucode_init.v_addr, src, len);
  1735. src += len;
  1736. }
  1737. /* Initialization data (4th block) */
  1738. if (init_data_size) {
  1739. len = init_data_size;
  1740. D_INFO("Copying (but not loading) init data len %zd\n", len);
  1741. memcpy(il->ucode_init_data.v_addr, src, len);
  1742. src += len;
  1743. }
  1744. /* Bootstrap instructions (5th block) */
  1745. len = boot_size;
  1746. D_INFO("Copying (but not loading) boot instr len %zd\n", len);
  1747. memcpy(il->ucode_boot.v_addr, src, len);
  1748. /* We have our copies now, allow OS release its copies */
  1749. release_firmware(ucode_raw);
  1750. return 0;
  1751. err_pci_alloc:
  1752. IL_ERR("failed to allocate pci memory\n");
  1753. ret = -ENOMEM;
  1754. il3945_dealloc_ucode_pci(il);
  1755. err_release:
  1756. release_firmware(ucode_raw);
  1757. error:
  1758. return ret;
  1759. }
  1760. /**
  1761. * il3945_set_ucode_ptrs - Set uCode address location
  1762. *
  1763. * Tell initialization uCode where to find runtime uCode.
  1764. *
  1765. * BSM registers initially contain pointers to initialization uCode.
  1766. * We need to replace them to load runtime uCode inst and data,
  1767. * and to save runtime data when powering down.
  1768. */
  1769. static int
  1770. il3945_set_ucode_ptrs(struct il_priv *il)
  1771. {
  1772. dma_addr_t pinst;
  1773. dma_addr_t pdata;
  1774. /* bits 31:0 for 3945 */
  1775. pinst = il->ucode_code.p_addr;
  1776. pdata = il->ucode_data_backup.p_addr;
  1777. /* Tell bootstrap uCode where to find image to load */
  1778. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  1779. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  1780. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
  1781. /* Inst byte count must be last to set up, bit 31 signals uCode
  1782. * that all new ptr/size info is in place */
  1783. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
  1784. il->ucode_code.len | BSM_DRAM_INST_LOAD);
  1785. D_INFO("Runtime uCode pointers are set.\n");
  1786. return 0;
  1787. }
  1788. /**
  1789. * il3945_init_alive_start - Called after N_ALIVE notification received
  1790. *
  1791. * Called after N_ALIVE notification received from "initialize" uCode.
  1792. *
  1793. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1794. */
  1795. static void
  1796. il3945_init_alive_start(struct il_priv *il)
  1797. {
  1798. /* Check alive response for "valid" sign from uCode */
  1799. if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
  1800. /* We had an error bringing up the hardware, so take it
  1801. * all the way back down so we can try again */
  1802. D_INFO("Initialize Alive failed.\n");
  1803. goto restart;
  1804. }
  1805. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1806. * This is a paranoid check, because we would not have gotten the
  1807. * "initialize" alive if code weren't properly loaded. */
  1808. if (il3945_verify_ucode(il)) {
  1809. /* Runtime instruction load was bad;
  1810. * take it all the way back down so we can try again */
  1811. D_INFO("Bad \"initialize\" uCode load.\n");
  1812. goto restart;
  1813. }
  1814. /* Send pointers to protocol/runtime uCode image ... init code will
  1815. * load and launch runtime uCode, which will send us another "Alive"
  1816. * notification. */
  1817. D_INFO("Initialization Alive received.\n");
  1818. if (il3945_set_ucode_ptrs(il)) {
  1819. /* Runtime instruction load won't happen;
  1820. * take it all the way back down so we can try again */
  1821. D_INFO("Couldn't set up uCode pointers.\n");
  1822. goto restart;
  1823. }
  1824. return;
  1825. restart:
  1826. queue_work(il->workqueue, &il->restart);
  1827. }
  1828. /**
  1829. * il3945_alive_start - called after N_ALIVE notification received
  1830. * from protocol/runtime uCode (initialization uCode's
  1831. * Alive gets handled by il3945_init_alive_start()).
  1832. */
  1833. static void
  1834. il3945_alive_start(struct il_priv *il)
  1835. {
  1836. int thermal_spin = 0;
  1837. u32 rfkill;
  1838. D_INFO("Runtime Alive received.\n");
  1839. if (il->card_alive.is_valid != UCODE_VALID_OK) {
  1840. /* We had an error bringing up the hardware, so take it
  1841. * all the way back down so we can try again */
  1842. D_INFO("Alive failed.\n");
  1843. goto restart;
  1844. }
  1845. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  1846. * This is a paranoid check, because we would not have gotten the
  1847. * "runtime" alive if code weren't properly loaded. */
  1848. if (il3945_verify_ucode(il)) {
  1849. /* Runtime instruction load was bad;
  1850. * take it all the way back down so we can try again */
  1851. D_INFO("Bad runtime uCode load.\n");
  1852. goto restart;
  1853. }
  1854. rfkill = il_rd_prph(il, APMG_RFKILL_REG);
  1855. D_INFO("RFKILL status: 0x%x\n", rfkill);
  1856. if (rfkill & 0x1) {
  1857. clear_bit(S_RFKILL, &il->status);
  1858. /* if RFKILL is not on, then wait for thermal
  1859. * sensor in adapter to kick in */
  1860. while (il3945_hw_get_temperature(il) == 0) {
  1861. thermal_spin++;
  1862. udelay(10);
  1863. }
  1864. if (thermal_spin)
  1865. D_INFO("Thermal calibration took %dus\n",
  1866. thermal_spin * 10);
  1867. } else
  1868. set_bit(S_RFKILL, &il->status);
  1869. /* After the ALIVE response, we can send commands to 3945 uCode */
  1870. set_bit(S_ALIVE, &il->status);
  1871. /* Enable watchdog to monitor the driver tx queues */
  1872. il_setup_watchdog(il);
  1873. if (il_is_rfkill(il))
  1874. return;
  1875. ieee80211_wake_queues(il->hw);
  1876. il->active_rate = RATES_MASK_3945;
  1877. il_power_update_mode(il, true);
  1878. if (il_is_associated(il)) {
  1879. struct il3945_rxon_cmd *active_rxon =
  1880. (struct il3945_rxon_cmd *)(&il->active);
  1881. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1882. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1883. } else {
  1884. /* Initialize our rx_config data */
  1885. il_connection_init_rx_config(il);
  1886. }
  1887. /* Configure Bluetooth device coexistence support */
  1888. il_send_bt_config(il);
  1889. set_bit(S_READY, &il->status);
  1890. /* Configure the adapter for unassociated operation */
  1891. il3945_commit_rxon(il);
  1892. il3945_reg_txpower_periodic(il);
  1893. D_INFO("ALIVE processing complete.\n");
  1894. wake_up(&il->wait_command_queue);
  1895. return;
  1896. restart:
  1897. queue_work(il->workqueue, &il->restart);
  1898. }
  1899. static void il3945_cancel_deferred_work(struct il_priv *il);
  1900. static void
  1901. __il3945_down(struct il_priv *il)
  1902. {
  1903. unsigned long flags;
  1904. int exit_pending;
  1905. D_INFO(DRV_NAME " is going down\n");
  1906. il_scan_cancel_timeout(il, 200);
  1907. exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
  1908. /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
  1909. * to prevent rearm timer */
  1910. del_timer_sync(&il->watchdog);
  1911. /* Station information will now be cleared in device */
  1912. il_clear_ucode_stations(il);
  1913. il_dealloc_bcast_stations(il);
  1914. il_clear_driver_stations(il);
  1915. /* Unblock any waiting calls */
  1916. wake_up_all(&il->wait_command_queue);
  1917. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1918. * exiting the module */
  1919. if (!exit_pending)
  1920. clear_bit(S_EXIT_PENDING, &il->status);
  1921. /* stop and reset the on-board processor */
  1922. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  1923. /* tell the device to stop sending interrupts */
  1924. spin_lock_irqsave(&il->lock, flags);
  1925. il_disable_interrupts(il);
  1926. spin_unlock_irqrestore(&il->lock, flags);
  1927. il3945_synchronize_irq(il);
  1928. if (il->mac80211_registered)
  1929. ieee80211_stop_queues(il->hw);
  1930. /* If we have not previously called il3945_init() then
  1931. * clear all bits but the RF Kill bits and return */
  1932. if (!il_is_init(il)) {
  1933. il->status =
  1934. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1935. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1936. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1937. goto exit;
  1938. }
  1939. /* ...otherwise clear out all the status bits but the RF Kill
  1940. * bit and continue taking the NIC down. */
  1941. il->status &=
  1942. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1943. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1944. test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
  1945. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1946. /*
  1947. * We disabled and synchronized interrupt, and priv->mutex is taken, so
  1948. * here is the only thread which will program device registers, but
  1949. * still have lockdep assertions, so we are taking reg_lock.
  1950. */
  1951. spin_lock_irq(&il->reg_lock);
  1952. /* FIXME: il_grab_nic_access if rfkill is off ? */
  1953. il3945_hw_txq_ctx_stop(il);
  1954. il3945_hw_rxq_stop(il);
  1955. /* Power-down device's busmaster DMA clocks */
  1956. _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  1957. udelay(5);
  1958. /* Stop the device, and put it in low power state */
  1959. _il_apm_stop(il);
  1960. spin_unlock_irq(&il->reg_lock);
  1961. il3945_hw_txq_ctx_free(il);
  1962. exit:
  1963. memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
  1964. if (il->beacon_skb)
  1965. dev_kfree_skb(il->beacon_skb);
  1966. il->beacon_skb = NULL;
  1967. /* clear out any free frames */
  1968. il3945_clear_free_frames(il);
  1969. }
  1970. static void
  1971. il3945_down(struct il_priv *il)
  1972. {
  1973. mutex_lock(&il->mutex);
  1974. __il3945_down(il);
  1975. mutex_unlock(&il->mutex);
  1976. il3945_cancel_deferred_work(il);
  1977. }
  1978. #define MAX_HW_RESTARTS 5
  1979. static int
  1980. il3945_alloc_bcast_station(struct il_priv *il)
  1981. {
  1982. unsigned long flags;
  1983. u8 sta_id;
  1984. spin_lock_irqsave(&il->sta_lock, flags);
  1985. sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
  1986. if (sta_id == IL_INVALID_STATION) {
  1987. IL_ERR("Unable to prepare broadcast station\n");
  1988. spin_unlock_irqrestore(&il->sta_lock, flags);
  1989. return -EINVAL;
  1990. }
  1991. il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
  1992. il->stations[sta_id].used |= IL_STA_BCAST;
  1993. spin_unlock_irqrestore(&il->sta_lock, flags);
  1994. return 0;
  1995. }
  1996. static int
  1997. __il3945_up(struct il_priv *il)
  1998. {
  1999. int rc, i;
  2000. rc = il3945_alloc_bcast_station(il);
  2001. if (rc)
  2002. return rc;
  2003. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2004. IL_WARN("Exit pending; will not bring the NIC up\n");
  2005. return -EIO;
  2006. }
  2007. if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
  2008. IL_ERR("ucode not available for device bring up\n");
  2009. return -EIO;
  2010. }
  2011. /* If platform's RF_KILL switch is NOT set to KILL */
  2012. if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2013. clear_bit(S_RFKILL, &il->status);
  2014. else {
  2015. set_bit(S_RFKILL, &il->status);
  2016. return -ERFKILL;
  2017. }
  2018. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2019. rc = il3945_hw_nic_init(il);
  2020. if (rc) {
  2021. IL_ERR("Unable to int nic\n");
  2022. return rc;
  2023. }
  2024. /* make sure rfkill handshake bits are cleared */
  2025. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2026. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2027. /* clear (again), then enable host interrupts */
  2028. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2029. il_enable_interrupts(il);
  2030. /* really make sure rfkill handshake bits are cleared */
  2031. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2032. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2033. /* Copy original ucode data image from disk into backup cache.
  2034. * This will be used to initialize the on-board processor's
  2035. * data SRAM for a clean start when the runtime program first loads. */
  2036. memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
  2037. il->ucode_data.len);
  2038. /* We return success when we resume from suspend and rf_kill is on. */
  2039. if (test_bit(S_RFKILL, &il->status))
  2040. return 0;
  2041. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2042. /* load bootstrap state machine,
  2043. * load bootstrap program into processor's memory,
  2044. * prepare to load the "initialize" uCode */
  2045. rc = il->ops->load_ucode(il);
  2046. if (rc) {
  2047. IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
  2048. continue;
  2049. }
  2050. /* start card; "initialize" will load runtime ucode */
  2051. il3945_nic_start(il);
  2052. D_INFO(DRV_NAME " is coming up\n");
  2053. return 0;
  2054. }
  2055. set_bit(S_EXIT_PENDING, &il->status);
  2056. __il3945_down(il);
  2057. clear_bit(S_EXIT_PENDING, &il->status);
  2058. /* tried to restart and config the device for as long as our
  2059. * patience could withstand */
  2060. IL_ERR("Unable to initialize device after %d attempts.\n", i);
  2061. return -EIO;
  2062. }
  2063. /*****************************************************************************
  2064. *
  2065. * Workqueue callbacks
  2066. *
  2067. *****************************************************************************/
  2068. static void
  2069. il3945_bg_init_alive_start(struct work_struct *data)
  2070. {
  2071. struct il_priv *il =
  2072. container_of(data, struct il_priv, init_alive_start.work);
  2073. mutex_lock(&il->mutex);
  2074. if (test_bit(S_EXIT_PENDING, &il->status))
  2075. goto out;
  2076. il3945_init_alive_start(il);
  2077. out:
  2078. mutex_unlock(&il->mutex);
  2079. }
  2080. static void
  2081. il3945_bg_alive_start(struct work_struct *data)
  2082. {
  2083. struct il_priv *il =
  2084. container_of(data, struct il_priv, alive_start.work);
  2085. mutex_lock(&il->mutex);
  2086. if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
  2087. goto out;
  2088. il3945_alive_start(il);
  2089. out:
  2090. mutex_unlock(&il->mutex);
  2091. }
  2092. /*
  2093. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2094. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2095. * *is* readable even when device has been SW_RESET into low power mode
  2096. * (e.g. during RF KILL).
  2097. */
  2098. static void
  2099. il3945_rfkill_poll(struct work_struct *data)
  2100. {
  2101. struct il_priv *il =
  2102. container_of(data, struct il_priv, _3945.rfkill_poll.work);
  2103. bool old_rfkill = test_bit(S_RFKILL, &il->status);
  2104. bool new_rfkill =
  2105. !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2106. if (new_rfkill != old_rfkill) {
  2107. if (new_rfkill)
  2108. set_bit(S_RFKILL, &il->status);
  2109. else
  2110. clear_bit(S_RFKILL, &il->status);
  2111. wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
  2112. D_RF_KILL("RF_KILL bit toggled to %s.\n",
  2113. new_rfkill ? "disable radio" : "enable radio");
  2114. }
  2115. /* Keep this running, even if radio now enabled. This will be
  2116. * cancelled in mac_start() if system decides to start again */
  2117. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2118. round_jiffies_relative(2 * HZ));
  2119. }
  2120. int
  2121. il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
  2122. {
  2123. struct il_host_cmd cmd = {
  2124. .id = C_SCAN,
  2125. .len = sizeof(struct il3945_scan_cmd),
  2126. .flags = CMD_SIZE_HUGE,
  2127. };
  2128. struct il3945_scan_cmd *scan;
  2129. u8 n_probes = 0;
  2130. enum ieee80211_band band;
  2131. bool is_active = false;
  2132. int ret;
  2133. u16 len;
  2134. lockdep_assert_held(&il->mutex);
  2135. if (!il->scan_cmd) {
  2136. il->scan_cmd =
  2137. kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
  2138. GFP_KERNEL);
  2139. if (!il->scan_cmd) {
  2140. D_SCAN("Fail to allocate scan memory\n");
  2141. return -ENOMEM;
  2142. }
  2143. }
  2144. scan = il->scan_cmd;
  2145. memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
  2146. scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
  2147. scan->quiet_time = IL_ACTIVE_QUIET_TIME;
  2148. if (il_is_associated(il)) {
  2149. u16 interval;
  2150. u32 extra;
  2151. u32 suspend_time = 100;
  2152. u32 scan_suspend_time = 100;
  2153. D_INFO("Scanning while associated...\n");
  2154. interval = vif->bss_conf.beacon_int;
  2155. scan->suspend_time = 0;
  2156. scan->max_out_time = cpu_to_le32(200 * 1024);
  2157. if (!interval)
  2158. interval = suspend_time;
  2159. /*
  2160. * suspend time format:
  2161. * 0-19: beacon interval in usec (time before exec.)
  2162. * 20-23: 0
  2163. * 24-31: number of beacons (suspend between channels)
  2164. */
  2165. extra = (suspend_time / interval) << 24;
  2166. scan_suspend_time =
  2167. 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
  2168. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2169. D_SCAN("suspend_time 0x%X beacon interval %d\n",
  2170. scan_suspend_time, interval);
  2171. }
  2172. if (il->scan_request->n_ssids) {
  2173. int i, p = 0;
  2174. D_SCAN("Kicking off active scan\n");
  2175. for (i = 0; i < il->scan_request->n_ssids; i++) {
  2176. /* always does wildcard anyway */
  2177. if (!il->scan_request->ssids[i].ssid_len)
  2178. continue;
  2179. scan->direct_scan[p].id = WLAN_EID_SSID;
  2180. scan->direct_scan[p].len =
  2181. il->scan_request->ssids[i].ssid_len;
  2182. memcpy(scan->direct_scan[p].ssid,
  2183. il->scan_request->ssids[i].ssid,
  2184. il->scan_request->ssids[i].ssid_len);
  2185. n_probes++;
  2186. p++;
  2187. }
  2188. is_active = true;
  2189. } else
  2190. D_SCAN("Kicking off passive scan.\n");
  2191. /* We don't build a direct scan probe request; the uCode will do
  2192. * that based on the direct_mask added to each channel entry */
  2193. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2194. scan->tx_cmd.sta_id = il->hw_params.bcast_id;
  2195. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2196. /* flags + rate selection */
  2197. switch (il->scan_band) {
  2198. case IEEE80211_BAND_2GHZ:
  2199. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2200. scan->tx_cmd.rate = RATE_1M_PLCP;
  2201. band = IEEE80211_BAND_2GHZ;
  2202. break;
  2203. case IEEE80211_BAND_5GHZ:
  2204. scan->tx_cmd.rate = RATE_6M_PLCP;
  2205. band = IEEE80211_BAND_5GHZ;
  2206. break;
  2207. default:
  2208. IL_WARN("Invalid scan band\n");
  2209. return -EIO;
  2210. }
  2211. /*
  2212. * If active scaning is requested but a certain channel is marked
  2213. * passive, we can do active scanning if we detect transmissions. For
  2214. * passive only scanning disable switching to active on any channel.
  2215. */
  2216. scan->good_CRC_th =
  2217. is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
  2218. len =
  2219. il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
  2220. vif->addr, il->scan_request->ie,
  2221. il->scan_request->ie_len,
  2222. IL_MAX_SCAN_SIZE - sizeof(*scan));
  2223. scan->tx_cmd.len = cpu_to_le16(len);
  2224. /* select Rx antennas */
  2225. scan->flags |= il3945_get_antenna_flags(il);
  2226. scan->channel_count =
  2227. il3945_get_channels_for_scan(il, band, is_active, n_probes,
  2228. (void *)&scan->data[len], vif);
  2229. if (scan->channel_count == 0) {
  2230. D_SCAN("channel count %d\n", scan->channel_count);
  2231. return -EIO;
  2232. }
  2233. cmd.len +=
  2234. le16_to_cpu(scan->tx_cmd.len) +
  2235. scan->channel_count * sizeof(struct il3945_scan_channel);
  2236. cmd.data = scan;
  2237. scan->len = cpu_to_le16(cmd.len);
  2238. set_bit(S_SCAN_HW, &il->status);
  2239. ret = il_send_cmd_sync(il, &cmd);
  2240. if (ret)
  2241. clear_bit(S_SCAN_HW, &il->status);
  2242. return ret;
  2243. }
  2244. void
  2245. il3945_post_scan(struct il_priv *il)
  2246. {
  2247. /*
  2248. * Since setting the RXON may have been deferred while
  2249. * performing the scan, fire one off if needed
  2250. */
  2251. if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
  2252. il3945_commit_rxon(il);
  2253. }
  2254. static void
  2255. il3945_bg_restart(struct work_struct *data)
  2256. {
  2257. struct il_priv *il = container_of(data, struct il_priv, restart);
  2258. if (test_bit(S_EXIT_PENDING, &il->status))
  2259. return;
  2260. if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
  2261. mutex_lock(&il->mutex);
  2262. il->is_open = 0;
  2263. mutex_unlock(&il->mutex);
  2264. il3945_down(il);
  2265. ieee80211_restart_hw(il->hw);
  2266. } else {
  2267. il3945_down(il);
  2268. mutex_lock(&il->mutex);
  2269. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2270. mutex_unlock(&il->mutex);
  2271. return;
  2272. }
  2273. __il3945_up(il);
  2274. mutex_unlock(&il->mutex);
  2275. }
  2276. }
  2277. static void
  2278. il3945_bg_rx_replenish(struct work_struct *data)
  2279. {
  2280. struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
  2281. mutex_lock(&il->mutex);
  2282. if (test_bit(S_EXIT_PENDING, &il->status))
  2283. goto out;
  2284. il3945_rx_replenish(il);
  2285. out:
  2286. mutex_unlock(&il->mutex);
  2287. }
  2288. void
  2289. il3945_post_associate(struct il_priv *il)
  2290. {
  2291. int rc = 0;
  2292. struct ieee80211_conf *conf = NULL;
  2293. if (!il->vif || !il->is_open)
  2294. return;
  2295. D_ASSOC("Associated as %d to: %pM\n", il->vif->bss_conf.aid,
  2296. il->active.bssid_addr);
  2297. if (test_bit(S_EXIT_PENDING, &il->status))
  2298. return;
  2299. il_scan_cancel_timeout(il, 200);
  2300. conf = &il->hw->conf;
  2301. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2302. il3945_commit_rxon(il);
  2303. rc = il_send_rxon_timing(il);
  2304. if (rc)
  2305. IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
  2306. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2307. il->staging.assoc_id = cpu_to_le16(il->vif->bss_conf.aid);
  2308. D_ASSOC("assoc id %d beacon interval %d\n", il->vif->bss_conf.aid,
  2309. il->vif->bss_conf.beacon_int);
  2310. if (il->vif->bss_conf.use_short_preamble)
  2311. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2312. else
  2313. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2314. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2315. if (il->vif->bss_conf.use_short_slot)
  2316. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2317. else
  2318. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2319. }
  2320. il3945_commit_rxon(il);
  2321. switch (il->vif->type) {
  2322. case NL80211_IFTYPE_STATION:
  2323. il3945_rate_scale_init(il->hw, IL_AP_ID);
  2324. break;
  2325. case NL80211_IFTYPE_ADHOC:
  2326. il3945_send_beacon_cmd(il);
  2327. break;
  2328. default:
  2329. IL_ERR("%s Should not be called in %d mode\n", __func__,
  2330. il->vif->type);
  2331. break;
  2332. }
  2333. }
  2334. /*****************************************************************************
  2335. *
  2336. * mac80211 entry point functions
  2337. *
  2338. *****************************************************************************/
  2339. #define UCODE_READY_TIMEOUT (2 * HZ)
  2340. static int
  2341. il3945_mac_start(struct ieee80211_hw *hw)
  2342. {
  2343. struct il_priv *il = hw->priv;
  2344. int ret;
  2345. /* we should be verifying the device is ready to be opened */
  2346. mutex_lock(&il->mutex);
  2347. D_MAC80211("enter\n");
  2348. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2349. * ucode filename and max sizes are card-specific. */
  2350. if (!il->ucode_code.len) {
  2351. ret = il3945_read_ucode(il);
  2352. if (ret) {
  2353. IL_ERR("Could not read microcode: %d\n", ret);
  2354. mutex_unlock(&il->mutex);
  2355. goto out_release_irq;
  2356. }
  2357. }
  2358. ret = __il3945_up(il);
  2359. mutex_unlock(&il->mutex);
  2360. if (ret)
  2361. goto out_release_irq;
  2362. D_INFO("Start UP work.\n");
  2363. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2364. * mac80211 will not be run successfully. */
  2365. ret = wait_event_timeout(il->wait_command_queue,
  2366. test_bit(S_READY, &il->status),
  2367. UCODE_READY_TIMEOUT);
  2368. if (!ret) {
  2369. if (!test_bit(S_READY, &il->status)) {
  2370. IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
  2371. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2372. ret = -ETIMEDOUT;
  2373. goto out_release_irq;
  2374. }
  2375. }
  2376. /* ucode is running and will send rfkill notifications,
  2377. * no need to poll the killswitch state anymore */
  2378. cancel_delayed_work(&il->_3945.rfkill_poll);
  2379. il->is_open = 1;
  2380. D_MAC80211("leave\n");
  2381. return 0;
  2382. out_release_irq:
  2383. il->is_open = 0;
  2384. D_MAC80211("leave - failed\n");
  2385. return ret;
  2386. }
  2387. static void
  2388. il3945_mac_stop(struct ieee80211_hw *hw)
  2389. {
  2390. struct il_priv *il = hw->priv;
  2391. D_MAC80211("enter\n");
  2392. if (!il->is_open) {
  2393. D_MAC80211("leave - skip\n");
  2394. return;
  2395. }
  2396. il->is_open = 0;
  2397. il3945_down(il);
  2398. flush_workqueue(il->workqueue);
  2399. /* start polling the killswitch state again */
  2400. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2401. round_jiffies_relative(2 * HZ));
  2402. D_MAC80211("leave\n");
  2403. }
  2404. static void
  2405. il3945_mac_tx(struct ieee80211_hw *hw,
  2406. struct ieee80211_tx_control *control,
  2407. struct sk_buff *skb)
  2408. {
  2409. struct il_priv *il = hw->priv;
  2410. D_MAC80211("enter\n");
  2411. D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2412. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2413. if (il3945_tx_skb(il, control->sta, skb))
  2414. dev_kfree_skb_any(skb);
  2415. D_MAC80211("leave\n");
  2416. }
  2417. void
  2418. il3945_config_ap(struct il_priv *il)
  2419. {
  2420. struct ieee80211_vif *vif = il->vif;
  2421. int rc = 0;
  2422. if (test_bit(S_EXIT_PENDING, &il->status))
  2423. return;
  2424. /* The following should be done only at AP bring up */
  2425. if (!(il_is_associated(il))) {
  2426. /* RXON - unassoc (to set timing command) */
  2427. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2428. il3945_commit_rxon(il);
  2429. /* RXON Timing */
  2430. rc = il_send_rxon_timing(il);
  2431. if (rc)
  2432. IL_WARN("C_RXON_TIMING failed - "
  2433. "Attempting to continue.\n");
  2434. il->staging.assoc_id = 0;
  2435. if (vif->bss_conf.use_short_preamble)
  2436. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2437. else
  2438. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2439. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2440. if (vif->bss_conf.use_short_slot)
  2441. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2442. else
  2443. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2444. }
  2445. /* restore RXON assoc */
  2446. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2447. il3945_commit_rxon(il);
  2448. }
  2449. il3945_send_beacon_cmd(il);
  2450. }
  2451. static int
  2452. il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2453. struct ieee80211_vif *vif, struct ieee80211_sta *sta,
  2454. struct ieee80211_key_conf *key)
  2455. {
  2456. struct il_priv *il = hw->priv;
  2457. int ret = 0;
  2458. u8 sta_id = IL_INVALID_STATION;
  2459. u8 static_key;
  2460. D_MAC80211("enter\n");
  2461. if (il3945_mod_params.sw_crypto) {
  2462. D_MAC80211("leave - hwcrypto disabled\n");
  2463. return -EOPNOTSUPP;
  2464. }
  2465. /*
  2466. * To support IBSS RSN, don't program group keys in IBSS, the
  2467. * hardware will then not attempt to decrypt the frames.
  2468. */
  2469. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2470. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  2471. D_MAC80211("leave - IBSS RSN\n");
  2472. return -EOPNOTSUPP;
  2473. }
  2474. static_key = !il_is_associated(il);
  2475. if (!static_key) {
  2476. sta_id = il_sta_id_or_broadcast(il, sta);
  2477. if (sta_id == IL_INVALID_STATION) {
  2478. D_MAC80211("leave - station not found\n");
  2479. return -EINVAL;
  2480. }
  2481. }
  2482. mutex_lock(&il->mutex);
  2483. il_scan_cancel_timeout(il, 100);
  2484. switch (cmd) {
  2485. case SET_KEY:
  2486. if (static_key)
  2487. ret = il3945_set_static_key(il, key);
  2488. else
  2489. ret = il3945_set_dynamic_key(il, key, sta_id);
  2490. D_MAC80211("enable hwcrypto key\n");
  2491. break;
  2492. case DISABLE_KEY:
  2493. if (static_key)
  2494. ret = il3945_remove_static_key(il);
  2495. else
  2496. ret = il3945_clear_sta_key_info(il, sta_id);
  2497. D_MAC80211("disable hwcrypto key\n");
  2498. break;
  2499. default:
  2500. ret = -EINVAL;
  2501. }
  2502. D_MAC80211("leave ret %d\n", ret);
  2503. mutex_unlock(&il->mutex);
  2504. return ret;
  2505. }
  2506. static int
  2507. il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2508. struct ieee80211_sta *sta)
  2509. {
  2510. struct il_priv *il = hw->priv;
  2511. struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2512. int ret;
  2513. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2514. u8 sta_id;
  2515. mutex_lock(&il->mutex);
  2516. D_INFO("station %pM\n", sta->addr);
  2517. sta_priv->common.sta_id = IL_INVALID_STATION;
  2518. ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
  2519. if (ret) {
  2520. IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
  2521. /* Should we return success if return code is EEXIST ? */
  2522. mutex_unlock(&il->mutex);
  2523. return ret;
  2524. }
  2525. sta_priv->common.sta_id = sta_id;
  2526. /* Initialize rate scaling */
  2527. D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
  2528. il3945_rs_rate_init(il, sta, sta_id);
  2529. mutex_unlock(&il->mutex);
  2530. return 0;
  2531. }
  2532. static void
  2533. il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
  2534. unsigned int *total_flags, u64 multicast)
  2535. {
  2536. struct il_priv *il = hw->priv;
  2537. __le32 filter_or = 0, filter_nand = 0;
  2538. #define CHK(test, flag) do { \
  2539. if (*total_flags & (test)) \
  2540. filter_or |= (flag); \
  2541. else \
  2542. filter_nand |= (flag); \
  2543. } while (0)
  2544. D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
  2545. *total_flags);
  2546. CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK);
  2547. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  2548. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2549. #undef CHK
  2550. mutex_lock(&il->mutex);
  2551. il->staging.filter_flags &= ~filter_nand;
  2552. il->staging.filter_flags |= filter_or;
  2553. /*
  2554. * Not committing directly because hardware can perform a scan,
  2555. * but even if hw is ready, committing here breaks for some reason,
  2556. * we'll eventually commit the filter flags change anyway.
  2557. */
  2558. mutex_unlock(&il->mutex);
  2559. /*
  2560. * Receiving all multicast frames is always enabled by the
  2561. * default flags setup in il_connection_init_rx_config()
  2562. * since we currently do not support programming multicast
  2563. * filters into the device.
  2564. */
  2565. *total_flags &=
  2566. FIF_OTHER_BSS | FIF_ALLMULTI |
  2567. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2568. }
  2569. /*****************************************************************************
  2570. *
  2571. * sysfs attributes
  2572. *
  2573. *****************************************************************************/
  2574. #ifdef CONFIG_IWLEGACY_DEBUG
  2575. /*
  2576. * The following adds a new attribute to the sysfs representation
  2577. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2578. * used for controlling the debug level.
  2579. *
  2580. * See the level definitions in iwl for details.
  2581. *
  2582. * The debug_level being managed using sysfs below is a per device debug
  2583. * level that is used instead of the global debug level if it (the per
  2584. * device debug level) is set.
  2585. */
  2586. static ssize_t
  2587. il3945_show_debug_level(struct device *d, struct device_attribute *attr,
  2588. char *buf)
  2589. {
  2590. struct il_priv *il = dev_get_drvdata(d);
  2591. return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
  2592. }
  2593. static ssize_t
  2594. il3945_store_debug_level(struct device *d, struct device_attribute *attr,
  2595. const char *buf, size_t count)
  2596. {
  2597. struct il_priv *il = dev_get_drvdata(d);
  2598. unsigned long val;
  2599. int ret;
  2600. ret = kstrtoul(buf, 0, &val);
  2601. if (ret)
  2602. IL_INFO("%s is not in hex or decimal form.\n", buf);
  2603. else
  2604. il->debug_level = val;
  2605. return strnlen(buf, count);
  2606. }
  2607. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il3945_show_debug_level,
  2608. il3945_store_debug_level);
  2609. #endif /* CONFIG_IWLEGACY_DEBUG */
  2610. static ssize_t
  2611. il3945_show_temperature(struct device *d, struct device_attribute *attr,
  2612. char *buf)
  2613. {
  2614. struct il_priv *il = dev_get_drvdata(d);
  2615. if (!il_is_alive(il))
  2616. return -EAGAIN;
  2617. return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
  2618. }
  2619. static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
  2620. static ssize_t
  2621. il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
  2622. {
  2623. struct il_priv *il = dev_get_drvdata(d);
  2624. return sprintf(buf, "%d\n", il->tx_power_user_lmt);
  2625. }
  2626. static ssize_t
  2627. il3945_store_tx_power(struct device *d, struct device_attribute *attr,
  2628. const char *buf, size_t count)
  2629. {
  2630. struct il_priv *il = dev_get_drvdata(d);
  2631. char *p = (char *)buf;
  2632. u32 val;
  2633. val = simple_strtoul(p, &p, 10);
  2634. if (p == buf)
  2635. IL_INFO(": %s is not in decimal form.\n", buf);
  2636. else
  2637. il3945_hw_reg_set_txpower(il, val);
  2638. return count;
  2639. }
  2640. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power,
  2641. il3945_store_tx_power);
  2642. static ssize_t
  2643. il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
  2644. {
  2645. struct il_priv *il = dev_get_drvdata(d);
  2646. return sprintf(buf, "0x%04X\n", il->active.flags);
  2647. }
  2648. static ssize_t
  2649. il3945_store_flags(struct device *d, struct device_attribute *attr,
  2650. const char *buf, size_t count)
  2651. {
  2652. struct il_priv *il = dev_get_drvdata(d);
  2653. u32 flags = simple_strtoul(buf, NULL, 0);
  2654. mutex_lock(&il->mutex);
  2655. if (le32_to_cpu(il->staging.flags) != flags) {
  2656. /* Cancel any currently running scans... */
  2657. if (il_scan_cancel_timeout(il, 100))
  2658. IL_WARN("Could not cancel scan.\n");
  2659. else {
  2660. D_INFO("Committing rxon.flags = 0x%04X\n", flags);
  2661. il->staging.flags = cpu_to_le32(flags);
  2662. il3945_commit_rxon(il);
  2663. }
  2664. }
  2665. mutex_unlock(&il->mutex);
  2666. return count;
  2667. }
  2668. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags,
  2669. il3945_store_flags);
  2670. static ssize_t
  2671. il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
  2672. char *buf)
  2673. {
  2674. struct il_priv *il = dev_get_drvdata(d);
  2675. return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
  2676. }
  2677. static ssize_t
  2678. il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
  2679. const char *buf, size_t count)
  2680. {
  2681. struct il_priv *il = dev_get_drvdata(d);
  2682. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2683. mutex_lock(&il->mutex);
  2684. if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
  2685. /* Cancel any currently running scans... */
  2686. if (il_scan_cancel_timeout(il, 100))
  2687. IL_WARN("Could not cancel scan.\n");
  2688. else {
  2689. D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
  2690. filter_flags);
  2691. il->staging.filter_flags = cpu_to_le32(filter_flags);
  2692. il3945_commit_rxon(il);
  2693. }
  2694. }
  2695. mutex_unlock(&il->mutex);
  2696. return count;
  2697. }
  2698. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
  2699. il3945_store_filter_flags);
  2700. static ssize_t
  2701. il3945_show_measurement(struct device *d, struct device_attribute *attr,
  2702. char *buf)
  2703. {
  2704. struct il_priv *il = dev_get_drvdata(d);
  2705. struct il_spectrum_notification measure_report;
  2706. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2707. u8 *data = (u8 *) &measure_report;
  2708. unsigned long flags;
  2709. spin_lock_irqsave(&il->lock, flags);
  2710. if (!(il->measurement_status & MEASUREMENT_READY)) {
  2711. spin_unlock_irqrestore(&il->lock, flags);
  2712. return 0;
  2713. }
  2714. memcpy(&measure_report, &il->measure_report, size);
  2715. il->measurement_status = 0;
  2716. spin_unlock_irqrestore(&il->lock, flags);
  2717. while (size && PAGE_SIZE - len) {
  2718. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2719. PAGE_SIZE - len, true);
  2720. len = strlen(buf);
  2721. if (PAGE_SIZE - len)
  2722. buf[len++] = '\n';
  2723. ofs += 16;
  2724. size -= min(size, 16U);
  2725. }
  2726. return len;
  2727. }
  2728. static ssize_t
  2729. il3945_store_measurement(struct device *d, struct device_attribute *attr,
  2730. const char *buf, size_t count)
  2731. {
  2732. struct il_priv *il = dev_get_drvdata(d);
  2733. struct ieee80211_measurement_params params = {
  2734. .channel = le16_to_cpu(il->active.channel),
  2735. .start_time = cpu_to_le64(il->_3945.last_tsf),
  2736. .duration = cpu_to_le16(1),
  2737. };
  2738. u8 type = IL_MEASURE_BASIC;
  2739. u8 buffer[32];
  2740. u8 channel;
  2741. if (count) {
  2742. char *p = buffer;
  2743. strlcpy(buffer, buf, sizeof(buffer));
  2744. channel = simple_strtoul(p, NULL, 0);
  2745. if (channel)
  2746. params.channel = channel;
  2747. p = buffer;
  2748. while (*p && *p != ' ')
  2749. p++;
  2750. if (*p)
  2751. type = simple_strtoul(p + 1, NULL, 0);
  2752. }
  2753. D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
  2754. type, params.channel, buf);
  2755. il3945_get_measurement(il, &params, type);
  2756. return count;
  2757. }
  2758. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, il3945_show_measurement,
  2759. il3945_store_measurement);
  2760. static ssize_t
  2761. il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
  2762. const char *buf, size_t count)
  2763. {
  2764. struct il_priv *il = dev_get_drvdata(d);
  2765. il->retry_rate = simple_strtoul(buf, NULL, 0);
  2766. if (il->retry_rate <= 0)
  2767. il->retry_rate = 1;
  2768. return count;
  2769. }
  2770. static ssize_t
  2771. il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
  2772. char *buf)
  2773. {
  2774. struct il_priv *il = dev_get_drvdata(d);
  2775. return sprintf(buf, "%d", il->retry_rate);
  2776. }
  2777. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
  2778. il3945_store_retry_rate);
  2779. static ssize_t
  2780. il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
  2781. {
  2782. /* all this shit doesn't belong into sysfs anyway */
  2783. return 0;
  2784. }
  2785. static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
  2786. static ssize_t
  2787. il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
  2788. {
  2789. struct il_priv *il = dev_get_drvdata(d);
  2790. if (!il_is_alive(il))
  2791. return -EAGAIN;
  2792. return sprintf(buf, "%d\n", il3945_mod_params.antenna);
  2793. }
  2794. static ssize_t
  2795. il3945_store_antenna(struct device *d, struct device_attribute *attr,
  2796. const char *buf, size_t count)
  2797. {
  2798. struct il_priv *il __maybe_unused = dev_get_drvdata(d);
  2799. int ant;
  2800. if (count == 0)
  2801. return 0;
  2802. if (sscanf(buf, "%1i", &ant) != 1) {
  2803. D_INFO("not in hex or decimal form.\n");
  2804. return count;
  2805. }
  2806. if (ant >= 0 && ant <= 2) {
  2807. D_INFO("Setting antenna select to %d.\n", ant);
  2808. il3945_mod_params.antenna = (enum il3945_antenna)ant;
  2809. } else
  2810. D_INFO("Bad antenna select value %d.\n", ant);
  2811. return count;
  2812. }
  2813. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna,
  2814. il3945_store_antenna);
  2815. static ssize_t
  2816. il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
  2817. {
  2818. struct il_priv *il = dev_get_drvdata(d);
  2819. if (!il_is_alive(il))
  2820. return -EAGAIN;
  2821. return sprintf(buf, "0x%08x\n", (int)il->status);
  2822. }
  2823. static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
  2824. static ssize_t
  2825. il3945_dump_error_log(struct device *d, struct device_attribute *attr,
  2826. const char *buf, size_t count)
  2827. {
  2828. struct il_priv *il = dev_get_drvdata(d);
  2829. char *p = (char *)buf;
  2830. if (p[0] == '1')
  2831. il3945_dump_nic_error_log(il);
  2832. return strnlen(buf, count);
  2833. }
  2834. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
  2835. /*****************************************************************************
  2836. *
  2837. * driver setup and tear down
  2838. *
  2839. *****************************************************************************/
  2840. static void
  2841. il3945_setup_deferred_work(struct il_priv *il)
  2842. {
  2843. il->workqueue = create_singlethread_workqueue(DRV_NAME);
  2844. init_waitqueue_head(&il->wait_command_queue);
  2845. INIT_WORK(&il->restart, il3945_bg_restart);
  2846. INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
  2847. INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
  2848. INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
  2849. INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
  2850. il_setup_scan_deferred_work(il);
  2851. il3945_hw_setup_deferred_work(il);
  2852. setup_timer(&il->watchdog, il_bg_watchdog, (unsigned long)il);
  2853. tasklet_init(&il->irq_tasklet,
  2854. (void (*)(unsigned long))il3945_irq_tasklet,
  2855. (unsigned long)il);
  2856. }
  2857. static void
  2858. il3945_cancel_deferred_work(struct il_priv *il)
  2859. {
  2860. il3945_hw_cancel_deferred_work(il);
  2861. cancel_delayed_work_sync(&il->init_alive_start);
  2862. cancel_delayed_work(&il->alive_start);
  2863. il_cancel_scan_deferred_work(il);
  2864. }
  2865. static struct attribute *il3945_sysfs_entries[] = {
  2866. &dev_attr_antenna.attr,
  2867. &dev_attr_channels.attr,
  2868. &dev_attr_dump_errors.attr,
  2869. &dev_attr_flags.attr,
  2870. &dev_attr_filter_flags.attr,
  2871. &dev_attr_measurement.attr,
  2872. &dev_attr_retry_rate.attr,
  2873. &dev_attr_status.attr,
  2874. &dev_attr_temperature.attr,
  2875. &dev_attr_tx_power.attr,
  2876. #ifdef CONFIG_IWLEGACY_DEBUG
  2877. &dev_attr_debug_level.attr,
  2878. #endif
  2879. NULL
  2880. };
  2881. static struct attribute_group il3945_attribute_group = {
  2882. .name = NULL, /* put in device directory */
  2883. .attrs = il3945_sysfs_entries,
  2884. };
  2885. static struct ieee80211_ops il3945_mac_ops __read_mostly = {
  2886. .tx = il3945_mac_tx,
  2887. .start = il3945_mac_start,
  2888. .stop = il3945_mac_stop,
  2889. .add_interface = il_mac_add_interface,
  2890. .remove_interface = il_mac_remove_interface,
  2891. .change_interface = il_mac_change_interface,
  2892. .config = il_mac_config,
  2893. .configure_filter = il3945_configure_filter,
  2894. .set_key = il3945_mac_set_key,
  2895. .conf_tx = il_mac_conf_tx,
  2896. .reset_tsf = il_mac_reset_tsf,
  2897. .bss_info_changed = il_mac_bss_info_changed,
  2898. .hw_scan = il_mac_hw_scan,
  2899. .sta_add = il3945_mac_sta_add,
  2900. .sta_remove = il_mac_sta_remove,
  2901. .tx_last_beacon = il_mac_tx_last_beacon,
  2902. .flush = il_mac_flush,
  2903. };
  2904. static int
  2905. il3945_init_drv(struct il_priv *il)
  2906. {
  2907. int ret;
  2908. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  2909. il->retry_rate = 1;
  2910. il->beacon_skb = NULL;
  2911. spin_lock_init(&il->sta_lock);
  2912. spin_lock_init(&il->hcmd_lock);
  2913. INIT_LIST_HEAD(&il->free_frames);
  2914. mutex_init(&il->mutex);
  2915. il->ieee_channels = NULL;
  2916. il->ieee_rates = NULL;
  2917. il->band = IEEE80211_BAND_2GHZ;
  2918. il->iw_mode = NL80211_IFTYPE_STATION;
  2919. il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
  2920. /* initialize force reset */
  2921. il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
  2922. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  2923. IL_WARN("Unsupported EEPROM version: 0x%04X\n",
  2924. eeprom->version);
  2925. ret = -EINVAL;
  2926. goto err;
  2927. }
  2928. ret = il_init_channel_map(il);
  2929. if (ret) {
  2930. IL_ERR("initializing regulatory failed: %d\n", ret);
  2931. goto err;
  2932. }
  2933. /* Set up txpower settings in driver for all channels */
  2934. if (il3945_txpower_set_from_eeprom(il)) {
  2935. ret = -EIO;
  2936. goto err_free_channel_map;
  2937. }
  2938. ret = il_init_geos(il);
  2939. if (ret) {
  2940. IL_ERR("initializing geos failed: %d\n", ret);
  2941. goto err_free_channel_map;
  2942. }
  2943. il3945_init_hw_rates(il, il->ieee_rates);
  2944. return 0;
  2945. err_free_channel_map:
  2946. il_free_channel_map(il);
  2947. err:
  2948. return ret;
  2949. }
  2950. #define IL3945_MAX_PROBE_REQUEST 200
  2951. static int
  2952. il3945_setup_mac(struct il_priv *il)
  2953. {
  2954. int ret;
  2955. struct ieee80211_hw *hw = il->hw;
  2956. hw->rate_control_algorithm = "iwl-3945-rs";
  2957. hw->sta_data_size = sizeof(struct il3945_sta_priv);
  2958. hw->vif_data_size = sizeof(struct il_vif_priv);
  2959. /* Tell mac80211 our characteristics */
  2960. ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
  2961. ieee80211_hw_set(hw, SUPPORTS_PS);
  2962. ieee80211_hw_set(hw, SIGNAL_DBM);
  2963. ieee80211_hw_set(hw, SPECTRUM_MGMT);
  2964. hw->wiphy->interface_modes =
  2965. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
  2966. hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
  2967. hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG |
  2968. REGULATORY_DISABLE_BEACON_HINTS;
  2969. hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  2970. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  2971. /* we create the 802.11 header and a zero-length SSID element */
  2972. hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
  2973. /* Default value; 4 EDCA QOS priorities */
  2974. hw->queues = 4;
  2975. if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
  2976. il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  2977. &il->bands[IEEE80211_BAND_2GHZ];
  2978. if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
  2979. il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  2980. &il->bands[IEEE80211_BAND_5GHZ];
  2981. il_leds_init(il);
  2982. ret = ieee80211_register_hw(il->hw);
  2983. if (ret) {
  2984. IL_ERR("Failed to register hw (error %d)\n", ret);
  2985. return ret;
  2986. }
  2987. il->mac80211_registered = 1;
  2988. return 0;
  2989. }
  2990. static int
  2991. il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  2992. {
  2993. int err = 0;
  2994. struct il_priv *il;
  2995. struct ieee80211_hw *hw;
  2996. struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
  2997. struct il3945_eeprom *eeprom;
  2998. unsigned long flags;
  2999. /***********************
  3000. * 1. Allocating HW data
  3001. * ********************/
  3002. hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
  3003. if (!hw) {
  3004. err = -ENOMEM;
  3005. goto out;
  3006. }
  3007. il = hw->priv;
  3008. il->hw = hw;
  3009. SET_IEEE80211_DEV(hw, &pdev->dev);
  3010. il->cmd_queue = IL39_CMD_QUEUE_NUM;
  3011. /*
  3012. * Disabling hardware scan means that mac80211 will perform scans
  3013. * "the hard way", rather than using device's scan.
  3014. */
  3015. if (il3945_mod_params.disable_hw_scan) {
  3016. D_INFO("Disabling hw_scan\n");
  3017. il3945_mac_ops.hw_scan = NULL;
  3018. }
  3019. D_INFO("*** LOAD DRIVER ***\n");
  3020. il->cfg = cfg;
  3021. il->ops = &il3945_ops;
  3022. #ifdef CONFIG_IWLEGACY_DEBUGFS
  3023. il->debugfs_ops = &il3945_debugfs_ops;
  3024. #endif
  3025. il->pci_dev = pdev;
  3026. il->inta_mask = CSR_INI_SET_MASK;
  3027. /***************************
  3028. * 2. Initializing PCI bus
  3029. * *************************/
  3030. pci_disable_link_state(pdev,
  3031. PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  3032. PCIE_LINK_STATE_CLKPM);
  3033. if (pci_enable_device(pdev)) {
  3034. err = -ENODEV;
  3035. goto out_ieee80211_free_hw;
  3036. }
  3037. pci_set_master(pdev);
  3038. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3039. if (!err)
  3040. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3041. if (err) {
  3042. IL_WARN("No suitable DMA available.\n");
  3043. goto out_pci_disable_device;
  3044. }
  3045. pci_set_drvdata(pdev, il);
  3046. err = pci_request_regions(pdev, DRV_NAME);
  3047. if (err)
  3048. goto out_pci_disable_device;
  3049. /***********************
  3050. * 3. Read REV Register
  3051. * ********************/
  3052. il->hw_base = pci_ioremap_bar(pdev, 0);
  3053. if (!il->hw_base) {
  3054. err = -ENODEV;
  3055. goto out_pci_release_regions;
  3056. }
  3057. D_INFO("pci_resource_len = 0x%08llx\n",
  3058. (unsigned long long)pci_resource_len(pdev, 0));
  3059. D_INFO("pci_resource_base = %p\n", il->hw_base);
  3060. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3061. * PCI Tx retries from interfering with C3 CPU state */
  3062. pci_write_config_byte(pdev, 0x41, 0x00);
  3063. /* these spin locks will be used in apm_init and EEPROM access
  3064. * we should init now
  3065. */
  3066. spin_lock_init(&il->reg_lock);
  3067. spin_lock_init(&il->lock);
  3068. /*
  3069. * stop and reset the on-board processor just in case it is in a
  3070. * strange state ... like being left stranded by a primary kernel
  3071. * and this is now the kdump kernel trying to start up
  3072. */
  3073. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3074. /***********************
  3075. * 4. Read EEPROM
  3076. * ********************/
  3077. /* Read the EEPROM */
  3078. err = il_eeprom_init(il);
  3079. if (err) {
  3080. IL_ERR("Unable to init EEPROM\n");
  3081. goto out_iounmap;
  3082. }
  3083. /* MAC Address location in EEPROM same for 3945/4965 */
  3084. eeprom = (struct il3945_eeprom *)il->eeprom;
  3085. D_INFO("MAC address: %pM\n", eeprom->mac_address);
  3086. SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
  3087. /***********************
  3088. * 5. Setup HW Constants
  3089. * ********************/
  3090. /* Device-specific setup */
  3091. err = il3945_hw_set_hw_params(il);
  3092. if (err) {
  3093. IL_ERR("failed to set hw settings\n");
  3094. goto out_eeprom_free;
  3095. }
  3096. /***********************
  3097. * 6. Setup il
  3098. * ********************/
  3099. err = il3945_init_drv(il);
  3100. if (err) {
  3101. IL_ERR("initializing driver failed\n");
  3102. goto out_unset_hw_params;
  3103. }
  3104. IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
  3105. /***********************
  3106. * 7. Setup Services
  3107. * ********************/
  3108. spin_lock_irqsave(&il->lock, flags);
  3109. il_disable_interrupts(il);
  3110. spin_unlock_irqrestore(&il->lock, flags);
  3111. pci_enable_msi(il->pci_dev);
  3112. err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
  3113. if (err) {
  3114. IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
  3115. goto out_disable_msi;
  3116. }
  3117. err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
  3118. if (err) {
  3119. IL_ERR("failed to create sysfs device attributes\n");
  3120. goto out_release_irq;
  3121. }
  3122. il_set_rxon_channel(il, &il->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3123. il3945_setup_deferred_work(il);
  3124. il3945_setup_handlers(il);
  3125. il_power_initialize(il);
  3126. /*********************************
  3127. * 8. Setup and Register mac80211
  3128. * *******************************/
  3129. il_enable_interrupts(il);
  3130. err = il3945_setup_mac(il);
  3131. if (err)
  3132. goto out_remove_sysfs;
  3133. err = il_dbgfs_register(il, DRV_NAME);
  3134. if (err)
  3135. IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
  3136. err);
  3137. /* Start monitoring the killswitch */
  3138. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
  3139. return 0;
  3140. out_remove_sysfs:
  3141. destroy_workqueue(il->workqueue);
  3142. il->workqueue = NULL;
  3143. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3144. out_release_irq:
  3145. free_irq(il->pci_dev->irq, il);
  3146. out_disable_msi:
  3147. pci_disable_msi(il->pci_dev);
  3148. il_free_geos(il);
  3149. il_free_channel_map(il);
  3150. out_unset_hw_params:
  3151. il3945_unset_hw_params(il);
  3152. out_eeprom_free:
  3153. il_eeprom_free(il);
  3154. out_iounmap:
  3155. iounmap(il->hw_base);
  3156. out_pci_release_regions:
  3157. pci_release_regions(pdev);
  3158. out_pci_disable_device:
  3159. pci_disable_device(pdev);
  3160. out_ieee80211_free_hw:
  3161. ieee80211_free_hw(il->hw);
  3162. out:
  3163. return err;
  3164. }
  3165. static void
  3166. il3945_pci_remove(struct pci_dev *pdev)
  3167. {
  3168. struct il_priv *il = pci_get_drvdata(pdev);
  3169. unsigned long flags;
  3170. if (!il)
  3171. return;
  3172. D_INFO("*** UNLOAD DRIVER ***\n");
  3173. il_dbgfs_unregister(il);
  3174. set_bit(S_EXIT_PENDING, &il->status);
  3175. il_leds_exit(il);
  3176. if (il->mac80211_registered) {
  3177. ieee80211_unregister_hw(il->hw);
  3178. il->mac80211_registered = 0;
  3179. } else {
  3180. il3945_down(il);
  3181. }
  3182. /*
  3183. * Make sure device is reset to low power before unloading driver.
  3184. * This may be redundant with il_down(), but there are paths to
  3185. * run il_down() without calling apm_ops.stop(), and there are
  3186. * paths to avoid running il_down() at all before leaving driver.
  3187. * This (inexpensive) call *makes sure* device is reset.
  3188. */
  3189. il_apm_stop(il);
  3190. /* make sure we flush any pending irq or
  3191. * tasklet for the driver
  3192. */
  3193. spin_lock_irqsave(&il->lock, flags);
  3194. il_disable_interrupts(il);
  3195. spin_unlock_irqrestore(&il->lock, flags);
  3196. il3945_synchronize_irq(il);
  3197. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3198. cancel_delayed_work_sync(&il->_3945.rfkill_poll);
  3199. il3945_dealloc_ucode_pci(il);
  3200. if (il->rxq.bd)
  3201. il3945_rx_queue_free(il, &il->rxq);
  3202. il3945_hw_txq_ctx_free(il);
  3203. il3945_unset_hw_params(il);
  3204. /*netif_stop_queue(dev); */
  3205. flush_workqueue(il->workqueue);
  3206. /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
  3207. * il->workqueue... so we can't take down the workqueue
  3208. * until now... */
  3209. destroy_workqueue(il->workqueue);
  3210. il->workqueue = NULL;
  3211. free_irq(pdev->irq, il);
  3212. pci_disable_msi(pdev);
  3213. iounmap(il->hw_base);
  3214. pci_release_regions(pdev);
  3215. pci_disable_device(pdev);
  3216. il_free_channel_map(il);
  3217. il_free_geos(il);
  3218. kfree(il->scan_cmd);
  3219. if (il->beacon_skb)
  3220. dev_kfree_skb(il->beacon_skb);
  3221. ieee80211_free_hw(il->hw);
  3222. }
  3223. /*****************************************************************************
  3224. *
  3225. * driver and module entry point
  3226. *
  3227. *****************************************************************************/
  3228. static struct pci_driver il3945_driver = {
  3229. .name = DRV_NAME,
  3230. .id_table = il3945_hw_card_ids,
  3231. .probe = il3945_pci_probe,
  3232. .remove = il3945_pci_remove,
  3233. .driver.pm = IL_LEGACY_PM_OPS,
  3234. };
  3235. static int __init
  3236. il3945_init(void)
  3237. {
  3238. int ret;
  3239. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3240. pr_info(DRV_COPYRIGHT "\n");
  3241. ret = il3945_rate_control_register();
  3242. if (ret) {
  3243. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3244. return ret;
  3245. }
  3246. ret = pci_register_driver(&il3945_driver);
  3247. if (ret) {
  3248. pr_err("Unable to initialize PCI module\n");
  3249. goto error_register;
  3250. }
  3251. return ret;
  3252. error_register:
  3253. il3945_rate_control_unregister();
  3254. return ret;
  3255. }
  3256. static void __exit
  3257. il3945_exit(void)
  3258. {
  3259. pci_unregister_driver(&il3945_driver);
  3260. il3945_rate_control_unregister();
  3261. }
  3262. MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
  3263. module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
  3264. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3265. module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
  3266. MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
  3267. module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
  3268. S_IRUGO);
  3269. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
  3270. #ifdef CONFIG_IWLEGACY_DEBUG
  3271. module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
  3272. MODULE_PARM_DESC(debug, "debug output mask");
  3273. #endif
  3274. module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
  3275. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3276. module_exit(il3945_exit);
  3277. module_init(il3945_init);