common.h 89 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * Intel Linux Wireless <ilw@linux.intel.com>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. *****************************************************************************/
  26. #ifndef __il_core_h__
  27. #define __il_core_h__
  28. #include <linux/interrupt.h>
  29. #include <linux/pci.h> /* for struct pci_device_id */
  30. #include <linux/kernel.h>
  31. #include <linux/leds.h>
  32. #include <linux/wait.h>
  33. #include <linux/io.h>
  34. #include <net/mac80211.h>
  35. #include <net/ieee80211_radiotap.h>
  36. #include "commands.h"
  37. #include "csr.h"
  38. #include "prph.h"
  39. struct il_host_cmd;
  40. struct il_cmd;
  41. struct il_tx_queue;
  42. #define IL_ERR(f, a...) dev_err(&il->pci_dev->dev, f, ## a)
  43. #define IL_WARN(f, a...) dev_warn(&il->pci_dev->dev, f, ## a)
  44. #define IL_INFO(f, a...) dev_info(&il->pci_dev->dev, f, ## a)
  45. #define RX_QUEUE_SIZE 256
  46. #define RX_QUEUE_MASK 255
  47. #define RX_QUEUE_SIZE_LOG 8
  48. /*
  49. * RX related structures and functions
  50. */
  51. #define RX_FREE_BUFFERS 64
  52. #define RX_LOW_WATERMARK 8
  53. #define U32_PAD(n) ((4-(n))&0x3)
  54. /* CT-KILL constants */
  55. #define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */
  56. /* Default noise level to report when noise measurement is not available.
  57. * This may be because we're:
  58. * 1) Not associated (4965, no beacon stats being sent to driver)
  59. * 2) Scanning (noise measurement does not apply to associated channel)
  60. * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
  61. * Use default noise value of -127 ... this is below the range of measurable
  62. * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
  63. * Also, -127 works better than 0 when averaging frames with/without
  64. * noise info (e.g. averaging might be done in app); measured dBm values are
  65. * always negative ... using a negative value as the default keeps all
  66. * averages within an s8's (used in some apps) range of negative values. */
  67. #define IL_NOISE_MEAS_NOT_AVAILABLE (-127)
  68. /*
  69. * RTS threshold here is total size [2347] minus 4 FCS bytes
  70. * Per spec:
  71. * a value of 0 means RTS on all data/management packets
  72. * a value > max MSDU size means no RTS
  73. * else RTS for data/management frames where MPDU is larger
  74. * than RTS value.
  75. */
  76. #define DEFAULT_RTS_THRESHOLD 2347U
  77. #define MIN_RTS_THRESHOLD 0U
  78. #define MAX_RTS_THRESHOLD 2347U
  79. #define MAX_MSDU_SIZE 2304U
  80. #define MAX_MPDU_SIZE 2346U
  81. #define DEFAULT_BEACON_INTERVAL 100U
  82. #define DEFAULT_SHORT_RETRY_LIMIT 7U
  83. #define DEFAULT_LONG_RETRY_LIMIT 4U
  84. struct il_rx_buf {
  85. dma_addr_t page_dma;
  86. struct page *page;
  87. struct list_head list;
  88. };
  89. #define rxb_addr(r) page_address(r->page)
  90. /* defined below */
  91. struct il_device_cmd;
  92. struct il_cmd_meta {
  93. /* only for SYNC commands, iff the reply skb is wanted */
  94. struct il_host_cmd *source;
  95. /*
  96. * only for ASYNC commands
  97. * (which is somewhat stupid -- look at common.c for instance
  98. * which duplicates a bunch of code because the callback isn't
  99. * invoked for SYNC commands, if it were and its result passed
  100. * through it would be simpler...)
  101. */
  102. void (*callback) (struct il_priv *il, struct il_device_cmd *cmd,
  103. struct il_rx_pkt *pkt);
  104. /* The CMD_SIZE_HUGE flag bit indicates that the command
  105. * structure is stored at the end of the shared queue memory. */
  106. u32 flags;
  107. DEFINE_DMA_UNMAP_ADDR(mapping);
  108. DEFINE_DMA_UNMAP_LEN(len);
  109. };
  110. /*
  111. * Generic queue structure
  112. *
  113. * Contains common data for Rx and Tx queues
  114. */
  115. struct il_queue {
  116. int n_bd; /* number of BDs in this queue */
  117. int write_ptr; /* 1-st empty entry (idx) host_w */
  118. int read_ptr; /* last used entry (idx) host_r */
  119. /* use for monitoring and recovering the stuck queue */
  120. dma_addr_t dma_addr; /* physical addr for BD's */
  121. int n_win; /* safe queue win */
  122. u32 id;
  123. int low_mark; /* low watermark, resume queue if free
  124. * space more than this */
  125. int high_mark; /* high watermark, stop queue if free
  126. * space less than this */
  127. };
  128. /**
  129. * struct il_tx_queue - Tx Queue for DMA
  130. * @q: generic Rx/Tx queue descriptor
  131. * @bd: base of circular buffer of TFDs
  132. * @cmd: array of command/TX buffer pointers
  133. * @meta: array of meta data for each command/tx buffer
  134. * @dma_addr_cmd: physical address of cmd/tx buffer array
  135. * @skbs: array of per-TFD socket buffer pointers
  136. * @time_stamp: time (in jiffies) of last read_ptr change
  137. * @need_update: indicates need to update read/write idx
  138. * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
  139. *
  140. * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
  141. * descriptors) and required locking structures.
  142. */
  143. #define TFD_TX_CMD_SLOTS 256
  144. #define TFD_CMD_SLOTS 32
  145. struct il_tx_queue {
  146. struct il_queue q;
  147. void *tfds;
  148. struct il_device_cmd **cmd;
  149. struct il_cmd_meta *meta;
  150. struct sk_buff **skbs;
  151. unsigned long time_stamp;
  152. u8 need_update;
  153. u8 sched_retry;
  154. u8 active;
  155. u8 swq_id;
  156. };
  157. /*
  158. * EEPROM access time values:
  159. *
  160. * Driver initiates EEPROM read by writing byte address << 1 to CSR_EEPROM_REG.
  161. * Driver then polls CSR_EEPROM_REG for CSR_EEPROM_REG_READ_VALID_MSK (0x1).
  162. * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec.
  163. * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG.
  164. */
  165. #define IL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */
  166. #define IL_EEPROM_SEM_TIMEOUT 10 /* microseconds */
  167. #define IL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
  168. /*
  169. * Regulatory channel usage flags in EEPROM struct il4965_eeprom_channel.flags.
  170. *
  171. * IBSS and/or AP operation is allowed *only* on those channels with
  172. * (VALID && IBSS && ACTIVE && !RADAR). This restriction is in place because
  173. * RADAR detection is not supported by the 4965 driver, but is a
  174. * requirement for establishing a new network for legal operation on channels
  175. * requiring RADAR detection or restricting ACTIVE scanning.
  176. *
  177. * NOTE: "WIDE" flag does not indicate anything about "HT40" 40 MHz channels.
  178. * It only indicates that 20 MHz channel use is supported; HT40 channel
  179. * usage is indicated by a separate set of regulatory flags for each
  180. * HT40 channel pair.
  181. *
  182. * NOTE: Using a channel inappropriately will result in a uCode error!
  183. */
  184. #define IL_NUM_TX_CALIB_GROUPS 5
  185. enum {
  186. EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */
  187. EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */
  188. /* Bit 2 Reserved */
  189. EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */
  190. EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */
  191. EEPROM_CHANNEL_WIDE = (1 << 5), /* 20 MHz channel okay */
  192. /* Bit 6 Reserved (was Narrow Channel) */
  193. EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */
  194. };
  195. /* SKU Capabilities */
  196. /* 3945 only */
  197. #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0)
  198. #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1)
  199. /* *regulatory* channel data format in eeprom, one for each channel.
  200. * There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */
  201. struct il_eeprom_channel {
  202. u8 flags; /* EEPROM_CHANNEL_* flags copied from EEPROM */
  203. s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */
  204. } __packed;
  205. /* 3945 Specific */
  206. #define EEPROM_3945_EEPROM_VERSION (0x2f)
  207. /* 4965 has two radio transmitters (and 3 radio receivers) */
  208. #define EEPROM_TX_POWER_TX_CHAINS (2)
  209. /* 4965 has room for up to 8 sets of txpower calibration data */
  210. #define EEPROM_TX_POWER_BANDS (8)
  211. /* 4965 factory calibration measures txpower gain settings for
  212. * each of 3 target output levels */
  213. #define EEPROM_TX_POWER_MEASUREMENTS (3)
  214. /* 4965 Specific */
  215. /* 4965 driver does not work with txpower calibration version < 5 */
  216. #define EEPROM_4965_TX_POWER_VERSION (5)
  217. #define EEPROM_4965_EEPROM_VERSION (0x2f)
  218. #define EEPROM_4965_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */
  219. #define EEPROM_4965_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */
  220. #define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */
  221. #define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */
  222. /* 2.4 GHz */
  223. extern const u8 il_eeprom_band_1[14];
  224. /*
  225. * factory calibration data for one txpower level, on one channel,
  226. * measured on one of the 2 tx chains (radio transmitter and associated
  227. * antenna). EEPROM contains:
  228. *
  229. * 1) Temperature (degrees Celsius) of device when measurement was made.
  230. *
  231. * 2) Gain table idx used to achieve the target measurement power.
  232. * This refers to the "well-known" gain tables (see 4965.h).
  233. *
  234. * 3) Actual measured output power, in half-dBm ("34" = 17 dBm).
  235. *
  236. * 4) RF power amplifier detector level measurement (not used).
  237. */
  238. struct il_eeprom_calib_measure {
  239. u8 temperature; /* Device temperature (Celsius) */
  240. u8 gain_idx; /* Index into gain table */
  241. u8 actual_pow; /* Measured RF output power, half-dBm */
  242. s8 pa_det; /* Power amp detector level (not used) */
  243. } __packed;
  244. /*
  245. * measurement set for one channel. EEPROM contains:
  246. *
  247. * 1) Channel number measured
  248. *
  249. * 2) Measurements for each of 3 power levels for each of 2 radio transmitters
  250. * (a.k.a. "tx chains") (6 measurements altogether)
  251. */
  252. struct il_eeprom_calib_ch_info {
  253. u8 ch_num;
  254. struct il_eeprom_calib_measure
  255. measurements[EEPROM_TX_POWER_TX_CHAINS]
  256. [EEPROM_TX_POWER_MEASUREMENTS];
  257. } __packed;
  258. /*
  259. * txpower subband info.
  260. *
  261. * For each frequency subband, EEPROM contains the following:
  262. *
  263. * 1) First and last channels within range of the subband. "0" values
  264. * indicate that this sample set is not being used.
  265. *
  266. * 2) Sample measurement sets for 2 channels close to the range endpoints.
  267. */
  268. struct il_eeprom_calib_subband_info {
  269. u8 ch_from; /* channel number of lowest channel in subband */
  270. u8 ch_to; /* channel number of highest channel in subband */
  271. struct il_eeprom_calib_ch_info ch1;
  272. struct il_eeprom_calib_ch_info ch2;
  273. } __packed;
  274. /*
  275. * txpower calibration info. EEPROM contains:
  276. *
  277. * 1) Factory-measured saturation power levels (maximum levels at which
  278. * tx power amplifier can output a signal without too much distortion).
  279. * There is one level for 2.4 GHz band and one for 5 GHz band. These
  280. * values apply to all channels within each of the bands.
  281. *
  282. * 2) Factory-measured power supply voltage level. This is assumed to be
  283. * constant (i.e. same value applies to all channels/bands) while the
  284. * factory measurements are being made.
  285. *
  286. * 3) Up to 8 sets of factory-measured txpower calibration values.
  287. * These are for different frequency ranges, since txpower gain
  288. * characteristics of the analog radio circuitry vary with frequency.
  289. *
  290. * Not all sets need to be filled with data;
  291. * struct il_eeprom_calib_subband_info contains range of channels
  292. * (0 if unused) for each set of data.
  293. */
  294. struct il_eeprom_calib_info {
  295. u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */
  296. u8 saturation_power52; /* half-dBm */
  297. __le16 voltage; /* signed */
  298. struct il_eeprom_calib_subband_info band_info[EEPROM_TX_POWER_BANDS];
  299. } __packed;
  300. /* General */
  301. #define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */
  302. #define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */
  303. #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */
  304. #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */
  305. #define EEPROM_VERSION (2*0x44) /* 2 bytes */
  306. #define EEPROM_SKU_CAP (2*0x45) /* 2 bytes */
  307. #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */
  308. #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */
  309. #define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */
  310. #define EEPROM_NUM_MAC_ADDRESS (2*0x4C) /* 2 bytes */
  311. /* The following masks are to be applied on EEPROM_RADIO_CONFIG */
  312. #define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */
  313. #define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */
  314. #define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */
  315. #define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */
  316. #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */
  317. #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
  318. #define EEPROM_3945_RF_CFG_TYPE_MAX 0x0
  319. #define EEPROM_4965_RF_CFG_TYPE_MAX 0x1
  320. /*
  321. * Per-channel regulatory data.
  322. *
  323. * Each channel that *might* be supported by iwl has a fixed location
  324. * in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory
  325. * txpower (MSB).
  326. *
  327. * Entries immediately below are for 20 MHz channel width. HT40 (40 MHz)
  328. * channels (only for 4965, not supported by 3945) appear later in the EEPROM.
  329. *
  330. * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  331. */
  332. #define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */
  333. #define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */
  334. #define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */
  335. /*
  336. * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196,
  337. * 5.0 GHz channels 7, 8, 11, 12, 16
  338. * (4915-5080MHz) (none of these is ever supported)
  339. */
  340. #define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */
  341. #define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */
  342. /*
  343. * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  344. * (5170-5320MHz)
  345. */
  346. #define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */
  347. #define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */
  348. /*
  349. * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  350. * (5500-5700MHz)
  351. */
  352. #define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */
  353. #define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */
  354. /*
  355. * 5.7 GHz channels 145, 149, 153, 157, 161, 165
  356. * (5725-5825MHz)
  357. */
  358. #define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */
  359. #define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */
  360. /*
  361. * 2.4 GHz HT40 channels 1 (5), 2 (6), 3 (7), 4 (8), 5 (9), 6 (10), 7 (11)
  362. *
  363. * The channel listed is the center of the lower 20 MHz half of the channel.
  364. * The overall center frequency is actually 2 channels (10 MHz) above that,
  365. * and the upper half of each HT40 channel is centered 4 channels (20 MHz) away
  366. * from the lower half; e.g. the upper half of HT40 channel 1 is channel 5,
  367. * and the overall HT40 channel width centers on channel 3.
  368. *
  369. * NOTE: The RXON command uses 20 MHz channel numbers to specify the
  370. * control channel to which to tune. RXON also specifies whether the
  371. * control channel is the upper or lower half of a HT40 channel.
  372. *
  373. * NOTE: 4965 does not support HT40 channels on 2.4 GHz.
  374. */
  375. #define EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS (2*0xA0) /* 14 bytes */
  376. /*
  377. * 5.2 GHz HT40 channels 36 (40), 44 (48), 52 (56), 60 (64),
  378. * 100 (104), 108 (112), 116 (120), 124 (128), 132 (136), 149 (153), 157 (161)
  379. */
  380. #define EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS (2*0xA8) /* 22 bytes */
  381. #define EEPROM_REGULATORY_BAND_NO_HT40 (0)
  382. int il_eeprom_init(struct il_priv *il);
  383. void il_eeprom_free(struct il_priv *il);
  384. const u8 *il_eeprom_query_addr(const struct il_priv *il, size_t offset);
  385. u16 il_eeprom_query16(const struct il_priv *il, size_t offset);
  386. int il_init_channel_map(struct il_priv *il);
  387. void il_free_channel_map(struct il_priv *il);
  388. const struct il_channel_info *il_get_channel_info(const struct il_priv *il,
  389. enum ieee80211_band band,
  390. u16 channel);
  391. #define IL_NUM_SCAN_RATES (2)
  392. struct il4965_channel_tgd_info {
  393. u8 type;
  394. s8 max_power;
  395. };
  396. struct il4965_channel_tgh_info {
  397. s64 last_radar_time;
  398. };
  399. #define IL4965_MAX_RATE (33)
  400. struct il3945_clip_group {
  401. /* maximum power level to prevent clipping for each rate, derived by
  402. * us from this band's saturation power in EEPROM */
  403. const s8 clip_powers[IL_MAX_RATES];
  404. };
  405. /* current Tx power values to use, one for each rate for each channel.
  406. * requested power is limited by:
  407. * -- regulatory EEPROM limits for this channel
  408. * -- hardware capabilities (clip-powers)
  409. * -- spectrum management
  410. * -- user preference (e.g. iwconfig)
  411. * when requested power is set, base power idx must also be set. */
  412. struct il3945_channel_power_info {
  413. struct il3945_tx_power tpc; /* actual radio and DSP gain settings */
  414. s8 power_table_idx; /* actual (compenst'd) idx into gain table */
  415. s8 base_power_idx; /* gain idx for power at factory temp. */
  416. s8 requested_power; /* power (dBm) requested for this chnl/rate */
  417. };
  418. /* current scan Tx power values to use, one for each scan rate for each
  419. * channel. */
  420. struct il3945_scan_power_info {
  421. struct il3945_tx_power tpc; /* actual radio and DSP gain settings */
  422. s8 power_table_idx; /* actual (compenst'd) idx into gain table */
  423. s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
  424. };
  425. /*
  426. * One for each channel, holds all channel setup data
  427. * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
  428. * with one another!
  429. */
  430. struct il_channel_info {
  431. struct il4965_channel_tgd_info tgd;
  432. struct il4965_channel_tgh_info tgh;
  433. struct il_eeprom_channel eeprom; /* EEPROM regulatory limit */
  434. struct il_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for
  435. * HT40 channel */
  436. u8 channel; /* channel number */
  437. u8 flags; /* flags copied from EEPROM */
  438. s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
  439. s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
  440. s8 min_power; /* always 0 */
  441. s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
  442. u8 group_idx; /* 0-4, maps channel to group1/2/3/4/5 */
  443. u8 band_idx; /* 0-4, maps channel to band1/2/3/4/5 */
  444. enum ieee80211_band band;
  445. /* HT40 channel info */
  446. s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
  447. u8 ht40_flags; /* flags copied from EEPROM */
  448. u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
  449. /* Radio/DSP gain settings for each "normal" data Tx rate.
  450. * These include, in addition to RF and DSP gain, a few fields for
  451. * remembering/modifying gain settings (idxes). */
  452. struct il3945_channel_power_info power_info[IL4965_MAX_RATE];
  453. /* Radio/DSP gain settings for each scan rate, for directed scans. */
  454. struct il3945_scan_power_info scan_pwr_info[IL_NUM_SCAN_RATES];
  455. };
  456. #define IL_TX_FIFO_BK 0 /* shared */
  457. #define IL_TX_FIFO_BE 1
  458. #define IL_TX_FIFO_VI 2 /* shared */
  459. #define IL_TX_FIFO_VO 3
  460. #define IL_TX_FIFO_UNUSED -1
  461. /* Minimum number of queues. MAX_NUM is defined in hw specific files.
  462. * Set the minimum to accommodate the 4 standard TX queues, 1 command
  463. * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
  464. #define IL_MIN_NUM_QUEUES 10
  465. #define IL_DEFAULT_CMD_QUEUE_NUM 4
  466. #define IEEE80211_DATA_LEN 2304
  467. #define IEEE80211_4ADDR_LEN 30
  468. #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
  469. #define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
  470. struct il_frame {
  471. union {
  472. struct ieee80211_hdr frame;
  473. struct il_tx_beacon_cmd beacon;
  474. u8 raw[IEEE80211_FRAME_LEN];
  475. u8 cmd[360];
  476. } u;
  477. struct list_head list;
  478. };
  479. enum {
  480. CMD_SYNC = 0,
  481. CMD_SIZE_NORMAL = 0,
  482. CMD_NO_SKB = 0,
  483. CMD_SIZE_HUGE = (1 << 0),
  484. CMD_ASYNC = (1 << 1),
  485. CMD_WANT_SKB = (1 << 2),
  486. CMD_MAPPED = (1 << 3),
  487. };
  488. #define DEF_CMD_PAYLOAD_SIZE 320
  489. /**
  490. * struct il_device_cmd
  491. *
  492. * For allocation of the command and tx queues, this establishes the overall
  493. * size of the largest command we send to uCode, except for a scan command
  494. * (which is relatively huge; space is allocated separately).
  495. */
  496. struct il_device_cmd {
  497. struct il_cmd_header hdr; /* uCode API */
  498. union {
  499. u32 flags;
  500. u8 val8;
  501. u16 val16;
  502. u32 val32;
  503. struct il_tx_cmd tx;
  504. u8 payload[DEF_CMD_PAYLOAD_SIZE];
  505. } __packed cmd;
  506. } __packed;
  507. #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct il_device_cmd))
  508. struct il_host_cmd {
  509. const void *data;
  510. unsigned long reply_page;
  511. void (*callback) (struct il_priv *il, struct il_device_cmd *cmd,
  512. struct il_rx_pkt *pkt);
  513. u32 flags;
  514. u16 len;
  515. u8 id;
  516. };
  517. #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
  518. #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
  519. #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
  520. /**
  521. * struct il_rx_queue - Rx queue
  522. * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
  523. * @bd_dma: bus address of buffer of receive buffer descriptors (rbd)
  524. * @read: Shared idx to newest available Rx buffer
  525. * @write: Shared idx to oldest written Rx packet
  526. * @free_count: Number of pre-allocated buffers in rx_free
  527. * @rx_free: list of free SKBs for use
  528. * @rx_used: List of Rx buffers with no SKB
  529. * @need_update: flag to indicate we need to update read/write idx
  530. * @rb_stts: driver's pointer to receive buffer status
  531. * @rb_stts_dma: bus address of receive buffer status
  532. *
  533. * NOTE: rx_free and rx_used are used as a FIFO for il_rx_bufs
  534. */
  535. struct il_rx_queue {
  536. __le32 *bd;
  537. dma_addr_t bd_dma;
  538. struct il_rx_buf pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
  539. struct il_rx_buf *queue[RX_QUEUE_SIZE];
  540. u32 read;
  541. u32 write;
  542. u32 free_count;
  543. u32 write_actual;
  544. struct list_head rx_free;
  545. struct list_head rx_used;
  546. int need_update;
  547. struct il_rb_status *rb_stts;
  548. dma_addr_t rb_stts_dma;
  549. spinlock_t lock;
  550. };
  551. #define IL_SUPPORTED_RATES_IE_LEN 8
  552. #define MAX_TID_COUNT 9
  553. #define IL_INVALID_RATE 0xFF
  554. #define IL_INVALID_VALUE -1
  555. /**
  556. * struct il_ht_agg -- aggregation status while waiting for block-ack
  557. * @txq_id: Tx queue used for Tx attempt
  558. * @frame_count: # frames attempted by Tx command
  559. * @wait_for_ba: Expect block-ack before next Tx reply
  560. * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx win
  561. * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx win
  562. * @bitmap1: High order, one bit for each frame pending ACK in Tx win
  563. * @rate_n_flags: Rate at which Tx was attempted
  564. *
  565. * If C_TX indicates that aggregation was attempted, driver must wait
  566. * for block ack (N_COMPRESSED_BA). This struct stores tx reply info
  567. * until block ack arrives.
  568. */
  569. struct il_ht_agg {
  570. u16 txq_id;
  571. u16 frame_count;
  572. u16 wait_for_ba;
  573. u16 start_idx;
  574. u64 bitmap;
  575. u32 rate_n_flags;
  576. #define IL_AGG_OFF 0
  577. #define IL_AGG_ON 1
  578. #define IL_EMPTYING_HW_QUEUE_ADDBA 2
  579. #define IL_EMPTYING_HW_QUEUE_DELBA 3
  580. u8 state;
  581. };
  582. struct il_tid_data {
  583. u16 seq_number; /* 4965 only */
  584. u16 tfds_in_queue;
  585. struct il_ht_agg agg;
  586. };
  587. struct il_hw_key {
  588. u32 cipher;
  589. int keylen;
  590. u8 keyidx;
  591. u8 key[32];
  592. };
  593. union il_ht_rate_supp {
  594. u16 rates;
  595. struct {
  596. u8 siso_rate;
  597. u8 mimo_rate;
  598. };
  599. };
  600. #define CFG_HT_RX_AMPDU_FACTOR_8K (0x0)
  601. #define CFG_HT_RX_AMPDU_FACTOR_16K (0x1)
  602. #define CFG_HT_RX_AMPDU_FACTOR_32K (0x2)
  603. #define CFG_HT_RX_AMPDU_FACTOR_64K (0x3)
  604. #define CFG_HT_RX_AMPDU_FACTOR_DEF CFG_HT_RX_AMPDU_FACTOR_64K
  605. #define CFG_HT_RX_AMPDU_FACTOR_MAX CFG_HT_RX_AMPDU_FACTOR_64K
  606. #define CFG_HT_RX_AMPDU_FACTOR_MIN CFG_HT_RX_AMPDU_FACTOR_8K
  607. /*
  608. * Maximal MPDU density for TX aggregation
  609. * 4 - 2us density
  610. * 5 - 4us density
  611. * 6 - 8us density
  612. * 7 - 16us density
  613. */
  614. #define CFG_HT_MPDU_DENSITY_2USEC (0x4)
  615. #define CFG_HT_MPDU_DENSITY_4USEC (0x5)
  616. #define CFG_HT_MPDU_DENSITY_8USEC (0x6)
  617. #define CFG_HT_MPDU_DENSITY_16USEC (0x7)
  618. #define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
  619. #define CFG_HT_MPDU_DENSITY_MAX CFG_HT_MPDU_DENSITY_16USEC
  620. #define CFG_HT_MPDU_DENSITY_MIN (0x1)
  621. struct il_ht_config {
  622. bool single_chain_sufficient;
  623. enum ieee80211_smps_mode smps; /* current smps mode */
  624. };
  625. /* QoS structures */
  626. struct il_qos_info {
  627. int qos_active;
  628. struct il_qosparam_cmd def_qos_parm;
  629. };
  630. /*
  631. * Structure should be accessed with sta_lock held. When station addition
  632. * is in progress (IL_STA_UCODE_INPROGRESS) it is possible to access only
  633. * the commands (il_addsta_cmd and il_link_quality_cmd) without
  634. * sta_lock held.
  635. */
  636. struct il_station_entry {
  637. struct il_addsta_cmd sta;
  638. struct il_tid_data tid[MAX_TID_COUNT];
  639. u8 used;
  640. struct il_hw_key keyinfo;
  641. struct il_link_quality_cmd *lq;
  642. };
  643. struct il_station_priv_common {
  644. u8 sta_id;
  645. };
  646. /**
  647. * struct il_vif_priv - driver's ilate per-interface information
  648. *
  649. * When mac80211 allocates a virtual interface, it can allocate
  650. * space for us to put data into.
  651. */
  652. struct il_vif_priv {
  653. u8 ibss_bssid_sta_id;
  654. };
  655. /* one for each uCode image (inst/data, boot/init/runtime) */
  656. struct fw_desc {
  657. void *v_addr; /* access by driver */
  658. dma_addr_t p_addr; /* access by card's busmaster DMA */
  659. u32 len; /* bytes */
  660. };
  661. /* uCode file layout */
  662. struct il_ucode_header {
  663. __le32 ver; /* major/minor/API/serial */
  664. struct {
  665. __le32 inst_size; /* bytes of runtime code */
  666. __le32 data_size; /* bytes of runtime data */
  667. __le32 init_size; /* bytes of init code */
  668. __le32 init_data_size; /* bytes of init data */
  669. __le32 boot_size; /* bytes of bootstrap code */
  670. u8 data[0]; /* in same order as sizes */
  671. } v1;
  672. };
  673. struct il4965_ibss_seq {
  674. u8 mac[ETH_ALEN];
  675. u16 seq_num;
  676. u16 frag_num;
  677. unsigned long packet_time;
  678. struct list_head list;
  679. };
  680. struct il_sensitivity_ranges {
  681. u16 min_nrg_cck;
  682. u16 max_nrg_cck;
  683. u16 nrg_th_cck;
  684. u16 nrg_th_ofdm;
  685. u16 auto_corr_min_ofdm;
  686. u16 auto_corr_min_ofdm_mrc;
  687. u16 auto_corr_min_ofdm_x1;
  688. u16 auto_corr_min_ofdm_mrc_x1;
  689. u16 auto_corr_max_ofdm;
  690. u16 auto_corr_max_ofdm_mrc;
  691. u16 auto_corr_max_ofdm_x1;
  692. u16 auto_corr_max_ofdm_mrc_x1;
  693. u16 auto_corr_max_cck;
  694. u16 auto_corr_max_cck_mrc;
  695. u16 auto_corr_min_cck;
  696. u16 auto_corr_min_cck_mrc;
  697. u16 barker_corr_th_min;
  698. u16 barker_corr_th_min_mrc;
  699. u16 nrg_th_cca;
  700. };
  701. #define KELVIN_TO_CELSIUS(x) ((x)-273)
  702. #define CELSIUS_TO_KELVIN(x) ((x)+273)
  703. /**
  704. * struct il_hw_params
  705. * @bcast_id: f/w broadcast station ID
  706. * @max_txq_num: Max # Tx queues supported
  707. * @dma_chnl_num: Number of Tx DMA/FIFO channels
  708. * @scd_bc_tbls_size: size of scheduler byte count tables
  709. * @tfd_size: TFD size
  710. * @tx/rx_chains_num: Number of TX/RX chains
  711. * @valid_tx/rx_ant: usable antennas
  712. * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
  713. * @max_rxq_log: Log-base-2 of max_rxq_size
  714. * @rx_page_order: Rx buffer page order
  715. * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
  716. * @max_stations:
  717. * @ht40_channel: is 40MHz width possible in band 2.4
  718. * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
  719. * @sw_crypto: 0 for hw, 1 for sw
  720. * @max_xxx_size: for ucode uses
  721. * @ct_kill_threshold: temperature threshold
  722. * @beacon_time_tsf_bits: number of valid tsf bits for beacon time
  723. * @struct il_sensitivity_ranges: range of sensitivity values
  724. */
  725. struct il_hw_params {
  726. u8 bcast_id;
  727. u8 max_txq_num;
  728. u8 dma_chnl_num;
  729. u16 scd_bc_tbls_size;
  730. u32 tfd_size;
  731. u8 tx_chains_num;
  732. u8 rx_chains_num;
  733. u8 valid_tx_ant;
  734. u8 valid_rx_ant;
  735. u16 max_rxq_size;
  736. u16 max_rxq_log;
  737. u32 rx_page_order;
  738. u32 rx_wrt_ptr_reg;
  739. u8 max_stations;
  740. u8 ht40_channel;
  741. u8 max_beacon_itrvl; /* in 1024 ms */
  742. u32 max_inst_size;
  743. u32 max_data_size;
  744. u32 max_bsm_size;
  745. u32 ct_kill_threshold; /* value in hw-dependent units */
  746. u16 beacon_time_tsf_bits;
  747. const struct il_sensitivity_ranges *sens;
  748. };
  749. /******************************************************************************
  750. *
  751. * Functions implemented in core module which are forward declared here
  752. * for use by iwl-[4-5].c
  753. *
  754. * NOTE: The implementation of these functions are not hardware specific
  755. * which is why they are in the core module files.
  756. *
  757. * Naming convention --
  758. * il_ <-- Is part of iwlwifi
  759. * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
  760. * il4965_bg_ <-- Called from work queue context
  761. * il4965_mac_ <-- mac80211 callback
  762. *
  763. ****************************************************************************/
  764. void il4965_update_chain_flags(struct il_priv *il);
  765. extern const u8 il_bcast_addr[ETH_ALEN];
  766. int il_queue_space(const struct il_queue *q);
  767. static inline int
  768. il_queue_used(const struct il_queue *q, int i)
  769. {
  770. return q->write_ptr >= q->read_ptr ? (i >= q->read_ptr &&
  771. i < q->write_ptr) : !(i <
  772. q->read_ptr
  773. && i >=
  774. q->
  775. write_ptr);
  776. }
  777. static inline u8
  778. il_get_cmd_idx(struct il_queue *q, u32 idx, int is_huge)
  779. {
  780. /*
  781. * This is for init calibration result and scan command which
  782. * required buffer > TFD_MAX_PAYLOAD_SIZE,
  783. * the big buffer at end of command array
  784. */
  785. if (is_huge)
  786. return q->n_win; /* must be power of 2 */
  787. /* Otherwise, use normal size buffers */
  788. return idx & (q->n_win - 1);
  789. }
  790. struct il_dma_ptr {
  791. dma_addr_t dma;
  792. void *addr;
  793. size_t size;
  794. };
  795. #define IL_OPERATION_MODE_AUTO 0
  796. #define IL_OPERATION_MODE_HT_ONLY 1
  797. #define IL_OPERATION_MODE_MIXED 2
  798. #define IL_OPERATION_MODE_20MHZ 3
  799. #define IL_TX_CRC_SIZE 4
  800. #define IL_TX_DELIMITER_SIZE 4
  801. #define TX_POWER_IL_ILLEGAL_VOLTAGE -10000
  802. /* Sensitivity and chain noise calibration */
  803. #define INITIALIZATION_VALUE 0xFFFF
  804. #define IL4965_CAL_NUM_BEACONS 20
  805. #define IL_CAL_NUM_BEACONS 16
  806. #define MAXIMUM_ALLOWED_PATHLOSS 15
  807. #define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
  808. #define MAX_FA_OFDM 50
  809. #define MIN_FA_OFDM 5
  810. #define MAX_FA_CCK 50
  811. #define MIN_FA_CCK 5
  812. #define AUTO_CORR_STEP_OFDM 1
  813. #define AUTO_CORR_STEP_CCK 3
  814. #define AUTO_CORR_MAX_TH_CCK 160
  815. #define NRG_DIFF 2
  816. #define NRG_STEP_CCK 2
  817. #define NRG_MARGIN 8
  818. #define MAX_NUMBER_CCK_NO_FA 100
  819. #define AUTO_CORR_CCK_MIN_VAL_DEF (125)
  820. #define CHAIN_A 0
  821. #define CHAIN_B 1
  822. #define CHAIN_C 2
  823. #define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
  824. #define ALL_BAND_FILTER 0xFF00
  825. #define IN_BAND_FILTER 0xFF
  826. #define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
  827. #define NRG_NUM_PREV_STAT_L 20
  828. #define NUM_RX_CHAINS 3
  829. enum il4965_false_alarm_state {
  830. IL_FA_TOO_MANY = 0,
  831. IL_FA_TOO_FEW = 1,
  832. IL_FA_GOOD_RANGE = 2,
  833. };
  834. enum il4965_chain_noise_state {
  835. IL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
  836. IL_CHAIN_NOISE_ACCUMULATE,
  837. IL_CHAIN_NOISE_CALIBRATED,
  838. IL_CHAIN_NOISE_DONE,
  839. };
  840. enum ucode_type {
  841. UCODE_NONE = 0,
  842. UCODE_INIT,
  843. UCODE_RT
  844. };
  845. /* Sensitivity calib data */
  846. struct il_sensitivity_data {
  847. u32 auto_corr_ofdm;
  848. u32 auto_corr_ofdm_mrc;
  849. u32 auto_corr_ofdm_x1;
  850. u32 auto_corr_ofdm_mrc_x1;
  851. u32 auto_corr_cck;
  852. u32 auto_corr_cck_mrc;
  853. u32 last_bad_plcp_cnt_ofdm;
  854. u32 last_fa_cnt_ofdm;
  855. u32 last_bad_plcp_cnt_cck;
  856. u32 last_fa_cnt_cck;
  857. u32 nrg_curr_state;
  858. u32 nrg_prev_state;
  859. u32 nrg_value[10];
  860. u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
  861. u32 nrg_silence_ref;
  862. u32 nrg_energy_idx;
  863. u32 nrg_silence_idx;
  864. u32 nrg_th_cck;
  865. s32 nrg_auto_corr_silence_diff;
  866. u32 num_in_cck_no_fa;
  867. u32 nrg_th_ofdm;
  868. u16 barker_corr_th_min;
  869. u16 barker_corr_th_min_mrc;
  870. u16 nrg_th_cca;
  871. };
  872. /* Chain noise (differential Rx gain) calib data */
  873. struct il_chain_noise_data {
  874. u32 active_chains;
  875. u32 chain_noise_a;
  876. u32 chain_noise_b;
  877. u32 chain_noise_c;
  878. u32 chain_signal_a;
  879. u32 chain_signal_b;
  880. u32 chain_signal_c;
  881. u16 beacon_count;
  882. u8 disconn_array[NUM_RX_CHAINS];
  883. u8 delta_gain_code[NUM_RX_CHAINS];
  884. u8 radio_write;
  885. u8 state;
  886. };
  887. #define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
  888. #define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
  889. #define IL_TRAFFIC_ENTRIES (256)
  890. #define IL_TRAFFIC_ENTRY_SIZE (64)
  891. enum {
  892. MEASUREMENT_READY = (1 << 0),
  893. MEASUREMENT_ACTIVE = (1 << 1),
  894. };
  895. /* interrupt stats */
  896. struct isr_stats {
  897. u32 hw;
  898. u32 sw;
  899. u32 err_code;
  900. u32 sch;
  901. u32 alive;
  902. u32 rfkill;
  903. u32 ctkill;
  904. u32 wakeup;
  905. u32 rx;
  906. u32 handlers[IL_CN_MAX];
  907. u32 tx;
  908. u32 unhandled;
  909. };
  910. /* management stats */
  911. enum il_mgmt_stats {
  912. MANAGEMENT_ASSOC_REQ = 0,
  913. MANAGEMENT_ASSOC_RESP,
  914. MANAGEMENT_REASSOC_REQ,
  915. MANAGEMENT_REASSOC_RESP,
  916. MANAGEMENT_PROBE_REQ,
  917. MANAGEMENT_PROBE_RESP,
  918. MANAGEMENT_BEACON,
  919. MANAGEMENT_ATIM,
  920. MANAGEMENT_DISASSOC,
  921. MANAGEMENT_AUTH,
  922. MANAGEMENT_DEAUTH,
  923. MANAGEMENT_ACTION,
  924. MANAGEMENT_MAX,
  925. };
  926. /* control stats */
  927. enum il_ctrl_stats {
  928. CONTROL_BACK_REQ = 0,
  929. CONTROL_BACK,
  930. CONTROL_PSPOLL,
  931. CONTROL_RTS,
  932. CONTROL_CTS,
  933. CONTROL_ACK,
  934. CONTROL_CFEND,
  935. CONTROL_CFENDACK,
  936. CONTROL_MAX,
  937. };
  938. struct traffic_stats {
  939. #ifdef CONFIG_IWLEGACY_DEBUGFS
  940. u32 mgmt[MANAGEMENT_MAX];
  941. u32 ctrl[CONTROL_MAX];
  942. u32 data_cnt;
  943. u64 data_bytes;
  944. #endif
  945. };
  946. /*
  947. * host interrupt timeout value
  948. * used with setting interrupt coalescing timer
  949. * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
  950. *
  951. * default interrupt coalescing timer is 64 x 32 = 2048 usecs
  952. * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs
  953. */
  954. #define IL_HOST_INT_TIMEOUT_MAX (0xFF)
  955. #define IL_HOST_INT_TIMEOUT_DEF (0x40)
  956. #define IL_HOST_INT_TIMEOUT_MIN (0x0)
  957. #define IL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF)
  958. #define IL_HOST_INT_CALIB_TIMEOUT_DEF (0x10)
  959. #define IL_HOST_INT_CALIB_TIMEOUT_MIN (0x0)
  960. #define IL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5)
  961. /* TX queue watchdog timeouts in mSecs */
  962. #define IL_DEF_WD_TIMEOUT (2000)
  963. #define IL_LONG_WD_TIMEOUT (10000)
  964. #define IL_MAX_WD_TIMEOUT (120000)
  965. struct il_force_reset {
  966. int reset_request_count;
  967. int reset_success_count;
  968. int reset_reject_count;
  969. unsigned long reset_duration;
  970. unsigned long last_force_reset_jiffies;
  971. };
  972. /* extend beacon time format bit shifting */
  973. /*
  974. * for _3945 devices
  975. * bits 31:24 - extended
  976. * bits 23:0 - interval
  977. */
  978. #define IL3945_EXT_BEACON_TIME_POS 24
  979. /*
  980. * for _4965 devices
  981. * bits 31:22 - extended
  982. * bits 21:0 - interval
  983. */
  984. #define IL4965_EXT_BEACON_TIME_POS 22
  985. struct il_rxon_context {
  986. struct ieee80211_vif *vif;
  987. };
  988. struct il_power_mgr {
  989. struct il_powertable_cmd sleep_cmd;
  990. struct il_powertable_cmd sleep_cmd_next;
  991. int debug_sleep_level_override;
  992. bool pci_pm;
  993. bool ps_disabled;
  994. };
  995. struct il_priv {
  996. struct ieee80211_hw *hw;
  997. struct ieee80211_channel *ieee_channels;
  998. struct ieee80211_rate *ieee_rates;
  999. struct il_cfg *cfg;
  1000. const struct il_ops *ops;
  1001. #ifdef CONFIG_IWLEGACY_DEBUGFS
  1002. const struct il_debugfs_ops *debugfs_ops;
  1003. #endif
  1004. /* temporary frame storage list */
  1005. struct list_head free_frames;
  1006. int frames_count;
  1007. enum ieee80211_band band;
  1008. int alloc_rxb_page;
  1009. void (*handlers[IL_CN_MAX]) (struct il_priv *il,
  1010. struct il_rx_buf *rxb);
  1011. struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
  1012. /* spectrum measurement report caching */
  1013. struct il_spectrum_notification measure_report;
  1014. u8 measurement_status;
  1015. /* ucode beacon time */
  1016. u32 ucode_beacon_time;
  1017. int missed_beacon_threshold;
  1018. /* track IBSS manager (last beacon) status */
  1019. u32 ibss_manager;
  1020. /* force reset */
  1021. struct il_force_reset force_reset;
  1022. /* we allocate array of il_channel_info for NIC's valid channels.
  1023. * Access via channel # using indirect idx array */
  1024. struct il_channel_info *channel_info; /* channel info array */
  1025. u8 channel_count; /* # of channels */
  1026. /* thermal calibration */
  1027. s32 temperature; /* degrees Kelvin */
  1028. s32 last_temperature;
  1029. /* Scan related variables */
  1030. unsigned long scan_start;
  1031. unsigned long scan_start_tsf;
  1032. void *scan_cmd;
  1033. enum ieee80211_band scan_band;
  1034. struct cfg80211_scan_request *scan_request;
  1035. struct ieee80211_vif *scan_vif;
  1036. u8 scan_tx_ant[IEEE80211_NUM_BANDS];
  1037. u8 mgmt_tx_ant;
  1038. /* spinlock */
  1039. spinlock_t lock; /* protect general shared data */
  1040. spinlock_t hcmd_lock; /* protect hcmd */
  1041. spinlock_t reg_lock; /* protect hw register access */
  1042. struct mutex mutex;
  1043. /* basic pci-network driver stuff */
  1044. struct pci_dev *pci_dev;
  1045. /* pci hardware address support */
  1046. void __iomem *hw_base;
  1047. u32 hw_rev;
  1048. u32 hw_wa_rev;
  1049. u8 rev_id;
  1050. /* command queue number */
  1051. u8 cmd_queue;
  1052. /* max number of station keys */
  1053. u8 sta_key_max_num;
  1054. /* EEPROM MAC addresses */
  1055. struct mac_address addresses[1];
  1056. /* uCode images, save to reload in case of failure */
  1057. int fw_idx; /* firmware we're trying to load */
  1058. u32 ucode_ver; /* version of ucode, copy of
  1059. il_ucode.ver */
  1060. struct fw_desc ucode_code; /* runtime inst */
  1061. struct fw_desc ucode_data; /* runtime data original */
  1062. struct fw_desc ucode_data_backup; /* runtime data save/restore */
  1063. struct fw_desc ucode_init; /* initialization inst */
  1064. struct fw_desc ucode_init_data; /* initialization data */
  1065. struct fw_desc ucode_boot; /* bootstrap inst */
  1066. enum ucode_type ucode_type;
  1067. u8 ucode_write_complete; /* the image write is complete */
  1068. char firmware_name[25];
  1069. struct ieee80211_vif *vif;
  1070. struct il_qos_info qos_data;
  1071. struct {
  1072. bool enabled;
  1073. bool is_40mhz;
  1074. bool non_gf_sta_present;
  1075. u8 protection;
  1076. u8 extension_chan_offset;
  1077. } ht;
  1078. /*
  1079. * We declare this const so it can only be
  1080. * changed via explicit cast within the
  1081. * routines that actually update the physical
  1082. * hardware.
  1083. */
  1084. const struct il_rxon_cmd active;
  1085. struct il_rxon_cmd staging;
  1086. struct il_rxon_time_cmd timing;
  1087. __le16 switch_channel;
  1088. /* 1st responses from initialize and runtime uCode images.
  1089. * _4965's initialize alive response contains some calibration data. */
  1090. struct il_init_alive_resp card_alive_init;
  1091. struct il_alive_resp card_alive;
  1092. u16 active_rate;
  1093. u8 start_calib;
  1094. struct il_sensitivity_data sensitivity_data;
  1095. struct il_chain_noise_data chain_noise_data;
  1096. __le16 sensitivity_tbl[HD_TBL_SIZE];
  1097. struct il_ht_config current_ht_config;
  1098. /* Rate scaling data */
  1099. u8 retry_rate;
  1100. wait_queue_head_t wait_command_queue;
  1101. int activity_timer_active;
  1102. /* Rx and Tx DMA processing queues */
  1103. struct il_rx_queue rxq;
  1104. struct il_tx_queue *txq;
  1105. unsigned long txq_ctx_active_msk;
  1106. struct il_dma_ptr kw; /* keep warm address */
  1107. struct il_dma_ptr scd_bc_tbls;
  1108. u32 scd_base_addr; /* scheduler sram base address */
  1109. unsigned long status;
  1110. /* counts mgmt, ctl, and data packets */
  1111. struct traffic_stats tx_stats;
  1112. struct traffic_stats rx_stats;
  1113. /* counts interrupts */
  1114. struct isr_stats isr_stats;
  1115. struct il_power_mgr power_data;
  1116. /* context information */
  1117. u8 bssid[ETH_ALEN]; /* used only on 3945 but filled by core */
  1118. /* station table variables */
  1119. /* Note: if lock and sta_lock are needed, lock must be acquired first */
  1120. spinlock_t sta_lock;
  1121. int num_stations;
  1122. struct il_station_entry stations[IL_STATION_COUNT];
  1123. unsigned long ucode_key_table;
  1124. /* queue refcounts */
  1125. #define IL_MAX_HW_QUEUES 32
  1126. unsigned long queue_stopped[BITS_TO_LONGS(IL_MAX_HW_QUEUES)];
  1127. #define IL_STOP_REASON_PASSIVE 0
  1128. unsigned long stop_reason;
  1129. /* for each AC */
  1130. atomic_t queue_stop_count[4];
  1131. /* Indication if ieee80211_ops->open has been called */
  1132. u8 is_open;
  1133. u8 mac80211_registered;
  1134. /* eeprom -- this is in the card's little endian byte order */
  1135. u8 *eeprom;
  1136. struct il_eeprom_calib_info *calib_info;
  1137. enum nl80211_iftype iw_mode;
  1138. /* Last Rx'd beacon timestamp */
  1139. u64 timestamp;
  1140. union {
  1141. #if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE)
  1142. struct {
  1143. void *shared_virt;
  1144. dma_addr_t shared_phys;
  1145. struct delayed_work thermal_periodic;
  1146. struct delayed_work rfkill_poll;
  1147. struct il3945_notif_stats stats;
  1148. #ifdef CONFIG_IWLEGACY_DEBUGFS
  1149. struct il3945_notif_stats accum_stats;
  1150. struct il3945_notif_stats delta_stats;
  1151. struct il3945_notif_stats max_delta;
  1152. #endif
  1153. u32 sta_supp_rates;
  1154. int last_rx_rssi; /* From Rx packet stats */
  1155. /* Rx'd packet timing information */
  1156. u32 last_beacon_time;
  1157. u64 last_tsf;
  1158. /*
  1159. * each calibration channel group in the
  1160. * EEPROM has a derived clip setting for
  1161. * each rate.
  1162. */
  1163. const struct il3945_clip_group clip_groups[5];
  1164. } _3945;
  1165. #endif
  1166. #if defined(CONFIG_IWL4965) || defined(CONFIG_IWL4965_MODULE)
  1167. struct {
  1168. struct il_rx_phy_res last_phy_res;
  1169. bool last_phy_res_valid;
  1170. u32 ampdu_ref;
  1171. struct completion firmware_loading_complete;
  1172. /*
  1173. * chain noise reset and gain commands are the
  1174. * two extra calibration commands follows the standard
  1175. * phy calibration commands
  1176. */
  1177. u8 phy_calib_chain_noise_reset_cmd;
  1178. u8 phy_calib_chain_noise_gain_cmd;
  1179. u8 key_mapping_keys;
  1180. struct il_wep_key wep_keys[WEP_KEYS_MAX];
  1181. struct il_notif_stats stats;
  1182. #ifdef CONFIG_IWLEGACY_DEBUGFS
  1183. struct il_notif_stats accum_stats;
  1184. struct il_notif_stats delta_stats;
  1185. struct il_notif_stats max_delta;
  1186. #endif
  1187. } _4965;
  1188. #endif
  1189. };
  1190. struct il_hw_params hw_params;
  1191. u32 inta_mask;
  1192. struct workqueue_struct *workqueue;
  1193. struct work_struct restart;
  1194. struct work_struct scan_completed;
  1195. struct work_struct rx_replenish;
  1196. struct work_struct abort_scan;
  1197. bool beacon_enabled;
  1198. struct sk_buff *beacon_skb;
  1199. struct work_struct tx_flush;
  1200. struct tasklet_struct irq_tasklet;
  1201. struct delayed_work init_alive_start;
  1202. struct delayed_work alive_start;
  1203. struct delayed_work scan_check;
  1204. /* TX Power */
  1205. s8 tx_power_user_lmt;
  1206. s8 tx_power_device_lmt;
  1207. s8 tx_power_next;
  1208. #ifdef CONFIG_IWLEGACY_DEBUG
  1209. /* debugging info */
  1210. u32 debug_level; /* per device debugging will override global
  1211. il_debug_level if set */
  1212. #endif /* CONFIG_IWLEGACY_DEBUG */
  1213. #ifdef CONFIG_IWLEGACY_DEBUGFS
  1214. /* debugfs */
  1215. u16 tx_traffic_idx;
  1216. u16 rx_traffic_idx;
  1217. u8 *tx_traffic;
  1218. u8 *rx_traffic;
  1219. struct dentry *debugfs_dir;
  1220. u32 dbgfs_sram_offset, dbgfs_sram_len;
  1221. bool disable_ht40;
  1222. #endif /* CONFIG_IWLEGACY_DEBUGFS */
  1223. struct work_struct txpower_work;
  1224. bool disable_sens_cal;
  1225. bool disable_chain_noise_cal;
  1226. bool disable_tx_power_cal;
  1227. struct work_struct run_time_calib_work;
  1228. struct timer_list stats_periodic;
  1229. struct timer_list watchdog;
  1230. bool hw_ready;
  1231. struct led_classdev led;
  1232. unsigned long blink_on, blink_off;
  1233. bool led_registered;
  1234. }; /*il_priv */
  1235. static inline void
  1236. il_txq_ctx_activate(struct il_priv *il, int txq_id)
  1237. {
  1238. set_bit(txq_id, &il->txq_ctx_active_msk);
  1239. }
  1240. static inline void
  1241. il_txq_ctx_deactivate(struct il_priv *il, int txq_id)
  1242. {
  1243. clear_bit(txq_id, &il->txq_ctx_active_msk);
  1244. }
  1245. static inline int
  1246. il_is_associated(struct il_priv *il)
  1247. {
  1248. return (il->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
  1249. }
  1250. static inline int
  1251. il_is_any_associated(struct il_priv *il)
  1252. {
  1253. return il_is_associated(il);
  1254. }
  1255. static inline int
  1256. il_is_channel_valid(const struct il_channel_info *ch_info)
  1257. {
  1258. if (ch_info == NULL)
  1259. return 0;
  1260. return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
  1261. }
  1262. static inline int
  1263. il_is_channel_radar(const struct il_channel_info *ch_info)
  1264. {
  1265. return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
  1266. }
  1267. static inline u8
  1268. il_is_channel_a_band(const struct il_channel_info *ch_info)
  1269. {
  1270. return ch_info->band == IEEE80211_BAND_5GHZ;
  1271. }
  1272. static inline int
  1273. il_is_channel_passive(const struct il_channel_info *ch)
  1274. {
  1275. return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
  1276. }
  1277. static inline int
  1278. il_is_channel_ibss(const struct il_channel_info *ch)
  1279. {
  1280. return (ch->flags & EEPROM_CHANNEL_IBSS) ? 1 : 0;
  1281. }
  1282. static inline void
  1283. __il_free_pages(struct il_priv *il, struct page *page)
  1284. {
  1285. __free_pages(page, il->hw_params.rx_page_order);
  1286. il->alloc_rxb_page--;
  1287. }
  1288. static inline void
  1289. il_free_pages(struct il_priv *il, unsigned long page)
  1290. {
  1291. free_pages(page, il->hw_params.rx_page_order);
  1292. il->alloc_rxb_page--;
  1293. }
  1294. #define IWLWIFI_VERSION "in-tree:"
  1295. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  1296. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  1297. #define IL_PCI_DEVICE(dev, subdev, cfg) \
  1298. .vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \
  1299. .subvendor = PCI_ANY_ID, .subdevice = (subdev), \
  1300. .driver_data = (kernel_ulong_t)&(cfg)
  1301. #define TIME_UNIT 1024
  1302. #define IL_SKU_G 0x1
  1303. #define IL_SKU_A 0x2
  1304. #define IL_SKU_N 0x8
  1305. #define IL_CMD(x) case x: return #x
  1306. /* Size of one Rx buffer in host DRAM */
  1307. #define IL_RX_BUF_SIZE_3K (3 * 1000) /* 3945 only */
  1308. #define IL_RX_BUF_SIZE_4K (4 * 1024)
  1309. #define IL_RX_BUF_SIZE_8K (8 * 1024)
  1310. #ifdef CONFIG_IWLEGACY_DEBUGFS
  1311. struct il_debugfs_ops {
  1312. ssize_t(*rx_stats_read) (struct file *file, char __user *user_buf,
  1313. size_t count, loff_t *ppos);
  1314. ssize_t(*tx_stats_read) (struct file *file, char __user *user_buf,
  1315. size_t count, loff_t *ppos);
  1316. ssize_t(*general_stats_read) (struct file *file,
  1317. char __user *user_buf, size_t count,
  1318. loff_t *ppos);
  1319. };
  1320. #endif
  1321. struct il_ops {
  1322. /* Handling TX */
  1323. void (*txq_update_byte_cnt_tbl) (struct il_priv *il,
  1324. struct il_tx_queue *txq,
  1325. u16 byte_cnt);
  1326. int (*txq_attach_buf_to_tfd) (struct il_priv *il,
  1327. struct il_tx_queue *txq, dma_addr_t addr,
  1328. u16 len, u8 reset, u8 pad);
  1329. void (*txq_free_tfd) (struct il_priv *il, struct il_tx_queue *txq);
  1330. int (*txq_init) (struct il_priv *il, struct il_tx_queue *txq);
  1331. /* alive notification after init uCode load */
  1332. void (*init_alive_start) (struct il_priv *il);
  1333. /* check validity of rtc data address */
  1334. int (*is_valid_rtc_data_addr) (u32 addr);
  1335. /* 1st ucode load */
  1336. int (*load_ucode) (struct il_priv *il);
  1337. void (*dump_nic_error_log) (struct il_priv *il);
  1338. int (*dump_fh) (struct il_priv *il, char **buf, bool display);
  1339. int (*set_channel_switch) (struct il_priv *il,
  1340. struct ieee80211_channel_switch *ch_switch);
  1341. /* power management */
  1342. int (*apm_init) (struct il_priv *il);
  1343. /* tx power */
  1344. int (*send_tx_power) (struct il_priv *il);
  1345. void (*update_chain_flags) (struct il_priv *il);
  1346. /* eeprom operations */
  1347. int (*eeprom_acquire_semaphore) (struct il_priv *il);
  1348. void (*eeprom_release_semaphore) (struct il_priv *il);
  1349. int (*rxon_assoc) (struct il_priv *il);
  1350. int (*commit_rxon) (struct il_priv *il);
  1351. void (*set_rxon_chain) (struct il_priv *il);
  1352. u16(*get_hcmd_size) (u8 cmd_id, u16 len);
  1353. u16(*build_addsta_hcmd) (const struct il_addsta_cmd *cmd, u8 *data);
  1354. int (*request_scan) (struct il_priv *il, struct ieee80211_vif *vif);
  1355. void (*post_scan) (struct il_priv *il);
  1356. void (*post_associate) (struct il_priv *il);
  1357. void (*config_ap) (struct il_priv *il);
  1358. /* station management */
  1359. int (*update_bcast_stations) (struct il_priv *il);
  1360. int (*manage_ibss_station) (struct il_priv *il,
  1361. struct ieee80211_vif *vif, bool add);
  1362. int (*send_led_cmd) (struct il_priv *il, struct il_led_cmd *led_cmd);
  1363. };
  1364. struct il_mod_params {
  1365. int sw_crypto; /* def: 0 = using hardware encryption */
  1366. int disable_hw_scan; /* def: 0 = use h/w scan */
  1367. int num_of_queues; /* def: HW dependent */
  1368. int disable_11n; /* def: 0 = 11n capabilities enabled */
  1369. int amsdu_size_8K; /* def: 0 = disable 8K amsdu size */
  1370. int antenna; /* def: 0 = both antennas (use diversity) */
  1371. int restart_fw; /* def: 1 = restart firmware */
  1372. };
  1373. #define IL_LED_SOLID 11
  1374. #define IL_DEF_LED_INTRVL cpu_to_le32(1000)
  1375. #define IL_LED_ACTIVITY (0<<1)
  1376. #define IL_LED_LINK (1<<1)
  1377. /*
  1378. * LED mode
  1379. * IL_LED_DEFAULT: use device default
  1380. * IL_LED_RF_STATE: turn LED on/off based on RF state
  1381. * LED ON = RF ON
  1382. * LED OFF = RF OFF
  1383. * IL_LED_BLINK: adjust led blink rate based on blink table
  1384. */
  1385. enum il_led_mode {
  1386. IL_LED_DEFAULT,
  1387. IL_LED_RF_STATE,
  1388. IL_LED_BLINK,
  1389. };
  1390. void il_leds_init(struct il_priv *il);
  1391. void il_leds_exit(struct il_priv *il);
  1392. /**
  1393. * struct il_cfg
  1394. * @fw_name_pre: Firmware filename prefix. The api version and extension
  1395. * (.ucode) will be added to filename before loading from disk. The
  1396. * filename is constructed as fw_name_pre<api>.ucode.
  1397. * @ucode_api_max: Highest version of uCode API supported by driver.
  1398. * @ucode_api_min: Lowest version of uCode API supported by driver.
  1399. * @scan_antennas: available antenna for scan operation
  1400. * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
  1401. *
  1402. * We enable the driver to be backward compatible wrt API version. The
  1403. * driver specifies which APIs it supports (with @ucode_api_max being the
  1404. * highest and @ucode_api_min the lowest). Firmware will only be loaded if
  1405. * it has a supported API version. The firmware's API version will be
  1406. * stored in @il_priv, enabling the driver to make runtime changes based
  1407. * on firmware version used.
  1408. *
  1409. * For example,
  1410. * if (IL_UCODE_API(il->ucode_ver) >= 2) {
  1411. * Driver interacts with Firmware API version >= 2.
  1412. * } else {
  1413. * Driver interacts with Firmware API version 1.
  1414. * }
  1415. *
  1416. * The ideal usage of this infrastructure is to treat a new ucode API
  1417. * release as a new hardware revision. That is, through utilizing the
  1418. * il_hcmd_utils_ops etc. we accommodate different command structures
  1419. * and flows between hardware versions as well as their API
  1420. * versions.
  1421. *
  1422. */
  1423. struct il_cfg {
  1424. /* params specific to an individual device within a device family */
  1425. const char *name;
  1426. const char *fw_name_pre;
  1427. const unsigned int ucode_api_max;
  1428. const unsigned int ucode_api_min;
  1429. u8 valid_tx_ant;
  1430. u8 valid_rx_ant;
  1431. unsigned int sku;
  1432. u16 eeprom_ver;
  1433. u16 eeprom_calib_ver;
  1434. /* module based parameters which can be set from modprobe cmd */
  1435. const struct il_mod_params *mod_params;
  1436. /* params not likely to change within a device family */
  1437. struct il_base_params *base_params;
  1438. /* params likely to change within a device family */
  1439. u8 scan_rx_antennas[IEEE80211_NUM_BANDS];
  1440. enum il_led_mode led_mode;
  1441. int eeprom_size;
  1442. int num_of_queues; /* def: HW dependent */
  1443. int num_of_ampdu_queues; /* def: HW dependent */
  1444. /* for il_apm_init() */
  1445. u32 pll_cfg_val;
  1446. bool set_l0s;
  1447. bool use_bsm;
  1448. u16 led_compensation;
  1449. int chain_noise_num_beacons;
  1450. unsigned int wd_timeout;
  1451. bool temperature_kelvin;
  1452. const bool ucode_tracing;
  1453. const bool sensitivity_calib_by_driver;
  1454. const bool chain_noise_calib_by_driver;
  1455. const u32 regulatory_bands[7];
  1456. };
  1457. /***************************
  1458. * L i b *
  1459. ***************************/
  1460. int il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1461. u16 queue, const struct ieee80211_tx_queue_params *params);
  1462. int il_mac_tx_last_beacon(struct ieee80211_hw *hw);
  1463. void il_set_rxon_hwcrypto(struct il_priv *il, int hw_decrypt);
  1464. int il_check_rxon_cmd(struct il_priv *il);
  1465. int il_full_rxon_required(struct il_priv *il);
  1466. int il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch);
  1467. void il_set_flags_for_band(struct il_priv *il, enum ieee80211_band band,
  1468. struct ieee80211_vif *vif);
  1469. u8 il_get_single_channel_number(struct il_priv *il, enum ieee80211_band band);
  1470. void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf);
  1471. bool il_is_ht40_tx_allowed(struct il_priv *il,
  1472. struct ieee80211_sta_ht_cap *ht_cap);
  1473. void il_connection_init_rx_config(struct il_priv *il);
  1474. void il_set_rate(struct il_priv *il);
  1475. int il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
  1476. u32 decrypt_res, struct ieee80211_rx_status *stats);
  1477. void il_irq_handle_error(struct il_priv *il);
  1478. int il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
  1479. void il_mac_remove_interface(struct ieee80211_hw *hw,
  1480. struct ieee80211_vif *vif);
  1481. int il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1482. enum nl80211_iftype newtype, bool newp2p);
  1483. void il_mac_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1484. u32 queues, bool drop);
  1485. int il_alloc_txq_mem(struct il_priv *il);
  1486. void il_free_txq_mem(struct il_priv *il);
  1487. #ifdef CONFIG_IWLEGACY_DEBUGFS
  1488. void il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len);
  1489. #else
  1490. static inline void
  1491. il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
  1492. {
  1493. }
  1494. #endif
  1495. /*****************************************************
  1496. * Handlers
  1497. ***************************************************/
  1498. void il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb);
  1499. void il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb);
  1500. void il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb);
  1501. void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb);
  1502. /*****************************************************
  1503. * RX
  1504. ******************************************************/
  1505. void il_cmd_queue_unmap(struct il_priv *il);
  1506. void il_cmd_queue_free(struct il_priv *il);
  1507. int il_rx_queue_alloc(struct il_priv *il);
  1508. void il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q);
  1509. int il_rx_queue_space(const struct il_rx_queue *q);
  1510. void il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb);
  1511. void il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb);
  1512. void il_recover_from_stats(struct il_priv *il, struct il_rx_pkt *pkt);
  1513. void il_chswitch_done(struct il_priv *il, bool is_success);
  1514. /*****************************************************
  1515. * TX
  1516. ******************************************************/
  1517. void il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq);
  1518. int il_tx_queue_init(struct il_priv *il, u32 txq_id);
  1519. void il_tx_queue_reset(struct il_priv *il, u32 txq_id);
  1520. void il_tx_queue_unmap(struct il_priv *il, int txq_id);
  1521. void il_tx_queue_free(struct il_priv *il, int txq_id);
  1522. void il_setup_watchdog(struct il_priv *il);
  1523. /*****************************************************
  1524. * TX power
  1525. ****************************************************/
  1526. int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force);
  1527. /*******************************************************************************
  1528. * Rate
  1529. ******************************************************************************/
  1530. u8 il_get_lowest_plcp(struct il_priv *il);
  1531. /*******************************************************************************
  1532. * Scanning
  1533. ******************************************************************************/
  1534. void il_init_scan_params(struct il_priv *il);
  1535. int il_scan_cancel(struct il_priv *il);
  1536. int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms);
  1537. void il_force_scan_end(struct il_priv *il);
  1538. int il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1539. struct ieee80211_scan_request *hw_req);
  1540. void il_internal_short_hw_scan(struct il_priv *il);
  1541. int il_force_reset(struct il_priv *il, bool external);
  1542. u16 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
  1543. const u8 *ta, const u8 *ie, int ie_len, int left);
  1544. void il_setup_rx_scan_handlers(struct il_priv *il);
  1545. u16 il_get_active_dwell_time(struct il_priv *il, enum ieee80211_band band,
  1546. u8 n_probes);
  1547. u16 il_get_passive_dwell_time(struct il_priv *il, enum ieee80211_band band,
  1548. struct ieee80211_vif *vif);
  1549. void il_setup_scan_deferred_work(struct il_priv *il);
  1550. void il_cancel_scan_deferred_work(struct il_priv *il);
  1551. /* For faster active scanning, scan will move to the next channel if fewer than
  1552. * PLCP_QUIET_THRESH packets are heard on this channel within
  1553. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  1554. * time if it's a quiet channel (nothing responded to our probe, and there's
  1555. * no other traffic).
  1556. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  1557. #define IL_ACTIVE_QUIET_TIME cpu_to_le16(10) /* msec */
  1558. #define IL_PLCP_QUIET_THRESH cpu_to_le16(1) /* packets */
  1559. #define IL_SCAN_CHECK_WATCHDOG (HZ * 7)
  1560. /*****************************************************
  1561. * S e n d i n g H o s t C o m m a n d s *
  1562. *****************************************************/
  1563. const char *il_get_cmd_string(u8 cmd);
  1564. int __must_check il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd);
  1565. int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd);
  1566. int __must_check il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len,
  1567. const void *data);
  1568. int il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
  1569. void (*callback) (struct il_priv *il,
  1570. struct il_device_cmd *cmd,
  1571. struct il_rx_pkt *pkt));
  1572. int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd);
  1573. /*****************************************************
  1574. * PCI *
  1575. *****************************************************/
  1576. void il_bg_watchdog(unsigned long data);
  1577. u32 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval);
  1578. __le32 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon,
  1579. u32 beacon_interval);
  1580. #ifdef CONFIG_PM_SLEEP
  1581. extern const struct dev_pm_ops il_pm_ops;
  1582. #define IL_LEGACY_PM_OPS (&il_pm_ops)
  1583. #else /* !CONFIG_PM_SLEEP */
  1584. #define IL_LEGACY_PM_OPS NULL
  1585. #endif /* !CONFIG_PM_SLEEP */
  1586. /*****************************************************
  1587. * Error Handling Debugging
  1588. ******************************************************/
  1589. void il4965_dump_nic_error_log(struct il_priv *il);
  1590. #ifdef CONFIG_IWLEGACY_DEBUG
  1591. void il_print_rx_config_cmd(struct il_priv *il);
  1592. #else
  1593. static inline void
  1594. il_print_rx_config_cmd(struct il_priv *il)
  1595. {
  1596. }
  1597. #endif
  1598. void il_clear_isr_stats(struct il_priv *il);
  1599. /*****************************************************
  1600. * GEOS
  1601. ******************************************************/
  1602. int il_init_geos(struct il_priv *il);
  1603. void il_free_geos(struct il_priv *il);
  1604. /*************** DRIVER STATUS FUNCTIONS *****/
  1605. #define S_HCMD_ACTIVE 0 /* host command in progress */
  1606. /* 1 is unused (used to be S_HCMD_SYNC_ACTIVE) */
  1607. #define S_INT_ENABLED 2
  1608. #define S_RFKILL 3
  1609. #define S_CT_KILL 4
  1610. #define S_INIT 5
  1611. #define S_ALIVE 6
  1612. #define S_READY 7
  1613. #define S_TEMPERATURE 8
  1614. #define S_GEO_CONFIGURED 9
  1615. #define S_EXIT_PENDING 10
  1616. #define S_STATS 12
  1617. #define S_SCANNING 13
  1618. #define S_SCAN_ABORTING 14
  1619. #define S_SCAN_HW 15
  1620. #define S_POWER_PMI 16
  1621. #define S_FW_ERROR 17
  1622. #define S_CHANNEL_SWITCH_PENDING 18
  1623. static inline int
  1624. il_is_ready(struct il_priv *il)
  1625. {
  1626. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  1627. * set but EXIT_PENDING is not */
  1628. return test_bit(S_READY, &il->status) &&
  1629. test_bit(S_GEO_CONFIGURED, &il->status) &&
  1630. !test_bit(S_EXIT_PENDING, &il->status);
  1631. }
  1632. static inline int
  1633. il_is_alive(struct il_priv *il)
  1634. {
  1635. return test_bit(S_ALIVE, &il->status);
  1636. }
  1637. static inline int
  1638. il_is_init(struct il_priv *il)
  1639. {
  1640. return test_bit(S_INIT, &il->status);
  1641. }
  1642. static inline int
  1643. il_is_rfkill(struct il_priv *il)
  1644. {
  1645. return test_bit(S_RFKILL, &il->status);
  1646. }
  1647. static inline int
  1648. il_is_ctkill(struct il_priv *il)
  1649. {
  1650. return test_bit(S_CT_KILL, &il->status);
  1651. }
  1652. static inline int
  1653. il_is_ready_rf(struct il_priv *il)
  1654. {
  1655. if (il_is_rfkill(il))
  1656. return 0;
  1657. return il_is_ready(il);
  1658. }
  1659. void il_send_bt_config(struct il_priv *il);
  1660. int il_send_stats_request(struct il_priv *il, u8 flags, bool clear);
  1661. void il_apm_stop(struct il_priv *il);
  1662. void _il_apm_stop(struct il_priv *il);
  1663. int il_apm_init(struct il_priv *il);
  1664. int il_send_rxon_timing(struct il_priv *il);
  1665. static inline int
  1666. il_send_rxon_assoc(struct il_priv *il)
  1667. {
  1668. return il->ops->rxon_assoc(il);
  1669. }
  1670. static inline int
  1671. il_commit_rxon(struct il_priv *il)
  1672. {
  1673. return il->ops->commit_rxon(il);
  1674. }
  1675. static inline const struct ieee80211_supported_band *
  1676. il_get_hw_mode(struct il_priv *il, enum ieee80211_band band)
  1677. {
  1678. return il->hw->wiphy->bands[band];
  1679. }
  1680. /* mac80211 handlers */
  1681. int il_mac_config(struct ieee80211_hw *hw, u32 changed);
  1682. void il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
  1683. void il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1684. struct ieee80211_bss_conf *bss_conf, u32 changes);
  1685. void il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
  1686. __le16 fc, __le32 *tx_flags);
  1687. irqreturn_t il_isr(int irq, void *data);
  1688. void il_set_bit(struct il_priv *p, u32 r, u32 m);
  1689. void il_clear_bit(struct il_priv *p, u32 r, u32 m);
  1690. bool _il_grab_nic_access(struct il_priv *il);
  1691. int _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout);
  1692. int il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout);
  1693. u32 il_rd_prph(struct il_priv *il, u32 reg);
  1694. void il_wr_prph(struct il_priv *il, u32 addr, u32 val);
  1695. u32 il_read_targ_mem(struct il_priv *il, u32 addr);
  1696. void il_write_targ_mem(struct il_priv *il, u32 addr, u32 val);
  1697. static inline bool il_need_reclaim(struct il_priv *il, struct il_rx_pkt *pkt)
  1698. {
  1699. /* Reclaim a command buffer only if this packet is a response
  1700. * to a (driver-originated) command. If the packet (e.g. Rx frame)
  1701. * originated from uCode, there is no command buffer to reclaim.
  1702. * Ucode should set SEQ_RX_FRAME bit if ucode-originated, but
  1703. * apparently a few don't get set; catch them here.
  1704. */
  1705. return !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1706. pkt->hdr.cmd != N_STATS && pkt->hdr.cmd != C_TX &&
  1707. pkt->hdr.cmd != N_RX_PHY && pkt->hdr.cmd != N_RX &&
  1708. pkt->hdr.cmd != N_RX_MPDU && pkt->hdr.cmd != N_COMPRESSED_BA;
  1709. }
  1710. static inline void
  1711. _il_write8(struct il_priv *il, u32 ofs, u8 val)
  1712. {
  1713. writeb(val, il->hw_base + ofs);
  1714. }
  1715. #define il_write8(il, ofs, val) _il_write8(il, ofs, val)
  1716. static inline void
  1717. _il_wr(struct il_priv *il, u32 ofs, u32 val)
  1718. {
  1719. writel(val, il->hw_base + ofs);
  1720. }
  1721. static inline u32
  1722. _il_rd(struct il_priv *il, u32 ofs)
  1723. {
  1724. return readl(il->hw_base + ofs);
  1725. }
  1726. static inline void
  1727. _il_clear_bit(struct il_priv *il, u32 reg, u32 mask)
  1728. {
  1729. _il_wr(il, reg, _il_rd(il, reg) & ~mask);
  1730. }
  1731. static inline void
  1732. _il_set_bit(struct il_priv *il, u32 reg, u32 mask)
  1733. {
  1734. _il_wr(il, reg, _il_rd(il, reg) | mask);
  1735. }
  1736. static inline void
  1737. _il_release_nic_access(struct il_priv *il)
  1738. {
  1739. _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  1740. /*
  1741. * In above we are reading CSR_GP_CNTRL register, what will flush any
  1742. * previous writes, but still want write, which clear MAC_ACCESS_REQ
  1743. * bit, be performed on PCI bus before any other writes scheduled on
  1744. * different CPUs (after we drop reg_lock).
  1745. */
  1746. mmiowb();
  1747. }
  1748. static inline u32
  1749. il_rd(struct il_priv *il, u32 reg)
  1750. {
  1751. u32 value;
  1752. unsigned long reg_flags;
  1753. spin_lock_irqsave(&il->reg_lock, reg_flags);
  1754. _il_grab_nic_access(il);
  1755. value = _il_rd(il, reg);
  1756. _il_release_nic_access(il);
  1757. spin_unlock_irqrestore(&il->reg_lock, reg_flags);
  1758. return value;
  1759. }
  1760. static inline void
  1761. il_wr(struct il_priv *il, u32 reg, u32 value)
  1762. {
  1763. unsigned long reg_flags;
  1764. spin_lock_irqsave(&il->reg_lock, reg_flags);
  1765. if (likely(_il_grab_nic_access(il))) {
  1766. _il_wr(il, reg, value);
  1767. _il_release_nic_access(il);
  1768. }
  1769. spin_unlock_irqrestore(&il->reg_lock, reg_flags);
  1770. }
  1771. static inline u32
  1772. _il_rd_prph(struct il_priv *il, u32 reg)
  1773. {
  1774. _il_wr(il, HBUS_TARG_PRPH_RADDR, reg | (3 << 24));
  1775. return _il_rd(il, HBUS_TARG_PRPH_RDAT);
  1776. }
  1777. static inline void
  1778. _il_wr_prph(struct il_priv *il, u32 addr, u32 val)
  1779. {
  1780. _il_wr(il, HBUS_TARG_PRPH_WADDR, ((addr & 0x0000FFFF) | (3 << 24)));
  1781. _il_wr(il, HBUS_TARG_PRPH_WDAT, val);
  1782. }
  1783. static inline void
  1784. il_set_bits_prph(struct il_priv *il, u32 reg, u32 mask)
  1785. {
  1786. unsigned long reg_flags;
  1787. spin_lock_irqsave(&il->reg_lock, reg_flags);
  1788. if (likely(_il_grab_nic_access(il))) {
  1789. _il_wr_prph(il, reg, (_il_rd_prph(il, reg) | mask));
  1790. _il_release_nic_access(il);
  1791. }
  1792. spin_unlock_irqrestore(&il->reg_lock, reg_flags);
  1793. }
  1794. static inline void
  1795. il_set_bits_mask_prph(struct il_priv *il, u32 reg, u32 bits, u32 mask)
  1796. {
  1797. unsigned long reg_flags;
  1798. spin_lock_irqsave(&il->reg_lock, reg_flags);
  1799. if (likely(_il_grab_nic_access(il))) {
  1800. _il_wr_prph(il, reg, ((_il_rd_prph(il, reg) & mask) | bits));
  1801. _il_release_nic_access(il);
  1802. }
  1803. spin_unlock_irqrestore(&il->reg_lock, reg_flags);
  1804. }
  1805. static inline void
  1806. il_clear_bits_prph(struct il_priv *il, u32 reg, u32 mask)
  1807. {
  1808. unsigned long reg_flags;
  1809. u32 val;
  1810. spin_lock_irqsave(&il->reg_lock, reg_flags);
  1811. if (likely(_il_grab_nic_access(il))) {
  1812. val = _il_rd_prph(il, reg);
  1813. _il_wr_prph(il, reg, (val & ~mask));
  1814. _il_release_nic_access(il);
  1815. }
  1816. spin_unlock_irqrestore(&il->reg_lock, reg_flags);
  1817. }
  1818. #define HW_KEY_DYNAMIC 0
  1819. #define HW_KEY_DEFAULT 1
  1820. #define IL_STA_DRIVER_ACTIVE BIT(0) /* driver entry is active */
  1821. #define IL_STA_UCODE_ACTIVE BIT(1) /* ucode entry is active */
  1822. #define IL_STA_UCODE_INPROGRESS BIT(2) /* ucode entry is in process of
  1823. being activated */
  1824. #define IL_STA_LOCAL BIT(3) /* station state not directed by mac80211;
  1825. (this is for the IBSS BSSID stations) */
  1826. #define IL_STA_BCAST BIT(4) /* this station is the special bcast station */
  1827. void il_restore_stations(struct il_priv *il);
  1828. void il_clear_ucode_stations(struct il_priv *il);
  1829. void il_dealloc_bcast_stations(struct il_priv *il);
  1830. int il_get_free_ucode_key_idx(struct il_priv *il);
  1831. int il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags);
  1832. int il_add_station_common(struct il_priv *il, const u8 *addr, bool is_ap,
  1833. struct ieee80211_sta *sta, u8 *sta_id_r);
  1834. int il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr);
  1835. int il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1836. struct ieee80211_sta *sta);
  1837. u8 il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap,
  1838. struct ieee80211_sta *sta);
  1839. int il_send_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq,
  1840. u8 flags, bool init);
  1841. /**
  1842. * il_clear_driver_stations - clear knowledge of all stations from driver
  1843. * @il: iwl il struct
  1844. *
  1845. * This is called during il_down() to make sure that in the case
  1846. * we're coming there from a hardware restart mac80211 will be
  1847. * able to reconfigure stations -- if we're getting there in the
  1848. * normal down flow then the stations will already be cleared.
  1849. */
  1850. static inline void
  1851. il_clear_driver_stations(struct il_priv *il)
  1852. {
  1853. unsigned long flags;
  1854. spin_lock_irqsave(&il->sta_lock, flags);
  1855. memset(il->stations, 0, sizeof(il->stations));
  1856. il->num_stations = 0;
  1857. il->ucode_key_table = 0;
  1858. spin_unlock_irqrestore(&il->sta_lock, flags);
  1859. }
  1860. static inline int
  1861. il_sta_id(struct ieee80211_sta *sta)
  1862. {
  1863. if (WARN_ON(!sta))
  1864. return IL_INVALID_STATION;
  1865. return ((struct il_station_priv_common *)sta->drv_priv)->sta_id;
  1866. }
  1867. /**
  1868. * il_sta_id_or_broadcast - return sta_id or broadcast sta
  1869. * @il: iwl il
  1870. * @context: the current context
  1871. * @sta: mac80211 station
  1872. *
  1873. * In certain circumstances mac80211 passes a station pointer
  1874. * that may be %NULL, for example during TX or key setup. In
  1875. * that case, we need to use the broadcast station, so this
  1876. * inline wraps that pattern.
  1877. */
  1878. static inline int
  1879. il_sta_id_or_broadcast(struct il_priv *il, struct ieee80211_sta *sta)
  1880. {
  1881. int sta_id;
  1882. if (!sta)
  1883. return il->hw_params.bcast_id;
  1884. sta_id = il_sta_id(sta);
  1885. /*
  1886. * mac80211 should not be passing a partially
  1887. * initialised station!
  1888. */
  1889. WARN_ON(sta_id == IL_INVALID_STATION);
  1890. return sta_id;
  1891. }
  1892. /**
  1893. * il_queue_inc_wrap - increment queue idx, wrap back to beginning
  1894. * @idx -- current idx
  1895. * @n_bd -- total number of entries in queue (must be power of 2)
  1896. */
  1897. static inline int
  1898. il_queue_inc_wrap(int idx, int n_bd)
  1899. {
  1900. return ++idx & (n_bd - 1);
  1901. }
  1902. /**
  1903. * il_queue_dec_wrap - decrement queue idx, wrap back to end
  1904. * @idx -- current idx
  1905. * @n_bd -- total number of entries in queue (must be power of 2)
  1906. */
  1907. static inline int
  1908. il_queue_dec_wrap(int idx, int n_bd)
  1909. {
  1910. return --idx & (n_bd - 1);
  1911. }
  1912. /* TODO: Move fw_desc functions to iwl-pci.ko */
  1913. static inline void
  1914. il_free_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
  1915. {
  1916. if (desc->v_addr)
  1917. dma_free_coherent(&pci_dev->dev, desc->len, desc->v_addr,
  1918. desc->p_addr);
  1919. desc->v_addr = NULL;
  1920. desc->len = 0;
  1921. }
  1922. static inline int
  1923. il_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
  1924. {
  1925. if (!desc->len) {
  1926. desc->v_addr = NULL;
  1927. return -EINVAL;
  1928. }
  1929. desc->v_addr = dma_alloc_coherent(&pci_dev->dev, desc->len,
  1930. &desc->p_addr, GFP_KERNEL);
  1931. return (desc->v_addr != NULL) ? 0 : -ENOMEM;
  1932. }
  1933. /*
  1934. * we have 8 bits used like this:
  1935. *
  1936. * 7 6 5 4 3 2 1 0
  1937. * | | | | | | | |
  1938. * | | | | | | +-+-------- AC queue (0-3)
  1939. * | | | | | |
  1940. * | +-+-+-+-+------------ HW queue ID
  1941. * |
  1942. * +---------------------- unused
  1943. */
  1944. static inline void
  1945. il_set_swq_id(struct il_tx_queue *txq, u8 ac, u8 hwq)
  1946. {
  1947. BUG_ON(ac > 3); /* only have 2 bits */
  1948. BUG_ON(hwq > 31); /* only use 5 bits */
  1949. txq->swq_id = (hwq << 2) | ac;
  1950. }
  1951. static inline void
  1952. _il_wake_queue(struct il_priv *il, u8 ac)
  1953. {
  1954. if (atomic_dec_return(&il->queue_stop_count[ac]) <= 0)
  1955. ieee80211_wake_queue(il->hw, ac);
  1956. }
  1957. static inline void
  1958. _il_stop_queue(struct il_priv *il, u8 ac)
  1959. {
  1960. if (atomic_inc_return(&il->queue_stop_count[ac]) > 0)
  1961. ieee80211_stop_queue(il->hw, ac);
  1962. }
  1963. static inline void
  1964. il_wake_queue(struct il_priv *il, struct il_tx_queue *txq)
  1965. {
  1966. u8 queue = txq->swq_id;
  1967. u8 ac = queue & 3;
  1968. u8 hwq = (queue >> 2) & 0x1f;
  1969. if (test_and_clear_bit(hwq, il->queue_stopped))
  1970. _il_wake_queue(il, ac);
  1971. }
  1972. static inline void
  1973. il_stop_queue(struct il_priv *il, struct il_tx_queue *txq)
  1974. {
  1975. u8 queue = txq->swq_id;
  1976. u8 ac = queue & 3;
  1977. u8 hwq = (queue >> 2) & 0x1f;
  1978. if (!test_and_set_bit(hwq, il->queue_stopped))
  1979. _il_stop_queue(il, ac);
  1980. }
  1981. static inline void
  1982. il_wake_queues_by_reason(struct il_priv *il, int reason)
  1983. {
  1984. u8 ac;
  1985. if (test_and_clear_bit(reason, &il->stop_reason))
  1986. for (ac = 0; ac < 4; ac++)
  1987. _il_wake_queue(il, ac);
  1988. }
  1989. static inline void
  1990. il_stop_queues_by_reason(struct il_priv *il, int reason)
  1991. {
  1992. u8 ac;
  1993. if (!test_and_set_bit(reason, &il->stop_reason))
  1994. for (ac = 0; ac < 4; ac++)
  1995. _il_stop_queue(il, ac);
  1996. }
  1997. #ifdef ieee80211_stop_queue
  1998. #undef ieee80211_stop_queue
  1999. #endif
  2000. #define ieee80211_stop_queue DO_NOT_USE_ieee80211_stop_queue
  2001. #ifdef ieee80211_wake_queue
  2002. #undef ieee80211_wake_queue
  2003. #endif
  2004. #define ieee80211_wake_queue DO_NOT_USE_ieee80211_wake_queue
  2005. static inline void
  2006. il_disable_interrupts(struct il_priv *il)
  2007. {
  2008. clear_bit(S_INT_ENABLED, &il->status);
  2009. /* disable interrupts from uCode/NIC to host */
  2010. _il_wr(il, CSR_INT_MASK, 0x00000000);
  2011. /* acknowledge/clear/reset any interrupts still pending
  2012. * from uCode or flow handler (Rx/Tx DMA) */
  2013. _il_wr(il, CSR_INT, 0xffffffff);
  2014. _il_wr(il, CSR_FH_INT_STATUS, 0xffffffff);
  2015. }
  2016. static inline void
  2017. il_enable_rfkill_int(struct il_priv *il)
  2018. {
  2019. _il_wr(il, CSR_INT_MASK, CSR_INT_BIT_RF_KILL);
  2020. }
  2021. static inline void
  2022. il_enable_interrupts(struct il_priv *il)
  2023. {
  2024. set_bit(S_INT_ENABLED, &il->status);
  2025. _il_wr(il, CSR_INT_MASK, il->inta_mask);
  2026. }
  2027. /**
  2028. * il_beacon_time_mask_low - mask of lower 32 bit of beacon time
  2029. * @il -- pointer to il_priv data structure
  2030. * @tsf_bits -- number of bits need to shift for masking)
  2031. */
  2032. static inline u32
  2033. il_beacon_time_mask_low(struct il_priv *il, u16 tsf_bits)
  2034. {
  2035. return (1 << tsf_bits) - 1;
  2036. }
  2037. /**
  2038. * il_beacon_time_mask_high - mask of higher 32 bit of beacon time
  2039. * @il -- pointer to il_priv data structure
  2040. * @tsf_bits -- number of bits need to shift for masking)
  2041. */
  2042. static inline u32
  2043. il_beacon_time_mask_high(struct il_priv *il, u16 tsf_bits)
  2044. {
  2045. return ((1 << (32 - tsf_bits)) - 1) << tsf_bits;
  2046. }
  2047. /**
  2048. * struct il_rb_status - reseve buffer status host memory mapped FH registers
  2049. *
  2050. * @closed_rb_num [0:11] - Indicates the idx of the RB which was closed
  2051. * @closed_fr_num [0:11] - Indicates the idx of the RX Frame which was closed
  2052. * @finished_rb_num [0:11] - Indicates the idx of the current RB
  2053. * in which the last frame was written to
  2054. * @finished_fr_num [0:11] - Indicates the idx of the RX Frame
  2055. * which was transferred
  2056. */
  2057. struct il_rb_status {
  2058. __le16 closed_rb_num;
  2059. __le16 closed_fr_num;
  2060. __le16 finished_rb_num;
  2061. __le16 finished_fr_nam;
  2062. __le32 __unused; /* 3945 only */
  2063. } __packed;
  2064. #define TFD_QUEUE_SIZE_MAX 256
  2065. #define TFD_QUEUE_SIZE_BC_DUP 64
  2066. #define TFD_QUEUE_BC_SIZE (TFD_QUEUE_SIZE_MAX + TFD_QUEUE_SIZE_BC_DUP)
  2067. #define IL_TX_DMA_MASK DMA_BIT_MASK(36)
  2068. #define IL_NUM_OF_TBS 20
  2069. static inline u8
  2070. il_get_dma_hi_addr(dma_addr_t addr)
  2071. {
  2072. return (sizeof(addr) > sizeof(u32) ? (addr >> 16) >> 16 : 0) & 0xF;
  2073. }
  2074. /**
  2075. * struct il_tfd_tb transmit buffer descriptor within transmit frame descriptor
  2076. *
  2077. * This structure contains dma address and length of transmission address
  2078. *
  2079. * @lo: low [31:0] portion of the dma address of TX buffer every even is
  2080. * unaligned on 16 bit boundary
  2081. * @hi_n_len: 0-3 [35:32] portion of dma
  2082. * 4-15 length of the tx buffer
  2083. */
  2084. struct il_tfd_tb {
  2085. __le32 lo;
  2086. __le16 hi_n_len;
  2087. } __packed;
  2088. /**
  2089. * struct il_tfd
  2090. *
  2091. * Transmit Frame Descriptor (TFD)
  2092. *
  2093. * @ __reserved1[3] reserved
  2094. * @ num_tbs 0-4 number of active tbs
  2095. * 5 reserved
  2096. * 6-7 padding (not used)
  2097. * @ tbs[20] transmit frame buffer descriptors
  2098. * @ __pad padding
  2099. *
  2100. * Each Tx queue uses a circular buffer of 256 TFDs stored in host DRAM.
  2101. * Both driver and device share these circular buffers, each of which must be
  2102. * contiguous 256 TFDs x 128 bytes-per-TFD = 32 KBytes
  2103. *
  2104. * Driver must indicate the physical address of the base of each
  2105. * circular buffer via the FH49_MEM_CBBC_QUEUE registers.
  2106. *
  2107. * Each TFD contains pointer/size information for up to 20 data buffers
  2108. * in host DRAM. These buffers collectively contain the (one) frame described
  2109. * by the TFD. Each buffer must be a single contiguous block of memory within
  2110. * itself, but buffers may be scattered in host DRAM. Each buffer has max size
  2111. * of (4K - 4). The concatenates all of a TFD's buffers into a single
  2112. * Tx frame, up to 8 KBytes in size.
  2113. *
  2114. * A maximum of 255 (not 256!) TFDs may be on a queue waiting for Tx.
  2115. */
  2116. struct il_tfd {
  2117. u8 __reserved1[3];
  2118. u8 num_tbs;
  2119. struct il_tfd_tb tbs[IL_NUM_OF_TBS];
  2120. __le32 __pad;
  2121. } __packed;
  2122. /* PCI registers */
  2123. #define PCI_CFG_RETRY_TIMEOUT 0x041
  2124. struct il_rate_info {
  2125. u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */
  2126. u8 plcp_siso; /* uCode API: RATE_SISO_6M_PLCP, etc. */
  2127. u8 plcp_mimo2; /* uCode API: RATE_MIMO2_6M_PLCP, etc. */
  2128. u8 ieee; /* MAC header: RATE_6M_IEEE, etc. */
  2129. u8 prev_ieee; /* previous rate in IEEE speeds */
  2130. u8 next_ieee; /* next rate in IEEE speeds */
  2131. u8 prev_rs; /* previous rate used in rs algo */
  2132. u8 next_rs; /* next rate used in rs algo */
  2133. u8 prev_rs_tgg; /* previous rate used in TGG rs algo */
  2134. u8 next_rs_tgg; /* next rate used in TGG rs algo */
  2135. };
  2136. struct il3945_rate_info {
  2137. u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */
  2138. u8 ieee; /* MAC header: RATE_6M_IEEE, etc. */
  2139. u8 prev_ieee; /* previous rate in IEEE speeds */
  2140. u8 next_ieee; /* next rate in IEEE speeds */
  2141. u8 prev_rs; /* previous rate used in rs algo */
  2142. u8 next_rs; /* next rate used in rs algo */
  2143. u8 prev_rs_tgg; /* previous rate used in TGG rs algo */
  2144. u8 next_rs_tgg; /* next rate used in TGG rs algo */
  2145. u8 table_rs_idx; /* idx in rate scale table cmd */
  2146. u8 prev_table_rs; /* prev in rate table cmd */
  2147. };
  2148. /*
  2149. * These serve as idxes into
  2150. * struct il_rate_info il_rates[RATE_COUNT];
  2151. */
  2152. enum {
  2153. RATE_1M_IDX = 0,
  2154. RATE_2M_IDX,
  2155. RATE_5M_IDX,
  2156. RATE_11M_IDX,
  2157. RATE_6M_IDX,
  2158. RATE_9M_IDX,
  2159. RATE_12M_IDX,
  2160. RATE_18M_IDX,
  2161. RATE_24M_IDX,
  2162. RATE_36M_IDX,
  2163. RATE_48M_IDX,
  2164. RATE_54M_IDX,
  2165. RATE_60M_IDX,
  2166. RATE_COUNT,
  2167. RATE_COUNT_LEGACY = RATE_COUNT - 1, /* Excluding 60M */
  2168. RATE_COUNT_3945 = RATE_COUNT - 1,
  2169. RATE_INVM_IDX = RATE_COUNT,
  2170. RATE_INVALID = RATE_COUNT,
  2171. };
  2172. enum {
  2173. RATE_6M_IDX_TBL = 0,
  2174. RATE_9M_IDX_TBL,
  2175. RATE_12M_IDX_TBL,
  2176. RATE_18M_IDX_TBL,
  2177. RATE_24M_IDX_TBL,
  2178. RATE_36M_IDX_TBL,
  2179. RATE_48M_IDX_TBL,
  2180. RATE_54M_IDX_TBL,
  2181. RATE_1M_IDX_TBL,
  2182. RATE_2M_IDX_TBL,
  2183. RATE_5M_IDX_TBL,
  2184. RATE_11M_IDX_TBL,
  2185. RATE_INVM_IDX_TBL = RATE_INVM_IDX - 1,
  2186. };
  2187. enum {
  2188. IL_FIRST_OFDM_RATE = RATE_6M_IDX,
  2189. IL39_LAST_OFDM_RATE = RATE_54M_IDX,
  2190. IL_LAST_OFDM_RATE = RATE_60M_IDX,
  2191. IL_FIRST_CCK_RATE = RATE_1M_IDX,
  2192. IL_LAST_CCK_RATE = RATE_11M_IDX,
  2193. };
  2194. /* #define vs. enum to keep from defaulting to 'large integer' */
  2195. #define RATE_6M_MASK (1 << RATE_6M_IDX)
  2196. #define RATE_9M_MASK (1 << RATE_9M_IDX)
  2197. #define RATE_12M_MASK (1 << RATE_12M_IDX)
  2198. #define RATE_18M_MASK (1 << RATE_18M_IDX)
  2199. #define RATE_24M_MASK (1 << RATE_24M_IDX)
  2200. #define RATE_36M_MASK (1 << RATE_36M_IDX)
  2201. #define RATE_48M_MASK (1 << RATE_48M_IDX)
  2202. #define RATE_54M_MASK (1 << RATE_54M_IDX)
  2203. #define RATE_60M_MASK (1 << RATE_60M_IDX)
  2204. #define RATE_1M_MASK (1 << RATE_1M_IDX)
  2205. #define RATE_2M_MASK (1 << RATE_2M_IDX)
  2206. #define RATE_5M_MASK (1 << RATE_5M_IDX)
  2207. #define RATE_11M_MASK (1 << RATE_11M_IDX)
  2208. /* uCode API values for legacy bit rates, both OFDM and CCK */
  2209. enum {
  2210. RATE_6M_PLCP = 13,
  2211. RATE_9M_PLCP = 15,
  2212. RATE_12M_PLCP = 5,
  2213. RATE_18M_PLCP = 7,
  2214. RATE_24M_PLCP = 9,
  2215. RATE_36M_PLCP = 11,
  2216. RATE_48M_PLCP = 1,
  2217. RATE_54M_PLCP = 3,
  2218. RATE_60M_PLCP = 3, /*FIXME:RS:should be removed */
  2219. RATE_1M_PLCP = 10,
  2220. RATE_2M_PLCP = 20,
  2221. RATE_5M_PLCP = 55,
  2222. RATE_11M_PLCP = 110,
  2223. /*FIXME:RS:add RATE_LEGACY_INVM_PLCP = 0, */
  2224. };
  2225. /* uCode API values for OFDM high-throughput (HT) bit rates */
  2226. enum {
  2227. RATE_SISO_6M_PLCP = 0,
  2228. RATE_SISO_12M_PLCP = 1,
  2229. RATE_SISO_18M_PLCP = 2,
  2230. RATE_SISO_24M_PLCP = 3,
  2231. RATE_SISO_36M_PLCP = 4,
  2232. RATE_SISO_48M_PLCP = 5,
  2233. RATE_SISO_54M_PLCP = 6,
  2234. RATE_SISO_60M_PLCP = 7,
  2235. RATE_MIMO2_6M_PLCP = 0x8,
  2236. RATE_MIMO2_12M_PLCP = 0x9,
  2237. RATE_MIMO2_18M_PLCP = 0xa,
  2238. RATE_MIMO2_24M_PLCP = 0xb,
  2239. RATE_MIMO2_36M_PLCP = 0xc,
  2240. RATE_MIMO2_48M_PLCP = 0xd,
  2241. RATE_MIMO2_54M_PLCP = 0xe,
  2242. RATE_MIMO2_60M_PLCP = 0xf,
  2243. RATE_SISO_INVM_PLCP,
  2244. RATE_MIMO2_INVM_PLCP = RATE_SISO_INVM_PLCP,
  2245. };
  2246. /* MAC header values for bit rates */
  2247. enum {
  2248. RATE_6M_IEEE = 12,
  2249. RATE_9M_IEEE = 18,
  2250. RATE_12M_IEEE = 24,
  2251. RATE_18M_IEEE = 36,
  2252. RATE_24M_IEEE = 48,
  2253. RATE_36M_IEEE = 72,
  2254. RATE_48M_IEEE = 96,
  2255. RATE_54M_IEEE = 108,
  2256. RATE_60M_IEEE = 120,
  2257. RATE_1M_IEEE = 2,
  2258. RATE_2M_IEEE = 4,
  2259. RATE_5M_IEEE = 11,
  2260. RATE_11M_IEEE = 22,
  2261. };
  2262. #define IL_CCK_BASIC_RATES_MASK \
  2263. (RATE_1M_MASK | \
  2264. RATE_2M_MASK)
  2265. #define IL_CCK_RATES_MASK \
  2266. (IL_CCK_BASIC_RATES_MASK | \
  2267. RATE_5M_MASK | \
  2268. RATE_11M_MASK)
  2269. #define IL_OFDM_BASIC_RATES_MASK \
  2270. (RATE_6M_MASK | \
  2271. RATE_12M_MASK | \
  2272. RATE_24M_MASK)
  2273. #define IL_OFDM_RATES_MASK \
  2274. (IL_OFDM_BASIC_RATES_MASK | \
  2275. RATE_9M_MASK | \
  2276. RATE_18M_MASK | \
  2277. RATE_36M_MASK | \
  2278. RATE_48M_MASK | \
  2279. RATE_54M_MASK)
  2280. #define IL_BASIC_RATES_MASK \
  2281. (IL_OFDM_BASIC_RATES_MASK | \
  2282. IL_CCK_BASIC_RATES_MASK)
  2283. #define RATES_MASK ((1 << RATE_COUNT) - 1)
  2284. #define RATES_MASK_3945 ((1 << RATE_COUNT_3945) - 1)
  2285. #define IL_INVALID_VALUE -1
  2286. #define IL_MIN_RSSI_VAL -100
  2287. #define IL_MAX_RSSI_VAL 0
  2288. /* These values specify how many Tx frame attempts before
  2289. * searching for a new modulation mode */
  2290. #define IL_LEGACY_FAILURE_LIMIT 160
  2291. #define IL_LEGACY_SUCCESS_LIMIT 480
  2292. #define IL_LEGACY_TBL_COUNT 160
  2293. #define IL_NONE_LEGACY_FAILURE_LIMIT 400
  2294. #define IL_NONE_LEGACY_SUCCESS_LIMIT 4500
  2295. #define IL_NONE_LEGACY_TBL_COUNT 1500
  2296. /* Success ratio (ACKed / attempted tx frames) values (perfect is 128 * 100) */
  2297. #define IL_RS_GOOD_RATIO 12800 /* 100% */
  2298. #define RATE_SCALE_SWITCH 10880 /* 85% */
  2299. #define RATE_HIGH_TH 10880 /* 85% */
  2300. #define RATE_INCREASE_TH 6400 /* 50% */
  2301. #define RATE_DECREASE_TH 1920 /* 15% */
  2302. /* possible actions when in legacy mode */
  2303. #define IL_LEGACY_SWITCH_ANTENNA1 0
  2304. #define IL_LEGACY_SWITCH_ANTENNA2 1
  2305. #define IL_LEGACY_SWITCH_SISO 2
  2306. #define IL_LEGACY_SWITCH_MIMO2_AB 3
  2307. #define IL_LEGACY_SWITCH_MIMO2_AC 4
  2308. #define IL_LEGACY_SWITCH_MIMO2_BC 5
  2309. /* possible actions when in siso mode */
  2310. #define IL_SISO_SWITCH_ANTENNA1 0
  2311. #define IL_SISO_SWITCH_ANTENNA2 1
  2312. #define IL_SISO_SWITCH_MIMO2_AB 2
  2313. #define IL_SISO_SWITCH_MIMO2_AC 3
  2314. #define IL_SISO_SWITCH_MIMO2_BC 4
  2315. #define IL_SISO_SWITCH_GI 5
  2316. /* possible actions when in mimo mode */
  2317. #define IL_MIMO2_SWITCH_ANTENNA1 0
  2318. #define IL_MIMO2_SWITCH_ANTENNA2 1
  2319. #define IL_MIMO2_SWITCH_SISO_A 2
  2320. #define IL_MIMO2_SWITCH_SISO_B 3
  2321. #define IL_MIMO2_SWITCH_SISO_C 4
  2322. #define IL_MIMO2_SWITCH_GI 5
  2323. #define IL_MAX_SEARCH IL_MIMO2_SWITCH_GI
  2324. #define IL_ACTION_LIMIT 3 /* # possible actions */
  2325. #define LQ_SIZE 2 /* 2 mode tables: "Active" and "Search" */
  2326. /* load per tid defines for A-MPDU activation */
  2327. #define IL_AGG_TPT_THREHOLD 0
  2328. #define IL_AGG_LOAD_THRESHOLD 10
  2329. #define IL_AGG_ALL_TID 0xff
  2330. #define TID_QUEUE_CELL_SPACING 50 /*mS */
  2331. #define TID_QUEUE_MAX_SIZE 20
  2332. #define TID_ROUND_VALUE 5 /* mS */
  2333. #define TID_MAX_LOAD_COUNT 8
  2334. #define TID_MAX_TIME_DIFF ((TID_QUEUE_MAX_SIZE - 1) * TID_QUEUE_CELL_SPACING)
  2335. #define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y))
  2336. extern const struct il_rate_info il_rates[RATE_COUNT];
  2337. enum il_table_type {
  2338. LQ_NONE,
  2339. LQ_G, /* legacy types */
  2340. LQ_A,
  2341. LQ_SISO, /* high-throughput types */
  2342. LQ_MIMO2,
  2343. LQ_MAX,
  2344. };
  2345. #define is_legacy(tbl) ((tbl) == LQ_G || (tbl) == LQ_A)
  2346. #define is_siso(tbl) ((tbl) == LQ_SISO)
  2347. #define is_mimo2(tbl) ((tbl) == LQ_MIMO2)
  2348. #define is_mimo(tbl) (is_mimo2(tbl))
  2349. #define is_Ht(tbl) (is_siso(tbl) || is_mimo(tbl))
  2350. #define is_a_band(tbl) ((tbl) == LQ_A)
  2351. #define is_g_and(tbl) ((tbl) == LQ_G)
  2352. #define ANT_NONE 0x0
  2353. #define ANT_A BIT(0)
  2354. #define ANT_B BIT(1)
  2355. #define ANT_AB (ANT_A | ANT_B)
  2356. #define ANT_C BIT(2)
  2357. #define ANT_AC (ANT_A | ANT_C)
  2358. #define ANT_BC (ANT_B | ANT_C)
  2359. #define ANT_ABC (ANT_AB | ANT_C)
  2360. #define IL_MAX_MCS_DISPLAY_SIZE 12
  2361. struct il_rate_mcs_info {
  2362. char mbps[IL_MAX_MCS_DISPLAY_SIZE];
  2363. char mcs[IL_MAX_MCS_DISPLAY_SIZE];
  2364. };
  2365. /**
  2366. * struct il_rate_scale_data -- tx success history for one rate
  2367. */
  2368. struct il_rate_scale_data {
  2369. u64 data; /* bitmap of successful frames */
  2370. s32 success_counter; /* number of frames successful */
  2371. s32 success_ratio; /* per-cent * 128 */
  2372. s32 counter; /* number of frames attempted */
  2373. s32 average_tpt; /* success ratio * expected throughput */
  2374. unsigned long stamp;
  2375. };
  2376. /**
  2377. * struct il_scale_tbl_info -- tx params and success history for all rates
  2378. *
  2379. * There are two of these in struct il_lq_sta,
  2380. * one for "active", and one for "search".
  2381. */
  2382. struct il_scale_tbl_info {
  2383. enum il_table_type lq_type;
  2384. u8 ant_type;
  2385. u8 is_SGI; /* 1 = short guard interval */
  2386. u8 is_ht40; /* 1 = 40 MHz channel width */
  2387. u8 is_dup; /* 1 = duplicated data streams */
  2388. u8 action; /* change modulation; IL_[LEGACY/SISO/MIMO]_SWITCH_* */
  2389. u8 max_search; /* maximun number of tables we can search */
  2390. s32 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */
  2391. u32 current_rate; /* rate_n_flags, uCode API format */
  2392. struct il_rate_scale_data win[RATE_COUNT]; /* rate histories */
  2393. };
  2394. struct il_traffic_load {
  2395. unsigned long time_stamp; /* age of the oldest stats */
  2396. u32 packet_count[TID_QUEUE_MAX_SIZE]; /* packet count in this time
  2397. * slice */
  2398. u32 total; /* total num of packets during the
  2399. * last TID_MAX_TIME_DIFF */
  2400. u8 queue_count; /* number of queues that has
  2401. * been used since the last cleanup */
  2402. u8 head; /* start of the circular buffer */
  2403. };
  2404. /**
  2405. * struct il_lq_sta -- driver's rate scaling ilate structure
  2406. *
  2407. * Pointer to this gets passed back and forth between driver and mac80211.
  2408. */
  2409. struct il_lq_sta {
  2410. u8 active_tbl; /* idx of active table, range 0-1 */
  2411. u8 enable_counter; /* indicates HT mode */
  2412. u8 stay_in_tbl; /* 1: disallow, 0: allow search for new mode */
  2413. u8 search_better_tbl; /* 1: currently trying alternate mode */
  2414. s32 last_tpt;
  2415. /* The following determine when to search for a new mode */
  2416. u32 table_count_limit;
  2417. u32 max_failure_limit; /* # failed frames before new search */
  2418. u32 max_success_limit; /* # successful frames before new search */
  2419. u32 table_count;
  2420. u32 total_failed; /* total failed frames, any/all rates */
  2421. u32 total_success; /* total successful frames, any/all rates */
  2422. u64 flush_timer; /* time staying in mode before new search */
  2423. u8 action_counter; /* # mode-switch actions tried */
  2424. u8 is_green;
  2425. u8 is_dup;
  2426. enum ieee80211_band band;
  2427. /* The following are bitmaps of rates; RATE_6M_MASK, etc. */
  2428. u32 supp_rates;
  2429. u16 active_legacy_rate;
  2430. u16 active_siso_rate;
  2431. u16 active_mimo2_rate;
  2432. s8 max_rate_idx; /* Max rate set by user */
  2433. u8 missed_rate_counter;
  2434. struct il_link_quality_cmd lq;
  2435. struct il_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */
  2436. struct il_traffic_load load[TID_MAX_LOAD_COUNT];
  2437. u8 tx_agg_tid_en;
  2438. #ifdef CONFIG_MAC80211_DEBUGFS
  2439. struct dentry *rs_sta_dbgfs_scale_table_file;
  2440. struct dentry *rs_sta_dbgfs_stats_table_file;
  2441. struct dentry *rs_sta_dbgfs_rate_scale_data_file;
  2442. struct dentry *rs_sta_dbgfs_tx_agg_tid_en_file;
  2443. u32 dbg_fixed_rate;
  2444. #endif
  2445. struct il_priv *drv;
  2446. /* used to be in sta_info */
  2447. int last_txrate_idx;
  2448. /* last tx rate_n_flags */
  2449. u32 last_rate_n_flags;
  2450. /* packets destined for this STA are aggregated */
  2451. u8 is_agg;
  2452. };
  2453. /*
  2454. * il_station_priv: Driver's ilate station information
  2455. *
  2456. * When mac80211 creates a station it reserves some space (hw->sta_data_size)
  2457. * in the structure for use by driver. This structure is places in that
  2458. * space.
  2459. *
  2460. * The common struct MUST be first because it is shared between
  2461. * 3945 and 4965!
  2462. */
  2463. struct il_station_priv {
  2464. struct il_station_priv_common common;
  2465. struct il_lq_sta lq_sta;
  2466. atomic_t pending_frames;
  2467. bool client;
  2468. bool asleep;
  2469. };
  2470. static inline u8
  2471. il4965_num_of_ant(u8 m)
  2472. {
  2473. return !!(m & ANT_A) + !!(m & ANT_B) + !!(m & ANT_C);
  2474. }
  2475. static inline u8
  2476. il4965_first_antenna(u8 mask)
  2477. {
  2478. if (mask & ANT_A)
  2479. return ANT_A;
  2480. if (mask & ANT_B)
  2481. return ANT_B;
  2482. return ANT_C;
  2483. }
  2484. /**
  2485. * il3945_rate_scale_init - Initialize the rate scale table based on assoc info
  2486. *
  2487. * The specific throughput table used is based on the type of network
  2488. * the associated with, including A, B, G, and G w/ TGG protection
  2489. */
  2490. void il3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id);
  2491. /* Initialize station's rate scaling information after adding station */
  2492. void il4965_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta,
  2493. u8 sta_id);
  2494. void il3945_rs_rate_init(struct il_priv *il, struct ieee80211_sta *sta,
  2495. u8 sta_id);
  2496. /**
  2497. * il_rate_control_register - Register the rate control algorithm callbacks
  2498. *
  2499. * Since the rate control algorithm is hardware specific, there is no need
  2500. * or reason to place it as a stand alone module. The driver can call
  2501. * il_rate_control_register in order to register the rate control callbacks
  2502. * with the mac80211 subsystem. This should be performed prior to calling
  2503. * ieee80211_register_hw
  2504. *
  2505. */
  2506. int il4965_rate_control_register(void);
  2507. int il3945_rate_control_register(void);
  2508. /**
  2509. * il_rate_control_unregister - Unregister the rate control callbacks
  2510. *
  2511. * This should be called after calling ieee80211_unregister_hw, but before
  2512. * the driver is unloaded.
  2513. */
  2514. void il4965_rate_control_unregister(void);
  2515. void il3945_rate_control_unregister(void);
  2516. int il_power_update_mode(struct il_priv *il, bool force);
  2517. void il_power_initialize(struct il_priv *il);
  2518. extern u32 il_debug_level;
  2519. #ifdef CONFIG_IWLEGACY_DEBUG
  2520. /*
  2521. * il_get_debug_level: Return active debug level for device
  2522. *
  2523. * Using sysfs it is possible to set per device debug level. This debug
  2524. * level will be used if set, otherwise the global debug level which can be
  2525. * set via module parameter is used.
  2526. */
  2527. static inline u32
  2528. il_get_debug_level(struct il_priv *il)
  2529. {
  2530. if (il->debug_level)
  2531. return il->debug_level;
  2532. else
  2533. return il_debug_level;
  2534. }
  2535. #else
  2536. static inline u32
  2537. il_get_debug_level(struct il_priv *il)
  2538. {
  2539. return il_debug_level;
  2540. }
  2541. #endif
  2542. #define il_print_hex_error(il, p, len) \
  2543. do { \
  2544. print_hex_dump(KERN_ERR, "iwl data: ", \
  2545. DUMP_PREFIX_OFFSET, 16, 1, p, len, 1); \
  2546. } while (0)
  2547. #ifdef CONFIG_IWLEGACY_DEBUG
  2548. #define IL_DBG(level, fmt, args...) \
  2549. do { \
  2550. if (il_get_debug_level(il) & level) \
  2551. dev_err(&il->hw->wiphy->dev, "%c %s " fmt, \
  2552. in_interrupt() ? 'I' : 'U', __func__ , ##args); \
  2553. } while (0)
  2554. #define il_print_hex_dump(il, level, p, len) \
  2555. do { \
  2556. if (il_get_debug_level(il) & level) \
  2557. print_hex_dump(KERN_DEBUG, "iwl data: ", \
  2558. DUMP_PREFIX_OFFSET, 16, 1, p, len, 1); \
  2559. } while (0)
  2560. #else
  2561. #define IL_DBG(level, fmt, args...)
  2562. static inline void
  2563. il_print_hex_dump(struct il_priv *il, int level, const void *p, u32 len)
  2564. {
  2565. }
  2566. #endif /* CONFIG_IWLEGACY_DEBUG */
  2567. #ifdef CONFIG_IWLEGACY_DEBUGFS
  2568. int il_dbgfs_register(struct il_priv *il, const char *name);
  2569. void il_dbgfs_unregister(struct il_priv *il);
  2570. #else
  2571. static inline int
  2572. il_dbgfs_register(struct il_priv *il, const char *name)
  2573. {
  2574. return 0;
  2575. }
  2576. static inline void
  2577. il_dbgfs_unregister(struct il_priv *il)
  2578. {
  2579. }
  2580. #endif /* CONFIG_IWLEGACY_DEBUGFS */
  2581. /*
  2582. * To use the debug system:
  2583. *
  2584. * If you are defining a new debug classification, simply add it to the #define
  2585. * list here in the form of
  2586. *
  2587. * #define IL_DL_xxxx VALUE
  2588. *
  2589. * where xxxx should be the name of the classification (for example, WEP).
  2590. *
  2591. * You then need to either add a IL_xxxx_DEBUG() macro definition for your
  2592. * classification, or use IL_DBG(IL_DL_xxxx, ...) whenever you want
  2593. * to send output to that classification.
  2594. *
  2595. * The active debug levels can be accessed via files
  2596. *
  2597. * /sys/module/iwl4965/parameters/debug
  2598. * /sys/module/iwl3945/parameters/debug
  2599. * /sys/class/net/wlan0/device/debug_level
  2600. *
  2601. * when CONFIG_IWLEGACY_DEBUG=y.
  2602. */
  2603. /* 0x0000000F - 0x00000001 */
  2604. #define IL_DL_INFO (1 << 0)
  2605. #define IL_DL_MAC80211 (1 << 1)
  2606. #define IL_DL_HCMD (1 << 2)
  2607. #define IL_DL_STATE (1 << 3)
  2608. /* 0x000000F0 - 0x00000010 */
  2609. #define IL_DL_MACDUMP (1 << 4)
  2610. #define IL_DL_HCMD_DUMP (1 << 5)
  2611. #define IL_DL_EEPROM (1 << 6)
  2612. #define IL_DL_RADIO (1 << 7)
  2613. /* 0x00000F00 - 0x00000100 */
  2614. #define IL_DL_POWER (1 << 8)
  2615. #define IL_DL_TEMP (1 << 9)
  2616. #define IL_DL_NOTIF (1 << 10)
  2617. #define IL_DL_SCAN (1 << 11)
  2618. /* 0x0000F000 - 0x00001000 */
  2619. #define IL_DL_ASSOC (1 << 12)
  2620. #define IL_DL_DROP (1 << 13)
  2621. #define IL_DL_TXPOWER (1 << 14)
  2622. #define IL_DL_AP (1 << 15)
  2623. /* 0x000F0000 - 0x00010000 */
  2624. #define IL_DL_FW (1 << 16)
  2625. #define IL_DL_RF_KILL (1 << 17)
  2626. #define IL_DL_FW_ERRORS (1 << 18)
  2627. #define IL_DL_LED (1 << 19)
  2628. /* 0x00F00000 - 0x00100000 */
  2629. #define IL_DL_RATE (1 << 20)
  2630. #define IL_DL_CALIB (1 << 21)
  2631. #define IL_DL_WEP (1 << 22)
  2632. #define IL_DL_TX (1 << 23)
  2633. /* 0x0F000000 - 0x01000000 */
  2634. #define IL_DL_RX (1 << 24)
  2635. #define IL_DL_ISR (1 << 25)
  2636. #define IL_DL_HT (1 << 26)
  2637. /* 0xF0000000 - 0x10000000 */
  2638. #define IL_DL_11H (1 << 28)
  2639. #define IL_DL_STATS (1 << 29)
  2640. #define IL_DL_TX_REPLY (1 << 30)
  2641. #define IL_DL_QOS (1 << 31)
  2642. #define D_INFO(f, a...) IL_DBG(IL_DL_INFO, f, ## a)
  2643. #define D_MAC80211(f, a...) IL_DBG(IL_DL_MAC80211, f, ## a)
  2644. #define D_MACDUMP(f, a...) IL_DBG(IL_DL_MACDUMP, f, ## a)
  2645. #define D_TEMP(f, a...) IL_DBG(IL_DL_TEMP, f, ## a)
  2646. #define D_SCAN(f, a...) IL_DBG(IL_DL_SCAN, f, ## a)
  2647. #define D_RX(f, a...) IL_DBG(IL_DL_RX, f, ## a)
  2648. #define D_TX(f, a...) IL_DBG(IL_DL_TX, f, ## a)
  2649. #define D_ISR(f, a...) IL_DBG(IL_DL_ISR, f, ## a)
  2650. #define D_LED(f, a...) IL_DBG(IL_DL_LED, f, ## a)
  2651. #define D_WEP(f, a...) IL_DBG(IL_DL_WEP, f, ## a)
  2652. #define D_HC(f, a...) IL_DBG(IL_DL_HCMD, f, ## a)
  2653. #define D_HC_DUMP(f, a...) IL_DBG(IL_DL_HCMD_DUMP, f, ## a)
  2654. #define D_EEPROM(f, a...) IL_DBG(IL_DL_EEPROM, f, ## a)
  2655. #define D_CALIB(f, a...) IL_DBG(IL_DL_CALIB, f, ## a)
  2656. #define D_FW(f, a...) IL_DBG(IL_DL_FW, f, ## a)
  2657. #define D_RF_KILL(f, a...) IL_DBG(IL_DL_RF_KILL, f, ## a)
  2658. #define D_DROP(f, a...) IL_DBG(IL_DL_DROP, f, ## a)
  2659. #define D_AP(f, a...) IL_DBG(IL_DL_AP, f, ## a)
  2660. #define D_TXPOWER(f, a...) IL_DBG(IL_DL_TXPOWER, f, ## a)
  2661. #define D_RATE(f, a...) IL_DBG(IL_DL_RATE, f, ## a)
  2662. #define D_NOTIF(f, a...) IL_DBG(IL_DL_NOTIF, f, ## a)
  2663. #define D_ASSOC(f, a...) IL_DBG(IL_DL_ASSOC, f, ## a)
  2664. #define D_HT(f, a...) IL_DBG(IL_DL_HT, f, ## a)
  2665. #define D_STATS(f, a...) IL_DBG(IL_DL_STATS, f, ## a)
  2666. #define D_TX_REPLY(f, a...) IL_DBG(IL_DL_TX_REPLY, f, ## a)
  2667. #define D_QOS(f, a...) IL_DBG(IL_DL_QOS, f, ## a)
  2668. #define D_RADIO(f, a...) IL_DBG(IL_DL_RADIO, f, ## a)
  2669. #define D_POWER(f, a...) IL_DBG(IL_DL_POWER, f, ## a)
  2670. #define D_11H(f, a...) IL_DBG(IL_DL_11H, f, ## a)
  2671. #endif /* __il_core_h__ */