iwl-nvm-parse.c 28 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890
  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of version 2 of the GNU General Public License as
  13. * published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  23. * USA
  24. *
  25. * The full GNU General Public License is included in this distribution
  26. * in the file called COPYING.
  27. *
  28. * Contact Information:
  29. * Intel Linux Wireless <ilw@linux.intel.com>
  30. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  31. *
  32. * BSD LICENSE
  33. *
  34. * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
  35. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  36. * All rights reserved.
  37. *
  38. * Redistribution and use in source and binary forms, with or without
  39. * modification, are permitted provided that the following conditions
  40. * are met:
  41. *
  42. * * Redistributions of source code must retain the above copyright
  43. * notice, this list of conditions and the following disclaimer.
  44. * * Redistributions in binary form must reproduce the above copyright
  45. * notice, this list of conditions and the following disclaimer in
  46. * the documentation and/or other materials provided with the
  47. * distribution.
  48. * * Neither the name Intel Corporation nor the names of its
  49. * contributors may be used to endorse or promote products derived
  50. * from this software without specific prior written permission.
  51. *
  52. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  53. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  54. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  55. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  56. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  57. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  58. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  59. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  60. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  61. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  62. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  63. *****************************************************************************/
  64. #include <linux/types.h>
  65. #include <linux/slab.h>
  66. #include <linux/export.h>
  67. #include <linux/etherdevice.h>
  68. #include <linux/pci.h>
  69. #include "iwl-drv.h"
  70. #include "iwl-modparams.h"
  71. #include "iwl-nvm-parse.h"
  72. /* NVM offsets (in words) definitions */
  73. enum wkp_nvm_offsets {
  74. /* NVM HW-Section offset (in words) definitions */
  75. SUBSYSTEM_ID = 0x0A,
  76. HW_ADDR = 0x15,
  77. /* NVM SW-Section offset (in words) definitions */
  78. NVM_SW_SECTION = 0x1C0,
  79. NVM_VERSION = 0,
  80. RADIO_CFG = 1,
  81. SKU = 2,
  82. N_HW_ADDRS = 3,
  83. NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
  84. /* NVM calibration section offset (in words) definitions */
  85. NVM_CALIB_SECTION = 0x2B8,
  86. XTAL_CALIB = 0x316 - NVM_CALIB_SECTION
  87. };
  88. enum family_8000_nvm_offsets {
  89. /* NVM HW-Section offset (in words) definitions */
  90. HW_ADDR0_WFPM_FAMILY_8000 = 0x12,
  91. HW_ADDR1_WFPM_FAMILY_8000 = 0x16,
  92. HW_ADDR0_PCIE_FAMILY_8000 = 0x8A,
  93. HW_ADDR1_PCIE_FAMILY_8000 = 0x8E,
  94. MAC_ADDRESS_OVERRIDE_FAMILY_8000 = 1,
  95. /* NVM SW-Section offset (in words) definitions */
  96. NVM_SW_SECTION_FAMILY_8000 = 0x1C0,
  97. NVM_VERSION_FAMILY_8000 = 0,
  98. RADIO_CFG_FAMILY_8000 = 0,
  99. SKU_FAMILY_8000 = 2,
  100. N_HW_ADDRS_FAMILY_8000 = 3,
  101. /* NVM REGULATORY -Section offset (in words) definitions */
  102. NVM_CHANNELS_FAMILY_8000 = 0,
  103. NVM_LAR_OFFSET_FAMILY_8000_OLD = 0x4C7,
  104. NVM_LAR_OFFSET_FAMILY_8000 = 0x507,
  105. NVM_LAR_ENABLED_FAMILY_8000 = 0x7,
  106. /* NVM calibration section offset (in words) definitions */
  107. NVM_CALIB_SECTION_FAMILY_8000 = 0x2B8,
  108. XTAL_CALIB_FAMILY_8000 = 0x316 - NVM_CALIB_SECTION_FAMILY_8000
  109. };
  110. /* SKU Capabilities (actual values from NVM definition) */
  111. enum nvm_sku_bits {
  112. NVM_SKU_CAP_BAND_24GHZ = BIT(0),
  113. NVM_SKU_CAP_BAND_52GHZ = BIT(1),
  114. NVM_SKU_CAP_11N_ENABLE = BIT(2),
  115. NVM_SKU_CAP_11AC_ENABLE = BIT(3),
  116. NVM_SKU_CAP_MIMO_DISABLE = BIT(5),
  117. };
  118. /*
  119. * These are the channel numbers in the order that they are stored in the NVM
  120. */
  121. static const u8 iwl_nvm_channels[] = {
  122. /* 2.4 GHz */
  123. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
  124. /* 5 GHz */
  125. 36, 40, 44 , 48, 52, 56, 60, 64,
  126. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
  127. 149, 153, 157, 161, 165
  128. };
  129. static const u8 iwl_nvm_channels_family_8000[] = {
  130. /* 2.4 GHz */
  131. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
  132. /* 5 GHz */
  133. 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
  134. 96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
  135. 149, 153, 157, 161, 165, 169, 173, 177, 181
  136. };
  137. #define IWL_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels)
  138. #define IWL_NUM_CHANNELS_FAMILY_8000 ARRAY_SIZE(iwl_nvm_channels_family_8000)
  139. #define NUM_2GHZ_CHANNELS 14
  140. #define NUM_2GHZ_CHANNELS_FAMILY_8000 14
  141. #define FIRST_2GHZ_HT_MINUS 5
  142. #define LAST_2GHZ_HT_PLUS 9
  143. #define LAST_5GHZ_HT 165
  144. #define LAST_5GHZ_HT_FAMILY_8000 181
  145. #define N_HW_ADDR_MASK 0xF
  146. /* rate data (static) */
  147. static struct ieee80211_rate iwl_cfg80211_rates[] = {
  148. { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
  149. { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
  150. .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
  151. { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
  152. .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
  153. { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
  154. .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
  155. { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
  156. { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
  157. { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
  158. { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
  159. { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
  160. { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
  161. { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
  162. { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
  163. };
  164. #define RATES_24_OFFS 0
  165. #define N_RATES_24 ARRAY_SIZE(iwl_cfg80211_rates)
  166. #define RATES_52_OFFS 4
  167. #define N_RATES_52 (N_RATES_24 - RATES_52_OFFS)
  168. /**
  169. * enum iwl_nvm_channel_flags - channel flags in NVM
  170. * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo
  171. * @NVM_CHANNEL_IBSS: usable as an IBSS channel
  172. * @NVM_CHANNEL_ACTIVE: active scanning allowed
  173. * @NVM_CHANNEL_RADAR: radar detection required
  174. * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed
  175. * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS
  176. * on same channel on 2.4 or same UNII band on 5.2
  177. * @NVM_CHANNEL_WIDE: 20 MHz channel okay (?)
  178. * @NVM_CHANNEL_40MHZ: 40 MHz channel okay (?)
  179. * @NVM_CHANNEL_80MHZ: 80 MHz channel okay (?)
  180. * @NVM_CHANNEL_160MHZ: 160 MHz channel okay (?)
  181. */
  182. enum iwl_nvm_channel_flags {
  183. NVM_CHANNEL_VALID = BIT(0),
  184. NVM_CHANNEL_IBSS = BIT(1),
  185. NVM_CHANNEL_ACTIVE = BIT(3),
  186. NVM_CHANNEL_RADAR = BIT(4),
  187. NVM_CHANNEL_INDOOR_ONLY = BIT(5),
  188. NVM_CHANNEL_GO_CONCURRENT = BIT(6),
  189. NVM_CHANNEL_WIDE = BIT(8),
  190. NVM_CHANNEL_40MHZ = BIT(9),
  191. NVM_CHANNEL_80MHZ = BIT(10),
  192. NVM_CHANNEL_160MHZ = BIT(11),
  193. };
  194. #define CHECK_AND_PRINT_I(x) \
  195. ((ch_flags & NVM_CHANNEL_##x) ? # x " " : "")
  196. static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
  197. u16 nvm_flags, const struct iwl_cfg *cfg)
  198. {
  199. u32 flags = IEEE80211_CHAN_NO_HT40;
  200. u32 last_5ghz_ht = LAST_5GHZ_HT;
  201. if (cfg->device_family == IWL_DEVICE_FAMILY_8000)
  202. last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
  203. if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) {
  204. if (ch_num <= LAST_2GHZ_HT_PLUS)
  205. flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
  206. if (ch_num >= FIRST_2GHZ_HT_MINUS)
  207. flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
  208. } else if (ch_num <= last_5ghz_ht && (nvm_flags & NVM_CHANNEL_40MHZ)) {
  209. if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
  210. flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
  211. else
  212. flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
  213. }
  214. if (!(nvm_flags & NVM_CHANNEL_80MHZ))
  215. flags |= IEEE80211_CHAN_NO_80MHZ;
  216. if (!(nvm_flags & NVM_CHANNEL_160MHZ))
  217. flags |= IEEE80211_CHAN_NO_160MHZ;
  218. if (!(nvm_flags & NVM_CHANNEL_IBSS))
  219. flags |= IEEE80211_CHAN_NO_IR;
  220. if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
  221. flags |= IEEE80211_CHAN_NO_IR;
  222. if (nvm_flags & NVM_CHANNEL_RADAR)
  223. flags |= IEEE80211_CHAN_RADAR;
  224. if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
  225. flags |= IEEE80211_CHAN_INDOOR_ONLY;
  226. /* Set the GO concurrent flag only in case that NO_IR is set.
  227. * Otherwise it is meaningless
  228. */
  229. if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
  230. (flags & IEEE80211_CHAN_NO_IR))
  231. flags |= IEEE80211_CHAN_IR_CONCURRENT;
  232. return flags;
  233. }
  234. static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
  235. struct iwl_nvm_data *data,
  236. const __le16 * const nvm_ch_flags,
  237. bool lar_supported, bool no_wide_in_5ghz)
  238. {
  239. int ch_idx;
  240. int n_channels = 0;
  241. struct ieee80211_channel *channel;
  242. u16 ch_flags;
  243. int num_of_ch, num_2ghz_channels;
  244. const u8 *nvm_chan;
  245. if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  246. num_of_ch = IWL_NUM_CHANNELS;
  247. nvm_chan = &iwl_nvm_channels[0];
  248. num_2ghz_channels = NUM_2GHZ_CHANNELS;
  249. } else {
  250. num_of_ch = IWL_NUM_CHANNELS_FAMILY_8000;
  251. nvm_chan = &iwl_nvm_channels_family_8000[0];
  252. num_2ghz_channels = NUM_2GHZ_CHANNELS_FAMILY_8000;
  253. }
  254. for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
  255. bool is_5ghz = (ch_idx >= num_2ghz_channels);
  256. ch_flags = __le16_to_cpup(nvm_ch_flags + ch_idx);
  257. if (is_5ghz && !data->sku_cap_band_52GHz_enable)
  258. continue;
  259. /* workaround to disable wide channels in 5GHz */
  260. if (no_wide_in_5ghz && is_5ghz) {
  261. ch_flags &= ~(NVM_CHANNEL_40MHZ |
  262. NVM_CHANNEL_80MHZ |
  263. NVM_CHANNEL_160MHZ);
  264. }
  265. if (!lar_supported && !(ch_flags & NVM_CHANNEL_VALID)) {
  266. /*
  267. * Channels might become valid later if lar is
  268. * supported, hence we still want to add them to
  269. * the list of supported channels to cfg80211.
  270. */
  271. IWL_DEBUG_EEPROM(dev,
  272. "Ch. %d Flags %x [%sGHz] - No traffic\n",
  273. nvm_chan[ch_idx],
  274. ch_flags,
  275. (ch_idx >= num_2ghz_channels) ?
  276. "5.2" : "2.4");
  277. continue;
  278. }
  279. channel = &data->channels[n_channels];
  280. n_channels++;
  281. channel->hw_value = nvm_chan[ch_idx];
  282. channel->band = is_5ghz ?
  283. IEEE80211_BAND_5GHZ : IEEE80211_BAND_2GHZ;
  284. channel->center_freq =
  285. ieee80211_channel_to_frequency(
  286. channel->hw_value, channel->band);
  287. /* Initialize regulatory-based run-time data */
  288. /*
  289. * Default value - highest tx power value. max_power
  290. * is not used in mvm, and is used for backwards compatibility
  291. */
  292. channel->max_power = IWL_DEFAULT_MAX_TX_POWER;
  293. /* don't put limitations in case we're using LAR */
  294. if (!lar_supported)
  295. channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx],
  296. ch_idx, is_5ghz,
  297. ch_flags, cfg);
  298. else
  299. channel->flags = 0;
  300. IWL_DEBUG_EEPROM(dev,
  301. "Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x %ddBm): Ad-Hoc %ssupported\n",
  302. channel->hw_value,
  303. is_5ghz ? "5.2" : "2.4",
  304. CHECK_AND_PRINT_I(VALID),
  305. CHECK_AND_PRINT_I(IBSS),
  306. CHECK_AND_PRINT_I(ACTIVE),
  307. CHECK_AND_PRINT_I(RADAR),
  308. CHECK_AND_PRINT_I(WIDE),
  309. CHECK_AND_PRINT_I(INDOOR_ONLY),
  310. CHECK_AND_PRINT_I(GO_CONCURRENT),
  311. ch_flags,
  312. channel->max_power,
  313. ((ch_flags & NVM_CHANNEL_IBSS) &&
  314. !(ch_flags & NVM_CHANNEL_RADAR))
  315. ? "" : "not ");
  316. }
  317. return n_channels;
  318. }
  319. static void iwl_init_vht_hw_capab(const struct iwl_cfg *cfg,
  320. struct iwl_nvm_data *data,
  321. struct ieee80211_sta_vht_cap *vht_cap,
  322. u8 tx_chains, u8 rx_chains)
  323. {
  324. int num_rx_ants = num_of_ant(rx_chains);
  325. int num_tx_ants = num_of_ant(tx_chains);
  326. unsigned int max_ampdu_exponent = (cfg->max_vht_ampdu_exponent ?:
  327. IEEE80211_VHT_MAX_AMPDU_1024K);
  328. vht_cap->vht_supported = true;
  329. vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 |
  330. IEEE80211_VHT_CAP_RXSTBC_1 |
  331. IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
  332. 3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT |
  333. max_ampdu_exponent <<
  334. IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT;
  335. if (cfg->ht_params->ldpc)
  336. vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
  337. if (data->sku_cap_mimo_disabled) {
  338. num_rx_ants = 1;
  339. num_tx_ants = 1;
  340. }
  341. if (num_tx_ants > 1)
  342. vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
  343. else
  344. vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN;
  345. if (iwlwifi_mod_params.amsdu_size_8K)
  346. vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
  347. vht_cap->vht_mcs.rx_mcs_map =
  348. cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
  349. IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 |
  350. IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
  351. IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
  352. IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
  353. IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
  354. IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
  355. IEEE80211_VHT_MCS_NOT_SUPPORTED << 14);
  356. if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) {
  357. vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN;
  358. /* this works because NOT_SUPPORTED == 3 */
  359. vht_cap->vht_mcs.rx_mcs_map |=
  360. cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2);
  361. }
  362. vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
  363. }
  364. static void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
  365. struct iwl_nvm_data *data,
  366. const __le16 *ch_section,
  367. u8 tx_chains, u8 rx_chains, bool lar_supported,
  368. bool no_wide_in_5ghz)
  369. {
  370. int n_channels;
  371. int n_used = 0;
  372. struct ieee80211_supported_band *sband;
  373. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  374. n_channels = iwl_init_channel_map(
  375. dev, cfg, data,
  376. &ch_section[NVM_CHANNELS], lar_supported,
  377. no_wide_in_5ghz);
  378. else
  379. n_channels = iwl_init_channel_map(
  380. dev, cfg, data,
  381. &ch_section[NVM_CHANNELS_FAMILY_8000],
  382. lar_supported,
  383. no_wide_in_5ghz);
  384. sband = &data->bands[IEEE80211_BAND_2GHZ];
  385. sband->band = IEEE80211_BAND_2GHZ;
  386. sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
  387. sband->n_bitrates = N_RATES_24;
  388. n_used += iwl_init_sband_channels(data, sband, n_channels,
  389. IEEE80211_BAND_2GHZ);
  390. iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_2GHZ,
  391. tx_chains, rx_chains);
  392. sband = &data->bands[IEEE80211_BAND_5GHZ];
  393. sband->band = IEEE80211_BAND_5GHZ;
  394. sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
  395. sband->n_bitrates = N_RATES_52;
  396. n_used += iwl_init_sband_channels(data, sband, n_channels,
  397. IEEE80211_BAND_5GHZ);
  398. iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_5GHZ,
  399. tx_chains, rx_chains);
  400. if (data->sku_cap_11ac_enable)
  401. iwl_init_vht_hw_capab(cfg, data, &sband->vht_cap,
  402. tx_chains, rx_chains);
  403. if (n_channels != n_used)
  404. IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
  405. n_used, n_channels);
  406. }
  407. static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
  408. const __le16 *phy_sku)
  409. {
  410. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  411. return le16_to_cpup(nvm_sw + SKU);
  412. return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000));
  413. }
  414. static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
  415. {
  416. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  417. return le16_to_cpup(nvm_sw + NVM_VERSION);
  418. else
  419. return le32_to_cpup((__le32 *)(nvm_sw +
  420. NVM_VERSION_FAMILY_8000));
  421. }
  422. static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
  423. const __le16 *phy_sku)
  424. {
  425. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  426. return le16_to_cpup(nvm_sw + RADIO_CFG);
  427. return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_8000));
  428. }
  429. static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
  430. {
  431. int n_hw_addr;
  432. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  433. return le16_to_cpup(nvm_sw + N_HW_ADDRS);
  434. n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
  435. return n_hw_addr & N_HW_ADDR_MASK;
  436. }
  437. static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
  438. struct iwl_nvm_data *data,
  439. u32 radio_cfg)
  440. {
  441. if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  442. data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
  443. data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
  444. data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
  445. data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg);
  446. return;
  447. }
  448. /* set the radio configuration for family 8000 */
  449. data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK_FAMILY_8000(radio_cfg);
  450. data->radio_cfg_step = NVM_RF_CFG_STEP_MSK_FAMILY_8000(radio_cfg);
  451. data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK_FAMILY_8000(radio_cfg);
  452. data->radio_cfg_pnum = NVM_RF_CFG_FLAVOR_MSK_FAMILY_8000(radio_cfg);
  453. data->valid_tx_ant = NVM_RF_CFG_TX_ANT_MSK_FAMILY_8000(radio_cfg);
  454. data->valid_rx_ant = NVM_RF_CFG_RX_ANT_MSK_FAMILY_8000(radio_cfg);
  455. }
  456. static void iwl_set_hw_address(const struct iwl_cfg *cfg,
  457. struct iwl_nvm_data *data,
  458. const __le16 *nvm_sec)
  459. {
  460. const u8 *hw_addr = (const u8 *)(nvm_sec + HW_ADDR);
  461. /* The byte order is little endian 16 bit, meaning 214365 */
  462. data->hw_addr[0] = hw_addr[1];
  463. data->hw_addr[1] = hw_addr[0];
  464. data->hw_addr[2] = hw_addr[3];
  465. data->hw_addr[3] = hw_addr[2];
  466. data->hw_addr[4] = hw_addr[5];
  467. data->hw_addr[5] = hw_addr[4];
  468. }
  469. static void iwl_set_hw_address_family_8000(struct device *dev,
  470. const struct iwl_cfg *cfg,
  471. struct iwl_nvm_data *data,
  472. const __le16 *mac_override,
  473. const __le16 *nvm_hw,
  474. u32 mac_addr0, u32 mac_addr1)
  475. {
  476. const u8 *hw_addr;
  477. if (mac_override) {
  478. static const u8 reserved_mac[] = {
  479. 0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00
  480. };
  481. hw_addr = (const u8 *)(mac_override +
  482. MAC_ADDRESS_OVERRIDE_FAMILY_8000);
  483. /*
  484. * Store the MAC address from MAO section.
  485. * No byte swapping is required in MAO section
  486. */
  487. memcpy(data->hw_addr, hw_addr, ETH_ALEN);
  488. /*
  489. * Force the use of the OTP MAC address in case of reserved MAC
  490. * address in the NVM, or if address is given but invalid.
  491. */
  492. if (is_valid_ether_addr(data->hw_addr) &&
  493. memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0)
  494. return;
  495. IWL_ERR_DEV(dev,
  496. "mac address from nvm override section is not valid\n");
  497. }
  498. if (nvm_hw) {
  499. /* read the MAC address from HW resisters */
  500. hw_addr = (const u8 *)&mac_addr0;
  501. data->hw_addr[0] = hw_addr[3];
  502. data->hw_addr[1] = hw_addr[2];
  503. data->hw_addr[2] = hw_addr[1];
  504. data->hw_addr[3] = hw_addr[0];
  505. hw_addr = (const u8 *)&mac_addr1;
  506. data->hw_addr[4] = hw_addr[1];
  507. data->hw_addr[5] = hw_addr[0];
  508. if (!is_valid_ether_addr(data->hw_addr))
  509. IWL_ERR_DEV(dev,
  510. "mac address from hw section is not valid\n");
  511. return;
  512. }
  513. IWL_ERR_DEV(dev, "mac address is not found\n");
  514. }
  515. #define IWL_4165_DEVICE_ID 0x5501
  516. static bool
  517. iwl_nvm_no_wide_in_5ghz(struct device *dev, const struct iwl_cfg *cfg,
  518. const __le16 *nvm_hw)
  519. {
  520. /*
  521. * Workaround a bug in Indonesia SKUs where the regulatory in
  522. * some 7000-family OTPs erroneously allow wide channels in
  523. * 5GHz. To check for Indonesia, we take the SKU value from
  524. * bits 1-4 in the subsystem ID and check if it is either 5 or
  525. * 9. In those cases, we need to force-disable wide channels
  526. * in 5GHz otherwise the FW will throw a sysassert when we try
  527. * to use them.
  528. */
  529. if (cfg->device_family == IWL_DEVICE_FAMILY_7000) {
  530. /*
  531. * Unlike the other sections in the NVM, the hw
  532. * section uses big-endian.
  533. */
  534. u16 subsystem_id = be16_to_cpup((const __be16 *)nvm_hw
  535. + SUBSYSTEM_ID);
  536. u8 sku = (subsystem_id & 0x1e) >> 1;
  537. if (sku == 5 || sku == 9) {
  538. IWL_DEBUG_EEPROM(dev,
  539. "disabling wide channels in 5GHz (0x%0x %d)\n",
  540. subsystem_id, sku);
  541. return true;
  542. }
  543. }
  544. return false;
  545. }
  546. struct iwl_nvm_data *
  547. iwl_parse_nvm_data(struct device *dev, const struct iwl_cfg *cfg,
  548. const __le16 *nvm_hw, const __le16 *nvm_sw,
  549. const __le16 *nvm_calib, const __le16 *regulatory,
  550. const __le16 *mac_override, const __le16 *phy_sku,
  551. u8 tx_chains, u8 rx_chains, bool lar_fw_supported,
  552. u32 mac_addr0, u32 mac_addr1, u32 hw_id)
  553. {
  554. struct iwl_nvm_data *data;
  555. bool no_wide_in_5ghz = iwl_nvm_no_wide_in_5ghz(dev, cfg, nvm_hw);
  556. u32 sku;
  557. u32 radio_cfg;
  558. u16 lar_config;
  559. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  560. data = kzalloc(sizeof(*data) +
  561. sizeof(struct ieee80211_channel) *
  562. IWL_NUM_CHANNELS,
  563. GFP_KERNEL);
  564. else
  565. data = kzalloc(sizeof(*data) +
  566. sizeof(struct ieee80211_channel) *
  567. IWL_NUM_CHANNELS_FAMILY_8000,
  568. GFP_KERNEL);
  569. if (!data)
  570. return NULL;
  571. data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw);
  572. radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku);
  573. iwl_set_radio_cfg(cfg, data, radio_cfg);
  574. if (data->valid_tx_ant)
  575. tx_chains &= data->valid_tx_ant;
  576. if (data->valid_rx_ant)
  577. rx_chains &= data->valid_rx_ant;
  578. sku = iwl_get_sku(cfg, nvm_sw, phy_sku);
  579. data->sku_cap_band_24GHz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
  580. data->sku_cap_band_52GHz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
  581. data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
  582. if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
  583. data->sku_cap_11n_enable = false;
  584. data->sku_cap_11ac_enable = data->sku_cap_11n_enable &&
  585. (sku & NVM_SKU_CAP_11AC_ENABLE);
  586. data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE;
  587. /*
  588. * OTP 0x52 bug work around
  589. * define antenna 1x1 according to MIMO disabled
  590. */
  591. if (hw_id == IWL_4165_DEVICE_ID && data->sku_cap_mimo_disabled) {
  592. data->valid_tx_ant = ANT_B;
  593. data->valid_rx_ant = ANT_B;
  594. tx_chains = ANT_B;
  595. rx_chains = ANT_B;
  596. }
  597. data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
  598. if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  599. /* Checking for required sections */
  600. if (!nvm_calib) {
  601. IWL_ERR_DEV(dev,
  602. "Can't parse empty Calib NVM sections\n");
  603. kfree(data);
  604. return NULL;
  605. }
  606. /* in family 8000 Xtal calibration values moved to OTP */
  607. data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
  608. data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
  609. }
  610. if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  611. iwl_set_hw_address(cfg, data, nvm_hw);
  612. iwl_init_sbands(dev, cfg, data, nvm_sw,
  613. tx_chains, rx_chains, lar_fw_supported,
  614. no_wide_in_5ghz);
  615. } else {
  616. u16 lar_offset = data->nvm_version < 0xE39 ?
  617. NVM_LAR_OFFSET_FAMILY_8000_OLD :
  618. NVM_LAR_OFFSET_FAMILY_8000;
  619. lar_config = le16_to_cpup(regulatory + lar_offset);
  620. data->lar_enabled = !!(lar_config &
  621. NVM_LAR_ENABLED_FAMILY_8000);
  622. /* MAC address in family 8000 */
  623. iwl_set_hw_address_family_8000(dev, cfg, data, mac_override,
  624. nvm_hw, mac_addr0, mac_addr1);
  625. iwl_init_sbands(dev, cfg, data, regulatory,
  626. tx_chains, rx_chains,
  627. lar_fw_supported && data->lar_enabled,
  628. no_wide_in_5ghz);
  629. }
  630. data->calib_version = 255;
  631. return data;
  632. }
  633. IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);
  634. static u32 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan,
  635. int ch_idx, u16 nvm_flags,
  636. const struct iwl_cfg *cfg)
  637. {
  638. u32 flags = NL80211_RRF_NO_HT40;
  639. u32 last_5ghz_ht = LAST_5GHZ_HT;
  640. if (cfg->device_family == IWL_DEVICE_FAMILY_8000)
  641. last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
  642. if (ch_idx < NUM_2GHZ_CHANNELS &&
  643. (nvm_flags & NVM_CHANNEL_40MHZ)) {
  644. if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS)
  645. flags &= ~NL80211_RRF_NO_HT40PLUS;
  646. if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS)
  647. flags &= ~NL80211_RRF_NO_HT40MINUS;
  648. } else if (nvm_chan[ch_idx] <= last_5ghz_ht &&
  649. (nvm_flags & NVM_CHANNEL_40MHZ)) {
  650. if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
  651. flags &= ~NL80211_RRF_NO_HT40PLUS;
  652. else
  653. flags &= ~NL80211_RRF_NO_HT40MINUS;
  654. }
  655. if (!(nvm_flags & NVM_CHANNEL_80MHZ))
  656. flags |= NL80211_RRF_NO_80MHZ;
  657. if (!(nvm_flags & NVM_CHANNEL_160MHZ))
  658. flags |= NL80211_RRF_NO_160MHZ;
  659. if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
  660. flags |= NL80211_RRF_NO_IR;
  661. if (nvm_flags & NVM_CHANNEL_RADAR)
  662. flags |= NL80211_RRF_DFS;
  663. if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
  664. flags |= NL80211_RRF_NO_OUTDOOR;
  665. /* Set the GO concurrent flag only in case that NO_IR is set.
  666. * Otherwise it is meaningless
  667. */
  668. if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
  669. (flags & NL80211_RRF_NO_IR))
  670. flags |= NL80211_RRF_GO_CONCURRENT;
  671. return flags;
  672. }
  673. struct ieee80211_regdomain *
  674. iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
  675. int num_of_ch, __le32 *channels, u16 fw_mcc)
  676. {
  677. int ch_idx;
  678. u16 ch_flags, prev_ch_flags = 0;
  679. const u8 *nvm_chan = cfg->device_family == IWL_DEVICE_FAMILY_8000 ?
  680. iwl_nvm_channels_family_8000 : iwl_nvm_channels;
  681. struct ieee80211_regdomain *regd;
  682. int size_of_regd;
  683. struct ieee80211_reg_rule *rule;
  684. enum ieee80211_band band;
  685. int center_freq, prev_center_freq = 0;
  686. int valid_rules = 0;
  687. bool new_rule;
  688. int max_num_ch = cfg->device_family == IWL_DEVICE_FAMILY_8000 ?
  689. IWL_NUM_CHANNELS_FAMILY_8000 : IWL_NUM_CHANNELS;
  690. if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
  691. return ERR_PTR(-EINVAL);
  692. if (WARN_ON(num_of_ch > max_num_ch))
  693. num_of_ch = max_num_ch;
  694. IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n",
  695. num_of_ch);
  696. /* build a regdomain rule for every valid channel */
  697. size_of_regd =
  698. sizeof(struct ieee80211_regdomain) +
  699. num_of_ch * sizeof(struct ieee80211_reg_rule);
  700. regd = kzalloc(size_of_regd, GFP_KERNEL);
  701. if (!regd)
  702. return ERR_PTR(-ENOMEM);
  703. for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
  704. ch_flags = (u16)__le32_to_cpup(channels + ch_idx);
  705. band = (ch_idx < NUM_2GHZ_CHANNELS) ?
  706. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  707. center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx],
  708. band);
  709. new_rule = false;
  710. if (!(ch_flags & NVM_CHANNEL_VALID)) {
  711. IWL_DEBUG_DEV(dev, IWL_DL_LAR,
  712. "Ch. %d Flags %x [%sGHz] - No traffic\n",
  713. nvm_chan[ch_idx],
  714. ch_flags,
  715. (ch_idx >= NUM_2GHZ_CHANNELS) ?
  716. "5.2" : "2.4");
  717. continue;
  718. }
  719. /* we can't continue the same rule */
  720. if (ch_idx == 0 || prev_ch_flags != ch_flags ||
  721. center_freq - prev_center_freq > 20) {
  722. valid_rules++;
  723. new_rule = true;
  724. }
  725. rule = &regd->reg_rules[valid_rules - 1];
  726. if (new_rule)
  727. rule->freq_range.start_freq_khz =
  728. MHZ_TO_KHZ(center_freq - 10);
  729. rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10);
  730. /* this doesn't matter - not used by FW */
  731. rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
  732. rule->power_rule.max_eirp =
  733. DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
  734. rule->flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx,
  735. ch_flags, cfg);
  736. /* rely on auto-calculation to merge BW of contiguous chans */
  737. rule->flags |= NL80211_RRF_AUTO_BW;
  738. rule->freq_range.max_bandwidth_khz = 0;
  739. prev_ch_flags = ch_flags;
  740. prev_center_freq = center_freq;
  741. IWL_DEBUG_DEV(dev, IWL_DL_LAR,
  742. "Ch. %d [%sGHz] %s%s%s%s%s%s%s%s%s(0x%02x): Ad-Hoc %ssupported\n",
  743. center_freq,
  744. band == IEEE80211_BAND_5GHZ ? "5.2" : "2.4",
  745. CHECK_AND_PRINT_I(VALID),
  746. CHECK_AND_PRINT_I(ACTIVE),
  747. CHECK_AND_PRINT_I(RADAR),
  748. CHECK_AND_PRINT_I(WIDE),
  749. CHECK_AND_PRINT_I(40MHZ),
  750. CHECK_AND_PRINT_I(80MHZ),
  751. CHECK_AND_PRINT_I(160MHZ),
  752. CHECK_AND_PRINT_I(INDOOR_ONLY),
  753. CHECK_AND_PRINT_I(GO_CONCURRENT),
  754. ch_flags,
  755. ((ch_flags & NVM_CHANNEL_ACTIVE) &&
  756. !(ch_flags & NVM_CHANNEL_RADAR))
  757. ? "" : "not ");
  758. }
  759. regd->n_reg_rules = valid_rules;
  760. /* set alpha2 from FW. */
  761. regd->alpha2[0] = fw_mcc >> 8;
  762. regd->alpha2[1] = fw_mcc & 0xff;
  763. return regd;
  764. }
  765. IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info);