fw-api-rs.h 13 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of version 2 of the GNU General Public License as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22. * USA
  23. *
  24. * The full GNU General Public License is included in this distribution
  25. * in the file called COPYING.
  26. *
  27. * Contact Information:
  28. * Intel Linux Wireless <ilw@linux.intel.com>
  29. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30. *
  31. * BSD LICENSE
  32. *
  33. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  34. * All rights reserved.
  35. *
  36. * Redistribution and use in source and binary forms, with or without
  37. * modification, are permitted provided that the following conditions
  38. * are met:
  39. *
  40. * * Redistributions of source code must retain the above copyright
  41. * notice, this list of conditions and the following disclaimer.
  42. * * Redistributions in binary form must reproduce the above copyright
  43. * notice, this list of conditions and the following disclaimer in
  44. * the documentation and/or other materials provided with the
  45. * distribution.
  46. * * Neither the name Intel Corporation nor the names of its
  47. * contributors may be used to endorse or promote products derived
  48. * from this software without specific prior written permission.
  49. *
  50. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61. *****************************************************************************/
  62. #ifndef __fw_api_rs_h__
  63. #define __fw_api_rs_h__
  64. #include "fw-api-mac.h"
  65. /*
  66. * These serve as indexes into
  67. * struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT];
  68. * TODO: avoid overlap between legacy and HT rates
  69. */
  70. enum {
  71. IWL_RATE_1M_INDEX = 0,
  72. IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX,
  73. IWL_RATE_2M_INDEX,
  74. IWL_RATE_5M_INDEX,
  75. IWL_RATE_11M_INDEX,
  76. IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX,
  77. IWL_RATE_6M_INDEX,
  78. IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX,
  79. IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX,
  80. IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX,
  81. IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX,
  82. IWL_RATE_9M_INDEX,
  83. IWL_RATE_12M_INDEX,
  84. IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX,
  85. IWL_RATE_18M_INDEX,
  86. IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX,
  87. IWL_RATE_24M_INDEX,
  88. IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX,
  89. IWL_RATE_36M_INDEX,
  90. IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX,
  91. IWL_RATE_48M_INDEX,
  92. IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX,
  93. IWL_RATE_54M_INDEX,
  94. IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX,
  95. IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX,
  96. IWL_RATE_60M_INDEX,
  97. IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX,
  98. IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX,
  99. IWL_RATE_MCS_8_INDEX,
  100. IWL_RATE_MCS_9_INDEX,
  101. IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX,
  102. IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1,
  103. IWL_RATE_COUNT = IWL_LAST_VHT_RATE + 1,
  104. };
  105. #define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX)
  106. /* fw API values for legacy bit rates, both OFDM and CCK */
  107. enum {
  108. IWL_RATE_6M_PLCP = 13,
  109. IWL_RATE_9M_PLCP = 15,
  110. IWL_RATE_12M_PLCP = 5,
  111. IWL_RATE_18M_PLCP = 7,
  112. IWL_RATE_24M_PLCP = 9,
  113. IWL_RATE_36M_PLCP = 11,
  114. IWL_RATE_48M_PLCP = 1,
  115. IWL_RATE_54M_PLCP = 3,
  116. IWL_RATE_1M_PLCP = 10,
  117. IWL_RATE_2M_PLCP = 20,
  118. IWL_RATE_5M_PLCP = 55,
  119. IWL_RATE_11M_PLCP = 110,
  120. IWL_RATE_INVM_PLCP = -1,
  121. };
  122. /*
  123. * rate_n_flags bit fields
  124. *
  125. * The 32-bit value has different layouts in the low 8 bites depending on the
  126. * format. There are three formats, HT, VHT and legacy (11abg, with subformats
  127. * for CCK and OFDM).
  128. *
  129. * High-throughput (HT) rate format
  130. * bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM)
  131. * Very High-throughput (VHT) rate format
  132. * bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM)
  133. * Legacy OFDM rate format for bits 7:0
  134. * bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM)
  135. * Legacy CCK rate format for bits 7:0:
  136. * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK)
  137. */
  138. /* Bit 8: (1) HT format, (0) legacy or VHT format */
  139. #define RATE_MCS_HT_POS 8
  140. #define RATE_MCS_HT_MSK (1 << RATE_MCS_HT_POS)
  141. /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
  142. #define RATE_MCS_CCK_POS 9
  143. #define RATE_MCS_CCK_MSK (1 << RATE_MCS_CCK_POS)
  144. /* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */
  145. #define RATE_MCS_VHT_POS 26
  146. #define RATE_MCS_VHT_MSK (1 << RATE_MCS_VHT_POS)
  147. /*
  148. * High-throughput (HT) rate format for bits 7:0
  149. *
  150. * 2-0: MCS rate base
  151. * 0) 6 Mbps
  152. * 1) 12 Mbps
  153. * 2) 18 Mbps
  154. * 3) 24 Mbps
  155. * 4) 36 Mbps
  156. * 5) 48 Mbps
  157. * 6) 54 Mbps
  158. * 7) 60 Mbps
  159. * 4-3: 0) Single stream (SISO)
  160. * 1) Dual stream (MIMO)
  161. * 2) Triple stream (MIMO)
  162. * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data
  163. * (bits 7-6 are zero)
  164. *
  165. * Together the low 5 bits work out to the MCS index because we don't
  166. * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two
  167. * streams and 16-23 have three streams. We could also support MCS 32
  168. * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.)
  169. */
  170. #define RATE_HT_MCS_RATE_CODE_MSK 0x7
  171. #define RATE_HT_MCS_NSS_POS 3
  172. #define RATE_HT_MCS_NSS_MSK (3 << RATE_HT_MCS_NSS_POS)
  173. /* Bit 10: (1) Use Green Field preamble */
  174. #define RATE_HT_MCS_GF_POS 10
  175. #define RATE_HT_MCS_GF_MSK (1 << RATE_HT_MCS_GF_POS)
  176. #define RATE_HT_MCS_INDEX_MSK 0x3f
  177. /*
  178. * Very High-throughput (VHT) rate format for bits 7:0
  179. *
  180. * 3-0: VHT MCS (0-9)
  181. * 5-4: number of streams - 1:
  182. * 0) Single stream (SISO)
  183. * 1) Dual stream (MIMO)
  184. * 2) Triple stream (MIMO)
  185. */
  186. /* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */
  187. #define RATE_VHT_MCS_RATE_CODE_MSK 0xf
  188. #define RATE_VHT_MCS_NSS_POS 4
  189. #define RATE_VHT_MCS_NSS_MSK (3 << RATE_VHT_MCS_NSS_POS)
  190. /*
  191. * Legacy OFDM rate format for bits 7:0
  192. *
  193. * 3-0: 0xD) 6 Mbps
  194. * 0xF) 9 Mbps
  195. * 0x5) 12 Mbps
  196. * 0x7) 18 Mbps
  197. * 0x9) 24 Mbps
  198. * 0xB) 36 Mbps
  199. * 0x1) 48 Mbps
  200. * 0x3) 54 Mbps
  201. * (bits 7-4 are 0)
  202. *
  203. * Legacy CCK rate format for bits 7:0:
  204. * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK):
  205. *
  206. * 6-0: 10) 1 Mbps
  207. * 20) 2 Mbps
  208. * 55) 5.5 Mbps
  209. * 110) 11 Mbps
  210. * (bit 7 is 0)
  211. */
  212. #define RATE_LEGACY_RATE_MSK 0xff
  213. /*
  214. * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz
  215. * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT
  216. */
  217. #define RATE_MCS_CHAN_WIDTH_POS 11
  218. #define RATE_MCS_CHAN_WIDTH_MSK (3 << RATE_MCS_CHAN_WIDTH_POS)
  219. #define RATE_MCS_CHAN_WIDTH_20 (0 << RATE_MCS_CHAN_WIDTH_POS)
  220. #define RATE_MCS_CHAN_WIDTH_40 (1 << RATE_MCS_CHAN_WIDTH_POS)
  221. #define RATE_MCS_CHAN_WIDTH_80 (2 << RATE_MCS_CHAN_WIDTH_POS)
  222. #define RATE_MCS_CHAN_WIDTH_160 (3 << RATE_MCS_CHAN_WIDTH_POS)
  223. /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
  224. #define RATE_MCS_SGI_POS 13
  225. #define RATE_MCS_SGI_MSK (1 << RATE_MCS_SGI_POS)
  226. /* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */
  227. #define RATE_MCS_ANT_POS 14
  228. #define RATE_MCS_ANT_A_MSK (1 << RATE_MCS_ANT_POS)
  229. #define RATE_MCS_ANT_B_MSK (2 << RATE_MCS_ANT_POS)
  230. #define RATE_MCS_ANT_C_MSK (4 << RATE_MCS_ANT_POS)
  231. #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | \
  232. RATE_MCS_ANT_B_MSK)
  233. #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | \
  234. RATE_MCS_ANT_C_MSK)
  235. #define RATE_MCS_ANT_MSK RATE_MCS_ANT_ABC_MSK
  236. #define RATE_MCS_ANT_NUM 3
  237. /* Bit 17-18: (0) SS, (1) SS*2 */
  238. #define RATE_MCS_STBC_POS 17
  239. #define RATE_MCS_HT_STBC_MSK (3 << RATE_MCS_STBC_POS)
  240. #define RATE_MCS_VHT_STBC_MSK (1 << RATE_MCS_STBC_POS)
  241. /* Bit 19: (0) Beamforming is off, (1) Beamforming is on */
  242. #define RATE_MCS_BF_POS 19
  243. #define RATE_MCS_BF_MSK (1 << RATE_MCS_BF_POS)
  244. /* Bit 20: (0) ZLF is off, (1) ZLF is on */
  245. #define RATE_MCS_ZLF_POS 20
  246. #define RATE_MCS_ZLF_MSK (1 << RATE_MCS_ZLF_POS)
  247. /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */
  248. #define RATE_MCS_DUP_POS 24
  249. #define RATE_MCS_DUP_MSK (3 << RATE_MCS_DUP_POS)
  250. /* Bit 27: (1) LDPC enabled, (0) LDPC disabled */
  251. #define RATE_MCS_LDPC_POS 27
  252. #define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS)
  253. /* Link Quality definitions */
  254. /* # entries in rate scale table to support Tx retries */
  255. #define LQ_MAX_RETRY_NUM 16
  256. /* Link quality command flags bit fields */
  257. /* Bit 0: (0) Don't use RTS (1) Use RTS */
  258. #define LQ_FLAG_USE_RTS_POS 0
  259. #define LQ_FLAG_USE_RTS_MSK (1 << LQ_FLAG_USE_RTS_POS)
  260. /* Bit 1-3: LQ command color. Used to match responses to LQ commands */
  261. #define LQ_FLAG_COLOR_POS 1
  262. #define LQ_FLAG_COLOR_MSK (7 << LQ_FLAG_COLOR_POS)
  263. /* Bit 4-5: Tx RTS BW Signalling
  264. * (0) No RTS BW signalling
  265. * (1) Static BW signalling
  266. * (2) Dynamic BW signalling
  267. */
  268. #define LQ_FLAG_RTS_BW_SIG_POS 4
  269. #define LQ_FLAG_RTS_BW_SIG_NONE (0 << LQ_FLAG_RTS_BW_SIG_POS)
  270. #define LQ_FLAG_RTS_BW_SIG_STATIC (1 << LQ_FLAG_RTS_BW_SIG_POS)
  271. #define LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << LQ_FLAG_RTS_BW_SIG_POS)
  272. /* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection
  273. * Dyanmic BW selection allows Tx with narrower BW then requested in rates
  274. */
  275. #define LQ_FLAG_DYNAMIC_BW_POS 6
  276. #define LQ_FLAG_DYNAMIC_BW_MSK (1 << LQ_FLAG_DYNAMIC_BW_POS)
  277. /* Single Stream Tx Parameters (lq_cmd->ss_params)
  278. * Flags to control a smart FW decision about whether BFER/STBC/SISO will be
  279. * used for single stream Tx.
  280. */
  281. /* Bit 0-1: Max STBC streams allowed. Can be 0-3.
  282. * (0) - No STBC allowed
  283. * (1) - 2x1 STBC allowed (HT/VHT)
  284. * (2) - 4x2 STBC allowed (HT/VHT)
  285. * (3) - 3x2 STBC allowed (HT only)
  286. * All our chips are at most 2 antennas so only (1) is valid for now.
  287. */
  288. #define LQ_SS_STBC_ALLOWED_POS 0
  289. #define LQ_SS_STBC_ALLOWED_MSK (3 << LQ_SS_STBC_ALLOWED_MSK)
  290. /* 2x1 STBC is allowed */
  291. #define LQ_SS_STBC_1SS_ALLOWED (1 << LQ_SS_STBC_ALLOWED_POS)
  292. /* Bit 2: Beamformer (VHT only) is allowed */
  293. #define LQ_SS_BFER_ALLOWED_POS 2
  294. #define LQ_SS_BFER_ALLOWED (1 << LQ_SS_BFER_ALLOWED_POS)
  295. /* Bit 3: Force BFER or STBC for testing
  296. * If this is set:
  297. * If BFER is allowed then force the ucode to choose BFER else
  298. * If STBC is allowed then force the ucode to choose STBC over SISO
  299. */
  300. #define LQ_SS_FORCE_POS 3
  301. #define LQ_SS_FORCE (1 << LQ_SS_FORCE_POS)
  302. /* Bit 31: ss_params field is valid. Used for FW backward compatibility
  303. * with other drivers which don't support the ss_params API yet
  304. */
  305. #define LQ_SS_PARAMS_VALID_POS 31
  306. #define LQ_SS_PARAMS_VALID (1 << LQ_SS_PARAMS_VALID_POS)
  307. /**
  308. * struct iwl_lq_cmd - link quality command
  309. * @sta_id: station to update
  310. * @control: not used
  311. * @flags: combination of LQ_FLAG_*
  312. * @mimo_delim: the first SISO index in rs_table, which separates MIMO
  313. * and SISO rates
  314. * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD).
  315. * Should be ANT_[ABC]
  316. * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC]
  317. * @initial_rate_index: first index from rs_table per AC category
  318. * @agg_time_limit: aggregation max time threshold in usec/100, meaning
  319. * value of 100 is one usec. Range is 100 to 8000
  320. * @agg_disable_start_th: try-count threshold for starting aggregation.
  321. * If a frame has higher try-count, it should not be selected for
  322. * starting an aggregation sequence.
  323. * @agg_frame_cnt_limit: max frame count in an aggregation.
  324. * 0: no limit
  325. * 1: no aggregation (one frame per aggregation)
  326. * 2 - 0x3f: maximal number of frames (up to 3f == 63)
  327. * @rs_table: array of rates for each TX try, each is rate_n_flags,
  328. * meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP
  329. * @ss_params: single stream features. declare whether STBC or BFER are allowed.
  330. */
  331. struct iwl_lq_cmd {
  332. u8 sta_id;
  333. u8 reduced_tpc;
  334. u16 control;
  335. /* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */
  336. u8 flags;
  337. u8 mimo_delim;
  338. u8 single_stream_ant_msk;
  339. u8 dual_stream_ant_msk;
  340. u8 initial_rate_index[AC_NUM];
  341. /* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */
  342. __le16 agg_time_limit;
  343. u8 agg_disable_start_th;
  344. u8 agg_frame_cnt_limit;
  345. __le32 reserved2;
  346. __le32 rs_table[LQ_MAX_RETRY_NUM];
  347. __le32 ss_params;
  348. }; /* LINK_QUALITY_CMD_API_S_VER_1 */
  349. #endif /* __fw_api_rs_h__ */