utils.c 33 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  10. * Copyright (C) 2015 Intel Deutschland GmbH
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24. * USA
  25. *
  26. * The full GNU General Public License is included in this distribution
  27. * in the file called COPYING.
  28. *
  29. * Contact Information:
  30. * Intel Linux Wireless <ilw@linux.intel.com>
  31. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32. *
  33. * BSD LICENSE
  34. *
  35. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  36. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  37. * All rights reserved.
  38. *
  39. * Redistribution and use in source and binary forms, with or without
  40. * modification, are permitted provided that the following conditions
  41. * are met:
  42. *
  43. * * Redistributions of source code must retain the above copyright
  44. * notice, this list of conditions and the following disclaimer.
  45. * * Redistributions in binary form must reproduce the above copyright
  46. * notice, this list of conditions and the following disclaimer in
  47. * the documentation and/or other materials provided with the
  48. * distribution.
  49. * * Neither the name Intel Corporation nor the names of its
  50. * contributors may be used to endorse or promote products derived
  51. * from this software without specific prior written permission.
  52. *
  53. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  56. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  57. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  58. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  59. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  60. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  61. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  62. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  63. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  64. *
  65. *****************************************************************************/
  66. #include <net/mac80211.h>
  67. #include "iwl-debug.h"
  68. #include "iwl-io.h"
  69. #include "iwl-prph.h"
  70. #include "mvm.h"
  71. #include "fw-api-rs.h"
  72. /*
  73. * Will return 0 even if the cmd failed when RFKILL is asserted unless
  74. * CMD_WANT_SKB is set in cmd->flags.
  75. */
  76. int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
  77. {
  78. int ret;
  79. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  80. if (WARN_ON(mvm->d3_test_active))
  81. return -EIO;
  82. #endif
  83. /*
  84. * Synchronous commands from this op-mode must hold
  85. * the mutex, this ensures we don't try to send two
  86. * (or more) synchronous commands at a time.
  87. */
  88. if (!(cmd->flags & CMD_ASYNC))
  89. lockdep_assert_held(&mvm->mutex);
  90. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  91. /*
  92. * If the caller wants the SKB, then don't hide any problems, the
  93. * caller might access the response buffer which will be NULL if
  94. * the command failed.
  95. */
  96. if (cmd->flags & CMD_WANT_SKB)
  97. return ret;
  98. /* Silently ignore failures if RFKILL is asserted */
  99. if (!ret || ret == -ERFKILL)
  100. return 0;
  101. return ret;
  102. }
  103. int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
  104. u32 flags, u16 len, const void *data)
  105. {
  106. struct iwl_host_cmd cmd = {
  107. .id = id,
  108. .len = { len, },
  109. .data = { data, },
  110. .flags = flags,
  111. };
  112. return iwl_mvm_send_cmd(mvm, &cmd);
  113. }
  114. /*
  115. * We assume that the caller set the status to the success value
  116. */
  117. int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
  118. u32 *status)
  119. {
  120. struct iwl_rx_packet *pkt;
  121. struct iwl_cmd_response *resp;
  122. int ret, resp_len;
  123. lockdep_assert_held(&mvm->mutex);
  124. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  125. if (WARN_ON(mvm->d3_test_active))
  126. return -EIO;
  127. #endif
  128. /*
  129. * Only synchronous commands can wait for status,
  130. * we use WANT_SKB so the caller can't.
  131. */
  132. if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
  133. "cmd flags %x", cmd->flags))
  134. return -EINVAL;
  135. cmd->flags |= CMD_WANT_SKB;
  136. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  137. if (ret == -ERFKILL) {
  138. /*
  139. * The command failed because of RFKILL, don't update
  140. * the status, leave it as success and return 0.
  141. */
  142. return 0;
  143. } else if (ret) {
  144. return ret;
  145. }
  146. pkt = cmd->resp_pkt;
  147. /* Can happen if RFKILL is asserted */
  148. if (!pkt) {
  149. ret = 0;
  150. goto out_free_resp;
  151. }
  152. resp_len = iwl_rx_packet_payload_len(pkt);
  153. if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
  154. ret = -EIO;
  155. goto out_free_resp;
  156. }
  157. resp = (void *)pkt->data;
  158. *status = le32_to_cpu(resp->status);
  159. out_free_resp:
  160. iwl_free_resp(cmd);
  161. return ret;
  162. }
  163. /*
  164. * We assume that the caller set the status to the sucess value
  165. */
  166. int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
  167. const void *data, u32 *status)
  168. {
  169. struct iwl_host_cmd cmd = {
  170. .id = id,
  171. .len = { len, },
  172. .data = { data, },
  173. };
  174. return iwl_mvm_send_cmd_status(mvm, &cmd, status);
  175. }
  176. #define IWL_DECLARE_RATE_INFO(r) \
  177. [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
  178. /*
  179. * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
  180. */
  181. static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
  182. IWL_DECLARE_RATE_INFO(1),
  183. IWL_DECLARE_RATE_INFO(2),
  184. IWL_DECLARE_RATE_INFO(5),
  185. IWL_DECLARE_RATE_INFO(11),
  186. IWL_DECLARE_RATE_INFO(6),
  187. IWL_DECLARE_RATE_INFO(9),
  188. IWL_DECLARE_RATE_INFO(12),
  189. IWL_DECLARE_RATE_INFO(18),
  190. IWL_DECLARE_RATE_INFO(24),
  191. IWL_DECLARE_RATE_INFO(36),
  192. IWL_DECLARE_RATE_INFO(48),
  193. IWL_DECLARE_RATE_INFO(54),
  194. };
  195. int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
  196. enum ieee80211_band band)
  197. {
  198. int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
  199. int idx;
  200. int band_offset = 0;
  201. /* Legacy rate format, search for match in table */
  202. if (band == IEEE80211_BAND_5GHZ)
  203. band_offset = IWL_FIRST_OFDM_RATE;
  204. for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
  205. if (fw_rate_idx_to_plcp[idx] == rate)
  206. return idx - band_offset;
  207. return -1;
  208. }
  209. u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
  210. {
  211. /* Get PLCP rate for tx_cmd->rate_n_flags */
  212. return fw_rate_idx_to_plcp[rate_idx];
  213. }
  214. void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
  215. {
  216. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  217. struct iwl_error_resp *err_resp = (void *)pkt->data;
  218. IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
  219. le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
  220. IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
  221. le16_to_cpu(err_resp->bad_cmd_seq_num),
  222. le32_to_cpu(err_resp->error_service));
  223. IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n",
  224. le64_to_cpu(err_resp->timestamp));
  225. }
  226. /*
  227. * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
  228. * The parameter should also be a combination of ANT_[ABC].
  229. */
  230. u8 first_antenna(u8 mask)
  231. {
  232. BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
  233. if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
  234. return BIT(0);
  235. return BIT(ffs(mask) - 1);
  236. }
  237. /*
  238. * Toggles between TX antennas to send the probe request on.
  239. * Receives the bitmask of valid TX antennas and the *index* used
  240. * for the last TX, and returns the next valid *index* to use.
  241. * In order to set it in the tx_cmd, must do BIT(idx).
  242. */
  243. u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
  244. {
  245. u8 ind = last_idx;
  246. int i;
  247. for (i = 0; i < RATE_MCS_ANT_NUM; i++) {
  248. ind = (ind + 1) % RATE_MCS_ANT_NUM;
  249. if (valid & BIT(ind))
  250. return ind;
  251. }
  252. WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
  253. return last_idx;
  254. }
  255. static const struct {
  256. const char *name;
  257. u8 num;
  258. } advanced_lookup[] = {
  259. { "NMI_INTERRUPT_WDG", 0x34 },
  260. { "SYSASSERT", 0x35 },
  261. { "UCODE_VERSION_MISMATCH", 0x37 },
  262. { "BAD_COMMAND", 0x38 },
  263. { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
  264. { "FATAL_ERROR", 0x3D },
  265. { "NMI_TRM_HW_ERR", 0x46 },
  266. { "NMI_INTERRUPT_TRM", 0x4C },
  267. { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
  268. { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
  269. { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
  270. { "NMI_INTERRUPT_HOST", 0x66 },
  271. { "NMI_INTERRUPT_ACTION_PT", 0x7C },
  272. { "NMI_INTERRUPT_UNKNOWN", 0x84 },
  273. { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
  274. { "ADVANCED_SYSASSERT", 0 },
  275. };
  276. static const char *desc_lookup(u32 num)
  277. {
  278. int i;
  279. for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++)
  280. if (advanced_lookup[i].num == num)
  281. return advanced_lookup[i].name;
  282. /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
  283. return advanced_lookup[i].name;
  284. }
  285. /*
  286. * Note: This structure is read from the device with IO accesses,
  287. * and the reading already does the endian conversion. As it is
  288. * read with u32-sized accesses, any members with a different size
  289. * need to be ordered correctly though!
  290. */
  291. struct iwl_error_event_table_v1 {
  292. u32 valid; /* (nonzero) valid, (0) log is empty */
  293. u32 error_id; /* type of error */
  294. u32 pc; /* program counter */
  295. u32 blink1; /* branch link */
  296. u32 blink2; /* branch link */
  297. u32 ilink1; /* interrupt link */
  298. u32 ilink2; /* interrupt link */
  299. u32 data1; /* error-specific data */
  300. u32 data2; /* error-specific data */
  301. u32 data3; /* error-specific data */
  302. u32 bcon_time; /* beacon timer */
  303. u32 tsf_low; /* network timestamp function timer */
  304. u32 tsf_hi; /* network timestamp function timer */
  305. u32 gp1; /* GP1 timer register */
  306. u32 gp2; /* GP2 timer register */
  307. u32 gp3; /* GP3 timer register */
  308. u32 ucode_ver; /* uCode version */
  309. u32 hw_ver; /* HW Silicon version */
  310. u32 brd_ver; /* HW board version */
  311. u32 log_pc; /* log program counter */
  312. u32 frame_ptr; /* frame pointer */
  313. u32 stack_ptr; /* stack pointer */
  314. u32 hcmd; /* last host command header */
  315. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  316. * rxtx_flag */
  317. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  318. * host_flag */
  319. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  320. * enc_flag */
  321. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  322. * time_flag */
  323. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  324. * wico interrupt */
  325. u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
  326. u32 wait_event; /* wait event() caller address */
  327. u32 l2p_control; /* L2pControlField */
  328. u32 l2p_duration; /* L2pDurationField */
  329. u32 l2p_mhvalid; /* L2pMhValidBits */
  330. u32 l2p_addr_match; /* L2pAddrMatchStat */
  331. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  332. * (LMPM_PMG_SEL) */
  333. u32 u_timestamp; /* indicate when the date and time of the
  334. * compilation */
  335. u32 flow_handler; /* FH read/write pointers, RX credit */
  336. } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
  337. struct iwl_error_event_table {
  338. u32 valid; /* (nonzero) valid, (0) log is empty */
  339. u32 error_id; /* type of error */
  340. u32 pc; /* program counter */
  341. u32 blink1; /* branch link */
  342. u32 blink2; /* branch link */
  343. u32 ilink1; /* interrupt link */
  344. u32 ilink2; /* interrupt link */
  345. u32 data1; /* error-specific data */
  346. u32 data2; /* error-specific data */
  347. u32 data3; /* error-specific data */
  348. u32 bcon_time; /* beacon timer */
  349. u32 tsf_low; /* network timestamp function timer */
  350. u32 tsf_hi; /* network timestamp function timer */
  351. u32 gp1; /* GP1 timer register */
  352. u32 gp2; /* GP2 timer register */
  353. u32 gp3; /* GP3 timer register */
  354. u32 major; /* uCode version major */
  355. u32 minor; /* uCode version minor */
  356. u32 hw_ver; /* HW Silicon version */
  357. u32 brd_ver; /* HW board version */
  358. u32 log_pc; /* log program counter */
  359. u32 frame_ptr; /* frame pointer */
  360. u32 stack_ptr; /* stack pointer */
  361. u32 hcmd; /* last host command header */
  362. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  363. * rxtx_flag */
  364. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  365. * host_flag */
  366. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  367. * enc_flag */
  368. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  369. * time_flag */
  370. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  371. * wico interrupt */
  372. u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
  373. u32 wait_event; /* wait event() caller address */
  374. u32 l2p_control; /* L2pControlField */
  375. u32 l2p_duration; /* L2pDurationField */
  376. u32 l2p_mhvalid; /* L2pMhValidBits */
  377. u32 l2p_addr_match; /* L2pAddrMatchStat */
  378. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  379. * (LMPM_PMG_SEL) */
  380. u32 u_timestamp; /* indicate when the date and time of the
  381. * compilation */
  382. u32 flow_handler; /* FH read/write pointers, RX credit */
  383. } __packed /* LOG_ERROR_TABLE_API_S_VER_2 */;
  384. /*
  385. * UMAC error struct - relevant starting from family 8000 chip.
  386. * Note: This structure is read from the device with IO accesses,
  387. * and the reading already does the endian conversion. As it is
  388. * read with u32-sized accesses, any members with a different size
  389. * need to be ordered correctly though!
  390. */
  391. struct iwl_umac_error_event_table {
  392. u32 valid; /* (nonzero) valid, (0) log is empty */
  393. u32 error_id; /* type of error */
  394. u32 blink1; /* branch link */
  395. u32 blink2; /* branch link */
  396. u32 ilink1; /* interrupt link */
  397. u32 ilink2; /* interrupt link */
  398. u32 data1; /* error-specific data */
  399. u32 data2; /* error-specific data */
  400. u32 data3; /* error-specific data */
  401. u32 umac_major;
  402. u32 umac_minor;
  403. u32 frame_pointer; /* core register 27*/
  404. u32 stack_pointer; /* core register 28 */
  405. u32 cmd_header; /* latest host cmd sent to UMAC */
  406. u32 nic_isr_pref; /* ISR status register */
  407. } __packed;
  408. #define ERROR_START_OFFSET (1 * sizeof(u32))
  409. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  410. static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
  411. {
  412. struct iwl_trans *trans = mvm->trans;
  413. struct iwl_umac_error_event_table table;
  414. u32 base;
  415. base = mvm->umac_error_event_table;
  416. if (base < 0x800000) {
  417. IWL_ERR(mvm,
  418. "Not valid error log pointer 0x%08X for %s uCode\n",
  419. base,
  420. (mvm->cur_ucode == IWL_UCODE_INIT)
  421. ? "Init" : "RT");
  422. return;
  423. }
  424. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  425. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  426. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  427. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  428. mvm->status, table.valid);
  429. }
  430. IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
  431. desc_lookup(table.error_id));
  432. IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
  433. IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
  434. IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
  435. IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
  436. IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
  437. IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
  438. IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
  439. IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
  440. IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
  441. IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
  442. IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
  443. IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
  444. IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
  445. }
  446. static void iwl_mvm_dump_nic_error_log_old(struct iwl_mvm *mvm)
  447. {
  448. struct iwl_trans *trans = mvm->trans;
  449. struct iwl_error_event_table_v1 table;
  450. u32 base;
  451. base = mvm->error_event_table;
  452. if (mvm->cur_ucode == IWL_UCODE_INIT) {
  453. if (!base)
  454. base = mvm->fw->init_errlog_ptr;
  455. } else {
  456. if (!base)
  457. base = mvm->fw->inst_errlog_ptr;
  458. }
  459. if (base < 0x800000) {
  460. IWL_ERR(mvm,
  461. "Not valid error log pointer 0x%08X for %s uCode\n",
  462. base,
  463. (mvm->cur_ucode == IWL_UCODE_INIT)
  464. ? "Init" : "RT");
  465. return;
  466. }
  467. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  468. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  469. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  470. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  471. mvm->status, table.valid);
  472. }
  473. /* Do not change this output - scripts rely on it */
  474. IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
  475. trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low,
  476. table.data1, table.data2, table.data3,
  477. table.blink1, table.blink2, table.ilink1,
  478. table.ilink2, table.bcon_time, table.gp1,
  479. table.gp2, table.gp3, table.ucode_ver, 0,
  480. table.hw_ver, table.brd_ver);
  481. IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
  482. desc_lookup(table.error_id));
  483. IWL_ERR(mvm, "0x%08X | uPc\n", table.pc);
  484. IWL_ERR(mvm, "0x%08X | branchlink1\n", table.blink1);
  485. IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
  486. IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
  487. IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
  488. IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
  489. IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
  490. IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
  491. IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
  492. IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
  493. IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
  494. IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
  495. IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
  496. IWL_ERR(mvm, "0x%08X | time gp3\n", table.gp3);
  497. IWL_ERR(mvm, "0x%08X | uCode version\n", table.ucode_ver);
  498. IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
  499. IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
  500. IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
  501. IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
  502. IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
  503. IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
  504. IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
  505. IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
  506. IWL_ERR(mvm, "0x%08X | isr_pref\n", table.isr_pref);
  507. IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
  508. IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
  509. IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
  510. IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
  511. IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
  512. IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
  513. IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
  514. IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
  515. if (mvm->support_umac_log)
  516. iwl_mvm_dump_umac_error_log(mvm);
  517. }
  518. void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
  519. {
  520. struct iwl_trans *trans = mvm->trans;
  521. struct iwl_error_event_table table;
  522. u32 base;
  523. if (!fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_NEW_VERSION)) {
  524. iwl_mvm_dump_nic_error_log_old(mvm);
  525. return;
  526. }
  527. base = mvm->error_event_table;
  528. if (mvm->cur_ucode == IWL_UCODE_INIT) {
  529. if (!base)
  530. base = mvm->fw->init_errlog_ptr;
  531. } else {
  532. if (!base)
  533. base = mvm->fw->inst_errlog_ptr;
  534. }
  535. if (base < 0x800000) {
  536. IWL_ERR(mvm,
  537. "Not valid error log pointer 0x%08X for %s uCode\n",
  538. base,
  539. (mvm->cur_ucode == IWL_UCODE_INIT)
  540. ? "Init" : "RT");
  541. return;
  542. }
  543. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  544. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  545. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  546. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  547. mvm->status, table.valid);
  548. }
  549. /* Do not change this output - scripts rely on it */
  550. IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
  551. trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low,
  552. table.data1, table.data2, table.data3,
  553. table.blink1, table.blink2, table.ilink1,
  554. table.ilink2, table.bcon_time, table.gp1,
  555. table.gp2, table.gp3, table.major,
  556. table.minor, table.hw_ver, table.brd_ver);
  557. IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
  558. desc_lookup(table.error_id));
  559. IWL_ERR(mvm, "0x%08X | uPc\n", table.pc);
  560. IWL_ERR(mvm, "0x%08X | branchlink1\n", table.blink1);
  561. IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
  562. IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
  563. IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
  564. IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
  565. IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
  566. IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
  567. IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
  568. IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
  569. IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
  570. IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
  571. IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
  572. IWL_ERR(mvm, "0x%08X | time gp3\n", table.gp3);
  573. IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
  574. IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
  575. IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
  576. IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
  577. IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
  578. IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
  579. IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
  580. IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
  581. IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
  582. IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
  583. IWL_ERR(mvm, "0x%08X | isr_pref\n", table.isr_pref);
  584. IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
  585. IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
  586. IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
  587. IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
  588. IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
  589. IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
  590. IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
  591. IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
  592. if (mvm->support_umac_log)
  593. iwl_mvm_dump_umac_error_log(mvm);
  594. }
  595. int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 minq, u8 maxq)
  596. {
  597. int i;
  598. lockdep_assert_held(&mvm->queue_info_lock);
  599. for (i = minq; i <= maxq; i++)
  600. if (mvm->queue_info[i].hw_queue_refcount == 0 &&
  601. !mvm->queue_info[i].setup_reserved)
  602. return i;
  603. return -ENOSPC;
  604. }
  605. void iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  606. u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
  607. unsigned int wdg_timeout)
  608. {
  609. bool enable_queue = true;
  610. spin_lock_bh(&mvm->queue_info_lock);
  611. /* Make sure this TID isn't already enabled */
  612. if (mvm->queue_info[queue].tid_bitmap & BIT(cfg->tid)) {
  613. spin_unlock_bh(&mvm->queue_info_lock);
  614. IWL_ERR(mvm, "Trying to enable TXQ with existing TID %d\n",
  615. cfg->tid);
  616. return;
  617. }
  618. /* Update mappings and refcounts */
  619. mvm->queue_info[queue].hw_queue_to_mac80211 |= BIT(mac80211_queue);
  620. mvm->queue_info[queue].hw_queue_refcount++;
  621. if (mvm->queue_info[queue].hw_queue_refcount > 1)
  622. enable_queue = false;
  623. mvm->queue_info[queue].tid_bitmap |= BIT(cfg->tid);
  624. IWL_DEBUG_TX_QUEUES(mvm,
  625. "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  626. queue, mvm->queue_info[queue].hw_queue_refcount,
  627. mvm->queue_info[queue].hw_queue_to_mac80211);
  628. spin_unlock_bh(&mvm->queue_info_lock);
  629. /* Send the enabling command if we need to */
  630. if (enable_queue) {
  631. struct iwl_scd_txq_cfg_cmd cmd = {
  632. .scd_queue = queue,
  633. .enable = 1,
  634. .window = cfg->frame_limit,
  635. .sta_id = cfg->sta_id,
  636. .ssn = cpu_to_le16(ssn),
  637. .tx_fifo = cfg->fifo,
  638. .aggregate = cfg->aggregate,
  639. .tid = cfg->tid,
  640. };
  641. iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn, NULL,
  642. wdg_timeout);
  643. WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd),
  644. &cmd),
  645. "Failed to configure queue %d on FIFO %d\n", queue,
  646. cfg->fifo);
  647. }
  648. }
  649. void iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  650. u8 tid, u8 flags)
  651. {
  652. struct iwl_scd_txq_cfg_cmd cmd = {
  653. .scd_queue = queue,
  654. .enable = 0,
  655. };
  656. bool remove_mac_queue = true;
  657. int ret;
  658. spin_lock_bh(&mvm->queue_info_lock);
  659. if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
  660. spin_unlock_bh(&mvm->queue_info_lock);
  661. return;
  662. }
  663. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  664. /*
  665. * If there is another TID with the same AC - don't remove the MAC queue
  666. * from the mapping
  667. */
  668. if (tid < IWL_MAX_TID_COUNT) {
  669. unsigned long tid_bitmap =
  670. mvm->queue_info[queue].tid_bitmap;
  671. int ac = tid_to_mac80211_ac[tid];
  672. int i;
  673. for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
  674. if (tid_to_mac80211_ac[i] == ac)
  675. remove_mac_queue = false;
  676. }
  677. }
  678. if (remove_mac_queue)
  679. mvm->queue_info[queue].hw_queue_to_mac80211 &=
  680. ~BIT(mac80211_queue);
  681. mvm->queue_info[queue].hw_queue_refcount--;
  682. cmd.enable = mvm->queue_info[queue].hw_queue_refcount ? 1 : 0;
  683. IWL_DEBUG_TX_QUEUES(mvm,
  684. "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  685. queue,
  686. mvm->queue_info[queue].hw_queue_refcount,
  687. mvm->queue_info[queue].hw_queue_to_mac80211);
  688. /* If the queue is still enabled - nothing left to do in this func */
  689. if (cmd.enable) {
  690. spin_unlock_bh(&mvm->queue_info_lock);
  691. return;
  692. }
  693. /* Make sure queue info is correct even though we overwrite it */
  694. WARN(mvm->queue_info[queue].hw_queue_refcount ||
  695. mvm->queue_info[queue].tid_bitmap ||
  696. mvm->queue_info[queue].hw_queue_to_mac80211,
  697. "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
  698. queue, mvm->queue_info[queue].hw_queue_refcount,
  699. mvm->queue_info[queue].hw_queue_to_mac80211,
  700. mvm->queue_info[queue].tid_bitmap);
  701. /* If we are here - the queue is freed and we can zero out these vals */
  702. mvm->queue_info[queue].hw_queue_refcount = 0;
  703. mvm->queue_info[queue].tid_bitmap = 0;
  704. mvm->queue_info[queue].hw_queue_to_mac80211 = 0;
  705. spin_unlock_bh(&mvm->queue_info_lock);
  706. iwl_trans_txq_disable(mvm->trans, queue, false);
  707. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
  708. sizeof(cmd), &cmd);
  709. if (ret)
  710. IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n",
  711. queue, ret);
  712. }
  713. /**
  714. * iwl_mvm_send_lq_cmd() - Send link quality command
  715. * @init: This command is sent as part of station initialization right
  716. * after station has been added.
  717. *
  718. * The link quality command is sent as the last step of station creation.
  719. * This is the special case in which init is set and we call a callback in
  720. * this case to clear the state indicating that station creation is in
  721. * progress.
  722. */
  723. int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init)
  724. {
  725. struct iwl_host_cmd cmd = {
  726. .id = LQ_CMD,
  727. .len = { sizeof(struct iwl_lq_cmd), },
  728. .flags = init ? 0 : CMD_ASYNC,
  729. .data = { lq, },
  730. };
  731. if (WARN_ON(lq->sta_id == IWL_MVM_STATION_COUNT))
  732. return -EINVAL;
  733. return iwl_mvm_send_cmd(mvm, &cmd);
  734. }
  735. /**
  736. * iwl_mvm_update_smps - Get a request to change the SMPS mode
  737. * @req_type: The part of the driver who call for a change.
  738. * @smps_requests: The request to change the SMPS mode.
  739. *
  740. * Get a requst to change the SMPS mode,
  741. * and change it according to all other requests in the driver.
  742. */
  743. void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  744. enum iwl_mvm_smps_type_request req_type,
  745. enum ieee80211_smps_mode smps_request)
  746. {
  747. struct iwl_mvm_vif *mvmvif;
  748. enum ieee80211_smps_mode smps_mode;
  749. int i;
  750. lockdep_assert_held(&mvm->mutex);
  751. /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
  752. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  753. return;
  754. if (vif->type == NL80211_IFTYPE_AP)
  755. smps_mode = IEEE80211_SMPS_OFF;
  756. else
  757. smps_mode = IEEE80211_SMPS_AUTOMATIC;
  758. mvmvif = iwl_mvm_vif_from_mac80211(vif);
  759. mvmvif->smps_requests[req_type] = smps_request;
  760. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  761. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
  762. smps_mode = IEEE80211_SMPS_STATIC;
  763. break;
  764. }
  765. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  766. smps_mode = IEEE80211_SMPS_DYNAMIC;
  767. }
  768. ieee80211_request_smps(vif, smps_mode);
  769. }
  770. int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
  771. {
  772. struct iwl_statistics_cmd scmd = {
  773. .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
  774. };
  775. struct iwl_host_cmd cmd = {
  776. .id = STATISTICS_CMD,
  777. .len[0] = sizeof(scmd),
  778. .data[0] = &scmd,
  779. .flags = CMD_WANT_SKB,
  780. };
  781. int ret;
  782. ret = iwl_mvm_send_cmd(mvm, &cmd);
  783. if (ret)
  784. return ret;
  785. iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
  786. iwl_free_resp(&cmd);
  787. if (clear)
  788. iwl_mvm_accu_radio_stats(mvm);
  789. return 0;
  790. }
  791. void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
  792. {
  793. mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
  794. mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
  795. mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
  796. mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
  797. }
  798. static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
  799. struct ieee80211_vif *vif)
  800. {
  801. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  802. bool *result = _data;
  803. int i;
  804. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  805. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
  806. mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  807. *result = false;
  808. }
  809. }
  810. bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
  811. {
  812. bool result = true;
  813. lockdep_assert_held(&mvm->mutex);
  814. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  815. return false;
  816. if (mvm->cfg->rx_with_siso_diversity)
  817. return false;
  818. ieee80211_iterate_active_interfaces_atomic(
  819. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  820. iwl_mvm_diversity_iter, &result);
  821. return result;
  822. }
  823. int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  824. bool value)
  825. {
  826. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  827. int res;
  828. lockdep_assert_held(&mvm->mutex);
  829. if (mvmvif->low_latency == value)
  830. return 0;
  831. mvmvif->low_latency = value;
  832. res = iwl_mvm_update_quotas(mvm, false, NULL);
  833. if (res)
  834. return res;
  835. iwl_mvm_bt_coex_vif_change(mvm);
  836. return iwl_mvm_power_update_mac(mvm);
  837. }
  838. static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
  839. {
  840. bool *result = _data;
  841. if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif)))
  842. *result = true;
  843. }
  844. bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
  845. {
  846. bool result = false;
  847. ieee80211_iterate_active_interfaces_atomic(
  848. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  849. iwl_mvm_ll_iter, &result);
  850. return result;
  851. }
  852. struct iwl_bss_iter_data {
  853. struct ieee80211_vif *vif;
  854. bool error;
  855. };
  856. static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
  857. struct ieee80211_vif *vif)
  858. {
  859. struct iwl_bss_iter_data *data = _data;
  860. if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
  861. return;
  862. if (data->vif) {
  863. data->error = true;
  864. return;
  865. }
  866. data->vif = vif;
  867. }
  868. struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
  869. {
  870. struct iwl_bss_iter_data bss_iter_data = {};
  871. ieee80211_iterate_active_interfaces_atomic(
  872. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  873. iwl_mvm_bss_iface_iterator, &bss_iter_data);
  874. if (bss_iter_data.error) {
  875. IWL_ERR(mvm, "More than one managed interface active!\n");
  876. return ERR_PTR(-EINVAL);
  877. }
  878. return bss_iter_data.vif;
  879. }
  880. unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
  881. struct ieee80211_vif *vif,
  882. bool tdls, bool cmd_q)
  883. {
  884. struct iwl_fw_dbg_trigger_tlv *trigger;
  885. struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
  886. unsigned int default_timeout =
  887. cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout;
  888. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS))
  889. return iwlmvm_mod_params.tfd_q_hang_detect ?
  890. default_timeout : IWL_WATCHDOG_DISABLED;
  891. trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
  892. txq_timer = (void *)trigger->data;
  893. if (tdls)
  894. return le32_to_cpu(txq_timer->tdls);
  895. if (cmd_q)
  896. return le32_to_cpu(txq_timer->command_queue);
  897. if (WARN_ON(!vif))
  898. return default_timeout;
  899. switch (ieee80211_vif_type_p2p(vif)) {
  900. case NL80211_IFTYPE_ADHOC:
  901. return le32_to_cpu(txq_timer->ibss);
  902. case NL80211_IFTYPE_STATION:
  903. return le32_to_cpu(txq_timer->bss);
  904. case NL80211_IFTYPE_AP:
  905. return le32_to_cpu(txq_timer->softap);
  906. case NL80211_IFTYPE_P2P_CLIENT:
  907. return le32_to_cpu(txq_timer->p2p_client);
  908. case NL80211_IFTYPE_P2P_GO:
  909. return le32_to_cpu(txq_timer->p2p_go);
  910. case NL80211_IFTYPE_P2P_DEVICE:
  911. return le32_to_cpu(txq_timer->p2p_device);
  912. default:
  913. WARN_ON(1);
  914. return mvm->cfg->base_params->wd_timeout;
  915. }
  916. }
  917. void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  918. const char *errmsg)
  919. {
  920. struct iwl_fw_dbg_trigger_tlv *trig;
  921. struct iwl_fw_dbg_trigger_mlme *trig_mlme;
  922. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME))
  923. goto out;
  924. trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME);
  925. trig_mlme = (void *)trig->data;
  926. if (!iwl_fw_dbg_trigger_check_stop(mvm, vif, trig))
  927. goto out;
  928. if (trig_mlme->stop_connection_loss &&
  929. --trig_mlme->stop_connection_loss)
  930. goto out;
  931. iwl_mvm_fw_dbg_collect_trig(mvm, trig, "%s", errmsg);
  932. out:
  933. ieee80211_connection_loss(vif);
  934. }