eeprom.h 3.4 KB

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  1. /*
  2. * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
  3. * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #ifndef __MT7601U_EEPROM_H
  15. #define __MT7601U_EEPROM_H
  16. struct mt7601u_dev;
  17. #define MT7601U_EE_MAX_VER 0x0d
  18. #define MT7601U_EEPROM_SIZE 256
  19. #define MT7601U_DEFAULT_TX_POWER 6
  20. enum mt76_eeprom_field {
  21. MT_EE_CHIP_ID = 0x00,
  22. MT_EE_VERSION_FAE = 0x02,
  23. MT_EE_VERSION_EE = 0x03,
  24. MT_EE_MAC_ADDR = 0x04,
  25. MT_EE_NIC_CONF_0 = 0x34,
  26. MT_EE_NIC_CONF_1 = 0x36,
  27. MT_EE_COUNTRY_REGION = 0x39,
  28. MT_EE_FREQ_OFFSET = 0x3a,
  29. MT_EE_NIC_CONF_2 = 0x42,
  30. MT_EE_LNA_GAIN = 0x44,
  31. MT_EE_RSSI_OFFSET = 0x46,
  32. MT_EE_TX_POWER_DELTA_BW40 = 0x50,
  33. MT_EE_TX_POWER_OFFSET = 0x52,
  34. MT_EE_TX_TSSI_SLOPE = 0x6e,
  35. MT_EE_TX_TSSI_OFFSET_GROUP = 0x6f,
  36. MT_EE_TX_TSSI_OFFSET = 0x76,
  37. MT_EE_TX_TSSI_TARGET_POWER = 0xd0,
  38. MT_EE_REF_TEMP = 0xd1,
  39. MT_EE_FREQ_OFFSET_COMPENSATION = 0xdb,
  40. MT_EE_TX_POWER_BYRATE_BASE = 0xde,
  41. MT_EE_USAGE_MAP_START = 0x1e0,
  42. MT_EE_USAGE_MAP_END = 0x1fc,
  43. };
  44. #define MT_EE_NIC_CONF_0_RX_PATH GENMASK(3, 0)
  45. #define MT_EE_NIC_CONF_0_TX_PATH GENMASK(7, 4)
  46. #define MT_EE_NIC_CONF_0_BOARD_TYPE GENMASK(13, 12)
  47. #define MT_EE_NIC_CONF_1_HW_RF_CTRL BIT(0)
  48. #define MT_EE_NIC_CONF_1_TEMP_TX_ALC BIT(1)
  49. #define MT_EE_NIC_CONF_1_LNA_EXT_2G BIT(2)
  50. #define MT_EE_NIC_CONF_1_LNA_EXT_5G BIT(3)
  51. #define MT_EE_NIC_CONF_1_TX_ALC_EN BIT(13)
  52. #define MT_EE_NIC_CONF_2_RX_STREAM GENMASK(3, 0)
  53. #define MT_EE_NIC_CONF_2_TX_STREAM GENMASK(7, 4)
  54. #define MT_EE_NIC_CONF_2_HW_ANTDIV BIT(8)
  55. #define MT_EE_NIC_CONF_2_XTAL_OPTION GENMASK(10, 9)
  56. #define MT_EE_NIC_CONF_2_TEMP_DISABLE BIT(11)
  57. #define MT_EE_NIC_CONF_2_COEX_METHOD GENMASK(15, 13)
  58. #define MT_EE_TX_POWER_BYRATE(i) (MT_EE_TX_POWER_BYRATE_BASE + \
  59. (i) * 4)
  60. #define MT_EFUSE_USAGE_MAP_SIZE (MT_EE_USAGE_MAP_END - \
  61. MT_EE_USAGE_MAP_START + 1)
  62. enum mt7601u_eeprom_access_modes {
  63. MT_EE_READ = 0,
  64. MT_EE_PHYSICAL_READ = 1,
  65. };
  66. struct power_per_rate {
  67. u8 raw; /* validated s6 value */
  68. s8 bw20; /* sign-extended int */
  69. s8 bw40; /* sign-extended int */
  70. };
  71. /* Power per rate - one value per two rates */
  72. struct mt7601u_rate_power {
  73. struct power_per_rate cck[2];
  74. struct power_per_rate ofdm[4];
  75. struct power_per_rate ht[4];
  76. };
  77. struct reg_channel_bounds {
  78. u8 start;
  79. u8 num;
  80. };
  81. struct mt7601u_eeprom_params {
  82. bool tssi_enabled;
  83. u8 rf_freq_off;
  84. s8 rssi_offset[2];
  85. s8 ref_temp;
  86. s8 lna_gain;
  87. u8 chan_pwr[14];
  88. struct mt7601u_rate_power power_rate_table;
  89. s8 real_cck_bw20[2];
  90. /* TSSI stuff - only with internal TX ALC */
  91. struct tssi_data {
  92. int tx0_delta_offset;
  93. u8 slope;
  94. u8 offset[3];
  95. } tssi_data;
  96. struct reg_channel_bounds reg;
  97. };
  98. int mt7601u_eeprom_init(struct mt7601u_dev *dev);
  99. static inline u32 s6_validate(u32 reg)
  100. {
  101. WARN_ON(reg & ~GENMASK(5, 0));
  102. return reg & GENMASK(5, 0);
  103. }
  104. static inline int s6_to_int(u32 reg)
  105. {
  106. int s6;
  107. s6 = s6_validate(reg);
  108. if (s6 & BIT(5))
  109. s6 -= BIT(6);
  110. return s6;
  111. }
  112. static inline u32 int_to_s6(int val)
  113. {
  114. if (val < -0x20)
  115. return 0x20;
  116. if (val > 0x1f)
  117. return 0x1f;
  118. return val & 0x3f;
  119. }
  120. #endif