mac.h 4.8 KB

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  1. /*
  2. * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
  3. * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #ifndef __MT76_MAC_H
  15. #define __MT76_MAC_H
  16. struct mt76_tx_status {
  17. u8 valid:1;
  18. u8 success:1;
  19. u8 aggr:1;
  20. u8 ack_req:1;
  21. u8 is_probe:1;
  22. u8 wcid;
  23. u8 pktid;
  24. u8 retry;
  25. u16 rate;
  26. } __packed __aligned(2);
  27. /* Note: values in original "RSSI" and "SNR" fields are not actually what they
  28. * are called for MT7601U, names used by this driver are educated guesses
  29. * (see vendor mac/ral_omac.c).
  30. */
  31. struct mt7601u_rxwi {
  32. __le32 rxinfo;
  33. __le32 ctl;
  34. __le16 frag_sn;
  35. __le16 rate;
  36. u8 unknown;
  37. u8 zero[3];
  38. u8 snr;
  39. u8 ant;
  40. u8 gain;
  41. u8 freq_off;
  42. __le32 resv2;
  43. __le32 expert_ant;
  44. } __packed __aligned(4);
  45. #define MT_RXINFO_BA BIT(0)
  46. #define MT_RXINFO_DATA BIT(1)
  47. #define MT_RXINFO_NULL BIT(2)
  48. #define MT_RXINFO_FRAG BIT(3)
  49. #define MT_RXINFO_U2M BIT(4)
  50. #define MT_RXINFO_MULTICAST BIT(5)
  51. #define MT_RXINFO_BROADCAST BIT(6)
  52. #define MT_RXINFO_MYBSS BIT(7)
  53. #define MT_RXINFO_CRCERR BIT(8)
  54. #define MT_RXINFO_ICVERR BIT(9)
  55. #define MT_RXINFO_MICERR BIT(10)
  56. #define MT_RXINFO_AMSDU BIT(11)
  57. #define MT_RXINFO_HTC BIT(12)
  58. #define MT_RXINFO_RSSI BIT(13)
  59. #define MT_RXINFO_L2PAD BIT(14)
  60. #define MT_RXINFO_AMPDU BIT(15)
  61. #define MT_RXINFO_DECRYPT BIT(16)
  62. #define MT_RXINFO_BSSIDX3 BIT(17)
  63. #define MT_RXINFO_WAPI_KEY BIT(18)
  64. #define MT_RXINFO_PN_LEN GENMASK(21, 19)
  65. #define MT_RXINFO_SW_PKT_80211 BIT(22)
  66. #define MT_RXINFO_TCP_SUM_BYPASS BIT(28)
  67. #define MT_RXINFO_IP_SUM_BYPASS BIT(29)
  68. #define MT_RXINFO_TCP_SUM_ERR BIT(30)
  69. #define MT_RXINFO_IP_SUM_ERR BIT(31)
  70. #define MT_RXWI_CTL_WCID GENMASK(7, 0)
  71. #define MT_RXWI_CTL_KEY_IDX GENMASK(9, 8)
  72. #define MT_RXWI_CTL_BSS_IDX GENMASK(12, 10)
  73. #define MT_RXWI_CTL_UDF GENMASK(15, 13)
  74. #define MT_RXWI_CTL_MPDU_LEN GENMASK(27, 16)
  75. #define MT_RXWI_CTL_TID GENMASK(31, 28)
  76. #define MT_RXWI_FRAG GENMASK(3, 0)
  77. #define MT_RXWI_SN GENMASK(15, 4)
  78. #define MT_RXWI_RATE_MCS GENMASK(6, 0)
  79. #define MT_RXWI_RATE_BW BIT(7)
  80. #define MT_RXWI_RATE_SGI BIT(8)
  81. #define MT_RXWI_RATE_STBC GENMASK(10, 9)
  82. #define MT_RXWI_RATE_ETXBF BIT(11)
  83. #define MT_RXWI_RATE_SND BIT(12)
  84. #define MT_RXWI_RATE_ITXBF BIT(13)
  85. #define MT_RXWI_RATE_PHY GENMASK(15, 14)
  86. #define MT_RXWI_GAIN_RSSI_VAL GENMASK(5, 0)
  87. #define MT_RXWI_GAIN_RSSI_LNA_ID GENMASK(7, 6)
  88. #define MT_RXWI_ANT_AUX_LNA BIT(7)
  89. #define MT_RXWI_EANT_ENC_ANT_ID GENMASK(7, 0)
  90. enum mt76_phy_type {
  91. MT_PHY_TYPE_CCK,
  92. MT_PHY_TYPE_OFDM,
  93. MT_PHY_TYPE_HT,
  94. MT_PHY_TYPE_HT_GF,
  95. };
  96. enum mt76_phy_bandwidth {
  97. MT_PHY_BW_20,
  98. MT_PHY_BW_40,
  99. };
  100. struct mt76_txwi {
  101. __le16 flags;
  102. __le16 rate_ctl;
  103. u8 ack_ctl;
  104. u8 wcid;
  105. __le16 len_ctl;
  106. __le32 iv;
  107. __le32 eiv;
  108. u8 aid;
  109. u8 txstream;
  110. __le16 ctl;
  111. } __packed __aligned(4);
  112. #define MT_TXWI_FLAGS_FRAG BIT(0)
  113. #define MT_TXWI_FLAGS_MMPS BIT(1)
  114. #define MT_TXWI_FLAGS_CFACK BIT(2)
  115. #define MT_TXWI_FLAGS_TS BIT(3)
  116. #define MT_TXWI_FLAGS_AMPDU BIT(4)
  117. #define MT_TXWI_FLAGS_MPDU_DENSITY GENMASK(7, 5)
  118. #define MT_TXWI_FLAGS_TXOP GENMASK(9, 8)
  119. #define MT_TXWI_FLAGS_CWMIN GENMASK(12, 10)
  120. #define MT_TXWI_FLAGS_NO_RATE_FALLBACK BIT(13)
  121. #define MT_TXWI_FLAGS_TX_RPT BIT(14)
  122. #define MT_TXWI_FLAGS_TX_RATE_LUT BIT(15)
  123. #define MT_TXWI_RATE_MCS GENMASK(6, 0)
  124. #define MT_TXWI_RATE_BW BIT(7)
  125. #define MT_TXWI_RATE_SGI BIT(8)
  126. #define MT_TXWI_RATE_STBC GENMASK(10, 9)
  127. #define MT_TXWI_RATE_PHY_MODE GENMASK(15, 14)
  128. #define MT_TXWI_ACK_CTL_REQ BIT(0)
  129. #define MT_TXWI_ACK_CTL_NSEQ BIT(1)
  130. #define MT_TXWI_ACK_CTL_BA_WINDOW GENMASK(7, 2)
  131. #define MT_TXWI_LEN_BYTE_CNT GENMASK(11, 0)
  132. #define MT_TXWI_LEN_PKTID GENMASK(15, 12)
  133. #define MT_TXWI_CTL_TX_POWER_ADJ GENMASK(3, 0)
  134. #define MT_TXWI_CTL_CHAN_CHECK_PKT BIT(4)
  135. #define MT_TXWI_CTL_PIFS_REV BIT(6)
  136. u32 mt76_mac_process_rx(struct mt7601u_dev *dev, struct sk_buff *skb,
  137. u8 *data, void *rxi);
  138. int mt76_mac_wcid_set_key(struct mt7601u_dev *dev, u8 idx,
  139. struct ieee80211_key_conf *key);
  140. void mt76_mac_wcid_set_rate(struct mt7601u_dev *dev, struct mt76_wcid *wcid,
  141. const struct ieee80211_tx_rate *rate);
  142. int mt76_mac_shared_key_setup(struct mt7601u_dev *dev, u8 vif_idx, u8 key_idx,
  143. struct ieee80211_key_conf *key);
  144. u16 mt76_mac_tx_rate_val(struct mt7601u_dev *dev,
  145. const struct ieee80211_tx_rate *rate, u8 *nss_val);
  146. struct mt76_tx_status
  147. mt7601u_mac_fetch_tx_status(struct mt7601u_dev *dev);
  148. void mt76_send_tx_status(struct mt7601u_dev *dev, struct mt76_tx_status *stat);
  149. #endif