trx.c 19 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #include "../wifi.h"
  26. #include "../pci.h"
  27. #include "../base.h"
  28. #include "../stats.h"
  29. #include "reg.h"
  30. #include "def.h"
  31. #include "phy.h"
  32. #include "trx.h"
  33. #include "led.h"
  34. static u8 _rtl8723e_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
  35. {
  36. __le16 fc = rtl_get_fc(skb);
  37. if (unlikely(ieee80211_is_beacon(fc)))
  38. return QSLT_BEACON;
  39. if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  40. return QSLT_MGNT;
  41. return skb->priority;
  42. }
  43. static void _rtl8723e_query_rxphystatus(struct ieee80211_hw *hw,
  44. struct rtl_stats *pstatus, u8 *pdesc,
  45. struct rx_fwinfo_8723e *p_drvinfo,
  46. bool bpacket_match_bssid,
  47. bool bpacket_toself, bool packet_beacon)
  48. {
  49. struct rtl_priv *rtlpriv = rtl_priv(hw);
  50. struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
  51. struct phy_sts_cck_8723e_t *cck_buf;
  52. s8 rx_pwr_all = 0, rx_pwr[4];
  53. u8 rf_rx_num = 0, evm, pwdb_all;
  54. u8 i, max_spatial_stream;
  55. u32 rssi, total_rssi = 0;
  56. bool is_cck = pstatus->is_cck;
  57. /* Record it for next packet processing */
  58. pstatus->packet_matchbssid = bpacket_match_bssid;
  59. pstatus->packet_toself = bpacket_toself;
  60. pstatus->packet_beacon = packet_beacon;
  61. pstatus->rx_mimo_signalquality[0] = -1;
  62. pstatus->rx_mimo_signalquality[1] = -1;
  63. if (is_cck) {
  64. u8 report, cck_highpwr;
  65. /* CCK Driver info Structure is not the same as OFDM packet. */
  66. cck_buf = (struct phy_sts_cck_8723e_t *)p_drvinfo;
  67. /* (1)Hardware does not provide RSSI for CCK */
  68. /* (2)PWDB, Average PWDB cacluated by
  69. * hardware (for rate adaptive)
  70. */
  71. if (ppsc->rfpwr_state == ERFON)
  72. cck_highpwr = (u8)rtl_get_bbreg(hw,
  73. RFPGA0_XA_HSSIPARAMETER2,
  74. BIT(9));
  75. else
  76. cck_highpwr = false;
  77. if (!cck_highpwr) {
  78. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  79. report = cck_buf->cck_agc_rpt & 0xc0;
  80. report = report >> 6;
  81. switch (report) {
  82. case 0x3:
  83. rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
  84. break;
  85. case 0x2:
  86. rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
  87. break;
  88. case 0x1:
  89. rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
  90. break;
  91. case 0x0:
  92. rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
  93. break;
  94. }
  95. } else {
  96. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  97. report = p_drvinfo->cfosho[0] & 0x60;
  98. report = report >> 5;
  99. switch (report) {
  100. case 0x3:
  101. rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
  102. break;
  103. case 0x2:
  104. rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
  105. break;
  106. case 0x1:
  107. rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
  108. break;
  109. case 0x0:
  110. rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
  111. break;
  112. }
  113. }
  114. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  115. /* CCK gain is smaller than OFDM/MCS gain, */
  116. /* so we add gain diff by experiences,
  117. * the val is 6
  118. */
  119. pwdb_all += 6;
  120. if (pwdb_all > 100)
  121. pwdb_all = 100;
  122. /* modify the offset to make the same
  123. * gain index with OFDM.
  124. */
  125. if (pwdb_all > 34 && pwdb_all <= 42)
  126. pwdb_all -= 2;
  127. else if (pwdb_all > 26 && pwdb_all <= 34)
  128. pwdb_all -= 6;
  129. else if (pwdb_all > 14 && pwdb_all <= 26)
  130. pwdb_all -= 8;
  131. else if (pwdb_all > 4 && pwdb_all <= 14)
  132. pwdb_all -= 4;
  133. pstatus->rx_pwdb_all = pwdb_all;
  134. pstatus->recvsignalpower = rx_pwr_all;
  135. /* (3) Get Signal Quality (EVM) */
  136. if (bpacket_match_bssid) {
  137. u8 sq;
  138. if (pstatus->rx_pwdb_all > 40)
  139. sq = 100;
  140. else {
  141. sq = cck_buf->sq_rpt;
  142. if (sq > 64)
  143. sq = 0;
  144. else if (sq < 20)
  145. sq = 100;
  146. else
  147. sq = ((64 - sq) * 100) / 44;
  148. }
  149. pstatus->signalquality = sq;
  150. pstatus->rx_mimo_signalquality[0] = sq;
  151. pstatus->rx_mimo_signalquality[1] = -1;
  152. }
  153. } else {
  154. rtlpriv->dm.rfpath_rxenable[0] =
  155. rtlpriv->dm.rfpath_rxenable[1] = true;
  156. /* (1)Get RSSI for HT rate */
  157. for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
  158. /* we will judge RF RX path now. */
  159. if (rtlpriv->dm.rfpath_rxenable[i])
  160. rf_rx_num++;
  161. rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
  162. 0x3f) * 2) - 110;
  163. /* Translate DBM to percentage. */
  164. rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
  165. total_rssi += rssi;
  166. /* Get Rx snr value in DB */
  167. rtlpriv->stats.rx_snr_db[i] =
  168. (long)(p_drvinfo->rxsnr[i] / 2);
  169. /* Record Signal Strength for next packet */
  170. if (bpacket_match_bssid)
  171. pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
  172. }
  173. /* (2)PWDB, Average PWDB cacluated by
  174. * hardware (for rate adaptive)
  175. */
  176. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  177. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  178. pstatus->rx_pwdb_all = pwdb_all;
  179. pstatus->rxpower = rx_pwr_all;
  180. pstatus->recvsignalpower = rx_pwr_all;
  181. /* (3)EVM of HT rate */
  182. if (pstatus->is_ht && pstatus->rate >= DESC92C_RATEMCS8 &&
  183. pstatus->rate <= DESC92C_RATEMCS15)
  184. max_spatial_stream = 2;
  185. else
  186. max_spatial_stream = 1;
  187. for (i = 0; i < max_spatial_stream; i++) {
  188. evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  189. if (bpacket_match_bssid) {
  190. /* Fill value in RFD, Get the first
  191. * spatial stream only
  192. */
  193. if (i == 0)
  194. pstatus->signalquality =
  195. (u8)(evm & 0xff);
  196. pstatus->rx_mimo_signalquality[i] =
  197. (u8)(evm & 0xff);
  198. }
  199. }
  200. }
  201. /* UI BSS List signal strength(in percentage),
  202. * make it good looking, from 0~100.
  203. */
  204. if (is_cck)
  205. pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
  206. pwdb_all));
  207. else if (rf_rx_num != 0)
  208. pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
  209. total_rssi /= rf_rx_num));
  210. }
  211. static void translate_rx_signal_stuff(struct ieee80211_hw *hw,
  212. struct sk_buff *skb,
  213. struct rtl_stats *pstatus, u8 *pdesc,
  214. struct rx_fwinfo_8723e *p_drvinfo)
  215. {
  216. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  217. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  218. struct ieee80211_hdr *hdr;
  219. u8 *tmp_buf;
  220. u8 *praddr;
  221. /*u8 *psaddr;*/
  222. u16 fc, type;
  223. bool packet_matchbssid, packet_toself, packet_beacon;
  224. tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
  225. hdr = (struct ieee80211_hdr *)tmp_buf;
  226. fc = le16_to_cpu(hdr->frame_control);
  227. type = WLAN_FC_GET_TYPE(hdr->frame_control);
  228. praddr = hdr->addr1;
  229. packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
  230. (ether_addr_equal(mac->bssid, (fc & IEEE80211_FCTL_TODS) ?
  231. hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
  232. hdr->addr2 : hdr->addr3)) &&
  233. (!pstatus->hwerror) &&
  234. (!pstatus->crc) && (!pstatus->icv));
  235. packet_toself = packet_matchbssid &&
  236. (ether_addr_equal(praddr, rtlefuse->dev_addr));
  237. if (ieee80211_is_beacon(hdr->frame_control))
  238. packet_beacon = true;
  239. else
  240. packet_beacon = false;
  241. _rtl8723e_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
  242. packet_matchbssid, packet_toself,
  243. packet_beacon);
  244. rtl_process_phyinfo(hw, tmp_buf, pstatus);
  245. }
  246. bool rtl8723e_rx_query_desc(struct ieee80211_hw *hw,
  247. struct rtl_stats *status,
  248. struct ieee80211_rx_status *rx_status,
  249. u8 *pdesc, struct sk_buff *skb)
  250. {
  251. struct rx_fwinfo_8723e *p_drvinfo;
  252. struct ieee80211_hdr *hdr;
  253. u32 phystatus = GET_RX_DESC_PHYST(pdesc);
  254. status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc);
  255. status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
  256. RX_DRV_INFO_SIZE_UNIT;
  257. status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03);
  258. status->icv = (u16)GET_RX_DESC_ICV(pdesc);
  259. status->crc = (u16)GET_RX_DESC_CRC32(pdesc);
  260. status->hwerror = (status->crc | status->icv);
  261. status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
  262. status->rate = (u8)GET_RX_DESC_RXMCS(pdesc);
  263. status->shortpreamble = (u16)GET_RX_DESC_SPLCP(pdesc);
  264. status->isampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
  265. status->isfirst_ampdu = (bool)((GET_RX_DESC_PAGGR(pdesc) == 1) &&
  266. (GET_RX_DESC_FAGGR(pdesc) == 1));
  267. status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
  268. status->rx_is40Mhzpacket = (bool)GET_RX_DESC_BW(pdesc);
  269. status->is_ht = (bool)GET_RX_DESC_RXHT(pdesc);
  270. status->is_cck = RX_HAL_IS_CCK_RATE(status->rate);
  271. rx_status->freq = hw->conf.chandef.chan->center_freq;
  272. rx_status->band = hw->conf.chandef.chan->band;
  273. hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size
  274. + status->rx_bufshift);
  275. if (status->crc)
  276. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  277. if (status->rx_is40Mhzpacket)
  278. rx_status->flag |= RX_FLAG_40MHZ;
  279. if (status->is_ht)
  280. rx_status->flag |= RX_FLAG_HT;
  281. rx_status->flag |= RX_FLAG_MACTIME_START;
  282. /* hw will set status->decrypted true, if it finds the
  283. * frame is open data frame or mgmt frame.
  284. * So hw will not decryption robust managment frame
  285. * for IEEE80211w but still set status->decrypted
  286. * true, so here we should set it back to undecrypted
  287. * for IEEE80211w frame, and mac80211 sw will help
  288. * to decrypt it
  289. */
  290. if (status->decrypted) {
  291. if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
  292. (ieee80211_has_protected(hdr->frame_control)))
  293. rx_status->flag |= RX_FLAG_DECRYPTED;
  294. else
  295. rx_status->flag &= ~RX_FLAG_DECRYPTED;
  296. }
  297. /* rate_idx: index of data rate into band's
  298. * supported rates or MCS index if HT rates
  299. * are use (RX_FLAG_HT)
  300. * Notice: this is diff with windows define
  301. */
  302. rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
  303. false, status->rate);
  304. rx_status->mactime = status->timestamp_low;
  305. if (phystatus == true) {
  306. p_drvinfo = (struct rx_fwinfo_8723e *)(skb->data +
  307. status->rx_bufshift);
  308. translate_rx_signal_stuff(hw, skb, status, pdesc, p_drvinfo);
  309. }
  310. rx_status->signal = status->recvsignalpower + 10;
  311. return true;
  312. }
  313. void rtl8723e_tx_fill_desc(struct ieee80211_hw *hw,
  314. struct ieee80211_hdr *hdr, u8 *pdesc_tx,
  315. u8 *txbd, struct ieee80211_tx_info *info,
  316. struct ieee80211_sta *sta,
  317. struct sk_buff *skb,
  318. u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
  319. {
  320. struct rtl_priv *rtlpriv = rtl_priv(hw);
  321. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  322. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  323. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  324. bool b_defaultadapter = true;
  325. /* bool b_trigger_ac = false; */
  326. u8 *pdesc = (u8 *)pdesc_tx;
  327. u16 seq_number;
  328. __le16 fc = hdr->frame_control;
  329. u8 fw_qsel = _rtl8723e_map_hwqueue_to_fwqueue(skb, hw_queue);
  330. bool firstseg = ((hdr->seq_ctrl &
  331. cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
  332. bool lastseg = ((hdr->frame_control &
  333. cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
  334. dma_addr_t mapping = pci_map_single(rtlpci->pdev,
  335. skb->data, skb->len,
  336. PCI_DMA_TODEVICE);
  337. u8 bw_40 = 0;
  338. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  339. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  340. "DMA mapping error");
  341. return;
  342. }
  343. if (mac->opmode == NL80211_IFTYPE_STATION) {
  344. bw_40 = mac->bw_40;
  345. } else if (mac->opmode == NL80211_IFTYPE_AP ||
  346. mac->opmode == NL80211_IFTYPE_ADHOC) {
  347. if (sta)
  348. bw_40 = sta->ht_cap.cap &
  349. IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  350. }
  351. seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  352. rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
  353. CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_8723e));
  354. if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
  355. firstseg = true;
  356. lastseg = true;
  357. }
  358. if (firstseg) {
  359. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  360. SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
  361. if (ptcb_desc->use_shortgi || ptcb_desc->use_shortpreamble)
  362. SET_TX_DESC_DATA_SHORTGI(pdesc, 1);
  363. if (info->flags & IEEE80211_TX_CTL_AMPDU) {
  364. SET_TX_DESC_AGG_BREAK(pdesc, 1);
  365. SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
  366. }
  367. SET_TX_DESC_SEQ(pdesc, seq_number);
  368. SET_TX_DESC_RTS_ENABLE(pdesc,
  369. ((ptcb_desc->rts_enable &&
  370. !ptcb_desc->cts_enable) ? 1 : 0));
  371. SET_TX_DESC_HW_RTS_ENABLE(pdesc,
  372. ((ptcb_desc->rts_enable ||
  373. ptcb_desc->cts_enable) ? 1 : 0));
  374. SET_TX_DESC_CTS2SELF(pdesc,
  375. ((ptcb_desc->cts_enable) ? 1 : 0));
  376. SET_TX_DESC_RTS_STBC(pdesc,
  377. ((ptcb_desc->rts_stbc) ? 1 : 0));
  378. SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
  379. SET_TX_DESC_RTS_BW(pdesc, 0);
  380. SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
  381. SET_TX_DESC_RTS_SHORT(pdesc,
  382. ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
  383. (ptcb_desc->rts_use_shortpreamble ? 1 : 0)
  384. : (ptcb_desc->rts_use_shortgi ? 1 : 0)));
  385. if (bw_40) {
  386. if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
  387. SET_TX_DESC_DATA_BW(pdesc, 1);
  388. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
  389. } else {
  390. SET_TX_DESC_DATA_BW(pdesc, 0);
  391. SET_TX_DESC_TX_SUB_CARRIER(pdesc,
  392. mac->cur_40_prime_sc);
  393. }
  394. } else {
  395. SET_TX_DESC_DATA_BW(pdesc, 0);
  396. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
  397. }
  398. SET_TX_DESC_LINIP(pdesc, 0);
  399. SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb->len);
  400. if (sta) {
  401. u8 ampdu_density = sta->ht_cap.ampdu_density;
  402. SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
  403. }
  404. if (info->control.hw_key) {
  405. struct ieee80211_key_conf *keyconf =
  406. info->control.hw_key;
  407. switch (keyconf->cipher) {
  408. case WLAN_CIPHER_SUITE_WEP40:
  409. case WLAN_CIPHER_SUITE_WEP104:
  410. case WLAN_CIPHER_SUITE_TKIP:
  411. SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
  412. break;
  413. case WLAN_CIPHER_SUITE_CCMP:
  414. SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
  415. break;
  416. default:
  417. SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
  418. break;
  419. }
  420. }
  421. SET_TX_DESC_PKT_ID(pdesc, 0);
  422. SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
  423. SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
  424. SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
  425. SET_TX_DESC_DISABLE_FB(pdesc, 0);
  426. SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
  427. if (ieee80211_is_data_qos(fc)) {
  428. if (mac->rdg_en) {
  429. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  430. "Enable RDG function.\n");
  431. SET_TX_DESC_RDG_ENABLE(pdesc, 1);
  432. SET_TX_DESC_HTC(pdesc, 1);
  433. }
  434. }
  435. }
  436. SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
  437. SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
  438. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) skb->len);
  439. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  440. if (rtlpriv->dm.useramask) {
  441. SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
  442. SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
  443. } else {
  444. SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
  445. SET_TX_DESC_MACID(pdesc, ptcb_desc->ratr_index);
  446. }
  447. if ((!ieee80211_is_data_qos(fc)) && ppsc->fwctrl_lps) {
  448. SET_TX_DESC_HWSEQ_EN_8723(pdesc, 1);
  449. /* SET_TX_DESC_HWSEQ_EN(pdesc, 1); */
  450. /* SET_TX_DESC_PKT_ID(pdesc, 8); */
  451. if (!b_defaultadapter)
  452. SET_TX_DESC_HWSEQ_SEL_8723(pdesc, 1);
  453. /* SET_TX_DESC_QOS(pdesc, 1); */
  454. }
  455. SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
  456. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
  457. is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
  458. SET_TX_DESC_BMC(pdesc, 1);
  459. }
  460. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
  461. }
  462. void rtl8723e_tx_fill_cmddesc(struct ieee80211_hw *hw,
  463. u8 *pdesc, bool firstseg,
  464. bool lastseg, struct sk_buff *skb)
  465. {
  466. struct rtl_priv *rtlpriv = rtl_priv(hw);
  467. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  468. u8 fw_queue = QSLT_BEACON;
  469. dma_addr_t mapping = pci_map_single(rtlpci->pdev,
  470. skb->data, skb->len,
  471. PCI_DMA_TODEVICE);
  472. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
  473. __le16 fc = hdr->frame_control;
  474. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  475. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  476. "DMA mapping error");
  477. return;
  478. }
  479. CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
  480. if (firstseg)
  481. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  482. SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
  483. SET_TX_DESC_SEQ(pdesc, 0);
  484. SET_TX_DESC_LINIP(pdesc, 0);
  485. SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
  486. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  487. SET_TX_DESC_LAST_SEG(pdesc, 1);
  488. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) (skb->len));
  489. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  490. SET_TX_DESC_RATE_ID(pdesc, 7);
  491. SET_TX_DESC_MACID(pdesc, 0);
  492. SET_TX_DESC_OWN(pdesc, 1);
  493. SET_TX_DESC_PKT_SIZE((u8 *)pdesc, (u16)(skb->len));
  494. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  495. SET_TX_DESC_LAST_SEG(pdesc, 1);
  496. SET_TX_DESC_OFFSET(pdesc, 0x20);
  497. SET_TX_DESC_USE_RATE(pdesc, 1);
  498. if (!ieee80211_is_data_qos(fc)) {
  499. SET_TX_DESC_HWSEQ_EN_8723(pdesc, 1);
  500. /* SET_TX_DESC_HWSEQ_EN(pdesc, 1); */
  501. /* SET_TX_DESC_PKT_ID(pdesc, 8); */
  502. }
  503. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  504. "H2C Tx Cmd Content\n",
  505. pdesc, TX_DESC_SIZE);
  506. }
  507. void rtl8723e_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
  508. bool istx, u8 desc_name, u8 *val)
  509. {
  510. if (istx == true) {
  511. switch (desc_name) {
  512. case HW_DESC_OWN:
  513. SET_TX_DESC_OWN(pdesc, 1);
  514. break;
  515. case HW_DESC_TX_NEXTDESC_ADDR:
  516. SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
  517. break;
  518. default:
  519. RT_ASSERT(false, "ERR txdesc :%d not process\n",
  520. desc_name);
  521. break;
  522. }
  523. } else {
  524. switch (desc_name) {
  525. case HW_DESC_RXOWN:
  526. SET_RX_DESC_OWN(pdesc, 1);
  527. break;
  528. case HW_DESC_RXBUFF_ADDR:
  529. SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *) val);
  530. break;
  531. case HW_DESC_RXPKT_LEN:
  532. SET_RX_DESC_PKT_LEN(pdesc, *(u32 *) val);
  533. break;
  534. case HW_DESC_RXERO:
  535. SET_RX_DESC_EOR(pdesc, 1);
  536. break;
  537. default:
  538. RT_ASSERT(false, "ERR rxdesc :%d not process\n",
  539. desc_name);
  540. break;
  541. }
  542. }
  543. }
  544. u32 rtl8723e_get_desc(u8 *pdesc, bool istx, u8 desc_name)
  545. {
  546. u32 ret = 0;
  547. if (istx == true) {
  548. switch (desc_name) {
  549. case HW_DESC_OWN:
  550. ret = GET_TX_DESC_OWN(pdesc);
  551. break;
  552. case HW_DESC_TXBUFF_ADDR:
  553. ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
  554. break;
  555. default:
  556. RT_ASSERT(false, "ERR txdesc :%d not process\n",
  557. desc_name);
  558. break;
  559. }
  560. } else {
  561. switch (desc_name) {
  562. case HW_DESC_OWN:
  563. ret = GET_RX_DESC_OWN(pdesc);
  564. break;
  565. case HW_DESC_RXPKT_LEN:
  566. ret = GET_RX_DESC_PKT_LEN(pdesc);
  567. break;
  568. case HW_DESC_RXBUFF_ADDR:
  569. ret = GET_RX_DESC_BUFF_ADDR(pdesc);
  570. break;
  571. default:
  572. RT_ASSERT(false, "ERR rxdesc :%d not process\n",
  573. desc_name);
  574. break;
  575. }
  576. }
  577. return ret;
  578. }
  579. bool rtl8723e_is_tx_desc_closed(struct ieee80211_hw *hw,
  580. u8 hw_queue, u16 index)
  581. {
  582. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  583. struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
  584. u8 *entry = (u8 *)(&ring->desc[ring->idx]);
  585. u8 own = (u8)rtl8723e_get_desc(entry, true, HW_DESC_OWN);
  586. /**
  587. *beacon packet will only use the first
  588. *descriptor defautly,and the own may not
  589. *be cleared by the hardware
  590. */
  591. if (own)
  592. return false;
  593. return true;
  594. }
  595. void rtl8723e_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
  596. {
  597. struct rtl_priv *rtlpriv = rtl_priv(hw);
  598. if (hw_queue == BEACON_QUEUE) {
  599. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
  600. } else {
  601. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
  602. BIT(0) << (hw_queue));
  603. }
  604. }
  605. u32 rtl8723e_rx_command_packet(struct ieee80211_hw *hw,
  606. struct rtl_stats status,
  607. struct sk_buff *skb)
  608. {
  609. return 0;
  610. }