phy.h 7.3 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #ifndef __RTL8821AE_PHY_H__
  26. #define __RTL8821AE_PHY_H__
  27. /* MAX_TX_COUNT must always be set to 4, otherwise read
  28. * efuse table sequence will be wrong.
  29. */
  30. #define MAX_TX_COUNT 4
  31. #define TX_1S 0
  32. #define TX_2S 1
  33. #define TX_3S 2
  34. #define TX_4S 3
  35. #define MAX_POWER_INDEX 0x3F
  36. #define MAX_PRECMD_CNT 16
  37. #define MAX_RFDEPENDCMD_CNT 16
  38. #define MAX_POSTCMD_CNT 16
  39. #define MAX_DOZE_WAITING_TIMES_9x 64
  40. #define RT_CANNOT_IO(hw) false
  41. #define HIGHPOWER_RADIOA_ARRAYLEN 22
  42. #define IQK_ADDA_REG_NUM 16
  43. #define IQK_BB_REG_NUM 9
  44. #define MAX_TOLERANCE 5
  45. #define IQK_DELAY_TIME 10
  46. #define index_mapping_NUM 15
  47. #define APK_BB_REG_NUM 5
  48. #define APK_AFE_REG_NUM 16
  49. #define APK_CURVE_REG_NUM 4
  50. #define PATH_NUM 2
  51. #define LOOP_LIMIT 5
  52. #define MAX_STALL_TIME 50
  53. #define AntennaDiversityValue 0x80
  54. #define MAX_TXPWR_IDX_NMODE_92S 63
  55. #define Reset_Cnt_Limit 3
  56. #define IQK_ADDA_REG_NUM 16
  57. #define IQK_MAC_REG_NUM 4
  58. #define RF6052_MAX_PATH 2
  59. #define CT_OFFSET_MAC_ADDR 0X16
  60. #define CT_OFFSET_CCK_TX_PWR_IDX 0x5A
  61. #define CT_OFFSET_HT401S_TX_PWR_IDX 0x60
  62. #define CT_OFFSET_HT402S_TX_PWR_IDX_DIFF 0x66
  63. #define CT_OFFSET_HT20_TX_PWR_IDX_DIFF 0x69
  64. #define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF 0x6C
  65. #define CT_OFFSET_HT40_MAX_PWR_OFFSET 0x6F
  66. #define CT_OFFSET_HT20_MAX_PWR_OFFSET 0x72
  67. #define CT_OFFSET_CHANNEL_PLAH 0x75
  68. #define CT_OFFSET_THERMAL_METER 0x78
  69. #define CT_OFFSET_RF_OPTION 0x79
  70. #define CT_OFFSET_VERSION 0x7E
  71. #define CT_OFFSET_CUSTOMER_ID 0x7F
  72. #define RTL8821AE_MAX_PATH_NUM 2
  73. #define TARGET_CHNL_NUM_2G_5G_8812 59
  74. enum swchnlcmd_id {
  75. CMDID_END,
  76. CMDID_SET_TXPOWEROWER_LEVEL,
  77. CMDID_BBREGWRITE10,
  78. CMDID_WRITEPORT_ULONG,
  79. CMDID_WRITEPORT_USHORT,
  80. CMDID_WRITEPORT_UCHAR,
  81. CMDID_RF_WRITEREG,
  82. };
  83. struct swchnlcmd {
  84. enum swchnlcmd_id cmdid;
  85. u32 para1;
  86. u32 para2;
  87. u32 msdelay;
  88. };
  89. enum hw90_block_e {
  90. HW90_BLOCK_MAC = 0,
  91. HW90_BLOCK_PHY0 = 1,
  92. HW90_BLOCK_PHY1 = 2,
  93. HW90_BLOCK_RF = 3,
  94. HW90_BLOCK_MAXIMUM = 4,
  95. };
  96. enum baseband_config_type {
  97. BASEBAND_CONFIG_PHY_REG = 0,
  98. BASEBAND_CONFIG_AGC_TAB = 1,
  99. };
  100. enum ra_offset_area {
  101. RA_OFFSET_LEGACY_OFDM1,
  102. RA_OFFSET_LEGACY_OFDM2,
  103. RA_OFFSET_HT_OFDM1,
  104. RA_OFFSET_HT_OFDM2,
  105. RA_OFFSET_HT_OFDM3,
  106. RA_OFFSET_HT_OFDM4,
  107. RA_OFFSET_HT_CCK,
  108. };
  109. enum antenna_path {
  110. ANTENNA_NONE,
  111. ANTENNA_D,
  112. ANTENNA_C,
  113. ANTENNA_CD,
  114. ANTENNA_B,
  115. ANTENNA_BD,
  116. ANTENNA_BC,
  117. ANTENNA_BCD,
  118. ANTENNA_A,
  119. ANTENNA_AD,
  120. ANTENNA_AC,
  121. ANTENNA_ACD,
  122. ANTENNA_AB,
  123. ANTENNA_ABD,
  124. ANTENNA_ABC,
  125. ANTENNA_ABCD
  126. };
  127. struct r_antenna_select_ofdm {
  128. u32 r_tx_antenna:4;
  129. u32 r_ant_l:4;
  130. u32 r_ant_non_ht:4;
  131. u32 r_ant_ht1:4;
  132. u32 r_ant_ht2:4;
  133. u32 r_ant_ht_s1:4;
  134. u32 r_ant_non_ht_s1:4;
  135. u32 ofdm_txsc:2;
  136. u32 reserved:2;
  137. };
  138. struct r_antenna_select_cck {
  139. u8 r_cckrx_enable_2:2;
  140. u8 r_cckrx_enable:2;
  141. u8 r_ccktx_enable:4;
  142. };
  143. struct efuse_contents {
  144. u8 mac_addr[ETH_ALEN];
  145. u8 cck_tx_power_idx[6];
  146. u8 ht40_1s_tx_power_idx[6];
  147. u8 ht40_2s_tx_power_idx_diff[3];
  148. u8 ht20_tx_power_idx_diff[3];
  149. u8 ofdm_tx_power_idx_diff[3];
  150. u8 ht40_max_power_offset[3];
  151. u8 ht20_max_power_offset[3];
  152. u8 channel_plan;
  153. u8 thermal_meter;
  154. u8 rf_option[5];
  155. u8 version;
  156. u8 oem_id;
  157. u8 regulatory;
  158. };
  159. struct tx_power_struct {
  160. u8 cck[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
  161. u8 ht40_1s[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
  162. u8 ht40_2s[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
  163. u8 ht20_diff[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
  164. u8 legacy_ht_diff[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
  165. u8 legacy_ht_txpowerdiff;
  166. u8 groupht20[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
  167. u8 groupht40[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
  168. u8 pwrgroup_cnt;
  169. u32 mcs_original_offset[4][16];
  170. };
  171. enum _ANT_DIV_TYPE {
  172. NO_ANTDIV = 0xFF,
  173. CG_TRX_HW_ANTDIV = 0x01,
  174. CGCS_RX_HW_ANTDIV = 0x02,
  175. FIXED_HW_ANTDIV = 0x03,
  176. CG_TRX_SMART_ANTDIV = 0x04,
  177. CGCS_RX_SW_ANTDIV = 0x05,
  178. };
  179. u32 rtl8821ae_phy_query_bb_reg(struct ieee80211_hw *hw,
  180. u32 regaddr, u32 bitmask);
  181. void rtl8821ae_phy_set_bb_reg(struct ieee80211_hw *hw,
  182. u32 regaddr, u32 bitmask, u32 data);
  183. u32 rtl8821ae_phy_query_rf_reg(struct ieee80211_hw *hw,
  184. enum radio_path rfpath, u32 regaddr,
  185. u32 bitmask);
  186. void rtl8821ae_phy_set_rf_reg(struct ieee80211_hw *hw,
  187. enum radio_path rfpath, u32 regaddr,
  188. u32 bitmask, u32 data);
  189. bool rtl8821ae_phy_mac_config(struct ieee80211_hw *hw);
  190. bool rtl8821ae_phy_bb_config(struct ieee80211_hw *hw);
  191. bool rtl8821ae_phy_rf_config(struct ieee80211_hw *hw);
  192. void rtl8821ae_phy_switch_wirelessband(struct ieee80211_hw *hw,
  193. u8 band);
  194. void rtl8821ae_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
  195. void rtl8821ae_phy_get_txpower_level(struct ieee80211_hw *hw,
  196. long *powerlevel);
  197. void rtl8821ae_phy_set_txpower_level(struct ieee80211_hw *hw,
  198. u8 channel);
  199. void rtl8821ae_phy_scan_operation_backup(struct ieee80211_hw *hw,
  200. u8 operation);
  201. void rtl8821ae_phy_set_bw_mode_callback(struct ieee80211_hw *hw);
  202. void rtl8821ae_phy_set_bw_mode(struct ieee80211_hw *hw,
  203. enum nl80211_channel_type ch_type);
  204. void rtl8821ae_phy_sw_chnl_callback(struct ieee80211_hw *hw);
  205. u8 rtl8821ae_phy_sw_chnl(struct ieee80211_hw *hw);
  206. void rtl8821ae_phy_iq_calibrate(struct ieee80211_hw *hw,
  207. bool b_recovery);
  208. void rtl8812ae_phy_iq_calibrate(struct ieee80211_hw *hw,
  209. bool b_recovery);
  210. void rtl8821ae_phy_ap_calibrate(struct ieee80211_hw *hw, char delta);
  211. void rtl8821ae_phy_lc_calibrate(struct ieee80211_hw *hw);
  212. void rtl8821ae_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
  213. bool rtl8812ae_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
  214. enum radio_path rfpath);
  215. bool rtl8821ae_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
  216. enum radio_path rfpath);
  217. bool rtl8821ae_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
  218. bool rtl8821ae_phy_set_rf_power_state(struct ieee80211_hw *hw,
  219. enum rf_pwrstate rfpwr_state);
  220. u8 _rtl8812ae_get_right_chnl_place_for_iqk(u8 chnl);
  221. void rtl8821ae_phy_set_txpower_level_by_path(struct ieee80211_hw *hw,
  222. u8 channel, u8 path);
  223. void rtl8812ae_do_iqk(struct ieee80211_hw *hw, u8 delta_thermal_index,
  224. u8 thermal_value, u8 threshold);
  225. void rtl8821ae_do_iqk(struct ieee80211_hw *hw, u8 delta_thermal_index,
  226. u8 thermal_value, u8 threshold);
  227. void rtl8821ae_reset_iqk_result(struct ieee80211_hw *hw);
  228. u32 phy_get_tx_swing_8812A(struct ieee80211_hw *hw, u8 band, u8 rf_path);
  229. #endif