rsi_mgmt.h 9.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309
  1. /**
  2. * Copyright (c) 2014 Redpine Signals Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef __RSI_MGMT_H__
  17. #define __RSI_MGMT_H__
  18. #include <linux/sort.h>
  19. #include "rsi_boot_params.h"
  20. #include "rsi_main.h"
  21. #define MAX_MGMT_PKT_SIZE 512
  22. #define RSI_NEEDED_HEADROOM 80
  23. #define RSI_RCV_BUFFER_LEN 2000
  24. #define RSI_11B_MODE 0
  25. #define RSI_11G_MODE BIT(7)
  26. #define RETRY_COUNT 8
  27. #define RETRY_LONG 4
  28. #define RETRY_SHORT 7
  29. #define WMM_SHORT_SLOT_TIME 9
  30. #define SIFS_DURATION 16
  31. #define KEY_TYPE_CLEAR 0
  32. #define RSI_PAIRWISE_KEY 1
  33. #define RSI_GROUP_KEY 2
  34. /* EPPROM_READ_ADDRESS */
  35. #define WLAN_MAC_EEPROM_ADDR 40
  36. #define WLAN_MAC_MAGIC_WORD_LEN 0x01
  37. #define WLAN_HOST_MODE_LEN 0x04
  38. #define WLAN_FW_VERSION_LEN 0x08
  39. #define MAGIC_WORD 0x5A
  40. /* Receive Frame Types */
  41. #define TA_CONFIRM_TYPE 0x01
  42. #define RX_DOT11_MGMT 0x02
  43. #define TX_STATUS_IND 0x04
  44. #define PROBEREQ_CONFIRM 2
  45. #define CARD_READY_IND 0x00
  46. #define RSI_DELETE_PEER 0x0
  47. #define RSI_ADD_PEER 0x1
  48. #define START_AMPDU_AGGR 0x1
  49. #define STOP_AMPDU_AGGR 0x0
  50. #define INTERNAL_MGMT_PKT 0x99
  51. #define PUT_BBP_RESET 0
  52. #define BBP_REG_WRITE 0
  53. #define RF_RESET_ENABLE BIT(3)
  54. #define RATE_INFO_ENABLE BIT(0)
  55. #define RSI_BROADCAST_PKT BIT(9)
  56. #define UPPER_20_ENABLE (0x2 << 12)
  57. #define LOWER_20_ENABLE (0x4 << 12)
  58. #define FULL40M_ENABLE 0x6
  59. #define RSI_LMAC_CLOCK_80MHZ 0x1
  60. #define RSI_ENABLE_40MHZ (0x1 << 3)
  61. #define ENABLE_SHORTGI_RATE BIT(9)
  62. #define RX_BA_INDICATION 1
  63. #define RSI_TBL_SZ 40
  64. #define MAX_RETRIES 8
  65. #define RSI_IFTYPE_STATION 0
  66. #define STD_RATE_MCS7 0x07
  67. #define STD_RATE_MCS6 0x06
  68. #define STD_RATE_MCS5 0x05
  69. #define STD_RATE_MCS4 0x04
  70. #define STD_RATE_MCS3 0x03
  71. #define STD_RATE_MCS2 0x02
  72. #define STD_RATE_MCS1 0x01
  73. #define STD_RATE_MCS0 0x00
  74. #define STD_RATE_54 0x6c
  75. #define STD_RATE_48 0x60
  76. #define STD_RATE_36 0x48
  77. #define STD_RATE_24 0x30
  78. #define STD_RATE_18 0x24
  79. #define STD_RATE_12 0x18
  80. #define STD_RATE_11 0x16
  81. #define STD_RATE_09 0x12
  82. #define STD_RATE_06 0x0C
  83. #define STD_RATE_5_5 0x0B
  84. #define STD_RATE_02 0x04
  85. #define STD_RATE_01 0x02
  86. #define RSI_RF_TYPE 1
  87. #define RSI_RATE_00 0x00
  88. #define RSI_RATE_1 0x0
  89. #define RSI_RATE_2 0x2
  90. #define RSI_RATE_5_5 0x4
  91. #define RSI_RATE_11 0x6
  92. #define RSI_RATE_6 0x8b
  93. #define RSI_RATE_9 0x8f
  94. #define RSI_RATE_12 0x8a
  95. #define RSI_RATE_18 0x8e
  96. #define RSI_RATE_24 0x89
  97. #define RSI_RATE_36 0x8d
  98. #define RSI_RATE_48 0x88
  99. #define RSI_RATE_54 0x8c
  100. #define RSI_RATE_MCS0 0x100
  101. #define RSI_RATE_MCS1 0x101
  102. #define RSI_RATE_MCS2 0x102
  103. #define RSI_RATE_MCS3 0x103
  104. #define RSI_RATE_MCS4 0x104
  105. #define RSI_RATE_MCS5 0x105
  106. #define RSI_RATE_MCS6 0x106
  107. #define RSI_RATE_MCS7 0x107
  108. #define RSI_RATE_MCS7_SG 0x307
  109. #define BW_20MHZ 0
  110. #define BW_40MHZ 1
  111. #define EP_2GHZ_20MHZ 0
  112. #define EP_2GHZ_40MHZ 1
  113. #define EP_5GHZ_20MHZ 2
  114. #define EP_5GHZ_40MHZ 3
  115. #define SIFS_TX_11N_VALUE 580
  116. #define SIFS_TX_11B_VALUE 346
  117. #define SHORT_SLOT_VALUE 360
  118. #define LONG_SLOT_VALUE 640
  119. #define OFDM_ACK_TOUT_VALUE 2720
  120. #define CCK_ACK_TOUT_VALUE 9440
  121. #define LONG_PREAMBLE 0x0000
  122. #define SHORT_PREAMBLE 0x0001
  123. #define RSI_SUPP_FILTERS (FIF_ALLMULTI | FIF_PROBE_REQ |\
  124. FIF_BCN_PRBRESP_PROMISC)
  125. enum opmode {
  126. STA_OPMODE = 1,
  127. AP_OPMODE = 2
  128. };
  129. extern struct ieee80211_rate rsi_rates[12];
  130. extern const u16 rsi_mcsrates[8];
  131. enum sta_notify_events {
  132. STA_CONNECTED = 0,
  133. STA_DISCONNECTED,
  134. STA_TX_ADDBA_DONE,
  135. STA_TX_DELBA,
  136. STA_RX_ADDBA_DONE,
  137. STA_RX_DELBA
  138. };
  139. /* Send Frames Types */
  140. enum cmd_frame_type {
  141. TX_DOT11_MGMT,
  142. RESET_MAC_REQ,
  143. RADIO_CAPABILITIES,
  144. BB_PROG_VALUES_REQUEST,
  145. RF_PROG_VALUES_REQUEST,
  146. WAKEUP_SLEEP_REQUEST,
  147. SCAN_REQUEST,
  148. TSF_UPDATE,
  149. PEER_NOTIFY,
  150. BLOCK_HW_QUEUE,
  151. SET_KEY_REQ,
  152. AUTO_RATE_IND,
  153. BOOTUP_PARAMS_REQUEST,
  154. VAP_CAPABILITIES,
  155. EEPROM_READ_TYPE ,
  156. EEPROM_WRITE,
  157. GPIO_PIN_CONFIG ,
  158. SET_RX_FILTER,
  159. AMPDU_IND,
  160. STATS_REQUEST_FRAME,
  161. BB_BUF_PROG_VALUES_REQ,
  162. BBP_PROG_IN_TA,
  163. BG_SCAN_PARAMS,
  164. BG_SCAN_PROBE_REQ,
  165. CW_MODE_REQ,
  166. PER_CMD_PKT
  167. };
  168. struct rsi_mac_frame {
  169. __le16 desc_word[8];
  170. } __packed;
  171. struct rsi_boot_params {
  172. __le16 desc_word[8];
  173. struct bootup_params bootup_params;
  174. } __packed;
  175. struct rsi_peer_notify {
  176. __le16 desc_word[8];
  177. u8 mac_addr[6];
  178. __le16 command;
  179. __le16 mpdu_density;
  180. __le16 reserved;
  181. __le32 sta_flags;
  182. } __packed;
  183. struct rsi_vap_caps {
  184. __le16 desc_word[8];
  185. u8 mac_addr[6];
  186. __le16 keep_alive_period;
  187. u8 bssid[6];
  188. __le16 reserved;
  189. __le32 flags;
  190. __le16 frag_threshold;
  191. __le16 rts_threshold;
  192. __le32 default_mgmt_rate;
  193. __le32 default_ctrl_rate;
  194. __le32 default_data_rate;
  195. __le16 beacon_interval;
  196. __le16 dtim_period;
  197. } __packed;
  198. struct rsi_set_key {
  199. __le16 desc_word[8];
  200. u8 key[4][32];
  201. u8 tx_mic_key[8];
  202. u8 rx_mic_key[8];
  203. } __packed;
  204. struct rsi_auto_rate {
  205. __le16 desc_word[8];
  206. __le16 failure_limit;
  207. __le16 initial_boundary;
  208. __le16 max_threshold_limt;
  209. __le16 num_supported_rates;
  210. __le16 aarf_rssi;
  211. __le16 moderate_rate_inx;
  212. __le16 collision_tolerance;
  213. __le16 supported_rates[40];
  214. } __packed;
  215. struct qos_params {
  216. __le16 cont_win_min_q;
  217. __le16 cont_win_max_q;
  218. __le16 aifsn_val_q;
  219. __le16 txop_q;
  220. } __packed;
  221. struct rsi_radio_caps {
  222. __le16 desc_word[8];
  223. struct qos_params qos_params[MAX_HW_QUEUES];
  224. u8 num_11n_rates;
  225. u8 num_11ac_rates;
  226. __le16 gcpd_per_rate[20];
  227. __le16 sifs_tx_11n;
  228. __le16 sifs_tx_11b;
  229. __le16 slot_rx_11n;
  230. __le16 ofdm_ack_tout;
  231. __le16 cck_ack_tout;
  232. __le16 preamble_type;
  233. } __packed;
  234. static inline u32 rsi_get_queueno(u8 *addr, u16 offset)
  235. {
  236. return (le16_to_cpu(*(__le16 *)&addr[offset]) & 0x7000) >> 12;
  237. }
  238. static inline u32 rsi_get_length(u8 *addr, u16 offset)
  239. {
  240. return (le16_to_cpu(*(__le16 *)&addr[offset])) & 0x0fff;
  241. }
  242. static inline u8 rsi_get_extended_desc(u8 *addr, u16 offset)
  243. {
  244. return le16_to_cpu(*((__le16 *)&addr[offset + 4])) & 0x00ff;
  245. }
  246. static inline u8 rsi_get_rssi(u8 *addr)
  247. {
  248. return *(u8 *)(addr + FRAME_DESC_SZ);
  249. }
  250. static inline u8 rsi_get_channel(u8 *addr)
  251. {
  252. return *(char *)(addr + 15);
  253. }
  254. int rsi_mgmt_pkt_recv(struct rsi_common *common, u8 *msg);
  255. int rsi_set_vap_capabilities(struct rsi_common *common, enum opmode mode);
  256. int rsi_send_aggregation_params_frame(struct rsi_common *common, u16 tid,
  257. u16 ssn, u8 buf_size, u8 event);
  258. int rsi_hal_load_key(struct rsi_common *common, u8 *data, u16 key_len,
  259. u8 key_type, u8 key_id, u32 cipher);
  260. int rsi_set_channel(struct rsi_common *common, u16 chno);
  261. int rsi_send_block_unblock_frame(struct rsi_common *common, bool event);
  262. void rsi_inform_bss_status(struct rsi_common *common, u8 status,
  263. const u8 *bssid, u8 qos_enable, u16 aid);
  264. void rsi_indicate_pkt_to_os(struct rsi_common *common, struct sk_buff *skb);
  265. int rsi_mac80211_attach(struct rsi_common *common);
  266. void rsi_indicate_tx_status(struct rsi_hw *common, struct sk_buff *skb,
  267. int status);
  268. bool rsi_is_cipher_wep(struct rsi_common *common);
  269. void rsi_core_qos_processor(struct rsi_common *common);
  270. void rsi_core_xmit(struct rsi_common *common, struct sk_buff *skb);
  271. int rsi_send_mgmt_pkt(struct rsi_common *common, struct sk_buff *skb);
  272. int rsi_send_data_pkt(struct rsi_common *common, struct sk_buff *skb);
  273. int rsi_band_check(struct rsi_common *common);
  274. #endif