rt2500usb.c 61 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, see <http://www.gnu.org/licenses/>.
  14. */
  15. /*
  16. Module: rt2500usb
  17. Abstract: rt2500usb device specific routines.
  18. Supported chipsets: RT2570.
  19. */
  20. #include <linux/delay.h>
  21. #include <linux/etherdevice.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/slab.h>
  25. #include <linux/usb.h>
  26. #include "rt2x00.h"
  27. #include "rt2x00usb.h"
  28. #include "rt2500usb.h"
  29. /*
  30. * Allow hardware encryption to be disabled.
  31. */
  32. static bool modparam_nohwcrypt;
  33. module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
  34. MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
  35. /*
  36. * Register access.
  37. * All access to the CSR registers will go through the methods
  38. * rt2500usb_register_read and rt2500usb_register_write.
  39. * BBP and RF register require indirect register access,
  40. * and use the CSR registers BBPCSR and RFCSR to achieve this.
  41. * These indirect registers work with busy bits,
  42. * and we will try maximal REGISTER_USB_BUSY_COUNT times to access
  43. * the register while taking a REGISTER_BUSY_DELAY us delay
  44. * between each attampt. When the busy bit is still set at that time,
  45. * the access attempt is considered to have failed,
  46. * and we will print an error.
  47. * If the csr_mutex is already held then the _lock variants must
  48. * be used instead.
  49. */
  50. static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  51. const unsigned int offset,
  52. u16 *value)
  53. {
  54. __le16 reg;
  55. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  56. USB_VENDOR_REQUEST_IN, offset,
  57. &reg, sizeof(reg));
  58. *value = le16_to_cpu(reg);
  59. }
  60. static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  61. const unsigned int offset,
  62. u16 *value)
  63. {
  64. __le16 reg;
  65. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  66. USB_VENDOR_REQUEST_IN, offset,
  67. &reg, sizeof(reg), REGISTER_TIMEOUT);
  68. *value = le16_to_cpu(reg);
  69. }
  70. static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  71. const unsigned int offset,
  72. void *value, const u16 length)
  73. {
  74. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  75. USB_VENDOR_REQUEST_IN, offset,
  76. value, length);
  77. }
  78. static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  79. const unsigned int offset,
  80. u16 value)
  81. {
  82. __le16 reg = cpu_to_le16(value);
  83. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  84. USB_VENDOR_REQUEST_OUT, offset,
  85. &reg, sizeof(reg));
  86. }
  87. static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  88. const unsigned int offset,
  89. u16 value)
  90. {
  91. __le16 reg = cpu_to_le16(value);
  92. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  93. USB_VENDOR_REQUEST_OUT, offset,
  94. &reg, sizeof(reg), REGISTER_TIMEOUT);
  95. }
  96. static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
  97. const unsigned int offset,
  98. void *value, const u16 length)
  99. {
  100. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  101. USB_VENDOR_REQUEST_OUT, offset,
  102. value, length);
  103. }
  104. static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
  105. const unsigned int offset,
  106. struct rt2x00_field16 field,
  107. u16 *reg)
  108. {
  109. unsigned int i;
  110. for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
  111. rt2500usb_register_read_lock(rt2x00dev, offset, reg);
  112. if (!rt2x00_get_field16(*reg, field))
  113. return 1;
  114. udelay(REGISTER_BUSY_DELAY);
  115. }
  116. rt2x00_err(rt2x00dev, "Indirect register access failed: offset=0x%.08x, value=0x%.08x\n",
  117. offset, *reg);
  118. *reg = ~0;
  119. return 0;
  120. }
  121. #define WAIT_FOR_BBP(__dev, __reg) \
  122. rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
  123. #define WAIT_FOR_RF(__dev, __reg) \
  124. rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
  125. static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
  126. const unsigned int word, const u8 value)
  127. {
  128. u16 reg;
  129. mutex_lock(&rt2x00dev->csr_mutex);
  130. /*
  131. * Wait until the BBP becomes available, afterwards we
  132. * can safely write the new data into the register.
  133. */
  134. if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
  135. reg = 0;
  136. rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
  137. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  138. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
  139. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  140. }
  141. mutex_unlock(&rt2x00dev->csr_mutex);
  142. }
  143. static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
  144. const unsigned int word, u8 *value)
  145. {
  146. u16 reg;
  147. mutex_lock(&rt2x00dev->csr_mutex);
  148. /*
  149. * Wait until the BBP becomes available, afterwards we
  150. * can safely write the read request into the register.
  151. * After the data has been written, we wait until hardware
  152. * returns the correct value, if at any time the register
  153. * doesn't become available in time, reg will be 0xffffffff
  154. * which means we return 0xff to the caller.
  155. */
  156. if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
  157. reg = 0;
  158. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  159. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
  160. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  161. if (WAIT_FOR_BBP(rt2x00dev, &reg))
  162. rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
  163. }
  164. *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
  165. mutex_unlock(&rt2x00dev->csr_mutex);
  166. }
  167. static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
  168. const unsigned int word, const u32 value)
  169. {
  170. u16 reg;
  171. mutex_lock(&rt2x00dev->csr_mutex);
  172. /*
  173. * Wait until the RF becomes available, afterwards we
  174. * can safely write the new data into the register.
  175. */
  176. if (WAIT_FOR_RF(rt2x00dev, &reg)) {
  177. reg = 0;
  178. rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
  179. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
  180. reg = 0;
  181. rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
  182. rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
  183. rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
  184. rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
  185. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
  186. rt2x00_rf_write(rt2x00dev, word, value);
  187. }
  188. mutex_unlock(&rt2x00dev->csr_mutex);
  189. }
  190. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  191. static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  192. const unsigned int offset,
  193. u32 *value)
  194. {
  195. rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
  196. }
  197. static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  198. const unsigned int offset,
  199. u32 value)
  200. {
  201. rt2500usb_register_write(rt2x00dev, offset, value);
  202. }
  203. static const struct rt2x00debug rt2500usb_rt2x00debug = {
  204. .owner = THIS_MODULE,
  205. .csr = {
  206. .read = _rt2500usb_register_read,
  207. .write = _rt2500usb_register_write,
  208. .flags = RT2X00DEBUGFS_OFFSET,
  209. .word_base = CSR_REG_BASE,
  210. .word_size = sizeof(u16),
  211. .word_count = CSR_REG_SIZE / sizeof(u16),
  212. },
  213. .eeprom = {
  214. .read = rt2x00_eeprom_read,
  215. .write = rt2x00_eeprom_write,
  216. .word_base = EEPROM_BASE,
  217. .word_size = sizeof(u16),
  218. .word_count = EEPROM_SIZE / sizeof(u16),
  219. },
  220. .bbp = {
  221. .read = rt2500usb_bbp_read,
  222. .write = rt2500usb_bbp_write,
  223. .word_base = BBP_BASE,
  224. .word_size = sizeof(u8),
  225. .word_count = BBP_SIZE / sizeof(u8),
  226. },
  227. .rf = {
  228. .read = rt2x00_rf_read,
  229. .write = rt2500usb_rf_write,
  230. .word_base = RF_BASE,
  231. .word_size = sizeof(u32),
  232. .word_count = RF_SIZE / sizeof(u32),
  233. },
  234. };
  235. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  236. static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
  237. {
  238. u16 reg;
  239. rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
  240. return rt2x00_get_field16(reg, MAC_CSR19_VAL7);
  241. }
  242. #ifdef CONFIG_RT2X00_LIB_LEDS
  243. static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
  244. enum led_brightness brightness)
  245. {
  246. struct rt2x00_led *led =
  247. container_of(led_cdev, struct rt2x00_led, led_dev);
  248. unsigned int enabled = brightness != LED_OFF;
  249. u16 reg;
  250. rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
  251. if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
  252. rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
  253. else if (led->type == LED_TYPE_ACTIVITY)
  254. rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
  255. rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
  256. }
  257. static int rt2500usb_blink_set(struct led_classdev *led_cdev,
  258. unsigned long *delay_on,
  259. unsigned long *delay_off)
  260. {
  261. struct rt2x00_led *led =
  262. container_of(led_cdev, struct rt2x00_led, led_dev);
  263. u16 reg;
  264. rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
  265. rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
  266. rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
  267. rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
  268. return 0;
  269. }
  270. static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
  271. struct rt2x00_led *led,
  272. enum led_type type)
  273. {
  274. led->rt2x00dev = rt2x00dev;
  275. led->type = type;
  276. led->led_dev.brightness_set = rt2500usb_brightness_set;
  277. led->led_dev.blink_set = rt2500usb_blink_set;
  278. led->flags = LED_INITIALIZED;
  279. }
  280. #endif /* CONFIG_RT2X00_LIB_LEDS */
  281. /*
  282. * Configuration handlers.
  283. */
  284. /*
  285. * rt2500usb does not differentiate between shared and pairwise
  286. * keys, so we should use the same function for both key types.
  287. */
  288. static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
  289. struct rt2x00lib_crypto *crypto,
  290. struct ieee80211_key_conf *key)
  291. {
  292. u32 mask;
  293. u16 reg;
  294. enum cipher curr_cipher;
  295. if (crypto->cmd == SET_KEY) {
  296. /*
  297. * Disallow to set WEP key other than with index 0,
  298. * it is known that not work at least on some hardware.
  299. * SW crypto will be used in that case.
  300. */
  301. if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  302. key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
  303. key->keyidx != 0)
  304. return -EOPNOTSUPP;
  305. /*
  306. * Pairwise key will always be entry 0, but this
  307. * could collide with a shared key on the same
  308. * position...
  309. */
  310. mask = TXRX_CSR0_KEY_ID.bit_mask;
  311. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  312. curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
  313. reg &= mask;
  314. if (reg && reg == mask)
  315. return -ENOSPC;
  316. reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
  317. key->hw_key_idx += reg ? ffz(reg) : 0;
  318. /*
  319. * Hardware requires that all keys use the same cipher
  320. * (e.g. TKIP-only, AES-only, but not TKIP+AES).
  321. * If this is not the first key, compare the cipher with the
  322. * first one and fall back to SW crypto if not the same.
  323. */
  324. if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
  325. return -EOPNOTSUPP;
  326. rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx),
  327. crypto->key, sizeof(crypto->key));
  328. /*
  329. * The driver does not support the IV/EIV generation
  330. * in hardware. However it demands the data to be provided
  331. * both separately as well as inside the frame.
  332. * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
  333. * to ensure rt2x00lib will not strip the data from the
  334. * frame after the copy, now we must tell mac80211
  335. * to generate the IV/EIV data.
  336. */
  337. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  338. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  339. }
  340. /*
  341. * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
  342. * a particular key is valid.
  343. */
  344. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  345. rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
  346. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  347. mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
  348. if (crypto->cmd == SET_KEY)
  349. mask |= 1 << key->hw_key_idx;
  350. else if (crypto->cmd == DISABLE_KEY)
  351. mask &= ~(1 << key->hw_key_idx);
  352. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
  353. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  354. return 0;
  355. }
  356. static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
  357. const unsigned int filter_flags)
  358. {
  359. u16 reg;
  360. /*
  361. * Start configuration steps.
  362. * Note that the version error will always be dropped
  363. * and broadcast frames will always be accepted since
  364. * there is no filter for it at this time.
  365. */
  366. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  367. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
  368. !(filter_flags & FIF_FCSFAIL));
  369. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
  370. !(filter_flags & FIF_PLCPFAIL));
  371. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
  372. !(filter_flags & FIF_CONTROL));
  373. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME, 1);
  374. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
  375. !rt2x00dev->intf_ap_count);
  376. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
  377. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
  378. !(filter_flags & FIF_ALLMULTI));
  379. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
  380. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  381. }
  382. static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
  383. struct rt2x00_intf *intf,
  384. struct rt2x00intf_conf *conf,
  385. const unsigned int flags)
  386. {
  387. unsigned int bcn_preload;
  388. u16 reg;
  389. if (flags & CONFIG_UPDATE_TYPE) {
  390. /*
  391. * Enable beacon config
  392. */
  393. bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
  394. rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
  395. rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
  396. rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
  397. 2 * (conf->type != NL80211_IFTYPE_STATION));
  398. rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
  399. /*
  400. * Enable synchronisation.
  401. */
  402. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  403. rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
  404. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  405. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  406. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
  407. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  408. }
  409. if (flags & CONFIG_UPDATE_MAC)
  410. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
  411. (3 * sizeof(__le16)));
  412. if (flags & CONFIG_UPDATE_BSSID)
  413. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
  414. (3 * sizeof(__le16)));
  415. }
  416. static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
  417. struct rt2x00lib_erp *erp,
  418. u32 changed)
  419. {
  420. u16 reg;
  421. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  422. rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
  423. rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
  424. !!erp->short_preamble);
  425. rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
  426. }
  427. if (changed & BSS_CHANGED_BASIC_RATES)
  428. rt2500usb_register_write(rt2x00dev, TXRX_CSR11,
  429. erp->basic_rates);
  430. if (changed & BSS_CHANGED_BEACON_INT) {
  431. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  432. rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
  433. erp->beacon_int * 4);
  434. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  435. }
  436. if (changed & BSS_CHANGED_ERP_SLOT) {
  437. rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
  438. rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
  439. rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
  440. }
  441. }
  442. static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
  443. struct antenna_setup *ant)
  444. {
  445. u8 r2;
  446. u8 r14;
  447. u16 csr5;
  448. u16 csr6;
  449. /*
  450. * We should never come here because rt2x00lib is supposed
  451. * to catch this and send us the correct antenna explicitely.
  452. */
  453. BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
  454. ant->tx == ANTENNA_SW_DIVERSITY);
  455. rt2500usb_bbp_read(rt2x00dev, 2, &r2);
  456. rt2500usb_bbp_read(rt2x00dev, 14, &r14);
  457. rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
  458. rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
  459. /*
  460. * Configure the TX antenna.
  461. */
  462. switch (ant->tx) {
  463. case ANTENNA_HW_DIVERSITY:
  464. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
  465. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
  466. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
  467. break;
  468. case ANTENNA_A:
  469. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
  470. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
  471. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
  472. break;
  473. case ANTENNA_B:
  474. default:
  475. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
  476. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
  477. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
  478. break;
  479. }
  480. /*
  481. * Configure the RX antenna.
  482. */
  483. switch (ant->rx) {
  484. case ANTENNA_HW_DIVERSITY:
  485. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
  486. break;
  487. case ANTENNA_A:
  488. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
  489. break;
  490. case ANTENNA_B:
  491. default:
  492. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
  493. break;
  494. }
  495. /*
  496. * RT2525E and RT5222 need to flip TX I/Q
  497. */
  498. if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
  499. rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
  500. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
  501. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
  502. /*
  503. * RT2525E does not need RX I/Q Flip.
  504. */
  505. if (rt2x00_rf(rt2x00dev, RF2525E))
  506. rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
  507. } else {
  508. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
  509. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
  510. }
  511. rt2500usb_bbp_write(rt2x00dev, 2, r2);
  512. rt2500usb_bbp_write(rt2x00dev, 14, r14);
  513. rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
  514. rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
  515. }
  516. static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
  517. struct rf_channel *rf, const int txpower)
  518. {
  519. /*
  520. * Set TXpower.
  521. */
  522. rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  523. /*
  524. * For RT2525E we should first set the channel to half band higher.
  525. */
  526. if (rt2x00_rf(rt2x00dev, RF2525E)) {
  527. static const u32 vals[] = {
  528. 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
  529. 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
  530. 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
  531. 0x00000902, 0x00000906
  532. };
  533. rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
  534. if (rf->rf4)
  535. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  536. }
  537. rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
  538. rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
  539. rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
  540. if (rf->rf4)
  541. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  542. }
  543. static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
  544. const int txpower)
  545. {
  546. u32 rf3;
  547. rt2x00_rf_read(rt2x00dev, 3, &rf3);
  548. rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  549. rt2500usb_rf_write(rt2x00dev, 3, rf3);
  550. }
  551. static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
  552. struct rt2x00lib_conf *libconf)
  553. {
  554. enum dev_state state =
  555. (libconf->conf->flags & IEEE80211_CONF_PS) ?
  556. STATE_SLEEP : STATE_AWAKE;
  557. u16 reg;
  558. if (state == STATE_SLEEP) {
  559. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  560. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
  561. rt2x00dev->beacon_int - 20);
  562. rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
  563. libconf->conf->listen_interval - 1);
  564. /* We must first disable autowake before it can be enabled */
  565. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
  566. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  567. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
  568. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  569. } else {
  570. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  571. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
  572. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  573. }
  574. rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
  575. }
  576. static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
  577. struct rt2x00lib_conf *libconf,
  578. const unsigned int flags)
  579. {
  580. if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
  581. rt2500usb_config_channel(rt2x00dev, &libconf->rf,
  582. libconf->conf->power_level);
  583. if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
  584. !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
  585. rt2500usb_config_txpower(rt2x00dev,
  586. libconf->conf->power_level);
  587. if (flags & IEEE80211_CONF_CHANGE_PS)
  588. rt2500usb_config_ps(rt2x00dev, libconf);
  589. }
  590. /*
  591. * Link tuning
  592. */
  593. static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
  594. struct link_qual *qual)
  595. {
  596. u16 reg;
  597. /*
  598. * Update FCS error count from register.
  599. */
  600. rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
  601. qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
  602. /*
  603. * Update False CCA count from register.
  604. */
  605. rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
  606. qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
  607. }
  608. static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
  609. struct link_qual *qual)
  610. {
  611. u16 eeprom;
  612. u16 value;
  613. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
  614. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
  615. rt2500usb_bbp_write(rt2x00dev, 24, value);
  616. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
  617. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
  618. rt2500usb_bbp_write(rt2x00dev, 25, value);
  619. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
  620. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
  621. rt2500usb_bbp_write(rt2x00dev, 61, value);
  622. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
  623. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
  624. rt2500usb_bbp_write(rt2x00dev, 17, value);
  625. qual->vgc_level = value;
  626. }
  627. /*
  628. * Queue handlers.
  629. */
  630. static void rt2500usb_start_queue(struct data_queue *queue)
  631. {
  632. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  633. u16 reg;
  634. switch (queue->qid) {
  635. case QID_RX:
  636. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  637. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 0);
  638. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  639. break;
  640. case QID_BEACON:
  641. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  642. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  643. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  644. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
  645. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  646. break;
  647. default:
  648. break;
  649. }
  650. }
  651. static void rt2500usb_stop_queue(struct data_queue *queue)
  652. {
  653. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  654. u16 reg;
  655. switch (queue->qid) {
  656. case QID_RX:
  657. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  658. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
  659. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  660. break;
  661. case QID_BEACON:
  662. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  663. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
  664. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
  665. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  666. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  667. break;
  668. default:
  669. break;
  670. }
  671. }
  672. /*
  673. * Initialization functions.
  674. */
  675. static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
  676. {
  677. u16 reg;
  678. rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
  679. USB_MODE_TEST, REGISTER_TIMEOUT);
  680. rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
  681. 0x00f0, REGISTER_TIMEOUT);
  682. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  683. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
  684. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  685. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
  686. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
  687. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  688. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
  689. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
  690. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  691. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  692. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  693. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  694. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  695. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  696. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  697. rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
  698. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
  699. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
  700. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
  701. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
  702. rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
  703. rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
  704. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
  705. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
  706. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
  707. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
  708. rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
  709. rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
  710. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
  711. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
  712. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
  713. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
  714. rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
  715. rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
  716. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
  717. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
  718. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
  719. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
  720. rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
  721. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  722. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
  723. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
  724. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
  725. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  726. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  727. rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
  728. rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
  729. if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
  730. return -EBUSY;
  731. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  732. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  733. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  734. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
  735. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  736. if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
  737. rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
  738. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
  739. } else {
  740. reg = 0;
  741. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
  742. rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
  743. }
  744. rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
  745. rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
  746. rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
  747. rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
  748. rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
  749. rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
  750. rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
  751. rt2x00dev->rx->data_size);
  752. rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
  753. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  754. rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, CIPHER_NONE);
  755. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  756. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
  757. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  758. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  759. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
  760. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  761. rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
  762. rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
  763. rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
  764. rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
  765. rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
  766. rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
  767. return 0;
  768. }
  769. static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
  770. {
  771. unsigned int i;
  772. u8 value;
  773. for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
  774. rt2500usb_bbp_read(rt2x00dev, 0, &value);
  775. if ((value != 0xff) && (value != 0x00))
  776. return 0;
  777. udelay(REGISTER_BUSY_DELAY);
  778. }
  779. rt2x00_err(rt2x00dev, "BBP register access failed, aborting\n");
  780. return -EACCES;
  781. }
  782. static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
  783. {
  784. unsigned int i;
  785. u16 eeprom;
  786. u8 value;
  787. u8 reg_id;
  788. if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
  789. return -EACCES;
  790. rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
  791. rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
  792. rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
  793. rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
  794. rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
  795. rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
  796. rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
  797. rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
  798. rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
  799. rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
  800. rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
  801. rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
  802. rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
  803. rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
  804. rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
  805. rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
  806. rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
  807. rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
  808. rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
  809. rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
  810. rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
  811. rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
  812. rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
  813. rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
  814. rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
  815. rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
  816. rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
  817. rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
  818. rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
  819. rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
  820. rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
  821. for (i = 0; i < EEPROM_BBP_SIZE; i++) {
  822. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
  823. if (eeprom != 0xffff && eeprom != 0x0000) {
  824. reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
  825. value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
  826. rt2500usb_bbp_write(rt2x00dev, reg_id, value);
  827. }
  828. }
  829. return 0;
  830. }
  831. /*
  832. * Device state switch handlers.
  833. */
  834. static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
  835. {
  836. /*
  837. * Initialize all registers.
  838. */
  839. if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
  840. rt2500usb_init_bbp(rt2x00dev)))
  841. return -EIO;
  842. return 0;
  843. }
  844. static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
  845. {
  846. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
  847. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
  848. /*
  849. * Disable synchronisation.
  850. */
  851. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  852. rt2x00usb_disable_radio(rt2x00dev);
  853. }
  854. static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
  855. enum dev_state state)
  856. {
  857. u16 reg;
  858. u16 reg2;
  859. unsigned int i;
  860. char put_to_sleep;
  861. char bbp_state;
  862. char rf_state;
  863. put_to_sleep = (state != STATE_AWAKE);
  864. reg = 0;
  865. rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
  866. rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
  867. rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
  868. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  869. rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
  870. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  871. /*
  872. * Device is not guaranteed to be in the requested state yet.
  873. * We must wait until the register indicates that the
  874. * device has entered the correct state.
  875. */
  876. for (i = 0; i < REGISTER_USB_BUSY_COUNT; i++) {
  877. rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
  878. bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
  879. rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
  880. if (bbp_state == state && rf_state == state)
  881. return 0;
  882. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  883. msleep(30);
  884. }
  885. return -EBUSY;
  886. }
  887. static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
  888. enum dev_state state)
  889. {
  890. int retval = 0;
  891. switch (state) {
  892. case STATE_RADIO_ON:
  893. retval = rt2500usb_enable_radio(rt2x00dev);
  894. break;
  895. case STATE_RADIO_OFF:
  896. rt2500usb_disable_radio(rt2x00dev);
  897. break;
  898. case STATE_RADIO_IRQ_ON:
  899. case STATE_RADIO_IRQ_OFF:
  900. /* No support, but no error either */
  901. break;
  902. case STATE_DEEP_SLEEP:
  903. case STATE_SLEEP:
  904. case STATE_STANDBY:
  905. case STATE_AWAKE:
  906. retval = rt2500usb_set_state(rt2x00dev, state);
  907. break;
  908. default:
  909. retval = -ENOTSUPP;
  910. break;
  911. }
  912. if (unlikely(retval))
  913. rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n",
  914. state, retval);
  915. return retval;
  916. }
  917. /*
  918. * TX descriptor initialization
  919. */
  920. static void rt2500usb_write_tx_desc(struct queue_entry *entry,
  921. struct txentry_desc *txdesc)
  922. {
  923. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  924. __le32 *txd = (__le32 *) entry->skb->data;
  925. u32 word;
  926. /*
  927. * Start writing the descriptor words.
  928. */
  929. rt2x00_desc_read(txd, 0, &word);
  930. rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
  931. rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
  932. test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
  933. rt2x00_set_field32(&word, TXD_W0_ACK,
  934. test_bit(ENTRY_TXD_ACK, &txdesc->flags));
  935. rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
  936. test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
  937. rt2x00_set_field32(&word, TXD_W0_OFDM,
  938. (txdesc->rate_mode == RATE_MODE_OFDM));
  939. rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
  940. test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
  941. rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs);
  942. rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
  943. rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
  944. rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
  945. rt2x00_desc_write(txd, 0, word);
  946. rt2x00_desc_read(txd, 1, &word);
  947. rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
  948. rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs);
  949. rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
  950. rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
  951. rt2x00_desc_write(txd, 1, word);
  952. rt2x00_desc_read(txd, 2, &word);
  953. rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal);
  954. rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service);
  955. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW,
  956. txdesc->u.plcp.length_low);
  957. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH,
  958. txdesc->u.plcp.length_high);
  959. rt2x00_desc_write(txd, 2, word);
  960. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
  961. _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
  962. _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
  963. }
  964. /*
  965. * Register descriptor details in skb frame descriptor.
  966. */
  967. skbdesc->flags |= SKBDESC_DESC_IN_SKB;
  968. skbdesc->desc = txd;
  969. skbdesc->desc_len = TXD_DESC_SIZE;
  970. }
  971. /*
  972. * TX data initialization
  973. */
  974. static void rt2500usb_beacondone(struct urb *urb);
  975. static void rt2500usb_write_beacon(struct queue_entry *entry,
  976. struct txentry_desc *txdesc)
  977. {
  978. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  979. struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
  980. struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
  981. int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
  982. int length;
  983. u16 reg, reg0;
  984. /*
  985. * Disable beaconing while we are reloading the beacon data,
  986. * otherwise we might be sending out invalid data.
  987. */
  988. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  989. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  990. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  991. /*
  992. * Add space for the descriptor in front of the skb.
  993. */
  994. skb_push(entry->skb, TXD_DESC_SIZE);
  995. memset(entry->skb->data, 0, TXD_DESC_SIZE);
  996. /*
  997. * Write the TX descriptor for the beacon.
  998. */
  999. rt2500usb_write_tx_desc(entry, txdesc);
  1000. /*
  1001. * Dump beacon to userspace through debugfs.
  1002. */
  1003. rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
  1004. /*
  1005. * USB devices cannot blindly pass the skb->len as the
  1006. * length of the data to usb_fill_bulk_urb. Pass the skb
  1007. * to the driver to determine what the length should be.
  1008. */
  1009. length = rt2x00dev->ops->lib->get_tx_data_len(entry);
  1010. usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
  1011. entry->skb->data, length, rt2500usb_beacondone,
  1012. entry);
  1013. /*
  1014. * Second we need to create the guardian byte.
  1015. * We only need a single byte, so lets recycle
  1016. * the 'flags' field we are not using for beacons.
  1017. */
  1018. bcn_priv->guardian_data = 0;
  1019. usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
  1020. &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
  1021. entry);
  1022. /*
  1023. * Send out the guardian byte.
  1024. */
  1025. usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
  1026. /*
  1027. * Enable beaconing again.
  1028. */
  1029. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  1030. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  1031. reg0 = reg;
  1032. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
  1033. /*
  1034. * Beacon generation will fail initially.
  1035. * To prevent this we need to change the TXRX_CSR19
  1036. * register several times (reg0 is the same as reg
  1037. * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
  1038. * and 1 in reg).
  1039. */
  1040. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1041. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
  1042. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1043. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
  1044. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1045. }
  1046. static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
  1047. {
  1048. int length;
  1049. /*
  1050. * The length _must_ be a multiple of 2,
  1051. * but it must _not_ be a multiple of the USB packet size.
  1052. */
  1053. length = roundup(entry->skb->len, 2);
  1054. length += (2 * !(length % entry->queue->usb_maxpacket));
  1055. return length;
  1056. }
  1057. /*
  1058. * RX control handlers
  1059. */
  1060. static void rt2500usb_fill_rxdone(struct queue_entry *entry,
  1061. struct rxdone_entry_desc *rxdesc)
  1062. {
  1063. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  1064. struct queue_entry_priv_usb *entry_priv = entry->priv_data;
  1065. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  1066. __le32 *rxd =
  1067. (__le32 *)(entry->skb->data +
  1068. (entry_priv->urb->actual_length -
  1069. entry->queue->desc_size));
  1070. u32 word0;
  1071. u32 word1;
  1072. /*
  1073. * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
  1074. * frame data in rt2x00usb.
  1075. */
  1076. memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
  1077. rxd = (__le32 *)skbdesc->desc;
  1078. /*
  1079. * It is now safe to read the descriptor on all architectures.
  1080. */
  1081. rt2x00_desc_read(rxd, 0, &word0);
  1082. rt2x00_desc_read(rxd, 1, &word1);
  1083. if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
  1084. rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
  1085. if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
  1086. rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
  1087. rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
  1088. if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
  1089. rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
  1090. if (rxdesc->cipher != CIPHER_NONE) {
  1091. _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
  1092. _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
  1093. rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
  1094. /* ICV is located at the end of frame */
  1095. rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
  1096. if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
  1097. rxdesc->flags |= RX_FLAG_DECRYPTED;
  1098. else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
  1099. rxdesc->flags |= RX_FLAG_MMIC_ERROR;
  1100. }
  1101. /*
  1102. * Obtain the status about this packet.
  1103. * When frame was received with an OFDM bitrate,
  1104. * the signal is the PLCP value. If it was received with
  1105. * a CCK bitrate the signal is the rate in 100kbit/s.
  1106. */
  1107. rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
  1108. rxdesc->rssi =
  1109. rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
  1110. rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
  1111. if (rt2x00_get_field32(word0, RXD_W0_OFDM))
  1112. rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
  1113. else
  1114. rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
  1115. if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
  1116. rxdesc->dev_flags |= RXDONE_MY_BSS;
  1117. /*
  1118. * Adjust the skb memory window to the frame boundaries.
  1119. */
  1120. skb_trim(entry->skb, rxdesc->size);
  1121. }
  1122. /*
  1123. * Interrupt functions.
  1124. */
  1125. static void rt2500usb_beacondone(struct urb *urb)
  1126. {
  1127. struct queue_entry *entry = (struct queue_entry *)urb->context;
  1128. struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
  1129. if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
  1130. return;
  1131. /*
  1132. * Check if this was the guardian beacon,
  1133. * if that was the case we need to send the real beacon now.
  1134. * Otherwise we should free the sk_buffer, the device
  1135. * should be doing the rest of the work now.
  1136. */
  1137. if (bcn_priv->guardian_urb == urb) {
  1138. usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
  1139. } else if (bcn_priv->urb == urb) {
  1140. dev_kfree_skb(entry->skb);
  1141. entry->skb = NULL;
  1142. }
  1143. }
  1144. /*
  1145. * Device probe functions.
  1146. */
  1147. static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
  1148. {
  1149. u16 word;
  1150. u8 *mac;
  1151. u8 bbp;
  1152. rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
  1153. /*
  1154. * Start validation of the data that has been read.
  1155. */
  1156. mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
  1157. if (!is_valid_ether_addr(mac)) {
  1158. eth_random_addr(mac);
  1159. rt2x00_eeprom_dbg(rt2x00dev, "MAC: %pM\n", mac);
  1160. }
  1161. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
  1162. if (word == 0xffff) {
  1163. rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
  1164. rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
  1165. ANTENNA_SW_DIVERSITY);
  1166. rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
  1167. ANTENNA_SW_DIVERSITY);
  1168. rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
  1169. LED_MODE_DEFAULT);
  1170. rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
  1171. rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
  1172. rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
  1173. rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
  1174. rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
  1175. }
  1176. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
  1177. if (word == 0xffff) {
  1178. rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
  1179. rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
  1180. rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
  1181. rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
  1182. rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word);
  1183. }
  1184. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
  1185. if (word == 0xffff) {
  1186. rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
  1187. DEFAULT_RSSI_OFFSET);
  1188. rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
  1189. rt2x00_eeprom_dbg(rt2x00dev, "Calibrate offset: 0x%04x\n",
  1190. word);
  1191. }
  1192. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
  1193. if (word == 0xffff) {
  1194. rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
  1195. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
  1196. rt2x00_eeprom_dbg(rt2x00dev, "BBPtune: 0x%04x\n", word);
  1197. }
  1198. /*
  1199. * Switch lower vgc bound to current BBP R17 value,
  1200. * lower the value a bit for better quality.
  1201. */
  1202. rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
  1203. bbp -= 6;
  1204. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
  1205. if (word == 0xffff) {
  1206. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
  1207. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1208. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1209. rt2x00_eeprom_dbg(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
  1210. } else {
  1211. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1212. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1213. }
  1214. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
  1215. if (word == 0xffff) {
  1216. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
  1217. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
  1218. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
  1219. rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
  1220. }
  1221. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
  1222. if (word == 0xffff) {
  1223. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
  1224. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
  1225. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
  1226. rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
  1227. }
  1228. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
  1229. if (word == 0xffff) {
  1230. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
  1231. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
  1232. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
  1233. rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
  1234. }
  1235. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
  1236. if (word == 0xffff) {
  1237. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
  1238. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
  1239. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
  1240. rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
  1241. }
  1242. return 0;
  1243. }
  1244. static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
  1245. {
  1246. u16 reg;
  1247. u16 value;
  1248. u16 eeprom;
  1249. /*
  1250. * Read EEPROM word for configuration.
  1251. */
  1252. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
  1253. /*
  1254. * Identify RF chipset.
  1255. */
  1256. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
  1257. rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
  1258. rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
  1259. if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
  1260. rt2x00_err(rt2x00dev, "Invalid RT chipset detected\n");
  1261. return -ENODEV;
  1262. }
  1263. if (!rt2x00_rf(rt2x00dev, RF2522) &&
  1264. !rt2x00_rf(rt2x00dev, RF2523) &&
  1265. !rt2x00_rf(rt2x00dev, RF2524) &&
  1266. !rt2x00_rf(rt2x00dev, RF2525) &&
  1267. !rt2x00_rf(rt2x00dev, RF2525E) &&
  1268. !rt2x00_rf(rt2x00dev, RF5222)) {
  1269. rt2x00_err(rt2x00dev, "Invalid RF chipset detected\n");
  1270. return -ENODEV;
  1271. }
  1272. /*
  1273. * Identify default antenna configuration.
  1274. */
  1275. rt2x00dev->default_ant.tx =
  1276. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
  1277. rt2x00dev->default_ant.rx =
  1278. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
  1279. /*
  1280. * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
  1281. * I am not 100% sure about this, but the legacy drivers do not
  1282. * indicate antenna swapping in software is required when
  1283. * diversity is enabled.
  1284. */
  1285. if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
  1286. rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
  1287. if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
  1288. rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
  1289. /*
  1290. * Store led mode, for correct led behaviour.
  1291. */
  1292. #ifdef CONFIG_RT2X00_LIB_LEDS
  1293. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
  1294. rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
  1295. if (value == LED_MODE_TXRX_ACTIVITY ||
  1296. value == LED_MODE_DEFAULT ||
  1297. value == LED_MODE_ASUS)
  1298. rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
  1299. LED_TYPE_ACTIVITY);
  1300. #endif /* CONFIG_RT2X00_LIB_LEDS */
  1301. /*
  1302. * Detect if this device has an hardware controlled radio.
  1303. */
  1304. if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
  1305. __set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags);
  1306. /*
  1307. * Read the RSSI <-> dBm offset information.
  1308. */
  1309. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
  1310. rt2x00dev->rssi_offset =
  1311. rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
  1312. return 0;
  1313. }
  1314. /*
  1315. * RF value list for RF2522
  1316. * Supports: 2.4 GHz
  1317. */
  1318. static const struct rf_channel rf_vals_bg_2522[] = {
  1319. { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
  1320. { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
  1321. { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
  1322. { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
  1323. { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
  1324. { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
  1325. { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
  1326. { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
  1327. { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
  1328. { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
  1329. { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
  1330. { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
  1331. { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
  1332. { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
  1333. };
  1334. /*
  1335. * RF value list for RF2523
  1336. * Supports: 2.4 GHz
  1337. */
  1338. static const struct rf_channel rf_vals_bg_2523[] = {
  1339. { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
  1340. { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
  1341. { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
  1342. { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
  1343. { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
  1344. { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
  1345. { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
  1346. { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
  1347. { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
  1348. { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
  1349. { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
  1350. { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
  1351. { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
  1352. { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
  1353. };
  1354. /*
  1355. * RF value list for RF2524
  1356. * Supports: 2.4 GHz
  1357. */
  1358. static const struct rf_channel rf_vals_bg_2524[] = {
  1359. { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
  1360. { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
  1361. { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
  1362. { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
  1363. { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
  1364. { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
  1365. { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
  1366. { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
  1367. { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
  1368. { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
  1369. { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
  1370. { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
  1371. { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
  1372. { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
  1373. };
  1374. /*
  1375. * RF value list for RF2525
  1376. * Supports: 2.4 GHz
  1377. */
  1378. static const struct rf_channel rf_vals_bg_2525[] = {
  1379. { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
  1380. { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
  1381. { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
  1382. { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
  1383. { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
  1384. { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
  1385. { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
  1386. { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
  1387. { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
  1388. { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
  1389. { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
  1390. { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
  1391. { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
  1392. { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
  1393. };
  1394. /*
  1395. * RF value list for RF2525e
  1396. * Supports: 2.4 GHz
  1397. */
  1398. static const struct rf_channel rf_vals_bg_2525e[] = {
  1399. { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
  1400. { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
  1401. { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
  1402. { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
  1403. { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
  1404. { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
  1405. { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
  1406. { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
  1407. { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
  1408. { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
  1409. { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
  1410. { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
  1411. { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
  1412. { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
  1413. };
  1414. /*
  1415. * RF value list for RF5222
  1416. * Supports: 2.4 GHz & 5.2 GHz
  1417. */
  1418. static const struct rf_channel rf_vals_5222[] = {
  1419. { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
  1420. { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
  1421. { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
  1422. { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
  1423. { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
  1424. { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
  1425. { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
  1426. { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
  1427. { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
  1428. { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
  1429. { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
  1430. { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
  1431. { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
  1432. { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
  1433. /* 802.11 UNI / HyperLan 2 */
  1434. { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
  1435. { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
  1436. { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
  1437. { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
  1438. { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
  1439. { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
  1440. { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
  1441. { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
  1442. /* 802.11 HyperLan 2 */
  1443. { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
  1444. { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
  1445. { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
  1446. { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
  1447. { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
  1448. { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
  1449. { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
  1450. { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
  1451. { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
  1452. { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
  1453. /* 802.11 UNII */
  1454. { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
  1455. { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
  1456. { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
  1457. { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
  1458. { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
  1459. };
  1460. static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
  1461. {
  1462. struct hw_mode_spec *spec = &rt2x00dev->spec;
  1463. struct channel_info *info;
  1464. char *tx_power;
  1465. unsigned int i;
  1466. /*
  1467. * Initialize all hw fields.
  1468. *
  1469. * Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are
  1470. * capable of sending the buffered frames out after the DTIM
  1471. * transmission using rt2x00lib_beacondone. This will send out
  1472. * multicast and broadcast traffic immediately instead of buffering it
  1473. * infinitly and thus dropping it after some time.
  1474. */
  1475. ieee80211_hw_set(rt2x00dev->hw, PS_NULLFUNC_STACK);
  1476. ieee80211_hw_set(rt2x00dev->hw, SUPPORTS_PS);
  1477. ieee80211_hw_set(rt2x00dev->hw, RX_INCLUDES_FCS);
  1478. ieee80211_hw_set(rt2x00dev->hw, SIGNAL_DBM);
  1479. /*
  1480. * Disable powersaving as default.
  1481. */
  1482. rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  1483. SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
  1484. SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
  1485. rt2x00_eeprom_addr(rt2x00dev,
  1486. EEPROM_MAC_ADDR_0));
  1487. /*
  1488. * Initialize hw_mode information.
  1489. */
  1490. spec->supported_bands = SUPPORT_BAND_2GHZ;
  1491. spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
  1492. if (rt2x00_rf(rt2x00dev, RF2522)) {
  1493. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
  1494. spec->channels = rf_vals_bg_2522;
  1495. } else if (rt2x00_rf(rt2x00dev, RF2523)) {
  1496. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
  1497. spec->channels = rf_vals_bg_2523;
  1498. } else if (rt2x00_rf(rt2x00dev, RF2524)) {
  1499. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
  1500. spec->channels = rf_vals_bg_2524;
  1501. } else if (rt2x00_rf(rt2x00dev, RF2525)) {
  1502. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
  1503. spec->channels = rf_vals_bg_2525;
  1504. } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
  1505. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
  1506. spec->channels = rf_vals_bg_2525e;
  1507. } else if (rt2x00_rf(rt2x00dev, RF5222)) {
  1508. spec->supported_bands |= SUPPORT_BAND_5GHZ;
  1509. spec->num_channels = ARRAY_SIZE(rf_vals_5222);
  1510. spec->channels = rf_vals_5222;
  1511. }
  1512. /*
  1513. * Create channel information array
  1514. */
  1515. info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL);
  1516. if (!info)
  1517. return -ENOMEM;
  1518. spec->channels_info = info;
  1519. tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
  1520. for (i = 0; i < 14; i++) {
  1521. info[i].max_power = MAX_TXPOWER;
  1522. info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]);
  1523. }
  1524. if (spec->num_channels > 14) {
  1525. for (i = 14; i < spec->num_channels; i++) {
  1526. info[i].max_power = MAX_TXPOWER;
  1527. info[i].default_power1 = DEFAULT_TXPOWER;
  1528. }
  1529. }
  1530. return 0;
  1531. }
  1532. static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
  1533. {
  1534. int retval;
  1535. u16 reg;
  1536. /*
  1537. * Allocate eeprom data.
  1538. */
  1539. retval = rt2500usb_validate_eeprom(rt2x00dev);
  1540. if (retval)
  1541. return retval;
  1542. retval = rt2500usb_init_eeprom(rt2x00dev);
  1543. if (retval)
  1544. return retval;
  1545. /*
  1546. * Enable rfkill polling by setting GPIO direction of the
  1547. * rfkill switch GPIO pin correctly.
  1548. */
  1549. rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
  1550. rt2x00_set_field16(&reg, MAC_CSR19_DIR0, 0);
  1551. rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg);
  1552. /*
  1553. * Initialize hw specifications.
  1554. */
  1555. retval = rt2500usb_probe_hw_mode(rt2x00dev);
  1556. if (retval)
  1557. return retval;
  1558. /*
  1559. * This device requires the atim queue
  1560. */
  1561. __set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
  1562. __set_bit(REQUIRE_BEACON_GUARD, &rt2x00dev->cap_flags);
  1563. if (!modparam_nohwcrypt) {
  1564. __set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags);
  1565. __set_bit(REQUIRE_COPY_IV, &rt2x00dev->cap_flags);
  1566. }
  1567. __set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags);
  1568. __set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags);
  1569. /*
  1570. * Set the rssi offset.
  1571. */
  1572. rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
  1573. return 0;
  1574. }
  1575. static const struct ieee80211_ops rt2500usb_mac80211_ops = {
  1576. .tx = rt2x00mac_tx,
  1577. .start = rt2x00mac_start,
  1578. .stop = rt2x00mac_stop,
  1579. .add_interface = rt2x00mac_add_interface,
  1580. .remove_interface = rt2x00mac_remove_interface,
  1581. .config = rt2x00mac_config,
  1582. .configure_filter = rt2x00mac_configure_filter,
  1583. .set_tim = rt2x00mac_set_tim,
  1584. .set_key = rt2x00mac_set_key,
  1585. .sw_scan_start = rt2x00mac_sw_scan_start,
  1586. .sw_scan_complete = rt2x00mac_sw_scan_complete,
  1587. .get_stats = rt2x00mac_get_stats,
  1588. .bss_info_changed = rt2x00mac_bss_info_changed,
  1589. .conf_tx = rt2x00mac_conf_tx,
  1590. .rfkill_poll = rt2x00mac_rfkill_poll,
  1591. .flush = rt2x00mac_flush,
  1592. .set_antenna = rt2x00mac_set_antenna,
  1593. .get_antenna = rt2x00mac_get_antenna,
  1594. .get_ringparam = rt2x00mac_get_ringparam,
  1595. .tx_frames_pending = rt2x00mac_tx_frames_pending,
  1596. };
  1597. static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
  1598. .probe_hw = rt2500usb_probe_hw,
  1599. .initialize = rt2x00usb_initialize,
  1600. .uninitialize = rt2x00usb_uninitialize,
  1601. .clear_entry = rt2x00usb_clear_entry,
  1602. .set_device_state = rt2500usb_set_device_state,
  1603. .rfkill_poll = rt2500usb_rfkill_poll,
  1604. .link_stats = rt2500usb_link_stats,
  1605. .reset_tuner = rt2500usb_reset_tuner,
  1606. .watchdog = rt2x00usb_watchdog,
  1607. .start_queue = rt2500usb_start_queue,
  1608. .kick_queue = rt2x00usb_kick_queue,
  1609. .stop_queue = rt2500usb_stop_queue,
  1610. .flush_queue = rt2x00usb_flush_queue,
  1611. .write_tx_desc = rt2500usb_write_tx_desc,
  1612. .write_beacon = rt2500usb_write_beacon,
  1613. .get_tx_data_len = rt2500usb_get_tx_data_len,
  1614. .fill_rxdone = rt2500usb_fill_rxdone,
  1615. .config_shared_key = rt2500usb_config_key,
  1616. .config_pairwise_key = rt2500usb_config_key,
  1617. .config_filter = rt2500usb_config_filter,
  1618. .config_intf = rt2500usb_config_intf,
  1619. .config_erp = rt2500usb_config_erp,
  1620. .config_ant = rt2500usb_config_ant,
  1621. .config = rt2500usb_config,
  1622. };
  1623. static void rt2500usb_queue_init(struct data_queue *queue)
  1624. {
  1625. switch (queue->qid) {
  1626. case QID_RX:
  1627. queue->limit = 32;
  1628. queue->data_size = DATA_FRAME_SIZE;
  1629. queue->desc_size = RXD_DESC_SIZE;
  1630. queue->priv_size = sizeof(struct queue_entry_priv_usb);
  1631. break;
  1632. case QID_AC_VO:
  1633. case QID_AC_VI:
  1634. case QID_AC_BE:
  1635. case QID_AC_BK:
  1636. queue->limit = 32;
  1637. queue->data_size = DATA_FRAME_SIZE;
  1638. queue->desc_size = TXD_DESC_SIZE;
  1639. queue->priv_size = sizeof(struct queue_entry_priv_usb);
  1640. break;
  1641. case QID_BEACON:
  1642. queue->limit = 1;
  1643. queue->data_size = MGMT_FRAME_SIZE;
  1644. queue->desc_size = TXD_DESC_SIZE;
  1645. queue->priv_size = sizeof(struct queue_entry_priv_usb_bcn);
  1646. break;
  1647. case QID_ATIM:
  1648. queue->limit = 8;
  1649. queue->data_size = DATA_FRAME_SIZE;
  1650. queue->desc_size = TXD_DESC_SIZE;
  1651. queue->priv_size = sizeof(struct queue_entry_priv_usb);
  1652. break;
  1653. default:
  1654. BUG();
  1655. break;
  1656. }
  1657. }
  1658. static const struct rt2x00_ops rt2500usb_ops = {
  1659. .name = KBUILD_MODNAME,
  1660. .max_ap_intf = 1,
  1661. .eeprom_size = EEPROM_SIZE,
  1662. .rf_size = RF_SIZE,
  1663. .tx_queues = NUM_TX_QUEUES,
  1664. .queue_init = rt2500usb_queue_init,
  1665. .lib = &rt2500usb_rt2x00_ops,
  1666. .hw = &rt2500usb_mac80211_ops,
  1667. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  1668. .debugfs = &rt2500usb_rt2x00debug,
  1669. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  1670. };
  1671. /*
  1672. * rt2500usb module information.
  1673. */
  1674. static struct usb_device_id rt2500usb_device_table[] = {
  1675. /* ASUS */
  1676. { USB_DEVICE(0x0b05, 0x1706) },
  1677. { USB_DEVICE(0x0b05, 0x1707) },
  1678. /* Belkin */
  1679. { USB_DEVICE(0x050d, 0x7050) }, /* FCC ID: K7SF5D7050A ver. 2.x */
  1680. { USB_DEVICE(0x050d, 0x7051) },
  1681. /* Cisco Systems */
  1682. { USB_DEVICE(0x13b1, 0x000d) },
  1683. { USB_DEVICE(0x13b1, 0x0011) },
  1684. { USB_DEVICE(0x13b1, 0x001a) },
  1685. /* Conceptronic */
  1686. { USB_DEVICE(0x14b2, 0x3c02) },
  1687. /* D-LINK */
  1688. { USB_DEVICE(0x2001, 0x3c00) },
  1689. /* Gigabyte */
  1690. { USB_DEVICE(0x1044, 0x8001) },
  1691. { USB_DEVICE(0x1044, 0x8007) },
  1692. /* Hercules */
  1693. { USB_DEVICE(0x06f8, 0xe000) },
  1694. /* Melco */
  1695. { USB_DEVICE(0x0411, 0x005e) },
  1696. { USB_DEVICE(0x0411, 0x0066) },
  1697. { USB_DEVICE(0x0411, 0x0067) },
  1698. { USB_DEVICE(0x0411, 0x008b) },
  1699. { USB_DEVICE(0x0411, 0x0097) },
  1700. /* MSI */
  1701. { USB_DEVICE(0x0db0, 0x6861) },
  1702. { USB_DEVICE(0x0db0, 0x6865) },
  1703. { USB_DEVICE(0x0db0, 0x6869) },
  1704. /* Ralink */
  1705. { USB_DEVICE(0x148f, 0x1706) },
  1706. { USB_DEVICE(0x148f, 0x2570) },
  1707. { USB_DEVICE(0x148f, 0x9020) },
  1708. /* Sagem */
  1709. { USB_DEVICE(0x079b, 0x004b) },
  1710. /* Siemens */
  1711. { USB_DEVICE(0x0681, 0x3c06) },
  1712. /* SMC */
  1713. { USB_DEVICE(0x0707, 0xee13) },
  1714. /* Spairon */
  1715. { USB_DEVICE(0x114b, 0x0110) },
  1716. /* SURECOM */
  1717. { USB_DEVICE(0x0769, 0x11f3) },
  1718. /* Trust */
  1719. { USB_DEVICE(0x0eb0, 0x9020) },
  1720. /* VTech */
  1721. { USB_DEVICE(0x0f88, 0x3012) },
  1722. /* Zinwell */
  1723. { USB_DEVICE(0x5a57, 0x0260) },
  1724. { 0, }
  1725. };
  1726. MODULE_AUTHOR(DRV_PROJECT);
  1727. MODULE_VERSION(DRV_VERSION);
  1728. MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
  1729. MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
  1730. MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
  1731. MODULE_LICENSE("GPL");
  1732. static int rt2500usb_probe(struct usb_interface *usb_intf,
  1733. const struct usb_device_id *id)
  1734. {
  1735. return rt2x00usb_probe(usb_intf, &rt2500usb_ops);
  1736. }
  1737. static struct usb_driver rt2500usb_driver = {
  1738. .name = KBUILD_MODNAME,
  1739. .id_table = rt2500usb_device_table,
  1740. .probe = rt2500usb_probe,
  1741. .disconnect = rt2x00usb_disconnect,
  1742. .suspend = rt2x00usb_suspend,
  1743. .resume = rt2x00usb_resume,
  1744. .reset_resume = rt2x00usb_resume,
  1745. .disable_hub_initiated_lpm = 1,
  1746. };
  1747. module_usb_driver(rt2500usb_driver);