rt2x00queue.c 33 KB

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  1. /*
  2. Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
  3. Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  4. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  5. <http://rt2x00.serialmonkey.com>
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, see <http://www.gnu.org/licenses/>.
  16. */
  17. /*
  18. Module: rt2x00lib
  19. Abstract: rt2x00 queue specific routines.
  20. */
  21. #include <linux/slab.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/dma-mapping.h>
  25. #include "rt2x00.h"
  26. #include "rt2x00lib.h"
  27. struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp)
  28. {
  29. struct data_queue *queue = entry->queue;
  30. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  31. struct sk_buff *skb;
  32. struct skb_frame_desc *skbdesc;
  33. unsigned int frame_size;
  34. unsigned int head_size = 0;
  35. unsigned int tail_size = 0;
  36. /*
  37. * The frame size includes descriptor size, because the
  38. * hardware directly receive the frame into the skbuffer.
  39. */
  40. frame_size = queue->data_size + queue->desc_size + queue->winfo_size;
  41. /*
  42. * The payload should be aligned to a 4-byte boundary,
  43. * this means we need at least 3 bytes for moving the frame
  44. * into the correct offset.
  45. */
  46. head_size = 4;
  47. /*
  48. * For IV/EIV/ICV assembly we must make sure there is
  49. * at least 8 bytes bytes available in headroom for IV/EIV
  50. * and 8 bytes for ICV data as tailroon.
  51. */
  52. if (rt2x00_has_cap_hw_crypto(rt2x00dev)) {
  53. head_size += 8;
  54. tail_size += 8;
  55. }
  56. /*
  57. * Allocate skbuffer.
  58. */
  59. skb = __dev_alloc_skb(frame_size + head_size + tail_size, gfp);
  60. if (!skb)
  61. return NULL;
  62. /*
  63. * Make sure we not have a frame with the requested bytes
  64. * available in the head and tail.
  65. */
  66. skb_reserve(skb, head_size);
  67. skb_put(skb, frame_size);
  68. /*
  69. * Populate skbdesc.
  70. */
  71. skbdesc = get_skb_frame_desc(skb);
  72. memset(skbdesc, 0, sizeof(*skbdesc));
  73. skbdesc->entry = entry;
  74. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA)) {
  75. dma_addr_t skb_dma;
  76. skb_dma = dma_map_single(rt2x00dev->dev, skb->data, skb->len,
  77. DMA_FROM_DEVICE);
  78. if (unlikely(dma_mapping_error(rt2x00dev->dev, skb_dma))) {
  79. dev_kfree_skb_any(skb);
  80. return NULL;
  81. }
  82. skbdesc->skb_dma = skb_dma;
  83. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  84. }
  85. return skb;
  86. }
  87. int rt2x00queue_map_txskb(struct queue_entry *entry)
  88. {
  89. struct device *dev = entry->queue->rt2x00dev->dev;
  90. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  91. skbdesc->skb_dma =
  92. dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
  93. if (unlikely(dma_mapping_error(dev, skbdesc->skb_dma)))
  94. return -ENOMEM;
  95. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  96. return 0;
  97. }
  98. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  99. void rt2x00queue_unmap_skb(struct queue_entry *entry)
  100. {
  101. struct device *dev = entry->queue->rt2x00dev->dev;
  102. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  103. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  104. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  105. DMA_FROM_DEVICE);
  106. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  107. } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  108. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  109. DMA_TO_DEVICE);
  110. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  111. }
  112. }
  113. EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
  114. void rt2x00queue_free_skb(struct queue_entry *entry)
  115. {
  116. if (!entry->skb)
  117. return;
  118. rt2x00queue_unmap_skb(entry);
  119. dev_kfree_skb_any(entry->skb);
  120. entry->skb = NULL;
  121. }
  122. void rt2x00queue_align_frame(struct sk_buff *skb)
  123. {
  124. unsigned int frame_length = skb->len;
  125. unsigned int align = ALIGN_SIZE(skb, 0);
  126. if (!align)
  127. return;
  128. skb_push(skb, align);
  129. memmove(skb->data, skb->data + align, frame_length);
  130. skb_trim(skb, frame_length);
  131. }
  132. /*
  133. * H/W needs L2 padding between the header and the paylod if header size
  134. * is not 4 bytes aligned.
  135. */
  136. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int hdr_len)
  137. {
  138. unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
  139. if (!l2pad)
  140. return;
  141. skb_push(skb, l2pad);
  142. memmove(skb->data, skb->data + l2pad, hdr_len);
  143. }
  144. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int hdr_len)
  145. {
  146. unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
  147. if (!l2pad)
  148. return;
  149. memmove(skb->data + l2pad, skb->data, hdr_len);
  150. skb_pull(skb, l2pad);
  151. }
  152. static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev,
  153. struct sk_buff *skb,
  154. struct txentry_desc *txdesc)
  155. {
  156. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  157. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  158. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  159. u16 seqno;
  160. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
  161. return;
  162. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  163. if (!rt2x00_has_cap_flag(rt2x00dev, REQUIRE_SW_SEQNO)) {
  164. /*
  165. * rt2800 has a H/W (or F/W) bug, device incorrectly increase
  166. * seqno on retransmited data (non-QOS) frames. To workaround
  167. * the problem let's generate seqno in software if QOS is
  168. * disabled.
  169. */
  170. if (test_bit(CONFIG_QOS_DISABLED, &rt2x00dev->flags))
  171. __clear_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  172. else
  173. /* H/W will generate sequence number */
  174. return;
  175. }
  176. /*
  177. * The hardware is not able to insert a sequence number. Assign a
  178. * software generated one here.
  179. *
  180. * This is wrong because beacons are not getting sequence
  181. * numbers assigned properly.
  182. *
  183. * A secondary problem exists for drivers that cannot toggle
  184. * sequence counting per-frame, since those will override the
  185. * sequence counter given by mac80211.
  186. */
  187. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  188. seqno = atomic_add_return(0x10, &intf->seqno);
  189. else
  190. seqno = atomic_read(&intf->seqno);
  191. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  192. hdr->seq_ctrl |= cpu_to_le16(seqno);
  193. }
  194. static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev,
  195. struct sk_buff *skb,
  196. struct txentry_desc *txdesc,
  197. const struct rt2x00_rate *hwrate)
  198. {
  199. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  200. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  201. unsigned int data_length;
  202. unsigned int duration;
  203. unsigned int residual;
  204. /*
  205. * Determine with what IFS priority this frame should be send.
  206. * Set ifs to IFS_SIFS when the this is not the first fragment,
  207. * or this fragment came after RTS/CTS.
  208. */
  209. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  210. txdesc->u.plcp.ifs = IFS_BACKOFF;
  211. else
  212. txdesc->u.plcp.ifs = IFS_SIFS;
  213. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  214. data_length = skb->len + 4;
  215. data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb);
  216. /*
  217. * PLCP setup
  218. * Length calculation depends on OFDM/CCK rate.
  219. */
  220. txdesc->u.plcp.signal = hwrate->plcp;
  221. txdesc->u.plcp.service = 0x04;
  222. if (hwrate->flags & DEV_RATE_OFDM) {
  223. txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
  224. txdesc->u.plcp.length_low = data_length & 0x3f;
  225. } else {
  226. /*
  227. * Convert length to microseconds.
  228. */
  229. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  230. duration = GET_DURATION(data_length, hwrate->bitrate);
  231. if (residual != 0) {
  232. duration++;
  233. /*
  234. * Check if we need to set the Length Extension
  235. */
  236. if (hwrate->bitrate == 110 && residual <= 30)
  237. txdesc->u.plcp.service |= 0x80;
  238. }
  239. txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
  240. txdesc->u.plcp.length_low = duration & 0xff;
  241. /*
  242. * When preamble is enabled we should set the
  243. * preamble bit for the signal.
  244. */
  245. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  246. txdesc->u.plcp.signal |= 0x08;
  247. }
  248. }
  249. static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
  250. struct sk_buff *skb,
  251. struct txentry_desc *txdesc,
  252. struct ieee80211_sta *sta,
  253. const struct rt2x00_rate *hwrate)
  254. {
  255. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  256. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  257. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  258. struct rt2x00_sta *sta_priv = NULL;
  259. if (sta) {
  260. txdesc->u.ht.mpdu_density =
  261. sta->ht_cap.ampdu_density;
  262. sta_priv = sta_to_rt2x00_sta(sta);
  263. txdesc->u.ht.wcid = sta_priv->wcid;
  264. }
  265. /*
  266. * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
  267. * mcs rate to be used
  268. */
  269. if (txrate->flags & IEEE80211_TX_RC_MCS) {
  270. txdesc->u.ht.mcs = txrate->idx;
  271. /*
  272. * MIMO PS should be set to 1 for STA's using dynamic SM PS
  273. * when using more then one tx stream (>MCS7).
  274. */
  275. if (sta && txdesc->u.ht.mcs > 7 &&
  276. sta->smps_mode == IEEE80211_SMPS_DYNAMIC)
  277. __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags);
  278. } else {
  279. txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs);
  280. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  281. txdesc->u.ht.mcs |= 0x08;
  282. }
  283. if (test_bit(CONFIG_HT_DISABLED, &rt2x00dev->flags)) {
  284. if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  285. txdesc->u.ht.txop = TXOP_SIFS;
  286. else
  287. txdesc->u.ht.txop = TXOP_BACKOFF;
  288. /* Left zero on all other settings. */
  289. return;
  290. }
  291. txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
  292. /*
  293. * Only one STBC stream is supported for now.
  294. */
  295. if (tx_info->flags & IEEE80211_TX_CTL_STBC)
  296. txdesc->u.ht.stbc = 1;
  297. /*
  298. * This frame is eligible for an AMPDU, however, don't aggregate
  299. * frames that are intended to probe a specific tx rate.
  300. */
  301. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
  302. !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
  303. __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
  304. /*
  305. * Set 40Mhz mode if necessary (for legacy rates this will
  306. * duplicate the frame to both channels).
  307. */
  308. if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH ||
  309. txrate->flags & IEEE80211_TX_RC_DUP_DATA)
  310. __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
  311. if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
  312. __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
  313. /*
  314. * Determine IFS values
  315. * - Use TXOP_BACKOFF for management frames except beacons
  316. * - Use TXOP_SIFS for fragment bursts
  317. * - Use TXOP_HTTXOP for everything else
  318. *
  319. * Note: rt2800 devices won't use CTS protection (if used)
  320. * for frames not transmitted with TXOP_HTTXOP
  321. */
  322. if (ieee80211_is_mgmt(hdr->frame_control) &&
  323. !ieee80211_is_beacon(hdr->frame_control))
  324. txdesc->u.ht.txop = TXOP_BACKOFF;
  325. else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  326. txdesc->u.ht.txop = TXOP_SIFS;
  327. else
  328. txdesc->u.ht.txop = TXOP_HTTXOP;
  329. }
  330. static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
  331. struct sk_buff *skb,
  332. struct txentry_desc *txdesc,
  333. struct ieee80211_sta *sta)
  334. {
  335. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  336. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  337. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  338. struct ieee80211_rate *rate;
  339. const struct rt2x00_rate *hwrate = NULL;
  340. memset(txdesc, 0, sizeof(*txdesc));
  341. /*
  342. * Header and frame information.
  343. */
  344. txdesc->length = skb->len;
  345. txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb);
  346. /*
  347. * Check whether this frame is to be acked.
  348. */
  349. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  350. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  351. /*
  352. * Check if this is a RTS/CTS frame
  353. */
  354. if (ieee80211_is_rts(hdr->frame_control) ||
  355. ieee80211_is_cts(hdr->frame_control)) {
  356. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  357. if (ieee80211_is_rts(hdr->frame_control))
  358. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  359. else
  360. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  361. if (tx_info->control.rts_cts_rate_idx >= 0)
  362. rate =
  363. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  364. }
  365. /*
  366. * Determine retry information.
  367. */
  368. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  369. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  370. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  371. /*
  372. * Check if more fragments are pending
  373. */
  374. if (ieee80211_has_morefrags(hdr->frame_control)) {
  375. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  376. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  377. }
  378. /*
  379. * Check if more frames (!= fragments) are pending
  380. */
  381. if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
  382. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  383. /*
  384. * Beacons and probe responses require the tsf timestamp
  385. * to be inserted into the frame.
  386. */
  387. if (ieee80211_is_beacon(hdr->frame_control) ||
  388. ieee80211_is_probe_resp(hdr->frame_control))
  389. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  390. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  391. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
  392. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  393. /*
  394. * Determine rate modulation.
  395. */
  396. if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
  397. txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
  398. else if (txrate->flags & IEEE80211_TX_RC_MCS)
  399. txdesc->rate_mode = RATE_MODE_HT_MIX;
  400. else {
  401. rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  402. hwrate = rt2x00_get_rate(rate->hw_value);
  403. if (hwrate->flags & DEV_RATE_OFDM)
  404. txdesc->rate_mode = RATE_MODE_OFDM;
  405. else
  406. txdesc->rate_mode = RATE_MODE_CCK;
  407. }
  408. /*
  409. * Apply TX descriptor handling by components
  410. */
  411. rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc);
  412. rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc);
  413. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_HT_TX_DESC))
  414. rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc,
  415. sta, hwrate);
  416. else
  417. rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc,
  418. hwrate);
  419. }
  420. static int rt2x00queue_write_tx_data(struct queue_entry *entry,
  421. struct txentry_desc *txdesc)
  422. {
  423. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  424. /*
  425. * This should not happen, we already checked the entry
  426. * was ours. When the hardware disagrees there has been
  427. * a queue corruption!
  428. */
  429. if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
  430. rt2x00dev->ops->lib->get_entry_state(entry))) {
  431. rt2x00_err(rt2x00dev,
  432. "Corrupt queue %d, accessing entry which is not ours\n"
  433. "Please file bug report to %s\n",
  434. entry->queue->qid, DRV_PROJECT);
  435. return -EINVAL;
  436. }
  437. /*
  438. * Add the requested extra tx headroom in front of the skb.
  439. */
  440. skb_push(entry->skb, rt2x00dev->extra_tx_headroom);
  441. memset(entry->skb->data, 0, rt2x00dev->extra_tx_headroom);
  442. /*
  443. * Call the driver's write_tx_data function, if it exists.
  444. */
  445. if (rt2x00dev->ops->lib->write_tx_data)
  446. rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
  447. /*
  448. * Map the skb to DMA.
  449. */
  450. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA) &&
  451. rt2x00queue_map_txskb(entry))
  452. return -ENOMEM;
  453. return 0;
  454. }
  455. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  456. struct txentry_desc *txdesc)
  457. {
  458. struct data_queue *queue = entry->queue;
  459. queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
  460. /*
  461. * All processing on the frame has been completed, this means
  462. * it is now ready to be dumped to userspace through debugfs.
  463. */
  464. rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry->skb);
  465. }
  466. static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
  467. struct txentry_desc *txdesc)
  468. {
  469. /*
  470. * Check if we need to kick the queue, there are however a few rules
  471. * 1) Don't kick unless this is the last in frame in a burst.
  472. * When the burst flag is set, this frame is always followed
  473. * by another frame which in some way are related to eachother.
  474. * This is true for fragments, RTS or CTS-to-self frames.
  475. * 2) Rule 1 can be broken when the available entries
  476. * in the queue are less then a certain threshold.
  477. */
  478. if (rt2x00queue_threshold(queue) ||
  479. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  480. queue->rt2x00dev->ops->lib->kick_queue(queue);
  481. }
  482. static void rt2x00queue_bar_check(struct queue_entry *entry)
  483. {
  484. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  485. struct ieee80211_bar *bar = (void *) (entry->skb->data +
  486. rt2x00dev->extra_tx_headroom);
  487. struct rt2x00_bar_list_entry *bar_entry;
  488. if (likely(!ieee80211_is_back_req(bar->frame_control)))
  489. return;
  490. bar_entry = kmalloc(sizeof(*bar_entry), GFP_ATOMIC);
  491. /*
  492. * If the alloc fails we still send the BAR out but just don't track
  493. * it in our bar list. And as a result we will report it to mac80211
  494. * back as failed.
  495. */
  496. if (!bar_entry)
  497. return;
  498. bar_entry->entry = entry;
  499. bar_entry->block_acked = 0;
  500. /*
  501. * Copy the relevant parts of the 802.11 BAR into out check list
  502. * such that we can use RCU for less-overhead in the RX path since
  503. * sending BARs and processing the according BlockAck should be
  504. * the exception.
  505. */
  506. memcpy(bar_entry->ra, bar->ra, sizeof(bar->ra));
  507. memcpy(bar_entry->ta, bar->ta, sizeof(bar->ta));
  508. bar_entry->control = bar->control;
  509. bar_entry->start_seq_num = bar->start_seq_num;
  510. /*
  511. * Insert BAR into our BAR check list.
  512. */
  513. spin_lock_bh(&rt2x00dev->bar_list_lock);
  514. list_add_tail_rcu(&bar_entry->list, &rt2x00dev->bar_list);
  515. spin_unlock_bh(&rt2x00dev->bar_list_lock);
  516. }
  517. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  518. struct ieee80211_sta *sta, bool local)
  519. {
  520. struct ieee80211_tx_info *tx_info;
  521. struct queue_entry *entry;
  522. struct txentry_desc txdesc;
  523. struct skb_frame_desc *skbdesc;
  524. u8 rate_idx, rate_flags;
  525. int ret = 0;
  526. /*
  527. * Copy all TX descriptor information into txdesc,
  528. * after that we are free to use the skb->cb array
  529. * for our information.
  530. */
  531. rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, sta);
  532. /*
  533. * All information is retrieved from the skb->cb array,
  534. * now we should claim ownership of the driver part of that
  535. * array, preserving the bitrate index and flags.
  536. */
  537. tx_info = IEEE80211_SKB_CB(skb);
  538. rate_idx = tx_info->control.rates[0].idx;
  539. rate_flags = tx_info->control.rates[0].flags;
  540. skbdesc = get_skb_frame_desc(skb);
  541. memset(skbdesc, 0, sizeof(*skbdesc));
  542. skbdesc->tx_rate_idx = rate_idx;
  543. skbdesc->tx_rate_flags = rate_flags;
  544. if (local)
  545. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  546. /*
  547. * When hardware encryption is supported, and this frame
  548. * is to be encrypted, we should strip the IV/EIV data from
  549. * the frame so we can provide it to the driver separately.
  550. */
  551. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  552. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  553. if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_COPY_IV))
  554. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  555. else
  556. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  557. }
  558. /*
  559. * When DMA allocation is required we should guarantee to the
  560. * driver that the DMA is aligned to a 4-byte boundary.
  561. * However some drivers require L2 padding to pad the payload
  562. * rather then the header. This could be a requirement for
  563. * PCI and USB devices, while header alignment only is valid
  564. * for PCI devices.
  565. */
  566. if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_L2PAD))
  567. rt2x00queue_insert_l2pad(skb, txdesc.header_length);
  568. else if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_DMA))
  569. rt2x00queue_align_frame(skb);
  570. /*
  571. * That function must be called with bh disabled.
  572. */
  573. spin_lock(&queue->tx_lock);
  574. if (unlikely(rt2x00queue_full(queue))) {
  575. rt2x00_err(queue->rt2x00dev, "Dropping frame due to full tx queue %d\n",
  576. queue->qid);
  577. ret = -ENOBUFS;
  578. goto out;
  579. }
  580. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  581. if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
  582. &entry->flags))) {
  583. rt2x00_err(queue->rt2x00dev,
  584. "Arrived at non-free entry in the non-full queue %d\n"
  585. "Please file bug report to %s\n",
  586. queue->qid, DRV_PROJECT);
  587. ret = -EINVAL;
  588. goto out;
  589. }
  590. skbdesc->entry = entry;
  591. entry->skb = skb;
  592. /*
  593. * It could be possible that the queue was corrupted and this
  594. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  595. * this frame will simply be dropped.
  596. */
  597. if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
  598. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  599. entry->skb = NULL;
  600. ret = -EIO;
  601. goto out;
  602. }
  603. /*
  604. * Put BlockAckReqs into our check list for driver BA processing.
  605. */
  606. rt2x00queue_bar_check(entry);
  607. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  608. rt2x00queue_index_inc(entry, Q_INDEX);
  609. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  610. rt2x00queue_kick_tx_queue(queue, &txdesc);
  611. out:
  612. spin_unlock(&queue->tx_lock);
  613. return ret;
  614. }
  615. int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
  616. struct ieee80211_vif *vif)
  617. {
  618. struct rt2x00_intf *intf = vif_to_intf(vif);
  619. if (unlikely(!intf->beacon))
  620. return -ENOBUFS;
  621. /*
  622. * Clean up the beacon skb.
  623. */
  624. rt2x00queue_free_skb(intf->beacon);
  625. /*
  626. * Clear beacon (single bssid devices don't need to clear the beacon
  627. * since the beacon queue will get stopped anyway).
  628. */
  629. if (rt2x00dev->ops->lib->clear_beacon)
  630. rt2x00dev->ops->lib->clear_beacon(intf->beacon);
  631. return 0;
  632. }
  633. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  634. struct ieee80211_vif *vif)
  635. {
  636. struct rt2x00_intf *intf = vif_to_intf(vif);
  637. struct skb_frame_desc *skbdesc;
  638. struct txentry_desc txdesc;
  639. if (unlikely(!intf->beacon))
  640. return -ENOBUFS;
  641. /*
  642. * Clean up the beacon skb.
  643. */
  644. rt2x00queue_free_skb(intf->beacon);
  645. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  646. if (!intf->beacon->skb)
  647. return -ENOMEM;
  648. /*
  649. * Copy all TX descriptor information into txdesc,
  650. * after that we are free to use the skb->cb array
  651. * for our information.
  652. */
  653. rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc, NULL);
  654. /*
  655. * Fill in skb descriptor
  656. */
  657. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  658. memset(skbdesc, 0, sizeof(*skbdesc));
  659. skbdesc->entry = intf->beacon;
  660. /*
  661. * Send beacon to hardware.
  662. */
  663. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  664. return 0;
  665. }
  666. bool rt2x00queue_for_each_entry(struct data_queue *queue,
  667. enum queue_index start,
  668. enum queue_index end,
  669. void *data,
  670. bool (*fn)(struct queue_entry *entry,
  671. void *data))
  672. {
  673. unsigned long irqflags;
  674. unsigned int index_start;
  675. unsigned int index_end;
  676. unsigned int i;
  677. if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
  678. rt2x00_err(queue->rt2x00dev,
  679. "Entry requested from invalid index range (%d - %d)\n",
  680. start, end);
  681. return true;
  682. }
  683. /*
  684. * Only protect the range we are going to loop over,
  685. * if during our loop a extra entry is set to pending
  686. * it should not be kicked during this run, since it
  687. * is part of another TX operation.
  688. */
  689. spin_lock_irqsave(&queue->index_lock, irqflags);
  690. index_start = queue->index[start];
  691. index_end = queue->index[end];
  692. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  693. /*
  694. * Start from the TX done pointer, this guarantees that we will
  695. * send out all frames in the correct order.
  696. */
  697. if (index_start < index_end) {
  698. for (i = index_start; i < index_end; i++) {
  699. if (fn(&queue->entries[i], data))
  700. return true;
  701. }
  702. } else {
  703. for (i = index_start; i < queue->limit; i++) {
  704. if (fn(&queue->entries[i], data))
  705. return true;
  706. }
  707. for (i = 0; i < index_end; i++) {
  708. if (fn(&queue->entries[i], data))
  709. return true;
  710. }
  711. }
  712. return false;
  713. }
  714. EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
  715. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  716. enum queue_index index)
  717. {
  718. struct queue_entry *entry;
  719. unsigned long irqflags;
  720. if (unlikely(index >= Q_INDEX_MAX)) {
  721. rt2x00_err(queue->rt2x00dev, "Entry requested from invalid index type (%d)\n",
  722. index);
  723. return NULL;
  724. }
  725. spin_lock_irqsave(&queue->index_lock, irqflags);
  726. entry = &queue->entries[queue->index[index]];
  727. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  728. return entry;
  729. }
  730. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  731. void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index)
  732. {
  733. struct data_queue *queue = entry->queue;
  734. unsigned long irqflags;
  735. if (unlikely(index >= Q_INDEX_MAX)) {
  736. rt2x00_err(queue->rt2x00dev,
  737. "Index change on invalid index type (%d)\n", index);
  738. return;
  739. }
  740. spin_lock_irqsave(&queue->index_lock, irqflags);
  741. queue->index[index]++;
  742. if (queue->index[index] >= queue->limit)
  743. queue->index[index] = 0;
  744. entry->last_action = jiffies;
  745. if (index == Q_INDEX) {
  746. queue->length++;
  747. } else if (index == Q_INDEX_DONE) {
  748. queue->length--;
  749. queue->count++;
  750. }
  751. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  752. }
  753. static void rt2x00queue_pause_queue_nocheck(struct data_queue *queue)
  754. {
  755. switch (queue->qid) {
  756. case QID_AC_VO:
  757. case QID_AC_VI:
  758. case QID_AC_BE:
  759. case QID_AC_BK:
  760. /*
  761. * For TX queues, we have to disable the queue
  762. * inside mac80211.
  763. */
  764. ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
  765. break;
  766. default:
  767. break;
  768. }
  769. }
  770. void rt2x00queue_pause_queue(struct data_queue *queue)
  771. {
  772. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  773. !test_bit(QUEUE_STARTED, &queue->flags) ||
  774. test_and_set_bit(QUEUE_PAUSED, &queue->flags))
  775. return;
  776. rt2x00queue_pause_queue_nocheck(queue);
  777. }
  778. EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
  779. void rt2x00queue_unpause_queue(struct data_queue *queue)
  780. {
  781. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  782. !test_bit(QUEUE_STARTED, &queue->flags) ||
  783. !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
  784. return;
  785. switch (queue->qid) {
  786. case QID_AC_VO:
  787. case QID_AC_VI:
  788. case QID_AC_BE:
  789. case QID_AC_BK:
  790. /*
  791. * For TX queues, we have to enable the queue
  792. * inside mac80211.
  793. */
  794. ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
  795. break;
  796. case QID_RX:
  797. /*
  798. * For RX we need to kick the queue now in order to
  799. * receive frames.
  800. */
  801. queue->rt2x00dev->ops->lib->kick_queue(queue);
  802. default:
  803. break;
  804. }
  805. }
  806. EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
  807. void rt2x00queue_start_queue(struct data_queue *queue)
  808. {
  809. mutex_lock(&queue->status_lock);
  810. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  811. test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
  812. mutex_unlock(&queue->status_lock);
  813. return;
  814. }
  815. set_bit(QUEUE_PAUSED, &queue->flags);
  816. queue->rt2x00dev->ops->lib->start_queue(queue);
  817. rt2x00queue_unpause_queue(queue);
  818. mutex_unlock(&queue->status_lock);
  819. }
  820. EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
  821. void rt2x00queue_stop_queue(struct data_queue *queue)
  822. {
  823. mutex_lock(&queue->status_lock);
  824. if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
  825. mutex_unlock(&queue->status_lock);
  826. return;
  827. }
  828. rt2x00queue_pause_queue_nocheck(queue);
  829. queue->rt2x00dev->ops->lib->stop_queue(queue);
  830. mutex_unlock(&queue->status_lock);
  831. }
  832. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
  833. void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
  834. {
  835. bool tx_queue =
  836. (queue->qid == QID_AC_VO) ||
  837. (queue->qid == QID_AC_VI) ||
  838. (queue->qid == QID_AC_BE) ||
  839. (queue->qid == QID_AC_BK);
  840. /*
  841. * If we are not supposed to drop any pending
  842. * frames, this means we must force a start (=kick)
  843. * to the queue to make sure the hardware will
  844. * start transmitting.
  845. */
  846. if (!drop && tx_queue)
  847. queue->rt2x00dev->ops->lib->kick_queue(queue);
  848. /*
  849. * Check if driver supports flushing, if that is the case we can
  850. * defer the flushing to the driver. Otherwise we must use the
  851. * alternative which just waits for the queue to become empty.
  852. */
  853. if (likely(queue->rt2x00dev->ops->lib->flush_queue))
  854. queue->rt2x00dev->ops->lib->flush_queue(queue, drop);
  855. /*
  856. * The queue flush has failed...
  857. */
  858. if (unlikely(!rt2x00queue_empty(queue)))
  859. rt2x00_warn(queue->rt2x00dev, "Queue %d failed to flush\n",
  860. queue->qid);
  861. }
  862. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
  863. void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
  864. {
  865. struct data_queue *queue;
  866. /*
  867. * rt2x00queue_start_queue will call ieee80211_wake_queue
  868. * for each queue after is has been properly initialized.
  869. */
  870. tx_queue_for_each(rt2x00dev, queue)
  871. rt2x00queue_start_queue(queue);
  872. rt2x00queue_start_queue(rt2x00dev->rx);
  873. }
  874. EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
  875. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  876. {
  877. struct data_queue *queue;
  878. /*
  879. * rt2x00queue_stop_queue will call ieee80211_stop_queue
  880. * as well, but we are completely shutting doing everything
  881. * now, so it is much safer to stop all TX queues at once,
  882. * and use rt2x00queue_stop_queue for cleaning up.
  883. */
  884. ieee80211_stop_queues(rt2x00dev->hw);
  885. tx_queue_for_each(rt2x00dev, queue)
  886. rt2x00queue_stop_queue(queue);
  887. rt2x00queue_stop_queue(rt2x00dev->rx);
  888. }
  889. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
  890. void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
  891. {
  892. struct data_queue *queue;
  893. tx_queue_for_each(rt2x00dev, queue)
  894. rt2x00queue_flush_queue(queue, drop);
  895. rt2x00queue_flush_queue(rt2x00dev->rx, drop);
  896. }
  897. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
  898. static void rt2x00queue_reset(struct data_queue *queue)
  899. {
  900. unsigned long irqflags;
  901. unsigned int i;
  902. spin_lock_irqsave(&queue->index_lock, irqflags);
  903. queue->count = 0;
  904. queue->length = 0;
  905. for (i = 0; i < Q_INDEX_MAX; i++)
  906. queue->index[i] = 0;
  907. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  908. }
  909. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  910. {
  911. struct data_queue *queue;
  912. unsigned int i;
  913. queue_for_each(rt2x00dev, queue) {
  914. rt2x00queue_reset(queue);
  915. for (i = 0; i < queue->limit; i++)
  916. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  917. }
  918. }
  919. static int rt2x00queue_alloc_entries(struct data_queue *queue)
  920. {
  921. struct queue_entry *entries;
  922. unsigned int entry_size;
  923. unsigned int i;
  924. rt2x00queue_reset(queue);
  925. /*
  926. * Allocate all queue entries.
  927. */
  928. entry_size = sizeof(*entries) + queue->priv_size;
  929. entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
  930. if (!entries)
  931. return -ENOMEM;
  932. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  933. (((char *)(__base)) + ((__limit) * (__esize)) + \
  934. ((__index) * (__psize)))
  935. for (i = 0; i < queue->limit; i++) {
  936. entries[i].flags = 0;
  937. entries[i].queue = queue;
  938. entries[i].skb = NULL;
  939. entries[i].entry_idx = i;
  940. entries[i].priv_data =
  941. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  942. sizeof(*entries), queue->priv_size);
  943. }
  944. #undef QUEUE_ENTRY_PRIV_OFFSET
  945. queue->entries = entries;
  946. return 0;
  947. }
  948. static void rt2x00queue_free_skbs(struct data_queue *queue)
  949. {
  950. unsigned int i;
  951. if (!queue->entries)
  952. return;
  953. for (i = 0; i < queue->limit; i++) {
  954. rt2x00queue_free_skb(&queue->entries[i]);
  955. }
  956. }
  957. static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
  958. {
  959. unsigned int i;
  960. struct sk_buff *skb;
  961. for (i = 0; i < queue->limit; i++) {
  962. skb = rt2x00queue_alloc_rxskb(&queue->entries[i], GFP_KERNEL);
  963. if (!skb)
  964. return -ENOMEM;
  965. queue->entries[i].skb = skb;
  966. }
  967. return 0;
  968. }
  969. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  970. {
  971. struct data_queue *queue;
  972. int status;
  973. status = rt2x00queue_alloc_entries(rt2x00dev->rx);
  974. if (status)
  975. goto exit;
  976. tx_queue_for_each(rt2x00dev, queue) {
  977. status = rt2x00queue_alloc_entries(queue);
  978. if (status)
  979. goto exit;
  980. }
  981. status = rt2x00queue_alloc_entries(rt2x00dev->bcn);
  982. if (status)
  983. goto exit;
  984. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE)) {
  985. status = rt2x00queue_alloc_entries(rt2x00dev->atim);
  986. if (status)
  987. goto exit;
  988. }
  989. status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
  990. if (status)
  991. goto exit;
  992. return 0;
  993. exit:
  994. rt2x00_err(rt2x00dev, "Queue entries allocation failed\n");
  995. rt2x00queue_uninitialize(rt2x00dev);
  996. return status;
  997. }
  998. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  999. {
  1000. struct data_queue *queue;
  1001. rt2x00queue_free_skbs(rt2x00dev->rx);
  1002. queue_for_each(rt2x00dev, queue) {
  1003. kfree(queue->entries);
  1004. queue->entries = NULL;
  1005. }
  1006. }
  1007. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  1008. struct data_queue *queue, enum data_queue_qid qid)
  1009. {
  1010. mutex_init(&queue->status_lock);
  1011. spin_lock_init(&queue->tx_lock);
  1012. spin_lock_init(&queue->index_lock);
  1013. queue->rt2x00dev = rt2x00dev;
  1014. queue->qid = qid;
  1015. queue->txop = 0;
  1016. queue->aifs = 2;
  1017. queue->cw_min = 5;
  1018. queue->cw_max = 10;
  1019. rt2x00dev->ops->queue_init(queue);
  1020. queue->threshold = DIV_ROUND_UP(queue->limit, 10);
  1021. }
  1022. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  1023. {
  1024. struct data_queue *queue;
  1025. enum data_queue_qid qid;
  1026. unsigned int req_atim =
  1027. rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE);
  1028. /*
  1029. * We need the following queues:
  1030. * RX: 1
  1031. * TX: ops->tx_queues
  1032. * Beacon: 1
  1033. * Atim: 1 (if required)
  1034. */
  1035. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  1036. queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
  1037. if (!queue) {
  1038. rt2x00_err(rt2x00dev, "Queue allocation failed\n");
  1039. return -ENOMEM;
  1040. }
  1041. /*
  1042. * Initialize pointers
  1043. */
  1044. rt2x00dev->rx = queue;
  1045. rt2x00dev->tx = &queue[1];
  1046. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  1047. rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
  1048. /*
  1049. * Initialize queue parameters.
  1050. * RX: qid = QID_RX
  1051. * TX: qid = QID_AC_VO + index
  1052. * TX: cw_min: 2^5 = 32.
  1053. * TX: cw_max: 2^10 = 1024.
  1054. * BCN: qid = QID_BEACON
  1055. * ATIM: qid = QID_ATIM
  1056. */
  1057. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  1058. qid = QID_AC_VO;
  1059. tx_queue_for_each(rt2x00dev, queue)
  1060. rt2x00queue_init(rt2x00dev, queue, qid++);
  1061. rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
  1062. if (req_atim)
  1063. rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
  1064. return 0;
  1065. }
  1066. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  1067. {
  1068. kfree(rt2x00dev->rx);
  1069. rt2x00dev->rx = NULL;
  1070. rt2x00dev->tx = NULL;
  1071. rt2x00dev->bcn = NULL;
  1072. }