rt2x00reg.h 6.1 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, see <http://www.gnu.org/licenses/>.
  14. */
  15. /*
  16. Module: rt2x00
  17. Abstract: rt2x00 generic register information.
  18. */
  19. #ifndef RT2X00REG_H
  20. #define RT2X00REG_H
  21. /*
  22. * RX crypto status
  23. */
  24. enum rx_crypto {
  25. RX_CRYPTO_SUCCESS = 0,
  26. RX_CRYPTO_FAIL_ICV = 1,
  27. RX_CRYPTO_FAIL_MIC = 2,
  28. RX_CRYPTO_FAIL_KEY = 3,
  29. };
  30. /*
  31. * Antenna values
  32. */
  33. enum antenna {
  34. ANTENNA_SW_DIVERSITY = 0,
  35. ANTENNA_A = 1,
  36. ANTENNA_B = 2,
  37. ANTENNA_HW_DIVERSITY = 3,
  38. };
  39. /*
  40. * Led mode values.
  41. */
  42. enum led_mode {
  43. LED_MODE_DEFAULT = 0,
  44. LED_MODE_TXRX_ACTIVITY = 1,
  45. LED_MODE_SIGNAL_STRENGTH = 2,
  46. LED_MODE_ASUS = 3,
  47. LED_MODE_ALPHA = 4,
  48. };
  49. /*
  50. * TSF sync values
  51. */
  52. enum tsf_sync {
  53. TSF_SYNC_NONE = 0,
  54. TSF_SYNC_INFRA = 1,
  55. TSF_SYNC_ADHOC = 2,
  56. TSF_SYNC_AP_NONE = 3,
  57. };
  58. /*
  59. * Device states
  60. */
  61. enum dev_state {
  62. STATE_DEEP_SLEEP = 0,
  63. STATE_SLEEP = 1,
  64. STATE_STANDBY = 2,
  65. STATE_AWAKE = 3,
  66. /*
  67. * Additional device states, these values are
  68. * not strict since they are not directly passed
  69. * into the device.
  70. */
  71. STATE_RADIO_ON,
  72. STATE_RADIO_OFF,
  73. STATE_RADIO_IRQ_ON,
  74. STATE_RADIO_IRQ_OFF,
  75. };
  76. /*
  77. * IFS backoff values
  78. */
  79. enum ifs {
  80. IFS_BACKOFF = 0,
  81. IFS_SIFS = 1,
  82. IFS_NEW_BACKOFF = 2,
  83. IFS_NONE = 3,
  84. };
  85. /*
  86. * IFS backoff values for HT devices
  87. */
  88. enum txop {
  89. TXOP_HTTXOP = 0,
  90. TXOP_PIFS = 1,
  91. TXOP_SIFS = 2,
  92. TXOP_BACKOFF = 3,
  93. };
  94. /*
  95. * Cipher types for hardware encryption
  96. */
  97. enum cipher {
  98. CIPHER_NONE = 0,
  99. CIPHER_WEP64 = 1,
  100. CIPHER_WEP128 = 2,
  101. CIPHER_TKIP = 3,
  102. CIPHER_AES = 4,
  103. /*
  104. * The following fields were added by rt61pci and rt73usb.
  105. */
  106. CIPHER_CKIP64 = 5,
  107. CIPHER_CKIP128 = 6,
  108. CIPHER_TKIP_NO_MIC = 7, /* Don't send to device */
  109. /*
  110. * Max cipher type.
  111. * Note that CIPHER_NONE isn't counted, and CKIP64 and CKIP128
  112. * are excluded due to limitations in mac80211.
  113. */
  114. CIPHER_MAX = 4,
  115. };
  116. /*
  117. * Rate modulations
  118. */
  119. enum rate_modulation {
  120. RATE_MODE_CCK = 0,
  121. RATE_MODE_OFDM = 1,
  122. RATE_MODE_HT_MIX = 2,
  123. RATE_MODE_HT_GREENFIELD = 3,
  124. };
  125. /*
  126. * Firmware validation error codes
  127. */
  128. enum firmware_errors {
  129. FW_OK,
  130. FW_BAD_CRC,
  131. FW_BAD_LENGTH,
  132. FW_BAD_VERSION,
  133. };
  134. /*
  135. * Register handlers.
  136. * We store the position of a register field inside a field structure,
  137. * This will simplify the process of setting and reading a certain field
  138. * inside the register while making sure the process remains byte order safe.
  139. */
  140. struct rt2x00_field8 {
  141. u8 bit_offset;
  142. u8 bit_mask;
  143. };
  144. struct rt2x00_field16 {
  145. u16 bit_offset;
  146. u16 bit_mask;
  147. };
  148. struct rt2x00_field32 {
  149. u32 bit_offset;
  150. u32 bit_mask;
  151. };
  152. /*
  153. * Power of two check, this will check
  154. * if the mask that has been given contains and contiguous set of bits.
  155. * Note that we cannot use the is_power_of_2() function since this
  156. * check must be done at compile-time.
  157. */
  158. #define is_power_of_two(x) ( !((x) & ((x)-1)) )
  159. #define low_bit_mask(x) ( ((x)-1) & ~(x) )
  160. #define is_valid_mask(x) is_power_of_two(1LU + (x) + low_bit_mask(x))
  161. /*
  162. * Macros to find first set bit in a variable.
  163. * These macros behave the same as the __ffs() functions but
  164. * the most important difference that this is done during
  165. * compile-time rather then run-time.
  166. */
  167. #define compile_ffs2(__x) \
  168. __builtin_choose_expr(((__x) & 0x1), 0, 1)
  169. #define compile_ffs4(__x) \
  170. __builtin_choose_expr(((__x) & 0x3), \
  171. (compile_ffs2((__x))), \
  172. (compile_ffs2((__x) >> 2) + 2))
  173. #define compile_ffs8(__x) \
  174. __builtin_choose_expr(((__x) & 0xf), \
  175. (compile_ffs4((__x))), \
  176. (compile_ffs4((__x) >> 4) + 4))
  177. #define compile_ffs16(__x) \
  178. __builtin_choose_expr(((__x) & 0xff), \
  179. (compile_ffs8((__x))), \
  180. (compile_ffs8((__x) >> 8) + 8))
  181. #define compile_ffs32(__x) \
  182. __builtin_choose_expr(((__x) & 0xffff), \
  183. (compile_ffs16((__x))), \
  184. (compile_ffs16((__x) >> 16) + 16))
  185. /*
  186. * This macro will check the requirements for the FIELD{8,16,32} macros
  187. * The mask should be a constant non-zero contiguous set of bits which
  188. * does not exceed the given typelimit.
  189. */
  190. #define FIELD_CHECK(__mask, __type) \
  191. BUILD_BUG_ON(!(__mask) || \
  192. !is_valid_mask(__mask) || \
  193. (__mask) != (__type)(__mask)) \
  194. #define FIELD8(__mask) \
  195. ({ \
  196. FIELD_CHECK(__mask, u8); \
  197. (struct rt2x00_field8) { \
  198. compile_ffs8(__mask), (__mask) \
  199. }; \
  200. })
  201. #define FIELD16(__mask) \
  202. ({ \
  203. FIELD_CHECK(__mask, u16); \
  204. (struct rt2x00_field16) { \
  205. compile_ffs16(__mask), (__mask) \
  206. }; \
  207. })
  208. #define FIELD32(__mask) \
  209. ({ \
  210. FIELD_CHECK(__mask, u32); \
  211. (struct rt2x00_field32) { \
  212. compile_ffs32(__mask), (__mask) \
  213. }; \
  214. })
  215. #define SET_FIELD(__reg, __type, __field, __value)\
  216. ({ \
  217. typecheck(__type, __field); \
  218. *(__reg) &= ~((__field).bit_mask); \
  219. *(__reg) |= ((__value) << \
  220. ((__field).bit_offset)) & \
  221. ((__field).bit_mask); \
  222. })
  223. #define GET_FIELD(__reg, __type, __field) \
  224. ({ \
  225. typecheck(__type, __field); \
  226. ((__reg) & ((__field).bit_mask)) >> \
  227. ((__field).bit_offset); \
  228. })
  229. #define rt2x00_set_field32(__reg, __field, __value) \
  230. SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
  231. #define rt2x00_get_field32(__reg, __field) \
  232. GET_FIELD(__reg, struct rt2x00_field32, __field)
  233. #define rt2x00_set_field16(__reg, __field, __value) \
  234. SET_FIELD(__reg, struct rt2x00_field16, __field, __value)
  235. #define rt2x00_get_field16(__reg, __field) \
  236. GET_FIELD(__reg, struct rt2x00_field16, __field)
  237. #define rt2x00_set_field8(__reg, __field, __value) \
  238. SET_FIELD(__reg, struct rt2x00_field8, __field, __value)
  239. #define rt2x00_get_field8(__reg, __field) \
  240. GET_FIELD(__reg, struct rt2x00_field8, __field)
  241. #endif /* RT2X00REG_H */