boot.c 14 KB

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  1. /*
  2. * This file is part of wl1271
  3. *
  4. * Copyright (C) 2008-2010 Nokia Corporation
  5. *
  6. * Contact: Luciano Coelho <luciano.coelho@nokia.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. */
  23. #include <linux/slab.h>
  24. #include <linux/export.h>
  25. #include "debug.h"
  26. #include "acx.h"
  27. #include "boot.h"
  28. #include "io.h"
  29. #include "event.h"
  30. #include "rx.h"
  31. #include "hw_ops.h"
  32. static int wl1271_boot_set_ecpu_ctrl(struct wl1271 *wl, u32 flag)
  33. {
  34. u32 cpu_ctrl;
  35. int ret;
  36. /* 10.5.0 run the firmware (I) */
  37. ret = wlcore_read_reg(wl, REG_ECPU_CONTROL, &cpu_ctrl);
  38. if (ret < 0)
  39. goto out;
  40. /* 10.5.1 run the firmware (II) */
  41. cpu_ctrl |= flag;
  42. ret = wlcore_write_reg(wl, REG_ECPU_CONTROL, cpu_ctrl);
  43. out:
  44. return ret;
  45. }
  46. static int wlcore_boot_parse_fw_ver(struct wl1271 *wl,
  47. struct wl1271_static_data *static_data)
  48. {
  49. int ret;
  50. strncpy(wl->chip.fw_ver_str, static_data->fw_version,
  51. sizeof(wl->chip.fw_ver_str));
  52. /* make sure the string is NULL-terminated */
  53. wl->chip.fw_ver_str[sizeof(wl->chip.fw_ver_str) - 1] = '\0';
  54. ret = sscanf(wl->chip.fw_ver_str + 4, "%u.%u.%u.%u.%u",
  55. &wl->chip.fw_ver[0], &wl->chip.fw_ver[1],
  56. &wl->chip.fw_ver[2], &wl->chip.fw_ver[3],
  57. &wl->chip.fw_ver[4]);
  58. if (ret != 5) {
  59. wl1271_warning("fw version incorrect value");
  60. memset(wl->chip.fw_ver, 0, sizeof(wl->chip.fw_ver));
  61. ret = -EINVAL;
  62. goto out;
  63. }
  64. ret = wlcore_identify_fw(wl);
  65. if (ret < 0)
  66. goto out;
  67. out:
  68. return ret;
  69. }
  70. static int wlcore_validate_fw_ver(struct wl1271 *wl)
  71. {
  72. unsigned int *fw_ver = wl->chip.fw_ver;
  73. unsigned int *min_ver = (wl->fw_type == WL12XX_FW_TYPE_MULTI) ?
  74. wl->min_mr_fw_ver : wl->min_sr_fw_ver;
  75. char min_fw_str[32] = "";
  76. int i;
  77. /* the chip must be exactly equal */
  78. if ((min_ver[FW_VER_CHIP] != WLCORE_FW_VER_IGNORE) &&
  79. (min_ver[FW_VER_CHIP] != fw_ver[FW_VER_CHIP]))
  80. goto fail;
  81. /* the firmware type must be equal */
  82. if ((min_ver[FW_VER_IF_TYPE] != WLCORE_FW_VER_IGNORE) &&
  83. (min_ver[FW_VER_IF_TYPE] != fw_ver[FW_VER_IF_TYPE]))
  84. goto fail;
  85. /* the project number must be equal */
  86. if ((min_ver[FW_VER_SUBTYPE] != WLCORE_FW_VER_IGNORE) &&
  87. (min_ver[FW_VER_SUBTYPE] != fw_ver[FW_VER_SUBTYPE]))
  88. goto fail;
  89. /* the API version must be greater or equal */
  90. if ((min_ver[FW_VER_MAJOR] != WLCORE_FW_VER_IGNORE) &&
  91. (min_ver[FW_VER_MAJOR] > fw_ver[FW_VER_MAJOR]))
  92. goto fail;
  93. /* if the API version is equal... */
  94. if (((min_ver[FW_VER_MAJOR] == WLCORE_FW_VER_IGNORE) ||
  95. (min_ver[FW_VER_MAJOR] == fw_ver[FW_VER_MAJOR])) &&
  96. /* ...the minor must be greater or equal */
  97. ((min_ver[FW_VER_MINOR] != WLCORE_FW_VER_IGNORE) &&
  98. (min_ver[FW_VER_MINOR] > fw_ver[FW_VER_MINOR])))
  99. goto fail;
  100. return 0;
  101. fail:
  102. for (i = 0; i < NUM_FW_VER; i++)
  103. if (min_ver[i] == WLCORE_FW_VER_IGNORE)
  104. snprintf(min_fw_str, sizeof(min_fw_str),
  105. "%s*.", min_fw_str);
  106. else
  107. snprintf(min_fw_str, sizeof(min_fw_str),
  108. "%s%u.", min_fw_str, min_ver[i]);
  109. wl1271_error("Your WiFi FW version (%u.%u.%u.%u.%u) is invalid.\n"
  110. "Please use at least FW %s\n"
  111. "You can get the latest firmwares at:\n"
  112. "git://github.com/TI-OpenLink/firmwares.git",
  113. fw_ver[FW_VER_CHIP], fw_ver[FW_VER_IF_TYPE],
  114. fw_ver[FW_VER_MAJOR], fw_ver[FW_VER_SUBTYPE],
  115. fw_ver[FW_VER_MINOR], min_fw_str);
  116. return -EINVAL;
  117. }
  118. static int wlcore_boot_static_data(struct wl1271 *wl)
  119. {
  120. struct wl1271_static_data *static_data;
  121. size_t len = sizeof(*static_data) + wl->static_data_priv_len;
  122. int ret;
  123. static_data = kmalloc(len, GFP_KERNEL);
  124. if (!static_data) {
  125. ret = -ENOMEM;
  126. goto out;
  127. }
  128. ret = wlcore_read(wl, wl->cmd_box_addr, static_data, len, false);
  129. if (ret < 0)
  130. goto out_free;
  131. ret = wlcore_boot_parse_fw_ver(wl, static_data);
  132. if (ret < 0)
  133. goto out_free;
  134. ret = wlcore_validate_fw_ver(wl);
  135. if (ret < 0)
  136. goto out_free;
  137. ret = wlcore_handle_static_data(wl, static_data);
  138. if (ret < 0)
  139. goto out_free;
  140. out_free:
  141. kfree(static_data);
  142. out:
  143. return ret;
  144. }
  145. static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
  146. size_t fw_data_len, u32 dest)
  147. {
  148. struct wlcore_partition_set partition;
  149. int addr, chunk_num, partition_limit;
  150. u8 *p, *chunk;
  151. int ret;
  152. /* whal_FwCtrl_LoadFwImageSm() */
  153. wl1271_debug(DEBUG_BOOT, "starting firmware upload");
  154. wl1271_debug(DEBUG_BOOT, "fw_data_len %zd chunk_size %d",
  155. fw_data_len, CHUNK_SIZE);
  156. if ((fw_data_len % 4) != 0) {
  157. wl1271_error("firmware length not multiple of four");
  158. return -EIO;
  159. }
  160. chunk = kmalloc(CHUNK_SIZE, GFP_KERNEL);
  161. if (!chunk) {
  162. wl1271_error("allocation for firmware upload chunk failed");
  163. return -ENOMEM;
  164. }
  165. memcpy(&partition, &wl->ptable[PART_DOWN], sizeof(partition));
  166. partition.mem.start = dest;
  167. ret = wlcore_set_partition(wl, &partition);
  168. if (ret < 0)
  169. goto out;
  170. /* 10.1 set partition limit and chunk num */
  171. chunk_num = 0;
  172. partition_limit = wl->ptable[PART_DOWN].mem.size;
  173. while (chunk_num < fw_data_len / CHUNK_SIZE) {
  174. /* 10.2 update partition, if needed */
  175. addr = dest + (chunk_num + 2) * CHUNK_SIZE;
  176. if (addr > partition_limit) {
  177. addr = dest + chunk_num * CHUNK_SIZE;
  178. partition_limit = chunk_num * CHUNK_SIZE +
  179. wl->ptable[PART_DOWN].mem.size;
  180. partition.mem.start = addr;
  181. ret = wlcore_set_partition(wl, &partition);
  182. if (ret < 0)
  183. goto out;
  184. }
  185. /* 10.3 upload the chunk */
  186. addr = dest + chunk_num * CHUNK_SIZE;
  187. p = buf + chunk_num * CHUNK_SIZE;
  188. memcpy(chunk, p, CHUNK_SIZE);
  189. wl1271_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x",
  190. p, addr);
  191. ret = wlcore_write(wl, addr, chunk, CHUNK_SIZE, false);
  192. if (ret < 0)
  193. goto out;
  194. chunk_num++;
  195. }
  196. /* 10.4 upload the last chunk */
  197. addr = dest + chunk_num * CHUNK_SIZE;
  198. p = buf + chunk_num * CHUNK_SIZE;
  199. memcpy(chunk, p, fw_data_len % CHUNK_SIZE);
  200. wl1271_debug(DEBUG_BOOT, "uploading fw last chunk (%zd B) 0x%p to 0x%x",
  201. fw_data_len % CHUNK_SIZE, p, addr);
  202. ret = wlcore_write(wl, addr, chunk, fw_data_len % CHUNK_SIZE, false);
  203. out:
  204. kfree(chunk);
  205. return ret;
  206. }
  207. int wlcore_boot_upload_firmware(struct wl1271 *wl)
  208. {
  209. u32 chunks, addr, len;
  210. int ret = 0;
  211. u8 *fw;
  212. fw = wl->fw;
  213. chunks = be32_to_cpup((__be32 *) fw);
  214. fw += sizeof(u32);
  215. wl1271_debug(DEBUG_BOOT, "firmware chunks to be uploaded: %u", chunks);
  216. while (chunks--) {
  217. addr = be32_to_cpup((__be32 *) fw);
  218. fw += sizeof(u32);
  219. len = be32_to_cpup((__be32 *) fw);
  220. fw += sizeof(u32);
  221. if (len > 300000) {
  222. wl1271_info("firmware chunk too long: %u", len);
  223. return -EINVAL;
  224. }
  225. wl1271_debug(DEBUG_BOOT, "chunk %d addr 0x%x len %u",
  226. chunks, addr, len);
  227. ret = wl1271_boot_upload_firmware_chunk(wl, fw, len, addr);
  228. if (ret != 0)
  229. break;
  230. fw += len;
  231. }
  232. return ret;
  233. }
  234. EXPORT_SYMBOL_GPL(wlcore_boot_upload_firmware);
  235. int wlcore_boot_upload_nvs(struct wl1271 *wl)
  236. {
  237. size_t nvs_len, burst_len;
  238. int i;
  239. u32 dest_addr, val;
  240. u8 *nvs_ptr, *nvs_aligned;
  241. int ret;
  242. if (wl->nvs == NULL) {
  243. wl1271_error("NVS file is needed during boot");
  244. return -ENODEV;
  245. }
  246. if (wl->quirks & WLCORE_QUIRK_LEGACY_NVS) {
  247. struct wl1271_nvs_file *nvs =
  248. (struct wl1271_nvs_file *)wl->nvs;
  249. /*
  250. * FIXME: the LEGACY NVS image support (NVS's missing the 5GHz
  251. * band configurations) can be removed when those NVS files stop
  252. * floating around.
  253. */
  254. if (wl->nvs_len == sizeof(struct wl1271_nvs_file) ||
  255. wl->nvs_len == WL1271_INI_LEGACY_NVS_FILE_SIZE) {
  256. if (nvs->general_params.dual_mode_select)
  257. wl->enable_11a = true;
  258. }
  259. if (wl->nvs_len != sizeof(struct wl1271_nvs_file) &&
  260. (wl->nvs_len != WL1271_INI_LEGACY_NVS_FILE_SIZE ||
  261. wl->enable_11a)) {
  262. wl1271_error("nvs size is not as expected: %zu != %zu",
  263. wl->nvs_len, sizeof(struct wl1271_nvs_file));
  264. kfree(wl->nvs);
  265. wl->nvs = NULL;
  266. wl->nvs_len = 0;
  267. return -EILSEQ;
  268. }
  269. /* only the first part of the NVS needs to be uploaded */
  270. nvs_len = sizeof(nvs->nvs);
  271. nvs_ptr = (u8 *) nvs->nvs;
  272. } else {
  273. struct wl128x_nvs_file *nvs = (struct wl128x_nvs_file *)wl->nvs;
  274. if (wl->nvs_len == sizeof(struct wl128x_nvs_file)) {
  275. if (nvs->general_params.dual_mode_select)
  276. wl->enable_11a = true;
  277. } else {
  278. wl1271_error("nvs size is not as expected: %zu != %zu",
  279. wl->nvs_len,
  280. sizeof(struct wl128x_nvs_file));
  281. kfree(wl->nvs);
  282. wl->nvs = NULL;
  283. wl->nvs_len = 0;
  284. return -EILSEQ;
  285. }
  286. /* only the first part of the NVS needs to be uploaded */
  287. nvs_len = sizeof(nvs->nvs);
  288. nvs_ptr = (u8 *)nvs->nvs;
  289. }
  290. /* update current MAC address to NVS */
  291. nvs_ptr[11] = wl->addresses[0].addr[0];
  292. nvs_ptr[10] = wl->addresses[0].addr[1];
  293. nvs_ptr[6] = wl->addresses[0].addr[2];
  294. nvs_ptr[5] = wl->addresses[0].addr[3];
  295. nvs_ptr[4] = wl->addresses[0].addr[4];
  296. nvs_ptr[3] = wl->addresses[0].addr[5];
  297. /*
  298. * Layout before the actual NVS tables:
  299. * 1 byte : burst length.
  300. * 2 bytes: destination address.
  301. * n bytes: data to burst copy.
  302. *
  303. * This is ended by a 0 length, then the NVS tables.
  304. */
  305. /* FIXME: Do we need to check here whether the LSB is 1? */
  306. while (nvs_ptr[0]) {
  307. burst_len = nvs_ptr[0];
  308. dest_addr = (nvs_ptr[1] & 0xfe) | ((u32)(nvs_ptr[2] << 8));
  309. /*
  310. * Due to our new wl1271_translate_reg_addr function,
  311. * we need to add the register partition start address
  312. * to the destination
  313. */
  314. dest_addr += wl->curr_part.reg.start;
  315. /* We move our pointer to the data */
  316. nvs_ptr += 3;
  317. for (i = 0; i < burst_len; i++) {
  318. if (nvs_ptr + 3 >= (u8 *) wl->nvs + nvs_len)
  319. goto out_badnvs;
  320. val = (nvs_ptr[0] | (nvs_ptr[1] << 8)
  321. | (nvs_ptr[2] << 16) | (nvs_ptr[3] << 24));
  322. wl1271_debug(DEBUG_BOOT,
  323. "nvs burst write 0x%x: 0x%x",
  324. dest_addr, val);
  325. ret = wlcore_write32(wl, dest_addr, val);
  326. if (ret < 0)
  327. return ret;
  328. nvs_ptr += 4;
  329. dest_addr += 4;
  330. }
  331. if (nvs_ptr >= (u8 *) wl->nvs + nvs_len)
  332. goto out_badnvs;
  333. }
  334. /*
  335. * We've reached the first zero length, the first NVS table
  336. * is located at an aligned offset which is at least 7 bytes further.
  337. * NOTE: The wl->nvs->nvs element must be first, in order to
  338. * simplify the casting, we assume it is at the beginning of
  339. * the wl->nvs structure.
  340. */
  341. nvs_ptr = (u8 *)wl->nvs +
  342. ALIGN(nvs_ptr - (u8 *)wl->nvs + 7, 4);
  343. if (nvs_ptr >= (u8 *) wl->nvs + nvs_len)
  344. goto out_badnvs;
  345. nvs_len -= nvs_ptr - (u8 *)wl->nvs;
  346. /* Now we must set the partition correctly */
  347. ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
  348. if (ret < 0)
  349. return ret;
  350. /* Copy the NVS tables to a new block to ensure alignment */
  351. nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL);
  352. if (!nvs_aligned)
  353. return -ENOMEM;
  354. /* And finally we upload the NVS tables */
  355. ret = wlcore_write_data(wl, REG_CMD_MBOX_ADDRESS, nvs_aligned, nvs_len,
  356. false);
  357. kfree(nvs_aligned);
  358. return ret;
  359. out_badnvs:
  360. wl1271_error("nvs data is malformed");
  361. return -EILSEQ;
  362. }
  363. EXPORT_SYMBOL_GPL(wlcore_boot_upload_nvs);
  364. int wlcore_boot_run_firmware(struct wl1271 *wl)
  365. {
  366. int loop, ret;
  367. u32 chip_id, intr;
  368. /* Make sure we have the boot partition */
  369. ret = wlcore_set_partition(wl, &wl->ptable[PART_BOOT]);
  370. if (ret < 0)
  371. return ret;
  372. ret = wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);
  373. if (ret < 0)
  374. return ret;
  375. ret = wlcore_read_reg(wl, REG_CHIP_ID_B, &chip_id);
  376. if (ret < 0)
  377. return ret;
  378. wl1271_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);
  379. if (chip_id != wl->chip.id) {
  380. wl1271_error("chip id doesn't match after firmware boot");
  381. return -EIO;
  382. }
  383. /* wait for init to complete */
  384. loop = 0;
  385. while (loop++ < INIT_LOOP) {
  386. udelay(INIT_LOOP_DELAY);
  387. ret = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR, &intr);
  388. if (ret < 0)
  389. return ret;
  390. if (intr == 0xffffffff) {
  391. wl1271_error("error reading hardware complete "
  392. "init indication");
  393. return -EIO;
  394. }
  395. /* check that ACX_INTR_INIT_COMPLETE is enabled */
  396. else if (intr & WL1271_ACX_INTR_INIT_COMPLETE) {
  397. ret = wlcore_write_reg(wl, REG_INTERRUPT_ACK,
  398. WL1271_ACX_INTR_INIT_COMPLETE);
  399. if (ret < 0)
  400. return ret;
  401. break;
  402. }
  403. }
  404. if (loop > INIT_LOOP) {
  405. wl1271_error("timeout waiting for the hardware to "
  406. "complete initialization");
  407. return -EIO;
  408. }
  409. /* get hardware config command mail box */
  410. ret = wlcore_read_reg(wl, REG_COMMAND_MAILBOX_PTR, &wl->cmd_box_addr);
  411. if (ret < 0)
  412. return ret;
  413. wl1271_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x", wl->cmd_box_addr);
  414. /* get hardware config event mail box */
  415. ret = wlcore_read_reg(wl, REG_EVENT_MAILBOX_PTR, &wl->mbox_ptr[0]);
  416. if (ret < 0)
  417. return ret;
  418. wl->mbox_ptr[1] = wl->mbox_ptr[0] + wl->mbox_size;
  419. wl1271_debug(DEBUG_MAILBOX, "MBOX ptrs: 0x%x 0x%x",
  420. wl->mbox_ptr[0], wl->mbox_ptr[1]);
  421. ret = wlcore_boot_static_data(wl);
  422. if (ret < 0) {
  423. wl1271_error("error getting static data");
  424. return ret;
  425. }
  426. /*
  427. * in case of full asynchronous mode the firmware event must be
  428. * ready to receive event from the command mailbox
  429. */
  430. /* unmask required mbox events */
  431. ret = wl1271_event_unmask(wl);
  432. if (ret < 0) {
  433. wl1271_error("EVENT mask setting failed");
  434. return ret;
  435. }
  436. /* set the working partition to its "running" mode offset */
  437. ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
  438. /* firmware startup completed */
  439. return ret;
  440. }
  441. EXPORT_SYMBOL_GPL(wlcore_boot_run_firmware);